X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;ds=sidebyside;f=lib%2Flibrte_acl%2Frte_acl_osdep_alone.h;h=a84b6f970b9ee47823a5b8ad1f3fd78df4afab07;hb=fdf20fa7bee9df9037116318a87080e1eb7e757e;hp=bdeba54fa453a9d26c90c3fa9e6c2443148cb680;hpb=be04c7072745e0471fc185c31c2a2df835ee4e06;p=dpdk.git

diff --git a/lib/librte_acl/rte_acl_osdep_alone.h b/lib/librte_acl/rte_acl_osdep_alone.h
index bdeba54fa4..a84b6f970b 100644
--- a/lib/librte_acl/rte_acl_osdep_alone.h
+++ b/lib/librte_acl/rte_acl_osdep_alone.h
@@ -180,13 +180,13 @@ rte_rdtsc(void)
  * rte_memory related.
  */
 #define	SOCKET_ID_ANY	-1                  /**< Any NUMA socket. */
-#define	CACHE_LINE_SIZE	64                  /**< Cache line size. */
-#define	CACHE_LINE_MASK	(CACHE_LINE_SIZE-1) /**< Cache line mask. */
+#define	RTE_CACHE_LINE_SIZE	64                  /**< Cache line size. */
+#define	RTE_CACHE_LINE_MASK	(RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
 
 /**
  * Force alignment to cache line.
  */
-#define	__rte_cache_aligned	__attribute__((__aligned__(CACHE_LINE_SIZE)))
+#define	__rte_cache_aligned	__attribute__((__aligned__(RTE_CACHE_LINE_SIZE)))
 
 
 /*