X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest%2Ftest_timer.c;h=03d3d6e951e2342f5d233e86f1b24a43e4ad52ac;hb=e9d48c0072d36eb6423b45fba4ec49d0def6c36f;hp=344e391a0b0510f7a6cb52065a6b4b23446fc9bc;hpb=e987449c9fce2ec6210be3d8bad680d08d68c9dc;p=dpdk.git diff --git a/app/test/test_timer.c b/app/test/test_timer.c index 344e391a0b..03d3d6e951 100644 --- a/app/test/test_timer.c +++ b/app/test/test_timer.c @@ -1,42 +1,41 @@ /*- * BSD LICENSE * - * Copyright(c) 2010-2013 Intel Corporation. All rights reserved. + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. * All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: * - * * Redistributions of source code must retain the above copyright + * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * */ /* * Timer * ===== * - * #. Stress tests. + * #. Stress test 1. * * The objective of the timer stress tests is to check that there are no * race conditions in list and status management. This test launches, @@ -54,6 +53,23 @@ * on another core (same probability), or stopped (same * probability). * + * # Stress test 2. + * + * The objective of this test is similar to the first in that it attempts + * to find if there are any race conditions in the timer library. However, + * it is less complex in terms of operations performed and duration, as it + * is designed to have a predictable outcome that can be tested. + * + * - A set of timers is initialized for use by the test + * - All cores then simultaneously are set to schedule all the timers at + * the same time, so conflicts should occur. + * - Then there is a delay while we wait for the timers to expire + * - Then the master lcore calls timer_manage() and we check that all + * timers have had their callbacks called exactly once - no more no less. + * - Then we repeat the process, except after setting up the timers, we have + * all cores randomly reschedule them. + * - Again we check that the expected number of callbacks has occurred when + * we call timer-manage. * * #. Basic test. * @@ -120,6 +136,7 @@ #include #include #include +#include #include "test.h" @@ -191,8 +208,8 @@ timer_stress_main_loop(__attribute__((unused)) void *arg) rte_timer_manage(); /* simulate the processing of a packet - * (3 us = 6000 cycles at 2 Ghz) */ - rte_delay_us(3); + * (1 us = 2000 cycles at 2 Ghz) */ + rte_delay_us(1); /* randomly stop or reset timer */ r = rte_rand(); @@ -215,6 +232,99 @@ timer_stress_main_loop(__attribute__((unused)) void *arg) return 0; } +static volatile int cb_count = 0; + +/* callback for second stress test. will only be called + * on master lcore */ +static void +timer_stress2_cb(struct rte_timer *tim __rte_unused, void *arg __rte_unused) +{ + cb_count++; +} + +#define NB_STRESS2_TIMERS 8192 + +static int +timer_stress2_main_loop(__attribute__((unused)) void *arg) +{ + static struct rte_timer *timers; + int i; + static volatile int ready = 0; + uint64_t delay = rte_get_timer_hz() / 4; + unsigned lcore_id = rte_lcore_id(); + + if (lcore_id == rte_get_master_lcore()) { + timers = rte_malloc(NULL, sizeof(*timers) * NB_STRESS2_TIMERS, 0); + if (timers == NULL) { + printf("Test Failed\n"); + printf("- Cannot allocate memory for timers\n" ); + return -1; + } + for (i = 0; i < NB_STRESS2_TIMERS; i++) + rte_timer_init(&timers[i]); + ready = 1; + } else { + while (!ready) + rte_pause(); + } + + /* have all cores schedule all timers on master lcore */ + for (i = 0; i < NB_STRESS2_TIMERS; i++) + rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(), + timer_stress2_cb, NULL); + + ready = 0; + rte_delay_ms(500); + + /* now check that we get the right number of callbacks */ + if (lcore_id == rte_get_master_lcore()) { + rte_timer_manage(); + if (cb_count != NB_STRESS2_TIMERS) { + printf("Test Failed\n"); + printf("- Stress test 2, part 1 failed\n"); + printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS, + cb_count); + return -1; + } + ready = 1; + } else { + while (!ready) + rte_pause(); + } + + /* now test again, just stop and restart timers at random after init*/ + for (i = 0; i < NB_STRESS2_TIMERS; i++) + rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(), + timer_stress2_cb, NULL); + cb_count = 0; + + /* pick random timer to reset, stopping them first half the time */ + for (i = 0; i < 100000; i++) { + int r = rand() % NB_STRESS2_TIMERS; + if (i % 2) + rte_timer_stop(&timers[r]); + rte_timer_reset(&timers[r], delay, SINGLE, rte_get_master_lcore(), + timer_stress2_cb, NULL); + } + + rte_delay_ms(500); + + /* now check that we get the right number of callbacks */ + if (lcore_id == rte_get_master_lcore()) { + rte_timer_manage(); + if (cb_count != NB_STRESS2_TIMERS) { + printf("Test Failed\n"); + printf("- Stress test 2, part 2 failed\n"); + printf("- Expected %d callbacks, got %d\n", NB_STRESS2_TIMERS, + cb_count); + return -1; + } + printf("Test OK\n"); + } + + return 0; +} + /* timer callback for basic tests */ static void timer_basic_cb(struct rte_timer *tim, void *arg) @@ -385,6 +495,11 @@ test_timer(void) /* stop timer 0 used for stress test */ rte_timer_stop_sync(&mytiminfo[0].tim); + /* run a second, slightly different set of stress tests */ + printf("Start timer stress tests 2\n"); + rte_eal_mp_remote_launch(timer_stress2_main_loop, NULL, CALL_MASTER); + rte_eal_mp_wait_lcore(); + /* calculate the "end of test" time */ cur_time = rte_get_timer_cycles(); hz = rte_get_timer_hz();