X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest%2Ftest_timer.c;h=73da5b63617e23bc796a0caa53f90ad64db096c2;hb=ff708facfcbf42f3dcb3c62d82ecd93e7b8c2506;hp=3945ed8ebf947aa2ee7289a68d361a128941a2ac;hpb=8ec70d19f5fb940a1085cdad992eba94e8f823d0;p=dpdk.git diff --git a/app/test/test_timer.c b/app/test/test_timer.c index 3945ed8ebf..73da5b6361 100644 --- a/app/test/test_timer.c +++ b/app/test/test_timer.c @@ -1,13 +1,13 @@ /*- * BSD LICENSE - * + * * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. * All rights reserved. - * + * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: - * + * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright @@ -17,7 +17,7 @@ * * Neither the name of Intel Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * + * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR @@ -33,7 +33,6 @@ #include "test.h" -#ifdef RTE_LIBRTE_TIMER /* * Timer * ===== @@ -124,15 +123,12 @@ #include #include -#include - #include #include #include #include #include #include -#include #include #include #include @@ -250,12 +246,15 @@ static int timer_stress2_main_loop(__attribute__((unused)) void *arg) { static struct rte_timer *timers; - int i; + int i, ret; static volatile int ready = 0; uint64_t delay = rte_get_timer_hz() / 4; unsigned lcore_id = rte_lcore_id(); + int32_t my_collisions = 0; + static rte_atomic32_t collisions = RTE_ATOMIC32_INIT(0); if (lcore_id == rte_get_master_lcore()) { + cb_count = 0; timers = rte_malloc(NULL, sizeof(*timers) * NB_STRESS2_TIMERS, 0); if (timers == NULL) { printf("Test Failed\n"); @@ -271,15 +270,25 @@ timer_stress2_main_loop(__attribute__((unused)) void *arg) } /* have all cores schedule all timers on master lcore */ - for (i = 0; i < NB_STRESS2_TIMERS; i++) - rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(), + for (i = 0; i < NB_STRESS2_TIMERS; i++) { + ret = rte_timer_reset(&timers[i], delay, SINGLE, rte_get_master_lcore(), timer_stress2_cb, NULL); + /* there will be collisions when multiple cores simultaneously + * configure the same timers */ + if (ret != 0) + my_collisions++; + } + if (my_collisions != 0) + rte_atomic32_add(&collisions, my_collisions); ready = 0; rte_delay_ms(500); /* now check that we get the right number of callbacks */ if (lcore_id == rte_get_master_lcore()) { + my_collisions = rte_atomic32_read(&collisions); + if (my_collisions != 0) + printf("- %d timer reset collisions (OK)\n", my_collisions); rte_timer_manage(); if (cb_count != NB_STRESS2_TIMERS) { printf("Test Failed\n"); @@ -314,6 +323,13 @@ timer_stress2_main_loop(__attribute__((unused)) void *arg) /* now check that we get the right number of callbacks */ if (lcore_id == rte_get_master_lcore()) { rte_timer_manage(); + + /* clean up statics, in case we run again */ + rte_free(timers); + timers = NULL; + ready = 0; + rte_atomic32_set(&collisions, 0); + if (cb_count != NB_STRESS2_TIMERS) { printf("Test Failed\n"); printf("- Stress test 2, part 2 failed\n"); @@ -459,7 +475,7 @@ timer_sanity_check(void) return 0; } -int +static int test_timer(void) { unsigned i; @@ -517,17 +533,13 @@ test_timer(void) rte_timer_stop_sync(&mytiminfo[i].tim); } - rte_timer_dump_stats(); + rte_timer_dump_stats(stdout); return 0; } -#else - -int -test_timer(void) -{ - return 0; -} - -#endif +static struct test_command timer_cmd = { + .command = "timer_autotest", + .callback = test_timer, +}; +REGISTER_TEST_COMMAND(timer_cmd);