X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=app%2Ftest-pmd%2Fieee1588fwd.c;h=2b7003be4f26b590ff2d60bf6d4aafd923984c39;hb=538da7a1cad25fbdffe298c8ca76fc4dbd262d1b;hp=976aa2862399086c1fcb649d9784a7c4746ef671;hpb=08b563ffb19d8baf59dd84200f25bc85031d18a7;p=dpdk.git diff --git a/app/test-pmd/ieee1588fwd.c b/app/test-pmd/ieee1588fwd.c index 976aa28623..2b7003be4f 100644 --- a/app/test-pmd/ieee1588fwd.c +++ b/app/test-pmd/ieee1588fwd.c @@ -1,70 +1,11 @@ -/*- - * BSD LICENSE - * - * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2010-2015 Intel Corporation */ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include -#include +#include #include "testpmd.h" @@ -78,6 +19,7 @@ struct ptpv2_msg { uint8_t version; /**< must be 0x02 */ uint8_t unused[34]; }; + #define PTP_SYNC_MESSAGE 0x0 #define PTP_DELAY_REQ_MESSAGE 0x1 #define PTP_PATH_DELAY_REQ_MESSAGE 0x2 @@ -109,393 +51,17 @@ struct ptpv2_msg { * is greater than the previous one. */ -/* - * 1GbE 82576 Kawela registers used for IEEE1588 hardware support - */ -#define IGBE_82576_ETQF(n) (0x05CB0 + (4 * (n))) -#define IGBE_82576_ETQF_FILTER_ENABLE (1 << 26) -#define IGBE_82576_ETQF_1588_TIMESTAMP (1 << 30) - -#define IGBE_82576_TSYNCRXCTL 0x0B620 -#define IGBE_82576_TSYNCRXCTL_RXTS_ENABLE (1 << 4) - -#define IGBE_82576_RXSTMPL 0x0B624 -#define IGBE_82576_RXSTMPH 0x0B628 -#define IGBE_82576_RXSATRL 0x0B62C -#define IGBE_82576_RXSATRH 0x0B630 -#define IGBE_82576_TSYNCTXCTL 0x0B614 -#define IGBE_82576_TSYNCTXCTL_TXTS_ENABLE (1 << 4) - -#define IGBE_82576_TXSTMPL 0x0B618 -#define IGBE_82576_TXSTMPH 0x0B61C -#define IGBE_82576_SYSTIML 0x0B600 -#define IGBE_82576_SYSTIMH 0x0B604 -#define IGBE_82576_TIMINCA 0x0B608 -#define IGBE_82576_TIMADJL 0x0B60C -#define IGBE_82576_TIMADJH 0x0B610 -#define IGBE_82576_TSAUXC 0x0B640 -#define IGBE_82576_TRGTTIML0 0x0B644 -#define IGBE_82576_TRGTTIMH0 0x0B648 -#define IGBE_82576_TRGTTIML1 0x0B64C -#define IGBE_82576_TRGTTIMH1 0x0B650 -#define IGBE_82576_AUXSTMPL0 0x0B65C -#define IGBE_82576_AUXSTMPH0 0x0B660 -#define IGBE_82576_AUXSTMPL1 0x0B664 -#define IGBE_82576_AUXSTMPH1 0x0B668 -#define IGBE_82576_TSYNCRXCFG 0x05F50 -#define IGBE_82576_TSSDP 0x0003C - -/* - * 10GbE 82599 Niantic registers used for IEEE1588 hardware support - */ -#define IXGBE_82599_ETQF(n) (0x05128 + (4 * (n))) -#define IXGBE_82599_ETQF_FILTER_ENABLE (1 << 31) -#define IXGBE_82599_ETQF_1588_TIMESTAMP (1 << 30) - -#define IXGBE_82599_TSYNCRXCTL 0x05188 -#define IXGBE_82599_TSYNCRXCTL_RXTS_ENABLE (1 << 4) - -#define IXGBE_82599_RXSTMPL 0x051E8 -#define IXGBE_82599_RXSTMPH 0x051A4 -#define IXGBE_82599_RXSATRL 0x051A0 -#define IXGBE_82599_RXSATRH 0x051A8 -#define IXGBE_82599_RXMTRL 0x05120 -#define IXGBE_82599_TSYNCTXCTL 0x08C00 -#define IXGBE_82599_TSYNCTXCTL_TXTS_ENABLE (1 << 4) - -#define IXGBE_82599_TXSTMPL 0x08C04 -#define IXGBE_82599_TXSTMPH 0x08C08 -#define IXGBE_82599_SYSTIML 0x08C0C -#define IXGBE_82599_SYSTIMH 0x08C10 -#define IXGBE_82599_TIMINCA 0x08C14 -#define IXGBE_82599_TIMADJL 0x08C18 -#define IXGBE_82599_TIMADJH 0x08C1C -#define IXGBE_82599_TSAUXC 0x08C20 -#define IXGBE_82599_TRGTTIML0 0x08C24 -#define IXGBE_82599_TRGTTIMH0 0x08C28 -#define IXGBE_82599_TRGTTIML1 0x08C2C -#define IXGBE_82599_TRGTTIMH1 0x08C30 -#define IXGBE_82599_AUXSTMPL0 0x08C3C -#define IXGBE_82599_AUXSTMPH0 0x08C40 -#define IXGBE_82599_AUXSTMPL1 0x08C44 -#define IXGBE_82599_AUXSTMPH1 0x08C48 - -/** - * Mandatory ETQF register for IEEE1588 packets filter. - */ -#define ETQF_FILTER_1588_REG 3 - -/** - * Recommended value for increment and period of - * the Increment Attribute Register. - */ -#define IEEE1588_TIMINCA_INIT ((0x02 << 24) | 0x00F42400) - -/** - * Data structure with pointers to port-specific functions. - */ -typedef void (*ieee1588_start_t)(portid_t pi); /**< Start IEEE1588 feature. */ -typedef void (*ieee1588_stop_t)(portid_t pi); /**< Stop IEEE1588 feature. */ -typedef int (*tmst_read_t)(portid_t pi, uint64_t *tmst); /**< Read TMST regs */ - -struct port_ieee1588_ops { - ieee1588_start_t ieee1588_start; - ieee1588_stop_t ieee1588_stop; - tmst_read_t rx_tmst_read; - tmst_read_t tx_tmst_read; -}; - -/** - * 1GbE 82576 IEEE1588 operations. - */ static void -igbe_82576_ieee1588_start(portid_t pi) +port_ieee1588_rx_timestamp_check(portid_t pi, uint32_t index) { - uint32_t tsync_ctl; - - /* - * Start incrementation of the System Time registers used to - * timestamp PTP packets. - */ - port_id_pci_reg_write(pi, IGBE_82576_TIMINCA, IEEE1588_TIMINCA_INIT); - port_id_pci_reg_write(pi, IGBE_82576_TSAUXC, 0); - - /* - * Enable L2 filtering of IEEE1588 Ethernet frame types. - */ - port_id_pci_reg_write(pi, IGBE_82576_ETQF(ETQF_FILTER_1588_REG), - (ETHER_TYPE_1588 | - IGBE_82576_ETQF_FILTER_ENABLE | - IGBE_82576_ETQF_1588_TIMESTAMP)); + struct timespec timestamp = {0, 0}; - /* - * Enable timestamping of received PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCRXCTL); - tsync_ctl |= IGBE_82576_TSYNCRXCTL_RXTS_ENABLE; - port_id_pci_reg_write(pi, IGBE_82576_TSYNCRXCTL, tsync_ctl); - - /* - * Enable Timestamping of transmitted PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCTXCTL); - tsync_ctl |= IGBE_82576_TSYNCTXCTL_TXTS_ENABLE; - port_id_pci_reg_write(pi, IGBE_82576_TSYNCTXCTL, tsync_ctl); -} - -static void -igbe_82576_ieee1588_stop(portid_t pi) -{ - uint32_t tsync_ctl; - - /* - * Disable Timestamping of transmitted PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCTXCTL); - tsync_ctl &= ~IGBE_82576_TSYNCTXCTL_TXTS_ENABLE; - port_id_pci_reg_write(pi, IGBE_82576_TSYNCTXCTL, tsync_ctl); - - /* - * Disable timestamping of received PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCRXCTL); - tsync_ctl &= ~IGBE_82576_TSYNCRXCTL_RXTS_ENABLE; - port_id_pci_reg_write(pi, IGBE_82576_TSYNCRXCTL, tsync_ctl); - - /* - * Disable L2 filtering of IEEE1588 Ethernet types. - */ - port_id_pci_reg_write(pi, IGBE_82576_ETQF(ETQF_FILTER_1588_REG), 0); - - /* - * Stop incrementation of the System Time registers. - */ - port_id_pci_reg_write(pi, IGBE_82576_TIMINCA, 0); -} - -/** - * Return the 64-bit value contained in the RX IEEE1588 timestamp registers - * of a 1GbE 82576 port. - * - * @param pi - * The port identifier. - * - * @param tmst - * The address of a 64-bit variable to return the value of the RX timestamp. - * - * @return - * -1: the RXSTMPL and RXSTMPH registers of the port are not valid. - * 0: the variable pointed to by the "tmst" parameter contains the value - * of the RXSTMPL and RXSTMPH registers of the port. - */ -static int -igbe_82576_rx_timestamp_read(portid_t pi, uint64_t *tmst) -{ - uint32_t tsync_rxctl; - uint32_t rx_stmpl; - uint32_t rx_stmph; - - tsync_rxctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCRXCTL); - if ((tsync_rxctl & 0x01) == 0) - return (-1); - - rx_stmpl = port_id_pci_reg_read(pi, IGBE_82576_RXSTMPL); - rx_stmph = port_id_pci_reg_read(pi, IGBE_82576_RXSTMPH); - *tmst = (uint64_t)(((uint64_t) rx_stmph << 32) | rx_stmpl); - return (0); -} - -/** - * Return the 64-bit value contained in the TX IEEE1588 timestamp registers - * of a 1GbE 82576 port. - * - * @param pi - * The port identifier. - * - * @param tmst - * The address of a 64-bit variable to return the value of the TX timestamp. - * - * @return - * -1: the TXSTMPL and TXSTMPH registers of the port are not valid. - * 0: the variable pointed to by the "tmst" parameter contains the value - * of the TXSTMPL and TXSTMPH registers of the port. - */ -static int -igbe_82576_tx_timestamp_read(portid_t pi, uint64_t *tmst) -{ - uint32_t tsync_txctl; - uint32_t tx_stmpl; - uint32_t tx_stmph; - - tsync_txctl = port_id_pci_reg_read(pi, IGBE_82576_TSYNCTXCTL); - if ((tsync_txctl & 0x01) == 0) - return (-1); - - tx_stmpl = port_id_pci_reg_read(pi, IGBE_82576_TXSTMPL); - tx_stmph = port_id_pci_reg_read(pi, IGBE_82576_TXSTMPH); - *tmst = (uint64_t)(((uint64_t) tx_stmph << 32) | tx_stmpl); - return (0); -} - -static struct port_ieee1588_ops igbe_82576_ieee1588_ops = { - .ieee1588_start = igbe_82576_ieee1588_start, - .ieee1588_stop = igbe_82576_ieee1588_stop, - .rx_tmst_read = igbe_82576_rx_timestamp_read, - .tx_tmst_read = igbe_82576_tx_timestamp_read, -}; - -/** - * 10GbE 82599 IEEE1588 operations. - */ -static void -ixgbe_82599_ieee1588_start(portid_t pi) -{ - uint32_t tsync_ctl; - - /* - * Start incrementation of the System Time registers used to - * timestamp PTP packets. - */ - port_id_pci_reg_write(pi, IXGBE_82599_TIMINCA, IEEE1588_TIMINCA_INIT); - - /* - * Enable L2 filtering of IEEE1588 Ethernet frame types. - */ - port_id_pci_reg_write(pi, IXGBE_82599_ETQF(ETQF_FILTER_1588_REG), - (ETHER_TYPE_1588 | - IXGBE_82599_ETQF_FILTER_ENABLE | - IXGBE_82599_ETQF_1588_TIMESTAMP)); - - /* - * Enable timestamping of received PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCRXCTL); - tsync_ctl |= IXGBE_82599_TSYNCRXCTL_RXTS_ENABLE; - port_id_pci_reg_write(pi, IXGBE_82599_TSYNCRXCTL, tsync_ctl); - - /* - * Enable Timestamping of transmitted PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCTXCTL); - tsync_ctl |= IXGBE_82599_TSYNCTXCTL_TXTS_ENABLE; - port_id_pci_reg_write(pi, IXGBE_82599_TSYNCTXCTL, tsync_ctl); -} - -static void -ixgbe_82599_ieee1588_stop(portid_t pi) -{ - uint32_t tsync_ctl; - - /* - * Disable Timestamping of transmitted PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCTXCTL); - tsync_ctl &= ~IXGBE_82599_TSYNCTXCTL_TXTS_ENABLE; - port_id_pci_reg_write(pi, IXGBE_82599_TSYNCTXCTL, tsync_ctl); - - /* - * Disable timestamping of received PTP packets. - */ - tsync_ctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCRXCTL); - tsync_ctl &= ~IXGBE_82599_TSYNCRXCTL_RXTS_ENABLE; - port_id_pci_reg_write(pi, IXGBE_82599_TSYNCRXCTL, tsync_ctl); - - /* - * Disable L2 filtering of IEEE1588 Ethernet frame types. - */ - port_id_pci_reg_write(pi, IXGBE_82599_ETQF(ETQF_FILTER_1588_REG), 0); - - /* - * Stop incrementation of the System Time registers. - */ - port_id_pci_reg_write(pi, IXGBE_82599_TIMINCA, 0); -} - -/** - * Return the 64-bit value contained in the RX IEEE1588 timestamp registers - * of a 10GbE 82599 port. - * - * @param pi - * The port identifier. - * - * @param tmst - * The address of a 64-bit variable to return the value of the TX timestamp. - * - * @return - * -1: the RX timestamp registers of the port are not valid. - * 0: the variable pointed to by the "tmst" parameter contains the value - * of the RXSTMPL and RXSTMPH registers of the port. - */ -static int -ixgbe_82599_rx_timestamp_read(portid_t pi, uint64_t *tmst) -{ - uint32_t tsync_rxctl; - uint32_t rx_stmpl; - uint32_t rx_stmph; - - tsync_rxctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCRXCTL); - if ((tsync_rxctl & 0x01) == 0) - return (-1); - - rx_stmpl = port_id_pci_reg_read(pi, IXGBE_82599_RXSTMPL); - rx_stmph = port_id_pci_reg_read(pi, IXGBE_82599_RXSTMPH); - *tmst = (uint64_t)(((uint64_t) rx_stmph << 32) | rx_stmpl); - return (0); -} - -/** - * Return the 64-bit value contained in the TX IEEE1588 timestamp registers - * of a 10GbE 82599 port. - * - * @param pi - * The port identifier. - * - * @param tmst - * The address of a 64-bit variable to return the value of the TX timestamp. - * - * @return - * -1: the TXSTMPL and TXSTMPH registers of the port are not valid. - * 0: the variable pointed to by the "tmst" parameter contains the value - * of the TXSTMPL and TXSTMPH registers of the port. - */ -static int -ixgbe_82599_tx_timestamp_read(portid_t pi, uint64_t *tmst) -{ - uint32_t tsync_txctl; - uint32_t tx_stmpl; - uint32_t tx_stmph; - - tsync_txctl = port_id_pci_reg_read(pi, IXGBE_82599_TSYNCTXCTL); - if ((tsync_txctl & 0x01) == 0) - return (-1); - - tx_stmpl = port_id_pci_reg_read(pi, IXGBE_82599_TXSTMPL); - tx_stmph = port_id_pci_reg_read(pi, IXGBE_82599_TXSTMPH); - *tmst = (uint64_t)(((uint64_t) tx_stmph << 32) | tx_stmpl); - return (0); -} - -static struct port_ieee1588_ops ixgbe_82599_ieee1588_ops = { - .ieee1588_start = ixgbe_82599_ieee1588_start, - .ieee1588_stop = ixgbe_82599_ieee1588_stop, - .rx_tmst_read = ixgbe_82599_rx_timestamp_read, - .tx_tmst_read = ixgbe_82599_tx_timestamp_read, -}; - -static void -port_ieee1588_rx_timestamp_check(portid_t pi) -{ - struct port_ieee1588_ops *ieee_ops; - uint64_t rx_tmst; - - ieee_ops = (struct port_ieee1588_ops *)ports[pi].fwd_ctx; - if (ieee_ops->rx_tmst_read(pi, &rx_tmst) < 0) { - printf("Port %u: RX timestamp registers not valid\n", - (unsigned) pi); + if (rte_eth_timesync_read_rx_timestamp(pi, ×tamp, index) < 0) { + printf("Port %u RX timestamp registers not valid\n", pi); return; } - printf("Port %u RX timestamp value 0x%"PRIu64"\n", - (unsigned) pi, rx_tmst); + printf("Port %u RX timestamp value %lu s %lu ns\n", + pi, timestamp.tv_sec, timestamp.tv_nsec); } #define MAX_TX_TMST_WAIT_MICROSECS 1000 /**< 1 milli-second */ @@ -503,26 +69,23 @@ port_ieee1588_rx_timestamp_check(portid_t pi) static void port_ieee1588_tx_timestamp_check(portid_t pi) { - struct port_ieee1588_ops *ieee_ops; - uint64_t tx_tmst; - unsigned wait_us; + struct timespec timestamp = {0, 0}; + unsigned wait_us = 0; - ieee_ops = (struct port_ieee1588_ops *)ports[pi].fwd_ctx; - wait_us = 0; - while ((ieee_ops->tx_tmst_read(pi, &tx_tmst) < 0) && + while ((rte_eth_timesync_read_tx_timestamp(pi, ×tamp) < 0) && (wait_us < MAX_TX_TMST_WAIT_MICROSECS)) { rte_delay_us(1); wait_us++; } if (wait_us >= MAX_TX_TMST_WAIT_MICROSECS) { - printf("Port %u: TX timestamp registers not valid after" + printf("Port %u TX timestamp registers not valid after " "%u micro-seconds\n", - (unsigned) pi, (unsigned) MAX_TX_TMST_WAIT_MICROSECS); + pi, MAX_TX_TMST_WAIT_MICROSECS); return; } - printf("Port %u TX timestamp value 0x%"PRIu64" validated after " + printf("Port %u TX timestamp value %lu s %lu ns validated after " "%u micro-second%s\n", - (unsigned) pi, tx_tmst, wait_us, + pi, timestamp.tv_sec, timestamp.tv_nsec, wait_us, (wait_us == 1) ? "" : "s"); } @@ -530,9 +93,11 @@ static void ieee1588_packet_fwd(struct fwd_stream *fs) { struct rte_mbuf *mb; - struct ether_hdr *eth_hdr; + struct rte_ether_hdr *eth_hdr; + struct rte_ether_addr addr; struct ptpv2_msg *ptp_hdr; uint16_t eth_type; + uint32_t timesync_index; /* * Receive 1 packet at a time. @@ -546,26 +111,27 @@ ieee1588_packet_fwd(struct fwd_stream *fs) * Check that the received packet is a PTP packet that was detected * by the hardware. */ - eth_hdr = rte_pktmbuf_mtod(mb, struct ether_hdr *); + eth_hdr = rte_pktmbuf_mtod(mb, struct rte_ether_hdr *); eth_type = rte_be_to_cpu_16(eth_hdr->ether_type); + if (! (mb->ol_flags & PKT_RX_IEEE1588_PTP)) { if (eth_type == ETHER_TYPE_1588) { printf("Port %u Received PTP packet not filtered" " by hardware\n", - (unsigned) fs->rx_port); + fs->rx_port); } else { printf("Port %u Received non PTP packet type=0x%4x " "len=%u\n", - (unsigned) fs->rx_port, eth_type, + fs->rx_port, eth_type, (unsigned) mb->pkt_len); } rte_pktmbuf_free(mb); return; } if (eth_type != ETHER_TYPE_1588) { - printf("Port %u Received NON PTP packet wrongly" + printf("Port %u Received NON PTP packet incorrectly" " detected by hardware\n", - (unsigned) fs->rx_port); + fs->rx_port); rte_pktmbuf_free(mb); return; } @@ -575,23 +141,23 @@ ieee1588_packet_fwd(struct fwd_stream *fs) * PTP_SYNC_MESSAGE. */ ptp_hdr = (struct ptpv2_msg *) (rte_pktmbuf_mtod(mb, char *) + - sizeof(struct ether_hdr)); + sizeof(struct rte_ether_hdr)); if (ptp_hdr->version != 0x02) { printf("Port %u Received PTP V2 Ethernet frame with wrong PTP" " protocol version 0x%x (should be 0x02)\n", - (unsigned) fs->rx_port, ptp_hdr->version); + fs->rx_port, ptp_hdr->version); rte_pktmbuf_free(mb); return; } if (ptp_hdr->msg_id != PTP_SYNC_MESSAGE) { printf("Port %u Received PTP V2 Ethernet frame with unexpected" - " messageID 0x%x (expected 0x0 - PTP_SYNC_MESSAGE)\n", - (unsigned) fs->rx_port, ptp_hdr->msg_id); + " message ID 0x%x (expected 0x0 - PTP_SYNC_MESSAGE)\n", + fs->rx_port, ptp_hdr->msg_id); rte_pktmbuf_free(mb); return; } printf("Port %u IEEE1588 PTP V2 SYNC Message filtered by hardware\n", - (unsigned) fs->rx_port); + fs->rx_port); /* * Check that the received PTP packet has been timestamped by the @@ -600,20 +166,27 @@ ieee1588_packet_fwd(struct fwd_stream *fs) if (! (mb->ol_flags & PKT_RX_IEEE1588_TMST)) { printf("Port %u Received PTP packet not timestamped" " by hardware\n", - (unsigned) fs->rx_port); + fs->rx_port); rte_pktmbuf_free(mb); return; } - /* Check the RX timestamp */ - port_ieee1588_rx_timestamp_check(fs->rx_port); + /* For i40e we need the timesync register index. It is ignored for the + * other PMDs. */ + timesync_index = mb->timesync & 0x3; + /* Read and check the RX timestamp. */ + port_ieee1588_rx_timestamp_check(fs->rx_port, timesync_index); + + /* Swap dest and src mac addresses. */ + rte_ether_addr_copy(ð_hdr->d_addr, &addr); + rte_ether_addr_copy(ð_hdr->s_addr, ð_hdr->d_addr); + rte_ether_addr_copy(&addr, ð_hdr->s_addr); /* Forward PTP packet with hardware TX timestamp */ mb->ol_flags |= PKT_TX_IEEE1588_TMST; fs->tx_packets += 1; if (rte_eth_tx_burst(fs->rx_port, fs->tx_queue, &mb, 1) == 0) { - printf("Port %u sent PTP packet dropped\n", - (unsigned) fs->rx_port); + printf("Port %u sent PTP packet dropped\n", fs->rx_port); fs->fwd_dropped += 1; rte_pktmbuf_free(mb); return; @@ -628,23 +201,13 @@ ieee1588_packet_fwd(struct fwd_stream *fs) static void port_ieee1588_fwd_begin(portid_t pi) { - struct port_ieee1588_ops *ieee_ops; - - if (strcmp(ports[pi].dev_info.driver_name, "rte_igb_pmd") == 0) - ieee_ops = &igbe_82576_ieee1588_ops; - else - ieee_ops = &ixgbe_82599_ieee1588_ops; - ports[pi].fwd_ctx = ieee_ops; - (ieee_ops->ieee1588_start)(pi); + rte_eth_timesync_enable(pi); } static void port_ieee1588_fwd_end(portid_t pi) { - struct port_ieee1588_ops *ieee_ops; - - ieee_ops = (struct port_ieee1588_ops *)ports[pi].fwd_ctx; - (ieee_ops->ieee1588_stop)(pi); + rte_eth_timesync_disable(pi); } struct fwd_engine ieee1588_fwd_engine = {