X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Fcommon_base;h=d26eebbba2d9ca1d56a89c47868d794b8570745b;hb=27db82c709dc466537b8437b0dec0619880d59c9;hp=db6d39fcbfd213991ced5ced6f126834db5f2c4e;hpb=7a34c21557164e2a9d2bb6915281dff12a3f4741;p=dpdk.git diff --git a/config/common_base b/config/common_base index db6d39fcbf..d26eebbba2 100644 --- a/config/common_base +++ b/config/common_base @@ -1,6 +1,20 @@ # SPDX-License-Identifier: BSD-3-Clause # Copyright(c) 2010-2017 Intel Corporation +# +# String that appears before the version number +# +CONFIG_RTE_VER_PREFIX="DPDK" + +# +# Version information completed when this file is processed for a build +# +CONFIG_RTE_VER_YEAR=__YEAR +CONFIG_RTE_VER_MONTH=__MONTH +CONFIG_RTE_VER_MINOR=__MINOR +CONFIG_RTE_VER_SUFFIX=__SUFFIX +CONFIG_RTE_VER_RELEASE=__RELEASE + # # define executive environment # RTE_EXEC_ENV values are the directories in mk/exec-env/ @@ -35,6 +49,11 @@ CONFIG_RTE_FORCE_INTRINSICS=n # CONFIG_RTE_ARCH_STRICT_ALIGN=n +# +# Enable link time optimization +# +CONFIG_RTE_ENABLE_LTO=n + # # Compile to share library # @@ -46,14 +65,14 @@ CONFIG_RTE_BUILD_SHARED_LIB=n CONFIG_RTE_NEXT_ABI=y # -# Major ABI to overwrite library specific LIBABIVER +# Machine's cache line size # -CONFIG_RTE_MAJOR_ABI= +CONFIG_RTE_CACHE_LINE_SIZE=64 # -# Machine's cache line size +# Memory model # -CONFIG_RTE_CACHE_LINE_SIZE=64 +CONFIG_RTE_USE_C11_MEM_MODEL=n # # Compile Environment Abstraction Layer @@ -61,6 +80,7 @@ CONFIG_RTE_CACHE_LINE_SIZE=64 CONFIG_RTE_LIBRTE_EAL=y CONFIG_RTE_MAX_LCORE=128 CONFIG_RTE_MAX_NUMA_NODES=8 +CONFIG_RTE_MAX_HEAPS=32 CONFIG_RTE_MAX_MEMSEG_LISTS=64 # each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages # or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller @@ -79,10 +99,10 @@ CONFIG_RTE_MAX_MEMZONE=2560 CONFIG_RTE_MAX_TAILQ=32 CONFIG_RTE_ENABLE_ASSERT=n CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO +CONFIG_RTE_ENABLE_TRACE_FP=n CONFIG_RTE_LOG_HISTORY=256 CONFIG_RTE_BACKTRACE=y CONFIG_RTE_LIBEAL_USE_HPET=n -CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_EAL_VFIO=n @@ -91,6 +111,11 @@ CONFIG_RTE_MAX_VFIO_CONTAINERS=64 CONFIG_RTE_MALLOC_DEBUG=n CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n CONFIG_RTE_USE_LIBBSD=n +# Use WFE instructions to implement the rte_wait_for_equal_xxx APIs, +# calling these APIs put the cores in low power state while waiting +# for the memory address to become equal to the expected value. +# This is supported only by aarch64. +CONFIG_RTE_ARM_USE_WFE=n # # Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing. @@ -100,6 +125,9 @@ CONFIG_RTE_USE_LIBBSD=n CONFIG_RTE_ENABLE_AVX=y CONFIG_RTE_ENABLE_AVX512=n +# Use ARM LSE ATOMIC instructions +CONFIG_RTE_ARM_FEATURE_ATOMICS=n + # Default driver path (or "" to disable) CONFIG_RTE_EAL_PMD_PATH="" @@ -128,7 +156,7 @@ CONFIG_RTE_MAX_QUEUES_PER_PORT=1024 CONFIG_RTE_LIBRTE_IEEE1588=n CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16 CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y -CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n +CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n # # Turn off Tx preparation stage @@ -138,6 +166,11 @@ CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n # CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n +# +# Common libraries, before Bus/PMDs +# +CONFIG_RTE_LIBRTE_COMMON_DPAAX=n + # # Compile the Intel FPGA bus # @@ -163,6 +196,11 @@ CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n +# +# Compile Aquantia Atlantic PMD driver +# +CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y + # # Compile AMD PMD # @@ -187,12 +225,11 @@ CONFIG_RTE_LIBRTE_BNXT_PMD=y # Compile burst-oriented Chelsio Terminator (CXGBE) PMD # CONFIG_RTE_LIBRTE_CXGBE_PMD=y -CONFIG_RTE_LIBRTE_CXGBE_DEBUG=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_REG=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_MBOX=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_TX=n -CONFIG_RTE_LIBRTE_CXGBE_DEBUG_RX=n -CONFIG_RTE_LIBRTE_CXGBE_TPUT=y + +# +# Compile burst-oriented NXP PFE PMD driver +# +CONFIG_RTE_LIBRTE_PFE_PMD=n # NXP DPAA Bus CONFIG_RTE_LIBRTE_DPAA_BUS=n @@ -217,6 +254,11 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y CONFIG_RTE_LIBRTE_DPAA2_PMD=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +# +# Compile NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=n + # # Compile burst-oriented Amazon ENA PMD driver # @@ -241,6 +283,21 @@ CONFIG_RTE_LIBRTE_E1000_DEBUG_TX=n CONFIG_RTE_LIBRTE_E1000_DEBUG_TX_FREE=n CONFIG_RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC=n +# +# Compile burst-oriented HINIC PMD driver +# +CONFIG_RTE_LIBRTE_HINIC_PMD=n + +# +# Compile burst-oriented HNS3 PMD driver +# +CONFIG_RTE_LIBRTE_HNS3_PMD=n + +# +# Compile Pensando IONIC PMD driver +# +CONFIG_RTE_LIBRTE_IONIC_PMD=y + # # Compile burst-oriented IXGBE PMD driver # @@ -249,7 +306,6 @@ CONFIG_RTE_LIBRTE_IXGBE_DEBUG_RX=n CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX=n CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n -CONFIG_RTE_IXGBE_INC_VECTOR=y CONFIG_RTE_LIBRTE_IXGBE_BYPASS=n # @@ -276,29 +332,50 @@ CONFIG_RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE=y CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y # -# Compile burst-oriented AVF PMD driver +# Compile burst-oriented ICE PMD driver +# +CONFIG_RTE_LIBRTE_ICE_PMD=y +CONFIG_RTE_LIBRTE_ICE_DEBUG_RX=n +CONFIG_RTE_LIBRTE_ICE_DEBUG_TX=n +CONFIG_RTE_LIBRTE_ICE_DEBUG_TX_FREE=n +CONFIG_RTE_LIBRTE_ICE_16BYTE_RX_DESC=n + +# Compile burst-oriented IAVF PMD driver +# +CONFIG_RTE_LIBRTE_IAVF_PMD=y +CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX=n +CONFIG_RTE_LIBRTE_IAVF_DEBUG_TX_FREE=n +CONFIG_RTE_LIBRTE_IAVF_DEBUG_RX=n +CONFIG_RTE_LIBRTE_IAVF_DEBUG_DUMP_DESC=n +CONFIG_RTE_LIBRTE_IAVF_16BYTE_RX_DESC=n +# +# Compile burst-oriented IPN3KE PMD driver # -CONFIG_RTE_LIBRTE_AVF_PMD=y -CONFIG_RTE_LIBRTE_AVF_INC_VECTOR=y -CONFIG_RTE_LIBRTE_AVF_DEBUG_TX=n -CONFIG_RTE_LIBRTE_AVF_DEBUG_TX_FREE=n -CONFIG_RTE_LIBRTE_AVF_DEBUG_RX=n -CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n +CONFIG_RTE_LIBRTE_IPN3KE_PMD=n # # Compile burst-oriented Mellanox ConnectX-3 (MLX4) PMD # CONFIG_RTE_LIBRTE_MLX4_PMD=n CONFIG_RTE_LIBRTE_MLX4_DEBUG=n -CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n # -# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5 & Bluefield -# (MLX5) PMD +# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5, +# ConnectX-6 & BlueField (MLX5) PMD # CONFIG_RTE_LIBRTE_MLX5_PMD=n CONFIG_RTE_LIBRTE_MLX5_DEBUG=n -CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n + +# +# Compile vdpa-oriented Mellanox ConnectX-6 & BlueField (MLX5) PMD +# +CONFIG_RTE_LIBRTE_MLX5_VDPA_PMD=n + +# Linking method for mlx4/5 dependency on ibverbs and related libraries +# Default linking is dynamic by linker. +# Other options are: dynamic by dlopen at run-time, or statically embedded. +CONFIG_RTE_IBVERBS_LINK_DLOPEN=n +CONFIG_RTE_IBVERBS_LINK_STATIC=n # # Compile burst-oriented Netronome NFP PMD driver @@ -327,6 +404,11 @@ CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n # CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n +# +# Compile software PMD backed by NFB device +# +CONFIG_RTE_LIBRTE_NFB_PMD=n + # # Compile burst-oriented Cavium Thunderx NICVF PMD driver # @@ -348,6 +430,11 @@ CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n # CONFIG_RTE_LIBRTE_OCTEONTX_PMD=y +# +# Compile burst-oriented Marvell OCTEON TX2 network PMD driver +# +CONFIG_RTE_LIBRTE_OCTEONTX2_PMD=y + # # Compile WRS accelerated virtual port (AVP) guest PMD driver # @@ -382,6 +469,16 @@ CONFIG_RTE_LIBRTE_VMXNET3_DEBUG_TX_FREE=n # CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n +# +# Compile software PMD backed by AF_XDP sockets (Linux only) +# +CONFIG_RTE_LIBRTE_PMD_AF_XDP=n + +# +# Compile Memory Interface PMD driver (Linux only) +# +CONFIG_RTE_LIBRTE_PMD_MEMIF=n + # # Compile link bonding PMD library # @@ -399,6 +496,11 @@ CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y # CONFIG_RTE_LIBRTE_MVPP2_PMD=n +# +# Compile Marvell MVNETA PMD driver +# +CONFIG_RTE_LIBRTE_MVNETA_PMD=n + # # Compile support for VMBus library # @@ -454,8 +556,11 @@ CONFIG_RTE_PMD_PACKET_PREFETCH=y # EXPERIMENTAL: API may change without prior notice # CONFIG_RTE_LIBRTE_BBDEV=y +CONFIG_RTE_LIBRTE_BBDEV_DEBUG=n CONFIG_RTE_BBDEV_MAX_DEVS=128 -CONFIG_RTE_BBDEV_OFFLOAD_COST=n +CONFIG_RTE_BBDEV_OFFLOAD_COST=y +CONFIG_RTE_BBDEV_SDK_AVX2=n +CONFIG_RTE_BBDEV_SDK_AVX512=n # # Compile PMD for NULL bbdev device @@ -465,7 +570,17 @@ CONFIG_RTE_LIBRTE_PMD_BBDEV_NULL=y # # Compile PMD for turbo software bbdev device # -CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n +CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=y + +# +# Compile PMD for Intel FPGA LTE FEC bbdev device +# +CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC=y + +# +# Compile PMD for Intel FPGA 5GNR FEC bbdev device +# +CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC=y # # Compile generic crypto device library @@ -479,6 +594,12 @@ CONFIG_RTE_CRYPTO_MAX_DEVS=64 CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n +# +# Compile NXP CAAM JR crypto Driver +# +CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n +CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n + # # Compile NXP DPAA2 crypto sec driver for CAAM HW # @@ -491,14 +612,26 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 # -# Compile PMD for QuickAssist based devices +# Compile PMD for Cavium OCTEON TX crypto device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y + +# +# Compile PMD for Marvell OCTEON TX2 crypto device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_CRYPTO=y + +# +# Compile PMD for QuickAssist based devices - see docs for details # CONFIG_RTE_LIBRTE_PMD_QAT=y CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n +CONFIG_RTE_LIBRTE_PMD_QAT_ASYM=n # # Max. number of QuickAssist devices, which can be detected and attached # CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48 +CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536 # # Compile PMD for virtio crypto devices @@ -558,7 +691,11 @@ CONFIG_RTE_LIBRTE_PMD_CCP=n # Compile PMD for Marvell Crypto device # CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n -CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n + +# +# Compile PMD for NITROX crypto device +# +CONFIG_RTE_LIBRTE_PMD_NITROX=y # # Compile generic security library @@ -576,11 +713,21 @@ CONFIG_RTE_COMPRESS_MAX_DEVS=64 # CONFIG_RTE_COMPRESSDEV_TEST=n +# +# Compile PMD for Octeontx ZIPVF compression device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y + # # Compile PMD for ISA-L compression device # CONFIG_RTE_LIBRTE_PMD_ISAL=n +# +# Compile PMD for ZLIB compression device +# +CONFIG_RTE_LIBRTE_PMD_ZLIB=n + # # Compile generic event device library # @@ -591,6 +738,7 @@ CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64 CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32 CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024 CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32 +CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32 # # Compile PMD for skeleton event device @@ -603,11 +751,21 @@ CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n # CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y +# +# Compile PMD for distributed software event device +# +CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=y + # # Compile PMD for octeontx sso event device # CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y +# +# Compile PMD for octeontx2 sso event device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV=y + # # Compile PMD for OPDL event device # @@ -628,7 +786,7 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=n # EXPERIMENTAL: API may change without prior notice # CONFIG_RTE_LIBRTE_RAWDEV=y -CONFIG_RTE_RAWDEV_MAX_DEVS=10 +CONFIG_RTE_RAWDEV_MAX_DEVS=64 CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=y # @@ -644,13 +802,37 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n # # Compile PMD for Intel FPGA raw device # -CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y +CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=n + +# +# Compile PMD for Intel IOAT raw device +# +CONFIG_RTE_LIBRTE_PMD_IOAT_RAWDEV=y + +# +# Compile PMD for octeontx2 DMA raw device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_DMA_RAWDEV=y + +# +# Compile PMD for octeontx2 EP raw device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EP_RAWDEV=y + +# +# Compile PMD for NTB raw device +# +CONFIG_RTE_LIBRTE_PMD_NTB_RAWDEV=y # # Compile librte_ring # CONFIG_RTE_LIBRTE_RING=y -CONFIG_RTE_RING_USE_C11_MEM_MODEL=n + +# +# Compile librte_stack +# +CONFIG_RTE_LIBRTE_STACK=y # # Compile librte_mempool @@ -672,6 +854,11 @@ CONFIG_RTE_DRIVER_MEMPOOL_STACK=y # CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL=y +# +# Compile PMD for octeontx2 npa mempool device +# +CONFIG_RTE_LIBRTE_OCTEONTX2_MEMPOOL=y + # # Compile librte_mbuf # @@ -734,6 +921,28 @@ CONFIG_RTE_LIBRTE_BITRATE=y # CONFIG_RTE_LIBRTE_LATENCY_STATS=y +# +# Compile librte_telemetry +# +CONFIG_RTE_LIBRTE_TELEMETRY=n + +# +# Compile librte_rcu +# +CONFIG_RTE_LIBRTE_RCU=y +CONFIG_RTE_LIBRTE_RCU_DEBUG=n + +# +# Compile librte_rib +# +CONFIG_RTE_LIBRTE_RIB=y + +# +# Compile librte_fib +# +CONFIG_RTE_LIBRTE_FIB=y +CONFIG_RTE_LIBRTE_FIB_DEBUG=n + # # Compile librte_lpm # @@ -832,7 +1041,6 @@ CONFIG_RTE_PIPELINE_STATS_COLLECT=n CONFIG_RTE_LIBRTE_KNI=n CONFIG_RTE_LIBRTE_PMD_KNI=n CONFIG_RTE_KNI_KMOD=n -CONFIG_RTE_KNI_KMOD_ETHTOOL=n CONFIG_RTE_KNI_PREEMPT_DEFAULT=y # @@ -867,6 +1075,11 @@ CONFIG_RTE_LIBRTE_BPF=y # allow load BPF from ELF files (requires libelf) CONFIG_RTE_LIBRTE_BPF_ELF=n +# +# Compile librte_ipsec +# +CONFIG_RTE_LIBRTE_IPSEC=y + # # Compile the test application # @@ -890,6 +1103,11 @@ CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n # CONFIG_RTE_TEST_BBDEV=y +# +# Compile the compression performance application +# +CONFIG_RTE_APP_COMPRESS_PERF=y + # # Compile the crypto performance application #