X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=config%2Frte_config.h;h=9bb915347cb6b1a6c75e6fb60b743a0c2a1888b9;hb=d659460a17afa28d4c7a37d492df47ab3ac542c7;hp=e353d8d6d43288a00a01c7f496da38f1f515daad;hpb=26c198ff344698954a3e335d0e2b769909300eab;p=dpdk.git diff --git a/config/rte_config.h b/config/rte_config.h index e353d8d6d4..9bb915347c 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -18,20 +18,30 @@ #include +/* legacy defines */ +#ifdef RTE_EXEC_ENV_LINUX +#define RTE_EXEC_ENV_LINUXAPP 1 +#endif +#ifdef RTE_EXEC_ENV_FREEBSD +#define RTE_EXEC_ENV_BSDAPP 1 +#endif + +/* String that appears before the version number */ +#define RTE_VER_PREFIX "DPDK" + /****** library defines ********/ /* EAL defines */ +#define RTE_MAX_HEAPS 32 #define RTE_MAX_MEMSEG_LISTS 128 #define RTE_MAX_MEMSEG_PER_LIST 8192 #define RTE_MAX_MEM_MB_PER_LIST 32768 #define RTE_MAX_MEMSEG_PER_TYPE 32768 #define RTE_MAX_MEM_MB_PER_TYPE 65536 -#define RTE_MAX_MEM_MB 524288 #define RTE_MAX_MEMZONE 2560 #define RTE_MAX_TAILQ 32 #define RTE_LOG_DP_LEVEL RTE_LOG_INFO #define RTE_BACKTRACE 1 -#define RTE_EAL_VFIO 1 #define RTE_MAX_VFIO_CONTAINERS 64 /* bsd module defines */ @@ -48,7 +58,6 @@ #define RTE_PKTMBUF_HEADROOM 128 /* ether defines */ -#define RTE_MAX_ETHPORTS 32 #define RTE_MAX_QUEUES_PER_PORT 1024 #define RTE_ETHDEV_QUEUE_STAT_CNTRS 16 #define RTE_ETHDEV_RXTX_CALLBACKS 1 @@ -60,14 +69,19 @@ /* compressdev defines */ #define RTE_COMPRESS_MAX_DEVS 64 +/* regexdev defines */ +#define RTE_MAX_REGEXDEV_DEVS 32 + /* eventdev defines */ #define RTE_EVENT_MAX_DEVS 16 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64 #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 +#define RTE_EVENT_ETH_INTR_RING_SIZE 1024 #define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32 +#define RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE 32 /* rawdev defines */ -#define RTE_RAWDEV_MAX_DEVS 10 +#define RTE_RAWDEV_MAX_DEVS 64 /* ip_fragmentation defines */ #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4 @@ -83,27 +97,24 @@ #define RTE_SCHED_PORT_N_GRINDERS 8 #undef RTE_SCHED_VECTOR +/* KNI defines */ +#define RTE_KNI_PREEMPT_DEFAULT 1 + +/* rte_graph defines */ +#define RTE_GRAPH_BURST_SIZE 256 +#define RTE_LIBRTE_GRAPH_STATS 1 + /****** driver defines ********/ -/* - * Number of sessions to create in the session memory pool - * on a single instance of crypto HW device. - */ /* QuickAssist device */ -#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048 /* Max. number of QuickAssist devices which can be attached */ #define RTE_PMD_QAT_MAX_PCI_DEVICES 48 +#define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16 +#define RTE_PMD_QAT_COMP_IM_BUFFER_SIZE 65536 /* virtio crypto defines */ -#define RTE_VIRTIO_CRYPTO_PMD_MAX_NB_SESSIONS 1024 #define RTE_MAX_VIRTIO_CRYPTO 32 -/* DPAA2_SEC */ -#define RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS 2048 - -/* DPAA_SEC */ -#define RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS 2048 - /* DPAA SEC max cryptodev devices*/ #define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4 @@ -116,11 +127,12 @@ #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 -/* interval up to 8160 us, aligned to 2 (or default value) */ -#define RTE_LIBRTE_I40E_ITR_INTERVAL -1 /* Ring net PMD settings */ #define RTE_PMD_RING_MAX_RX_RINGS 16 #define RTE_PMD_RING_MAX_TX_RINGS 16 +/* QEDE PMD defines */ +#define RTE_LIBRTE_QEDE_FW "" + #endif /* _RTE_CONFIG_H_ */