X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fbnxt%2Fbnxt.h;h=e5bdf63602bc39c7f2e619d0d6cb14d5fcb2bc24;hb=5526c8025d4d16e68b412e378b0ceab42dbcd9d4;hp=ea556d07922a925b6bcb9bc14c0e2628aea7e2c9;hpb=6391aeb8fb8094054af56062e584f7ac98049f1c;p=dpdk.git diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h index ea556d0792..e5bdf63602 100644 --- a/drivers/net/bnxt/bnxt.h +++ b/drivers/net/bnxt/bnxt.h @@ -19,26 +19,98 @@ #include #include "bnxt_cpr.h" +#include "bnxt_util.h" + +/* Vendor ID */ +#define PCI_VENDOR_ID_BROADCOM 0x14E4 + +/* Device IDs */ +#define BROADCOM_DEV_ID_STRATUS_NIC_VF1 0x1606 +#define BROADCOM_DEV_ID_STRATUS_NIC_VF2 0x1609 +#define BROADCOM_DEV_ID_STRATUS_NIC 0x1614 +#define BROADCOM_DEV_ID_57414_VF 0x16c1 +#define BROADCOM_DEV_ID_57301 0x16c8 +#define BROADCOM_DEV_ID_57302 0x16c9 +#define BROADCOM_DEV_ID_57304_PF 0x16ca +#define BROADCOM_DEV_ID_57304_VF 0x16cb +#define BROADCOM_DEV_ID_57417_MF 0x16cc +#define BROADCOM_DEV_ID_NS2 0x16cd +#define BROADCOM_DEV_ID_57311 0x16ce +#define BROADCOM_DEV_ID_57312 0x16cf +#define BROADCOM_DEV_ID_57402 0x16d0 +#define BROADCOM_DEV_ID_57404 0x16d1 +#define BROADCOM_DEV_ID_57406_PF 0x16d2 +#define BROADCOM_DEV_ID_57406_VF 0x16d3 +#define BROADCOM_DEV_ID_57402_MF 0x16d4 +#define BROADCOM_DEV_ID_57407_RJ45 0x16d5 +#define BROADCOM_DEV_ID_57412 0x16d6 +#define BROADCOM_DEV_ID_57414 0x16d7 +#define BROADCOM_DEV_ID_57416_RJ45 0x16d8 +#define BROADCOM_DEV_ID_57417_RJ45 0x16d9 +#define BROADCOM_DEV_ID_5741X_VF 0x16dc +#define BROADCOM_DEV_ID_57412_MF 0x16de +#define BROADCOM_DEV_ID_57314 0x16df +#define BROADCOM_DEV_ID_57317_RJ45 0x16e0 +#define BROADCOM_DEV_ID_5731X_VF 0x16e1 +#define BROADCOM_DEV_ID_57417_SFP 0x16e2 +#define BROADCOM_DEV_ID_57416_SFP 0x16e3 +#define BROADCOM_DEV_ID_57317_SFP 0x16e4 +#define BROADCOM_DEV_ID_57404_MF 0x16e7 +#define BROADCOM_DEV_ID_57406_MF 0x16e8 +#define BROADCOM_DEV_ID_57407_SFP 0x16e9 +#define BROADCOM_DEV_ID_57407_MF 0x16ea +#define BROADCOM_DEV_ID_57414_MF 0x16ec +#define BROADCOM_DEV_ID_57416_MF 0x16ee +#define BROADCOM_DEV_ID_57508 0x1750 +#define BROADCOM_DEV_ID_57504 0x1751 +#define BROADCOM_DEV_ID_57502 0x1752 +#define BROADCOM_DEV_ID_57500_VF1 0x1806 +#define BROADCOM_DEV_ID_57500_VF2 0x1807 +#define BROADCOM_DEV_ID_58802 0xd802 +#define BROADCOM_DEV_ID_58804 0xd804 +#define BROADCOM_DEV_ID_58808 0x16f0 +#define BROADCOM_DEV_ID_58802_VF 0xd800 #define BNXT_MAX_MTU 9574 #define VLAN_TAG_SIZE 4 +#define BNXT_NUM_VLANS 2 +#define BNXT_MAX_PKT_LEN (BNXT_MAX_MTU + RTE_ETHER_HDR_LEN +\ + RTE_ETHER_CRC_LEN +\ + (BNXT_NUM_VLANS * VLAN_TAG_SIZE)) #define BNXT_VF_RSV_NUM_RSS_CTX 1 #define BNXT_VF_RSV_NUM_L2_CTX 4 /* TODO: For now, do not support VMDq/RFS on VFs. */ #define BNXT_VF_RSV_NUM_VNIC 1 #define BNXT_MAX_LED 4 -#define BNXT_NUM_VLANS 2 #define BNXT_MIN_RING_DESC 16 #define BNXT_MAX_TX_RING_DESC 4096 #define BNXT_MAX_RX_RING_DESC 8192 #define BNXT_DB_SIZE 0x80 +#define TPA_MAX_AGGS 64 +#define TPA_MAX_AGGS_TH 1024 + +#define TPA_MAX_NUM_SEGS 32 +#define TPA_MAX_SEGS_TH 8 /* 32 segments in 4-segment units */ +#define TPA_MAX_SEGS 5 /* 32 segments in log2 units */ + +#define BNXT_TPA_MAX_AGGS(bp) \ + (BNXT_CHIP_THOR(bp) ? TPA_MAX_AGGS_TH : \ + TPA_MAX_AGGS) + +#define BNXT_TPA_MAX_SEGS(bp) \ + (BNXT_CHIP_THOR(bp) ? TPA_MAX_SEGS_TH : \ + TPA_MAX_SEGS) + #ifdef RTE_ARCH_ARM64 #define BNXT_NUM_ASYNC_CPR(bp) (BNXT_STINGRAY(bp) ? 0 : 1) #else #define BNXT_NUM_ASYNC_CPR(bp) 1 #endif +#define BNXT_MISC_VEC_ID RTE_INTR_VEC_ZERO_OFFSET +#define BNXT_RX_VEC_START RTE_INTR_VEC_RXTX_OFFSET + /* Chimp Communication Channel */ #define GRCPF_REG_CHIMP_CHANNEL_OFFSET 0x0 #define GRCPF_REG_CHIMP_COMM_TRIGGER 0x100 @@ -188,6 +260,10 @@ struct rte_flow { struct bnxt_vnic_info *vnic; }; +#define BNXT_PTP_FLAGS_PATH_TX 0x0 +#define BNXT_PTP_FLAGS_PATH_RX 0x1 +#define BNXT_PTP_FLAGS_CURRENT_TIME 0x2 + struct bnxt_ptp_cfg { #define BNXT_GRCPF_REG_WINDOW_BASE_OUT 0x400 #define BNXT_GRCPF_REG_SYNC_TIME 0x480 @@ -198,16 +274,16 @@ struct bnxt_ptp_cfg { struct bnxt *bp; #define BNXT_MAX_TX_TS 1 uint16_t rxctl; -#define BNXT_PTP_MSG_SYNC (1 << 0) -#define BNXT_PTP_MSG_DELAY_REQ (1 << 1) -#define BNXT_PTP_MSG_PDELAY_REQ (1 << 2) -#define BNXT_PTP_MSG_PDELAY_RESP (1 << 3) -#define BNXT_PTP_MSG_FOLLOW_UP (1 << 8) -#define BNXT_PTP_MSG_DELAY_RESP (1 << 9) -#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP (1 << 10) -#define BNXT_PTP_MSG_ANNOUNCE (1 << 11) -#define BNXT_PTP_MSG_SIGNALING (1 << 12) -#define BNXT_PTP_MSG_MANAGEMENT (1 << 13) +#define BNXT_PTP_MSG_SYNC BIT(0) +#define BNXT_PTP_MSG_DELAY_REQ BIT(1) +#define BNXT_PTP_MSG_PDELAY_REQ BIT(2) +#define BNXT_PTP_MSG_PDELAY_RESP BIT(3) +#define BNXT_PTP_MSG_FOLLOW_UP BIT(8) +#define BNXT_PTP_MSG_DELAY_RESP BIT(9) +#define BNXT_PTP_MSG_PDELAY_RESP_FOLLOW_UP BIT(10) +#define BNXT_PTP_MSG_ANNOUNCE BIT(11) +#define BNXT_PTP_MSG_SIGNALING BIT(12) +#define BNXT_PTP_MSG_MANAGEMENT BIT(13) #define BNXT_PTP_MSG_EVENTS (BNXT_PTP_MSG_SYNC | \ BNXT_PTP_MSG_DELAY_REQ | \ BNXT_PTP_MSG_PDELAY_REQ | \ @@ -233,6 +309,9 @@ struct bnxt_ptp_cfg { uint32_t rx_mapped_regs[BNXT_PTP_RX_REGS]; uint32_t tx_regs[BNXT_PTP_TX_REGS]; uint32_t tx_mapped_regs[BNXT_PTP_TX_REGS]; + + /* On Thor, the Rx timestamp is present in the Rx completion record */ + uint64_t rx_timestamp; }; struct bnxt_coal { @@ -363,11 +442,14 @@ struct bnxt_error_recovery_info { uint32_t reset_reg[BNXT_NUM_RESET_REG]; uint32_t reset_reg_val[BNXT_NUM_RESET_REG]; uint8_t delay_after_reset[BNXT_NUM_RESET_REG]; -#define BNXT_FLAG_ERROR_RECOVERY_HOST (1 << 0) -#define BNXT_FLAG_ERROR_RECOVERY_CO_CPU (1 << 1) -#define BNXT_FLAG_MASTER_FUNC (1 << 2) -#define BNXT_FLAG_RECOVERY_ENABLED (1 << 3) +#define BNXT_FLAG_ERROR_RECOVERY_HOST BIT(0) +#define BNXT_FLAG_ERROR_RECOVERY_CO_CPU BIT(1) +#define BNXT_FLAG_MASTER_FUNC BIT(2) +#define BNXT_FLAG_RECOVERY_ENABLED BIT(3) uint32_t flags; + + uint32_t last_heart_beat; + uint32_t last_reset_counter; }; /* address space location of register */ @@ -385,6 +467,9 @@ struct bnxt_error_recovery_info { #define BNXT_FW_STATUS_REG_OFF(reg) ((reg) & ~BNXT_FW_STATUS_REG_TYPE_MASK) #define BNXT_GRCP_WINDOW_2_BASE 0x2000 +#define BNXT_GRCP_WINDOW_3_BASE 0x3000 + +#define BNXT_FW_STATUS_SHUTDOWN 0x100000 #define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input) struct bnxt { @@ -396,29 +481,33 @@ struct bnxt { void *doorbell_base; uint32_t flags; -#define BNXT_FLAG_REGISTERED (1 << 0) -#define BNXT_FLAG_VF (1 << 1) -#define BNXT_FLAG_PORT_STATS (1 << 2) -#define BNXT_FLAG_JUMBO (1 << 3) -#define BNXT_FLAG_SHORT_CMD (1 << 4) -#define BNXT_FLAG_UPDATE_HASH (1 << 5) -#define BNXT_FLAG_PTP_SUPPORTED (1 << 6) -#define BNXT_FLAG_MULTI_HOST (1 << 7) -#define BNXT_FLAG_EXT_RX_PORT_STATS (1 << 8) -#define BNXT_FLAG_EXT_TX_PORT_STATS (1 << 9) -#define BNXT_FLAG_KONG_MB_EN (1 << 10) -#define BNXT_FLAG_TRUSTED_VF_EN (1 << 11) -#define BNXT_FLAG_DFLT_VNIC_SET (1 << 12) -#define BNXT_FLAG_THOR_CHIP (1 << 13) -#define BNXT_FLAG_STINGRAY (1 << 14) -#define BNXT_FLAG_FW_RESET (1 << 15) -#define BNXT_FLAG_FATAL_ERROR (1 << 16) -#define BNXT_FLAG_FW_CAP_IF_CHANGE (1 << 17) -#define BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE (1 << 18) -#define BNXT_FLAG_FW_CAP_ERROR_RECOVERY (1 << 19) -#define BNXT_FLAG_EXT_STATS_SUPPORTED (1 << 29) -#define BNXT_FLAG_NEW_RM (1 << 30) -#define BNXT_FLAG_INIT_DONE (1U << 31) +#define BNXT_FLAG_REGISTERED BIT(0) +#define BNXT_FLAG_VF BIT(1) +#define BNXT_FLAG_PORT_STATS BIT(2) +#define BNXT_FLAG_JUMBO BIT(3) +#define BNXT_FLAG_SHORT_CMD BIT(4) +#define BNXT_FLAG_UPDATE_HASH BIT(5) +#define BNXT_FLAG_PTP_SUPPORTED BIT(6) +#define BNXT_FLAG_MULTI_HOST BIT(7) +#define BNXT_FLAG_EXT_RX_PORT_STATS BIT(8) +#define BNXT_FLAG_EXT_TX_PORT_STATS BIT(9) +#define BNXT_FLAG_KONG_MB_EN BIT(10) +#define BNXT_FLAG_TRUSTED_VF_EN BIT(11) +#define BNXT_FLAG_DFLT_VNIC_SET BIT(12) +#define BNXT_FLAG_THOR_CHIP BIT(13) +#define BNXT_FLAG_STINGRAY BIT(14) +#define BNXT_FLAG_FW_RESET BIT(15) +#define BNXT_FLAG_FATAL_ERROR BIT(16) +#define BNXT_FLAG_FW_CAP_IF_CHANGE BIT(17) +#define BNXT_FLAG_IF_CHANGE_HOT_FW_RESET_DONE BIT(18) +#define BNXT_FLAG_FW_CAP_ERROR_RECOVERY BIT(19) +#define BNXT_FLAG_FW_HEALTH_CHECK_SCHEDULED BIT(20) +#define BNXT_FLAG_FW_CAP_ERR_RECOVER_RELOAD BIT(21) +#define BNXT_FLAG_EXT_STATS_SUPPORTED BIT(22) +#define BNXT_FLAG_NEW_RM BIT(23) +#define BNXT_FLAG_INIT_DONE BIT(24) +#define BNXT_FLAG_FW_CAP_ONE_STEP_TX_TS BIT(25) +#define BNXT_FLAG_ADV_FLOW_MGMT BIT(26) #define BNXT_PF(bp) (!((bp)->flags & BNXT_FLAG_VF)) #define BNXT_VF(bp) ((bp)->flags & BNXT_FLAG_VF) #define BNXT_NPAR(bp) ((bp)->port_partition_type) @@ -432,8 +521,15 @@ struct bnxt { #define BNXT_HAS_NQ(bp) BNXT_CHIP_THOR(bp) #define BNXT_HAS_RING_GRPS(bp) (!BNXT_CHIP_THOR(bp)) + uint32_t flow_flags; +#define BNXT_FLOW_FLAG_L2_HDR_SRC_FILTER_EN BIT(0) + pthread_mutex_t flow_lock; + + uint32_t vnic_cap_flags; +#define BNXT_VNIC_CAP_COS_CLASSIFY BIT(0) unsigned int rx_nr_rings; unsigned int rx_cp_nr_rings; + unsigned int rx_num_qs_per_vnic; struct bnxt_rx_queue **rx_queues; const void *rx_mem_zone; struct rx_port_stats *hw_rx_port_stats; @@ -454,6 +550,7 @@ struct bnxt { /* Default completion ring */ struct bnxt_cp_ring_info *async_cp_ring; + struct bnxt_cp_ring_info *rxtx_nq_ring; uint32_t max_ring_grps; struct bnxt_ring_grp_info *grp_info; @@ -468,7 +565,6 @@ struct bnxt { struct bnxt_irq *irq_tbl; -#define MAX_NUM_MAC_ADDR 32 uint8_t mac_addr[RTE_ETHER_ADDR_LEN]; uint16_t hwrm_cmd_seq; @@ -478,13 +574,21 @@ struct bnxt { void *hwrm_short_cmd_req_addr; rte_iova_t hwrm_short_cmd_req_dma_addr; rte_spinlock_t hwrm_lock; + pthread_mutex_t def_cp_lock; uint16_t max_req_len; uint16_t max_resp_len; uint16_t hwrm_max_ext_req_len; + /* default command timeout value of 50ms */ +#define HWRM_CMD_TIMEOUT 50000 + /* default HWRM request timeout value */ + uint32_t hwrm_cmd_timeout; + struct bnxt_link_info link_info; - struct bnxt_cos_queue_info cos_queue[BNXT_COS_QUEUE_COUNT]; - uint8_t tx_cosq_id; + struct bnxt_cos_queue_info rx_cos_queue[BNXT_COS_QUEUE_COUNT]; + struct bnxt_cos_queue_info tx_cos_queue[BNXT_COS_QUEUE_COUNT]; + uint8_t tx_cosq_id[BNXT_COS_QUEUE_COUNT]; + uint8_t rx_cosq_cnt; uint8_t max_tc; uint8_t max_lltc; uint8_t max_q; @@ -500,8 +604,13 @@ struct bnxt { uint16_t max_rx_em_flows; uint16_t max_vnics; uint16_t max_stat_ctx; + uint16_t max_tpa_v2; uint16_t first_vf_id; uint16_t vlan; +#define BNXT_OUTER_TPID_MASK 0x0000ffff +#define BNXT_OUTER_TPID_BD_MASK 0xffff0000 +#define BNXT_OUTER_TPID_BD_SHFT 16 + uint32_t outer_tpid_bd; struct bnxt_pf_info pf; uint8_t port_partition_type; uint8_t dev_stopped; @@ -530,12 +639,20 @@ struct bnxt { int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete); int bnxt_rcv_msg_from_vf(struct bnxt *bp, uint16_t vf_id, void *msg); int is_bnxt_in_error(struct bnxt *bp); +uint16_t bnxt_rss_ctxts(const struct bnxt *bp); int bnxt_map_fw_health_status_regs(struct bnxt *bp); +uint32_t bnxt_read_fw_status_reg(struct bnxt *bp, uint32_t index); +void bnxt_schedule_fw_health_check(struct bnxt *bp); bool is_bnxt_supported(struct rte_eth_dev *dev); bool bnxt_stratus_device(struct bnxt *bp); extern const struct rte_flow_ops bnxt_flow_ops; +#define bnxt_acquire_flow_lock(bp) \ + pthread_mutex_lock(&(bp)->flow_lock) + +#define bnxt_release_flow_lock(bp) \ + pthread_mutex_unlock(&(bp)->flow_lock) extern int bnxt_logtype_driver; #define PMD_DRV_LOG_RAW(level, fmt, args...) \