X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fcxgbe%2Fcxgbe_filter.c;h=4c50932afc7622badc115d388e5fe0e9b36f5c2d;hb=caa01424337c5bc26c30817723d8001b86784645;hp=d26be3cd7bead25e08cf507760cc85295046640d;hpb=55f003d8884c3a05937ef7ef113f698870d71a83;p=dpdk.git diff --git a/drivers/net/cxgbe/cxgbe_filter.c b/drivers/net/cxgbe/cxgbe_filter.c index d26be3cd7b..4c50932afc 100644 --- a/drivers/net/cxgbe/cxgbe_filter.c +++ b/drivers/net/cxgbe/cxgbe_filter.c @@ -72,15 +72,18 @@ int cxgbe_validate_filter(struct adapter *adapter, if (U(F_PORT, iport) || U(F_ETHERTYPE, ethtype) || U(F_PROTOCOL, proto) || U(F_MACMATCH, macidx) || - U(F_VLAN, ivlan_vld) || U(F_VNIC_ID, ovlan_vld)) + U(F_VLAN, ivlan_vld) || U(F_VNIC_ID, ovlan_vld) || + U(F_TOS, tos) || U(F_VNIC_ID, pfvf_vld)) return -EOPNOTSUPP; - /* Ensure OVLAN match is enabled in hardware */ - if (S(ovlan_vld) && (iconf & F_VNIC)) + /* Either OVLAN or PFVF match is enabled in hardware, but not both */ + if ((S(pfvf_vld) && !(iconf & F_VNIC)) || + (S(ovlan_vld) && (iconf & F_VNIC))) return -EOPNOTSUPP; - /* To use OVLAN, L4 encapsulation match must not be enabled */ - if (S(ovlan_vld) && (iconf & F_USE_ENC_IDX)) + /* To use OVLAN or PFVF, L4 encapsulation match must not be enabled */ + if ((S(ovlan_vld) && (iconf & F_USE_ENC_IDX)) || + (S(pfvf_vld) && (iconf & F_USE_ENC_IDX))) return -EOPNOTSUPP; #undef S @@ -307,11 +310,17 @@ static u64 hash_filter_ntuple(const struct filter_entry *f) ntuple |= (u64)(F_FT_VLAN_VLD | f->fs.val.ivlan) << tp->vlan_shift; if (tp->vnic_shift >= 0) { - if (!(adap->params.tp.ingress_config & F_VNIC) && - f->fs.mask.ovlan_vld) + if ((adap->params.tp.ingress_config & F_VNIC) && + f->fs.mask.pfvf_vld) + ntuple |= (u64)((f->fs.val.pfvf_vld << 16) | + (f->fs.val.pf << 13)) << tp->vnic_shift; + else if (!(adap->params.tp.ingress_config & F_VNIC) && + f->fs.mask.ovlan_vld) ntuple |= (u64)(f->fs.val.ovlan_vld << 16 | f->fs.val.ovlan) << tp->vnic_shift; } + if (tp->tos_shift >= 0 && f->fs.mask.tos) + ntuple |= (u64)f->fs.val.tos << tp->tos_shift; return ntuple; } @@ -806,6 +815,8 @@ static int set_filter_wr(struct rte_eth_dev *dev, unsigned int fidx) V_FW_FILTER_WR_PORTM(f->fs.mask.iport)); fwr->ptcl = f->fs.val.proto; fwr->ptclm = f->fs.mask.proto; + fwr->ttyp = f->fs.val.tos; + fwr->ttypm = f->fs.mask.tos; fwr->ivlan = cpu_to_be16(f->fs.val.ivlan); fwr->ivlanm = cpu_to_be16(f->fs.mask.ivlan); fwr->ovlan = cpu_to_be16(f->fs.val.ovlan); @@ -960,10 +971,11 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id, { struct port_info *pi = ethdev2pinfo(dev); struct adapter *adapter = pi->adapter; - unsigned int fidx, iq; + u8 nentries, bitoff[16] = {0}; struct filter_entry *f; unsigned int chip_ver; - u8 nentries, bitoff[16] = {0}; + unsigned int fidx, iq; + u32 iconf; int ret; if (is_hashfilter(adapter) && fs->cap) @@ -1047,6 +1059,20 @@ int cxgbe_set_filter(struct rte_eth_dev *dev, unsigned int filter_id, f->fs.iq = iq; f->dev = dev; + iconf = adapter->params.tp.ingress_config; + + /* Either PFVF or OVLAN can be active, but not both + * So, if PFVF is enabled, then overwrite the OVLAN + * fields with PFVF fields before writing the spec + * to hardware. + */ + if (iconf & F_VNIC) { + f->fs.val.ovlan = fs->val.pf << 13; + f->fs.mask.ovlan = fs->mask.pf << 13; + f->fs.val.ovlan_vld = fs->val.pfvf_vld; + f->fs.mask.ovlan_vld = fs->mask.pfvf_vld; + } + /* * Attempt to set the filter. If we don't succeed, we clear * it and return the failure.