X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fi40e%2Fi40e_ethdev.h;h=ffaa7b949370cae6352171ea9bf95088a90e1952;hb=6d13ea8e8e49ab957deae2bba5ecf4a4bfe747d1;hp=2d6009223de7b3ebb4913d2b3cf569cf87555260;hpb=2bedd7277a10f09155dd7ff6cf70785167088e90;p=dpdk.git diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 2d6009223d..ffaa7b9493 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -7,7 +7,6 @@ #include -#include #include #include #include @@ -28,6 +27,7 @@ #define I40E_NUM_DESC_ALIGN 32 #define I40E_BUF_SIZE_MIN 1024 #define I40E_FRAME_SIZE_MAX 9728 +#define I40E_TSO_FRAME_SIZE_MAX 262144 #define I40E_QUEUE_BASE_ADDR_UNIT 128 /* number of VSIs and queue default setting */ #define I40E_MAX_QP_NUM_PER_VF 16 @@ -184,7 +184,7 @@ enum i40e_flxpld_layer_idx { #define I40E_ITR_INDEX_NONE 3 #define I40E_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */ #define I40E_QUEUE_ITR_INTERVAL_MAX 8160 /* 8160 us */ -#define I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT 8160 /* 8160 us */ +#define I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT 32 /* 32 us */ /* Special FW support this floating VEB feature */ #define FLOATING_VEB_SUPPORTED_FW_MAJ 5 #define FLOATING_VEB_SUPPORTED_FW_MIN 0 @@ -277,7 +277,7 @@ struct i40e_adapter; */ struct i40e_mac_filter_info { enum rte_mac_filter_type filter_type; - struct ether_addr mac_addr; + struct rte_ether_addr mac_addr; }; TAILQ_HEAD(i40e_mac_filter_list, i40e_mac_filter); @@ -330,7 +330,7 @@ struct i40e_veb { /* i40e MACVLAN filter structure */ struct i40e_macvlan_filter { - struct ether_addr macaddr; + struct rte_ether_addr macaddr; enum rte_mac_filter_type filter_type; uint16_t vlan_id; }; @@ -421,7 +421,7 @@ struct i40e_pf_vf { uint16_t vf_idx; /* VF index in pf->vfs */ uint16_t lan_nb_qps; /* Actual queues allocated */ uint16_t reset_cnt; /* Total vf reset times */ - struct ether_addr mac_addr; /* Default MAC address */ + struct rte_ether_addr mac_addr; /* Default MAC address */ /* version of the virtchnl from VF */ struct virtchnl_version_info version; uint32_t request_caps; /* offload caps requested from VF */ @@ -641,7 +641,7 @@ struct i40e_fdir_info { /* Ethertype filter struct */ struct i40e_ethertype_filter_input { - struct ether_addr mac_addr; /* Mac address to match */ + struct rte_ether_addr mac_addr; /* Mac address to match */ uint16_t ether_type; /* Ether type to match */ }; @@ -759,8 +759,8 @@ enum i40e_tunnel_type { * Tunneling Packet filter configuration. */ struct i40e_tunnel_filter_conf { - struct ether_addr outer_mac; /**< Outer MAC address to match. */ - struct ether_addr inner_mac; /**< Inner MAC address to match. */ + struct rte_ether_addr outer_mac; /**< Outer MAC address to match. */ + struct rte_ether_addr inner_mac; /**< Inner MAC address to match. */ uint16_t inner_vlan; /**< Inner VLAN to match. */ uint32_t outer_vlan; /**< Outer VLAN to match */ enum i40e_tunnel_iptype ip_type; /**< IP address type. */ @@ -919,7 +919,7 @@ struct i40e_pf { bool offset_loaded; struct rte_eth_dev_data *dev_data; /* Pointer to the device data */ - struct ether_addr dev_addr; /* PF device mac address */ + struct rte_ether_addr dev_addr; /* PF device mac address */ uint64_t flags; /* PF feature flags */ /* All kinds of queue pair setting for different VSIs */ struct i40e_pf_vf *vfs; @@ -1023,7 +1023,8 @@ struct i40e_vf { uint16_t promisc_flags; /* Promiscuous setting */ uint32_t vlan[I40E_VFTA_SIZE]; /* VLAN bit map */ - struct ether_addr mc_addrs[I40E_NUM_MACADDR_MAX]; /* Multicast addrs */ + /* Multicast addrs */ + struct rte_ether_addr mc_addrs[I40E_NUM_MACADDR_MAX]; uint16_t mc_addrs_num; /* Multicast mac addresses number */ /* Event from pf */ @@ -1077,6 +1078,12 @@ struct i40e_adapter { uint64_t pctypes_tbl[I40E_FLOW_TYPE_MAX] __rte_cache_min_aligned; uint64_t flow_types_mask; uint64_t pctypes_mask; + + /* For devargs */ + uint8_t use_latest_vec; + + /* For RSS reta table update */ + uint8_t rss_reta_updated; }; /** @@ -1114,22 +1121,6 @@ struct i40e_valid_pattern { parse_filter_t parse_filter; }; -enum I40E_WARNING_IDX { - I40E_WARNING_DIS_FLX_PLD, - I40E_WARNING_ENA_FLX_PLD, - I40E_WARNING_QINQ_PARSER, - I40E_WARNING_QINQ_CLOUD_FILTER, - I40E_WARNING_TPID, - I40E_WARNING_FLOW_CTL, - I40E_WARNING_GRE_KEY_LEN, - I40E_WARNING_QF_CTL, - I40E_WARNING_HASH_INSET, - I40E_WARNING_HSYM, - I40E_WARNING_HASH_MSK, - I40E_WARNING_FD_MSK, - I40E_WARNING_RPL_CLD_FILTER, -}; - int i40e_dev_switch_queues(struct i40e_pf *pf, bool on); int i40e_vsi_release(struct i40e_vsi *vsi); struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, @@ -1141,7 +1132,7 @@ int i40e_switch_tx_queue(struct i40e_hw *hw, uint16_t q_idx, bool on); int i40e_vsi_add_vlan(struct i40e_vsi *vsi, uint16_t vlan); int i40e_vsi_delete_vlan(struct i40e_vsi *vsi, uint16_t vlan); int i40e_vsi_add_mac(struct i40e_vsi *vsi, struct i40e_mac_filter_info *filter); -int i40e_vsi_delete_mac(struct i40e_vsi *vsi, struct ether_addr *addr); +int i40e_vsi_delete_mac(struct i40e_vsi *vsi, struct rte_ether_addr *addr); void i40e_update_vsi_stats(struct i40e_vsi *vsi); void i40e_pf_disable_irq0(struct i40e_hw *hw); void i40e_pf_enable_irq0(struct i40e_hw *hw); @@ -1216,7 +1207,7 @@ int i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf, int i40e_fdir_flush(struct rte_eth_dev *dev); int i40e_find_all_vlan_for_mac(struct i40e_vsi *vsi, struct i40e_macvlan_filter *mv_f, - int num, struct ether_addr *addr); + int num, struct rte_ether_addr *addr); int i40e_remove_macvlan_filters(struct i40e_vsi *vsi, struct i40e_macvlan_filter *filter, int total); @@ -1334,50 +1325,23 @@ i40e_align_floor(int n) } static inline uint16_t -i40e_calc_itr_interval(int16_t interval, bool is_pf, bool is_multi_drv) +i40e_calc_itr_interval(bool is_pf, bool is_multi_drv) { - if (interval < 0 || interval > I40E_QUEUE_ITR_INTERVAL_MAX) { - if (is_multi_drv) { - interval = I40E_QUEUE_ITR_INTERVAL_MAX; - } else { - if (is_pf) - interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT; - else - interval = I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT; - } + uint16_t interval = 0; + + if (is_multi_drv) { + interval = I40E_QUEUE_ITR_INTERVAL_MAX; + } else { + if (is_pf) + interval = I40E_QUEUE_ITR_INTERVAL_DEFAULT; + else + interval = I40E_VF_QUEUE_ITR_INTERVAL_DEFAULT; } /* Convert to hardware count, as writing each 1 represents 2 us */ return interval / 2; } -static inline void -i40e_global_cfg_warning(enum I40E_WARNING_IDX idx) -{ - const char *warning; - static const char *const warning_list[] = { - [I40E_WARNING_DIS_FLX_PLD] = "disable FDIR flexible payload", - [I40E_WARNING_ENA_FLX_PLD] = "enable FDIR flexible payload", - [I40E_WARNING_QINQ_PARSER] = "support QinQ parser", - [I40E_WARNING_QINQ_CLOUD_FILTER] = "support QinQ cloud filter", - [I40E_WARNING_TPID] = "support TPID configuration", - [I40E_WARNING_FLOW_CTL] = "configure water marker", - [I40E_WARNING_GRE_KEY_LEN] = "support GRE key length setting", - [I40E_WARNING_QF_CTL] = "support hash function setting", - [I40E_WARNING_HASH_INSET] = "configure hash input set", - [I40E_WARNING_HSYM] = "set symmetric hash", - [I40E_WARNING_HASH_MSK] = "configure hash mask", - [I40E_WARNING_FD_MSK] = "configure fdir mask", - [I40E_WARNING_RPL_CLD_FILTER] = "replace cloud filter", - }; - - warning = warning_list[idx]; - - RTE_LOG(WARNING, PMD, - "Global register is changed during %s\n", - warning); -} - #define I40E_VALID_FLOW(flow_type) \ ((flow_type) == RTE_ETH_FLOW_FRAG_IPV4 || \ (flow_type) == RTE_ETH_FLOW_NONFRAG_IPV4_TCP || \ @@ -1435,6 +1399,8 @@ i40e_global_cfg_warning(enum I40E_WARNING_IDX idx) (((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_KR) || \ ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_CR) || \ ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_SR) || \ - ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_LR)) + ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_LR) || \ + ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_AOC) || \ + ((phy_type) & I40E_CAP_PHY_TYPE_25GBASE_ACC)) #endif /* _I40E_ETHDEV_H_ */