X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fice%2Fice_ethdev.c;h=8d435e889202386924e430718d380dc18fefaf92;hb=185fe122f4899f48569d0086c9dcacc431ef0967;hp=30ea3e84c2f5ad0e1c08288ae6af5933d66e6407;hpb=84dc7a95a2d3cc6279c20d4fcde55f6ad05ef28f;p=dpdk.git diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 30ea3e84c2..8d435e8892 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -13,6 +13,9 @@ #include "base/ice_sched.h" #include "base/ice_flow.h" #include "base/ice_dcb.h" +#include "base/ice_common.h" + +#include "rte_pmd_ice.h" #include "ice_ethdev.h" #include "ice_rxtx.h" #include "ice_generic_flow.h" @@ -20,38 +23,53 @@ /* devargs */ #define ICE_SAFE_MODE_SUPPORT_ARG "safe-mode-support" #define ICE_PIPELINE_MODE_SUPPORT_ARG "pipeline-mode-support" +#define ICE_FLOW_MARK_SUPPORT_ARG "flow-mark-support" #define ICE_PROTO_XTR_ARG "proto_xtr" static const char * const ice_valid_args[] = { ICE_SAFE_MODE_SUPPORT_ARG, ICE_PIPELINE_MODE_SUPPORT_ARG, + ICE_FLOW_MARK_SUPPORT_ARG, ICE_PROTO_XTR_ARG, NULL }; -#define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100 +static const struct rte_mbuf_dynfield ice_proto_xtr_metadata_param = { + .name = "ice_dynfield_proto_xtr_metadata", + .size = sizeof(uint32_t), + .align = __alignof__(uint32_t), + .flags = 0, +}; + +struct proto_xtr_ol_flag { + const struct rte_mbuf_dynflag param; + uint64_t *ol_flag; + bool required; +}; -/* DDP package search path */ -#define ICE_PKG_FILE_DEFAULT "/lib/firmware/intel/ice/ddp/ice.pkg" -#define ICE_PKG_FILE_UPDATES "/lib/firmware/updates/intel/ice/ddp/ice.pkg" -#define ICE_PKG_FILE_SEARCH_PATH_DEFAULT "/lib/firmware/intel/ice/ddp/" -#define ICE_PKG_FILE_SEARCH_PATH_UPDATES "/lib/firmware/updates/intel/ice/ddp/" +static struct proto_xtr_ol_flag ice_proto_xtr_ol_flag_params[] = { + [PROTO_XTR_VLAN] = { + .param = { .name = "ice_dynflag_proto_xtr_vlan" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_vlan_mask }, + [PROTO_XTR_IPV4] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv4" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv4_mask }, + [PROTO_XTR_IPV6] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv6" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv6_mask }, + [PROTO_XTR_IPV6_FLOW] = { + .param = { .name = "ice_dynflag_proto_xtr_ipv6_flow" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_ipv6_flow_mask }, + [PROTO_XTR_TCP] = { + .param = { .name = "ice_dynflag_proto_xtr_tcp" }, + .ol_flag = &rte_net_ice_dynflag_proto_xtr_tcp_mask }, +}; + +#define ICE_DFLT_OUTER_TAG_TYPE ICE_AQ_VSI_OUTER_TAG_VLAN_9100 #define ICE_OS_DEFAULT_PKG_NAME "ICE OS Default Package" #define ICE_COMMS_PKG_NAME "ICE COMMS Package" -#define ICE_MAX_PKG_FILENAME_SIZE 256 - -int ice_logtype_init; -int ice_logtype_driver; -#ifdef RTE_LIBRTE_ICE_DEBUG_RX -int ice_logtype_rx; -#endif -#ifdef RTE_LIBRTE_ICE_DEBUG_TX -int ice_logtype_tx; -#endif -#ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE -int ice_logtype_tx_free; -#endif +#define ICE_MAX_RES_DESC_NUM 1024 static int ice_dev_configure(struct rte_eth_dev *dev); static int ice_dev_start(struct rte_eth_dev *dev); @@ -67,9 +85,6 @@ static int ice_dev_set_link_down(struct rte_eth_dev *dev); static int ice_mtu_set(struct rte_eth_dev *dev, uint16_t mtu); static int ice_vlan_offload_set(struct rte_eth_dev *dev, int mask); -static int ice_vlan_tpid_set(struct rte_eth_dev *dev, - enum rte_vlan_type vlan_type, - uint16_t tpid); static int ice_rss_reta_update(struct rte_eth_dev *dev, struct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size); @@ -126,6 +141,19 @@ static const struct rte_pci_id pci_id_ice_map[] = { { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_BACKPLANE) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_QSFP) }, { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810C_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_QSFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E810_XXV_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_QSFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) }, + { RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) }, { .vendor_id = 0, /* sentinel */ }, }; @@ -154,7 +182,6 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .mac_addr_remove = ice_macaddr_remove, .vlan_filter_set = ice_vlan_filter_set, .vlan_offload_set = ice_vlan_offload_set, - .vlan_tpid_set = ice_vlan_tpid_set, .reta_update = ice_rss_reta_update, .reta_query = ice_rss_reta_query, .rss_hash_update = ice_rss_hash_update, @@ -184,6 +211,7 @@ static const struct eth_dev_ops ice_eth_dev_ops = { .filter_ctrl = ice_dev_filter_ctrl, .udp_tunnel_port_add = ice_dev_udp_tunnel_port_add, .udp_tunnel_port_del = ice_dev_udp_tunnel_port_del, + .tx_done_cleanup = ice_tx_done_cleanup, }; /* store statistics names and its offset in stats structure */ @@ -834,7 +862,7 @@ ice_add_mac_filter(struct ice_vsi *vsi, struct rte_ether_addr *mac_addr) ret = -ENOMEM; goto DONE; } - rte_memcpy(&f->mac_info.mac_addr, mac_addr, ETH_ADDR_LEN); + rte_ether_addr_copy(mac_addr, &f->mac_info.mac_addr); TAILQ_INSERT_TAIL(&vsi->mac_list, f, next); vsi->mac_num++; @@ -1383,6 +1411,9 @@ ice_init_proto_xtr(struct rte_eth_dev *dev) ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); struct ice_hw *hw = ICE_PF_TO_HW(pf); + const struct proto_xtr_ol_flag *ol_flag; + bool proto_xtr_enable = false; + int offset; uint16_t i; if (!ice_proto_xtr_support(hw)) { @@ -1396,10 +1427,56 @@ ice_init_proto_xtr(struct rte_eth_dev *dev) return; } - for (i = 0; i < pf->lan_nb_qps; i++) + for (i = 0; i < pf->lan_nb_qps; i++) { pf->proto_xtr[i] = ad->devargs.proto_xtr[i] != PROTO_XTR_NONE ? ad->devargs.proto_xtr[i] : ad->devargs.proto_xtr_dflt; + + if (pf->proto_xtr[i] != PROTO_XTR_NONE) { + uint8_t type = pf->proto_xtr[i]; + + ice_proto_xtr_ol_flag_params[type].required = true; + proto_xtr_enable = true; + } + } + + if (likely(!proto_xtr_enable)) + return; + + offset = rte_mbuf_dynfield_register(&ice_proto_xtr_metadata_param); + if (unlikely(offset == -1)) { + PMD_DRV_LOG(ERR, + "Protocol extraction metadata is disabled in mbuf with error %d", + -rte_errno); + return; + } + + PMD_DRV_LOG(DEBUG, + "Protocol extraction metadata offset in mbuf is : %d", + offset); + rte_net_ice_dynfield_proto_xtr_metadata_offs = offset; + + for (i = 0; i < RTE_DIM(ice_proto_xtr_ol_flag_params); i++) { + ol_flag = &ice_proto_xtr_ol_flag_params[i]; + + if (!ol_flag->required) + continue; + + offset = rte_mbuf_dynflag_register(&ol_flag->param); + if (unlikely(offset == -1)) { + PMD_DRV_LOG(ERR, + "Protocol extraction offload '%s' failed to register with error %d", + ol_flag->param.name, -rte_errno); + + rte_net_ice_dynfield_proto_xtr_metadata_offs = -1; + break; + } + + PMD_DRV_LOG(DEBUG, + "Protocol extraction offload '%s' offset in mbuf is : %d", + ol_flag->param.name, offset); + *ol_flag->ol_flag = 1ULL << offset; + } } /* Initialize SW parameters of PF */ @@ -1488,7 +1565,7 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) cfg = ICE_AQ_VSI_PROP_SECURITY_VALID | ICE_AQ_VSI_PROP_FLOW_DIR_VALID; vsi_ctx.info.valid_sections |= rte_cpu_to_le_16(cfg); - cfg = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; + cfg = ICE_AQ_VSI_FD_ENABLE; vsi_ctx.info.fd_options = rte_cpu_to_le_16(cfg); vsi_ctx.info.max_fd_fltr_dedicated = rte_cpu_to_le_16(hw->func_caps.fd_fltr_guar); @@ -1516,9 +1593,10 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) cfg = ICE_AQ_VSI_PROP_FLOW_DIR_VALID; vsi_ctx.info.valid_sections |= rte_cpu_to_le_16(cfg); - cfg = ICE_AQ_VSI_FD_ENABLE | ICE_AQ_VSI_FD_PROG_ENABLE; + cfg = ICE_AQ_VSI_FD_PROG_ENABLE; vsi_ctx.info.fd_options = rte_cpu_to_le_16(cfg); vsi_ctx.info.sw_id = hw->port_info->sw_id; + vsi_ctx.info.sw_flags2 = ICE_AQ_VSI_SW_FLAG_LAN_ENA; ret = ice_vsi_config_tc_queue_mapping(vsi, &vsi_ctx.info, ICE_DEFAULT_TCMAP); @@ -1572,16 +1650,16 @@ ice_setup_vsi(struct ice_pf *pf, enum ice_vsi_type type) if (type == ICE_VSI_PF) { /* MAC configuration */ - rte_memcpy(pf->dev_addr.addr_bytes, - hw->port_info->mac.perm_addr, - ETH_ADDR_LEN); + rte_ether_addr_copy((struct rte_ether_addr *) + hw->port_info->mac.perm_addr, + &pf->dev_addr); - rte_memcpy(&mac_addr, &pf->dev_addr, RTE_ETHER_ADDR_LEN); + rte_ether_addr_copy(&pf->dev_addr, &mac_addr); ret = ice_add_mac_filter(vsi, &mac_addr); if (ret != ICE_SUCCESS) PMD_INIT_LOG(ERR, "Failed to add dflt MAC filter"); - rte_memcpy(&mac_addr, &broadcast, RTE_ETHER_ADDR_LEN); + rte_ether_addr_copy(&broadcast, &mac_addr); ret = ice_add_mac_filter(vsi, &mac_addr); if (ret != ICE_SUCCESS) PMD_INIT_LOG(ERR, "Failed to add MAC filter"); @@ -1628,7 +1706,7 @@ ice_pf_setup(struct ice_pf *pf) uint16_t unused; /* Clear all stats counters */ - pf->offset_loaded = FALSE; + pf->offset_loaded = false; memset(&pf->stats, 0, sizeof(struct ice_hw_port_stats)); memset(&pf->stats_offset, 0, sizeof(struct ice_hw_port_stats)); memset(&pf->internal_stats, 0, sizeof(struct ice_eth_stats)); @@ -1741,7 +1819,7 @@ fail_dsn: return 0; } -static enum ice_pkg_type +enum ice_pkg_type ice_load_pkg_type(struct ice_hw *hw) { enum ice_pkg_type package_type; @@ -1904,6 +1982,13 @@ static int ice_parse_devargs(struct rte_eth_dev *dev) ret = rte_kvargs_process(kvlist, ICE_PIPELINE_MODE_SUPPORT_ARG, &parse_bool, &ad->devargs.pipe_mode_support); + if (ret) + goto bail; + + ret = rte_kvargs_process(kvlist, ICE_FLOW_MARK_SUPPORT_ARG, + &parse_bool, &ad->devargs.flow_mark_support); + if (ret) + goto bail; bail: rte_kvargs_free(kvlist); @@ -1942,6 +2027,105 @@ ice_vsi_config_sw_lldp(struct ice_vsi *vsi, bool on) return ret; } +static enum ice_status +ice_get_hw_res(struct ice_hw *hw, uint16_t res_type, + uint16_t num, uint16_t desc_id, + uint16_t *prof_buf, uint16_t *num_prof) +{ + struct ice_aqc_get_allocd_res_desc_resp *resp_buf; + int ret; + uint16_t buf_len; + bool res_shared = 1; + struct ice_aq_desc aq_desc; + struct ice_sq_cd *cd = NULL; + struct ice_aqc_get_allocd_res_desc *cmd = + &aq_desc.params.get_res_desc; + + buf_len = sizeof(resp_buf->elem) * num; + resp_buf = ice_malloc(hw, buf_len); + if (!resp_buf) + return -ENOMEM; + + ice_fill_dflt_direct_cmd_desc(&aq_desc, + ice_aqc_opc_get_allocd_res_desc); + + cmd->ops.cmd.res = CPU_TO_LE16(((res_type << ICE_AQC_RES_TYPE_S) & + ICE_AQC_RES_TYPE_M) | (res_shared ? + ICE_AQC_RES_TYPE_FLAG_SHARED : 0)); + cmd->ops.cmd.first_desc = CPU_TO_LE16(desc_id); + + ret = ice_aq_send_cmd(hw, &aq_desc, resp_buf, buf_len, cd); + if (!ret) + *num_prof = LE16_TO_CPU(cmd->ops.resp.num_desc); + else + goto exit; + + ice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) * + (*num_prof), ICE_NONDMA_TO_NONDMA); + +exit: + rte_free(resp_buf); + return ret; +} +static int +ice_cleanup_resource(struct ice_hw *hw, uint16_t res_type) +{ + int ret; + uint16_t prof_id; + uint16_t prof_buf[ICE_MAX_RES_DESC_NUM]; + uint16_t first_desc = 1; + uint16_t num_prof = 0; + + ret = ice_get_hw_res(hw, res_type, ICE_MAX_RES_DESC_NUM, + first_desc, prof_buf, &num_prof); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to get fxp resource"); + return ret; + } + + for (prof_id = 0; prof_id < num_prof; prof_id++) { + ret = ice_free_hw_res(hw, res_type, 1, &prof_buf[prof_id]); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to free fxp resource"); + return ret; + } + } + return 0; +} + +static int +ice_reset_fxp_resource(struct ice_hw *hw) +{ + int ret; + + ret = ice_cleanup_resource(hw, ICE_AQC_RES_TYPE_FD_PROF_BLDR_PROFID); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to clearup fdir resource"); + return ret; + } + + ret = ice_cleanup_resource(hw, ICE_AQC_RES_TYPE_HASH_PROF_BLDR_PROFID); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to clearup rss resource"); + return ret; + } + + return 0; +} + +static void +ice_rss_ctx_init(struct ice_pf *pf) +{ + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6); + + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp); + + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp); +} + static int ice_dev_init(struct rte_eth_dev *dev) { @@ -2049,16 +2233,16 @@ ice_dev_init(struct rte_eth_dev *dev) vsi = pf->main_vsi; /* Disable double vlan by default */ - ice_vsi_config_double_vlan(vsi, FALSE); + ice_vsi_config_double_vlan(vsi, false); - ret = ice_aq_stop_lldp(hw, TRUE, FALSE, NULL); + ret = ice_aq_stop_lldp(hw, true, false, NULL); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "lldp has already stopped\n"); - ret = ice_init_dcb(hw, TRUE); + ret = ice_init_dcb(hw, true); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "Failed to init DCB\n"); /* Forward LLDP packets to default VSI */ - ret = ice_vsi_config_sw_lldp(vsi, TRUE); + ret = ice_vsi_config_sw_lldp(vsi, true); if (ret != ICE_SUCCESS) PMD_INIT_LOG(DEBUG, "Failed to cfg lldp\n"); /* register callback func to eal lib */ @@ -2073,9 +2257,20 @@ ice_dev_init(struct rte_eth_dev *dev) /* get base queue pairs index in the device */ ice_base_queue_get(pf); - ret = ice_flow_init(ad); + /* Initialize RSS context for gtpu_eh */ + ice_rss_ctx_init(pf); + + if (!ad->is_safe_mode) { + ret = ice_flow_init(ad); + if (ret) { + PMD_INIT_LOG(ERR, "Failed to initialize flow"); + return ret; + } + } + + ret = ice_reset_fxp_resource(hw); if (ret) { - PMD_INIT_LOG(ERR, "Failed to initialize flow"); + PMD_INIT_LOG(ERR, "Failed to reset fxp resource"); return ret; } @@ -2101,9 +2296,10 @@ ice_release_vsi(struct ice_vsi *vsi) struct ice_hw *hw; struct ice_vsi_ctx vsi_ctx; enum ice_status ret; + int error = 0; if (!vsi) - return 0; + return error; hw = ICE_VSI_TO_HW(vsi); @@ -2116,15 +2312,16 @@ ice_release_vsi(struct ice_vsi *vsi) ret = ice_free_vsi(hw, vsi->idx, &vsi_ctx, false, NULL); if (ret != ICE_SUCCESS) { PMD_INIT_LOG(ERR, "Failed to free vsi by aq, %u", vsi->vsi_id); - rte_free(vsi); - return -1; + error = -1; } + rte_free(vsi->rss_lut); + rte_free(vsi->rss_key); rte_free(vsi); - return 0; + return error; } -static void +void ice_vsi_disable_queues_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2177,13 +2374,10 @@ ice_dev_stop(struct rte_eth_dev *dev) /* disable all queue interrupts */ ice_vsi_disable_queues_intr(main_vsi); - if (pf->fdir.fdir_vsi) - ice_vsi_disable_queues_intr(pf->fdir.fdir_vsi); - - /* Clear all queues and release mbufs */ - ice_clear_queues(dev); - - ice_dev_set_link_down(dev); + if (pf->init_link_up) + ice_dev_set_link_up(dev); + else + ice_dev_set_link_down(dev); /* Clean datapath event and queue/vec mapping */ rte_intr_efd_disable(intr_handle); @@ -2214,7 +2408,8 @@ ice_dev_close(struct rte_eth_dev *dev) ice_dev_stop(dev); - ice_flow_uninit(ad); + if (!ad->is_safe_mode) + ice_flow_uninit(ad); /* release all queue resource */ ice_free_queues(dev); @@ -2222,6 +2417,7 @@ ice_dev_close(struct rte_eth_dev *dev) ice_res_pool_destroy(&pf->msix_pool); ice_release_vsi(pf->main_vsi); ice_sched_cleanup_all(hw); + ice_free_hw_tbls(hw); rte_free(hw->port_info); hw->port_info = NULL; ice_shutdown_all_ctrlq(hw); @@ -2252,20 +2448,574 @@ ice_dev_uninit(struct rte_eth_dev *dev) } static int -ice_dev_configure(struct rte_eth_dev *dev) +ice_add_rss_cfg_post(struct ice_pf *pf, uint32_t hdr, uint64_t fld, bool symm) { - struct ice_adapter *ad = - ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + struct ice_hw *hw = ICE_PF_TO_HW(pf); + struct ice_vsi *vsi = pf->main_vsi; - /* Initialize to TRUE. If any of Rx queues doesn't meet the - * bulk allocation or vector Rx preconditions we will reset it. - */ - ad->rx_bulk_alloc_allowed = true; - ad->tx_simple_allowed = true; + if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) { + if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv4_udp.hash_fld = fld; + pf->gtpu_hash_ctx.ipv4_udp.symm = symm; + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv6_udp.hash_fld = fld; + pf->gtpu_hash_ctx.ipv6_udp.symm = symm; + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv4_tcp.hash_fld = fld; + pf->gtpu_hash_ctx.ipv4_tcp.symm = symm; + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv6_tcp.hash_fld = fld; + pf->gtpu_hash_ctx.ipv6_tcp.symm = symm; + } else if (hdr & ICE_FLOW_SEG_HDR_IPV4) { + pf->gtpu_hash_ctx.ipv4.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv4.hash_fld = fld; + pf->gtpu_hash_ctx.ipv4.symm = symm; + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp); + } else if (hdr & ICE_FLOW_SEG_HDR_IPV6) { + pf->gtpu_hash_ctx.ipv6.pkt_hdr = hdr; + pf->gtpu_hash_ctx.ipv6.hash_fld = fld; + pf->gtpu_hash_ctx.ipv6.symm = symm; + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp); + } + } + + if (hdr & (ICE_FLOW_SEG_HDR_GTPU_DWN | + ICE_FLOW_SEG_HDR_GTPU_UP)) { + if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv4)) { + ice_add_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4.hash_fld, + pf->gtpu_hash_ctx.ipv4.pkt_hdr, + pf->gtpu_hash_ctx.ipv4.symm); + ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv4); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv6)) { + ice_add_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6.hash_fld, + pf->gtpu_hash_ctx.ipv6.pkt_hdr, + pf->gtpu_hash_ctx.ipv6.symm); + ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv6); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv4)) { + ice_add_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4.hash_fld, + pf->gtpu_hash_ctx.ipv4.pkt_hdr, + pf->gtpu_hash_ctx.ipv4.symm); + ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv4); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + if (ICE_HASH_CFG_IS_ROTATING(&pf->gtpu_hash_ctx.ipv6)) { + ice_add_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6.hash_fld, + pf->gtpu_hash_ctx.ipv6.pkt_hdr, + pf->gtpu_hash_ctx.ipv6.symm); + ICE_HASH_CFG_ROTATE_STOP(&pf->gtpu_hash_ctx.ipv6); + } + } + } return 0; } +static int +ice_add_rss_cfg_pre(struct ice_pf *pf, uint32_t hdr) +{ + struct ice_hw *hw = ICE_PF_TO_HW(pf); + struct ice_vsi *vsi = pf->main_vsi; + + if (hdr & (ICE_FLOW_SEG_HDR_GTPU_DWN | + ICE_FLOW_SEG_HDR_GTPU_UP)) { + if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_udp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4_udp.hash_fld, + pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4.hash_fld, + pf->gtpu_hash_ctx.ipv4.pkt_hdr); + ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv4); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_udp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6_udp.hash_fld, + pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6.hash_fld, + pf->gtpu_hash_ctx.ipv6.pkt_hdr); + ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv6); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_tcp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4_tcp.hash_fld, + pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4.hash_fld, + pf->gtpu_hash_ctx.ipv4.pkt_hdr); + ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv4); + } + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_tcp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6_tcp.hash_fld, + pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6.hash_fld, + pf->gtpu_hash_ctx.ipv6.pkt_hdr); + ICE_HASH_CFG_ROTATE_START(&pf->gtpu_hash_ctx.ipv6); + } + } else if (hdr & ICE_FLOW_SEG_HDR_IPV4) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4.hash_fld, + pf->gtpu_hash_ctx.ipv4.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_udp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4_udp.hash_fld, + pf->gtpu_hash_ctx.ipv4_udp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv4_tcp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv4_tcp.hash_fld, + pf->gtpu_hash_ctx.ipv4_tcp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp); + } + } else if (hdr & ICE_FLOW_SEG_HDR_IPV6) { + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6.hash_fld, + pf->gtpu_hash_ctx.ipv6.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_udp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6_udp.hash_fld, + pf->gtpu_hash_ctx.ipv6_udp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp); + } + + if (ICE_HASH_CFG_VALID(&pf->gtpu_hash_ctx.ipv6_tcp)) { + ice_rem_rss_cfg(hw, vsi->idx, + pf->gtpu_hash_ctx.ipv6_tcp.hash_fld, + pf->gtpu_hash_ctx.ipv6_tcp.pkt_hdr); + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp); + } + } + } + + return 0; +} + +static int +ice_rem_rss_cfg_post(struct ice_pf *pf, uint32_t hdr) +{ + if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) { + if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_udp); + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_UDP)) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_udp); + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV4) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4_tcp); + } else if ((hdr & ICE_FLOW_SEG_HDR_IPV6) && + (hdr & ICE_FLOW_SEG_HDR_TCP)) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6_tcp); + } else if (hdr & ICE_FLOW_SEG_HDR_IPV4) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv4); + } else if (hdr & ICE_FLOW_SEG_HDR_IPV6) { + ICE_HASH_CFG_RESET(&pf->gtpu_hash_ctx.ipv6); + } + } + + return 0; +} + +int +ice_rem_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id, + uint64_t fld, uint32_t hdr) +{ + struct ice_hw *hw = ICE_PF_TO_HW(pf); + int ret; + + ret = ice_rem_rss_cfg(hw, vsi_id, fld, hdr); + if (ret && ret != ICE_ERR_DOES_NOT_EXIST) + PMD_DRV_LOG(ERR, "remove rss cfg failed\n"); + + ret = ice_rem_rss_cfg_post(pf, hdr); + if (ret) + PMD_DRV_LOG(ERR, "remove rss cfg post failed\n"); + + return 0; +} + +int +ice_add_rss_cfg_wrap(struct ice_pf *pf, uint16_t vsi_id, + uint64_t fld, uint32_t hdr, bool symm) +{ + struct ice_hw *hw = ICE_PF_TO_HW(pf); + int ret; + + ret = ice_add_rss_cfg_pre(pf, hdr); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg pre failed\n"); + + ret = ice_add_rss_cfg(hw, vsi_id, fld, hdr, symm); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg failed\n"); + + ret = ice_add_rss_cfg_post(pf, hdr, fld, symm); + if (ret) + PMD_DRV_LOG(ERR, "add rss cfg post failed\n"); + + return 0; +} + +static void +ice_rss_hash_set(struct ice_pf *pf, uint64_t rss_hf) +{ + struct ice_vsi *vsi = pf->main_vsi; + int ret; + + /* Configure RSS for IPv4 with src/dst addr as input set */ + if (rss_hf & ETH_RSS_IPV4) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for IPv6 with src/dst addr as input set */ + if (rss_hf & ETH_RSS_IPV6) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for udp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for udp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for tcp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for tcp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for sctp4 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", + __func__, ret); + } + + /* Configure RSS for sctp6 with src/dst addr and port as input set */ + if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_IPV4) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_IPV6) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6 rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_FLOW_HASH_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6 rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_UDP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_UDP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_UDP_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_UDP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_UDP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV4, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV4_TCP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_TCP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_TCP_IPV6, + ICE_FLOW_SEG_HDR_PPPOE | + ICE_FLOW_SEG_HDR_TCP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s PPPoE_IPV6_TCP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV4_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV4_SCTP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV4, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV4 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV4_SCTP rss flow fail %d", + __func__, ret); + } + + if (rss_hf & ETH_RSS_NONFRAG_IPV6_SCTP) { + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_IP | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_IPV6_SCTP rss flow fail %d", + __func__, ret); + + ret = ice_add_rss_cfg_wrap(pf, vsi->idx, ICE_HASH_SCTP_IPV6, + ICE_FLOW_SEG_HDR_GTPU_EH | + ICE_FLOW_SEG_HDR_SCTP | + ICE_FLOW_SEG_HDR_IPV6 | + ICE_FLOW_SEG_HDR_IPV_OTHER, 0); + if (ret) + PMD_DRV_LOG(ERR, "%s GTPU_EH_IPV6_SCTP rss flow fail %d", + __func__, ret); + } +} + static int ice_init_rss(struct ice_pf *pf) { struct ice_hw *hw = ICE_PF_TO_HW(pf); @@ -2276,6 +3026,7 @@ static int ice_init_rss(struct ice_pf *pf) uint16_t i, nb_q; int ret = 0; bool is_safe_mode = pf->adapter->is_safe_mode; + uint32_t reg; rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf; nb_q = dev->data->nb_rx_queues; @@ -2287,13 +3038,24 @@ static int ice_init_rss(struct ice_pf *pf) return 0; } - if (!vsi->rss_key) + if (!vsi->rss_key) { vsi->rss_key = rte_zmalloc(NULL, vsi->rss_key_size, 0); - if (!vsi->rss_lut) + if (vsi->rss_key == NULL) { + PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key"); + return -ENOMEM; + } + } + if (!vsi->rss_lut) { vsi->rss_lut = rte_zmalloc(NULL, vsi->rss_lut_size, 0); - + if (vsi->rss_lut == NULL) { + PMD_DRV_LOG(ERR, "Failed to allocate memory for rss_key"); + rte_free(vsi->rss_key); + vsi->rss_key = NULL; + return -ENOMEM; + } + } /* configure RSS key */ if (!rss_conf->rss_key) { /* Calculate the default hash key */ @@ -2307,7 +3069,7 @@ static int ice_init_rss(struct ice_pf *pf) rte_memcpy(key.standard_rss_key, vsi->rss_key, vsi->rss_key_size); ret = ice_aq_set_rss_key(hw, vsi->idx, &key); if (ret) - return -EINVAL; + goto out; /* init RSS LUT table */ for (i = 0; i < vsi->rss_lut_size; i++) @@ -2317,57 +3079,48 @@ static int ice_init_rss(struct ice_pf *pf) ICE_AQC_GSET_RSS_LUT_TABLE_TYPE_PF, vsi->rss_lut, vsi->rss_lut_size); if (ret) - return -EINVAL; - - /* configure RSS for IPv4 with input set IPv4 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret); + goto out; - /* configure RSS for IPv6 with input set IPv6 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret); + /* Enable registers for symmetric_toeplitz function. */ + reg = ICE_READ_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id)); + reg = (reg & (~VSIQF_HASH_CTL_HASH_SCHEME_M)) | + (1 << VSIQF_HASH_CTL_HASH_SCHEME_S); + ICE_WRITE_REG(hw, VSIQF_HASH_CTL(vsi->vsi_id), reg); - /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret); + /* RSS hash configuration */ + ice_rss_hash_set(pf, rss_conf->rss_hf); - /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret); + return 0; +out: + rte_free(vsi->rss_key); + vsi->rss_key = NULL; + rte_free(vsi->rss_lut); + vsi->rss_lut = NULL; + return -EINVAL; +} - /* configure RSS for sctp6 with input set IPv6 src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", - __func__, ret); +static int +ice_dev_configure(struct rte_eth_dev *dev) +{ + struct ice_adapter *ad = + ICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private); + struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); + int ret; - /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret); + /* Initialize to TRUE. If any of Rx queues doesn't meet the + * bulk allocation or vector Rx preconditions we will reset it. + */ + ad->rx_bulk_alloc_allowed = true; + ad->tx_simple_allowed = true; - /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret); + if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) + dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH; - /* configure RSS for sctp4 with input set IP src/dst */ - ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0); - if (ret) - PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", - __func__, ret); + ret = ice_init_rss(pf); + if (ret) { + PMD_DRV_LOG(ERR, "Failed to enable rss for PF"); + return ret; + } return 0; } @@ -2383,9 +3136,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect, for (i = 0; i < nb_queue; i++) { /*do actual bind*/ val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) | - (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M; + (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M; val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) | - (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M; + (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M; PMD_DRV_LOG(INFO, "queue %d is binding to vect %d", base_queue + i, msix_vect); @@ -2396,7 +3149,7 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect, } } -static void +void ice_vsi_queues_bind_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2449,7 +3202,7 @@ ice_vsi_queues_bind_intr(struct ice_vsi *vsi) } } -static void +void ice_vsi_enable_queues_intr(struct ice_vsi *vsi) { struct rte_eth_dev *dev = vsi->adapter->eth_dev; @@ -2519,17 +3272,32 @@ ice_rxq_intr_setup(struct rte_eth_dev *dev) /* Enable interrupts for all the queues */ ice_vsi_enable_queues_intr(vsi); - /* Enable FDIR MSIX interrupt */ - if (pf->fdir.fdir_vsi) { - ice_vsi_queues_bind_intr(pf->fdir.fdir_vsi); - ice_vsi_enable_queues_intr(pf->fdir.fdir_vsi); - } - rte_intr_enable(intr_handle); return 0; } +static void +ice_get_init_link_status(struct rte_eth_dev *dev) +{ + struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + struct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private); + bool enable_lse = dev->data->dev_conf.intr_conf.lsc ? true : false; + struct ice_link_status link_status; + int ret; + + ret = ice_aq_get_link_info(hw->port_info, enable_lse, + &link_status, NULL); + if (ret != ICE_SUCCESS) { + PMD_DRV_LOG(ERR, "Failed to get link info"); + pf->init_link_up = false; + return; + } + + if (link_status.link_info & ICE_AQ_LINK_UP) + pf->init_link_up = true; +} + static int ice_dev_start(struct rte_eth_dev *dev) { @@ -2539,6 +3307,7 @@ ice_dev_start(struct rte_eth_dev *dev) struct ice_vsi *vsi = pf->main_vsi; uint16_t nb_rxq = 0; uint16_t nb_txq, i; + uint16_t max_frame_size; int mask, ret; /* program Tx queues' context in hardware */ @@ -2559,12 +3328,6 @@ ice_dev_start(struct rte_eth_dev *dev) } } - ret = ice_init_rss(pf); - if (ret) { - PMD_DRV_LOG(ERR, "Failed to enable rss for PF"); - goto rx_err; - } - ice_set_rx_function(dev); ice_set_tx_function(dev); @@ -2599,6 +3362,8 @@ ice_dev_start(struct rte_eth_dev *dev) if (ret != ICE_SUCCESS) PMD_DRV_LOG(WARNING, "Fail to set phy mask"); + ice_get_init_link_status(dev); + ice_dev_set_link_up(dev); /* Call get_link_info aq commond to enable/disable LSE */ @@ -2606,6 +3371,14 @@ ice_dev_start(struct rte_eth_dev *dev) pf->adapter_stopped = false; + /* Set the max frame size to default value*/ + max_frame_size = pf->dev_data->dev_conf.rxmode.max_rx_pkt_len ? + pf->dev_data->dev_conf.rxmode.max_rx_pkt_len : + ICE_FRAME_SIZE_MAX; + + /* Set the max frame size to HW*/ + ice_aq_set_mac_cfg(hw, max_frame_size, NULL); + return 0; /* stop the started queues if failed to start all queues */ @@ -2682,7 +3455,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_QINQ_STRIP | DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_VLAN_EXTEND; + DEV_RX_OFFLOAD_VLAN_EXTEND | + DEV_RX_OFFLOAD_RSS_HASH; dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | @@ -2924,7 +3698,7 @@ ice_force_phys_link_state(struct ice_hw *hw, bool link_up) cfg.phy_type_low = pcaps->phy_type_low; cfg.phy_type_high = pcaps->phy_type_high; cfg.caps = pcaps->caps | ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; - cfg.low_power_ctrl = pcaps->low_power_ctrl; + cfg.low_power_ctrl_an = pcaps->low_power_ctrl_an; cfg.eee_cap = pcaps->eee_cap; cfg.eeer_value = pcaps->eeer_value; cfg.link_fec_opt = pcaps->link_fec_options; @@ -3022,7 +3796,7 @@ static int ice_macaddr_set(struct rte_eth_dev *dev, PMD_DRV_LOG(ERR, "Failed to add mac filter"); return -EIO; } - memcpy(&pf->dev_addr, mac_addr, ETH_ADDR_LEN); + rte_ether_addr_copy(mac_addr, &pf->dev_addr); flags = ICE_AQC_MAN_MAC_UPDATE_LAA_WOL; ret = ice_aq_manage_mac_write(hw, mac_addr->addr_bytes, flags, NULL); @@ -3200,78 +3974,28 @@ ice_vlan_offload_set(struct rte_eth_dev *dev, int mask) rxmode = &dev->data->dev_conf.rxmode; if (mask & ETH_VLAN_FILTER_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_FILTER) - ice_vsi_config_vlan_filter(vsi, TRUE); + ice_vsi_config_vlan_filter(vsi, true); else - ice_vsi_config_vlan_filter(vsi, FALSE); + ice_vsi_config_vlan_filter(vsi, false); } if (mask & ETH_VLAN_STRIP_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_STRIP) - ice_vsi_config_vlan_stripping(vsi, TRUE); + ice_vsi_config_vlan_stripping(vsi, true); else - ice_vsi_config_vlan_stripping(vsi, FALSE); + ice_vsi_config_vlan_stripping(vsi, false); } if (mask & ETH_VLAN_EXTEND_MASK) { if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND) - ice_vsi_config_double_vlan(vsi, TRUE); + ice_vsi_config_double_vlan(vsi, true); else - ice_vsi_config_double_vlan(vsi, FALSE); + ice_vsi_config_double_vlan(vsi, false); } return 0; } -static int -ice_vlan_tpid_set(struct rte_eth_dev *dev, - enum rte_vlan_type vlan_type, - uint16_t tpid) -{ - struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint64_t reg_r = 0, reg_w = 0; - uint16_t reg_id = 0; - int ret = 0; - int qinq = dev->data->dev_conf.rxmode.offloads & - DEV_RX_OFFLOAD_VLAN_EXTEND; - - switch (vlan_type) { - case ETH_VLAN_TYPE_OUTER: - if (qinq) - reg_id = 3; - else - reg_id = 5; - break; - case ETH_VLAN_TYPE_INNER: - if (qinq) { - reg_id = 5; - } else { - PMD_DRV_LOG(ERR, - "Unsupported vlan type in single vlan."); - return -EINVAL; - } - break; - default: - PMD_DRV_LOG(ERR, "Unsupported vlan type %d", vlan_type); - return -EINVAL; - } - reg_r = ICE_READ_REG(hw, GL_SWT_L2TAGCTRL(reg_id)); - PMD_DRV_LOG(DEBUG, "Debug read from ICE GL_SWT_L2TAGCTRL[%d]: " - "0x%08"PRIx64"", reg_id, reg_r); - - reg_w = reg_r & (~(GL_SWT_L2TAGCTRL_ETHERTYPE_M)); - reg_w |= ((uint64_t)tpid << GL_SWT_L2TAGCTRL_ETHERTYPE_S); - if (reg_r == reg_w) { - PMD_DRV_LOG(DEBUG, "No need to write"); - return 0; - } - - ICE_WRITE_REG(hw, GL_SWT_L2TAGCTRL(reg_id), reg_w); - PMD_DRV_LOG(DEBUG, "Debug write 0x%08"PRIx64" to " - "ICE GL_SWT_L2TAGCTRL[%d]", reg_w, reg_id); - - return ret; -} - static int ice_get_rss_lut(struct ice_vsi *vsi, uint8_t *lut, uint16_t lut_size) { @@ -3491,7 +4215,12 @@ ice_rss_hash_update(struct rte_eth_dev *dev, if (status) return status; - /* TODO: hash enable config, ice_add_rss_cfg */ + if (rss_conf->rss_hf == 0) + return 0; + + /* RSS hash configuration */ + ice_rss_hash_set(pf, rss_conf->rss_hf); + return 0; } @@ -3650,21 +4379,19 @@ static int ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - u32 full_ver; u8 ver, patch; u16 build; int ret; - full_ver = hw->nvm.oem_ver; - ver = (u8)(full_ver >> 24); - build = (u16)((full_ver >> 8) & 0xffff); - patch = (u8)(full_ver & 0xff); + ver = hw->nvm.orom.major; + patch = hw->nvm.orom.patch; + build = hw->nvm.orom.build; ret = snprintf(fw_version, fw_size, - "%d.%d%d 0x%08x %d.%d.%d", - ((hw->nvm.ver >> 12) & 0xf), - ((hw->nvm.ver >> 4) & 0xff), - (hw->nvm.ver & 0xf), hw->nvm.eetrack, + "%d.%d 0x%08x %d.%d.%d", + hw->nvm.major_ver, + hw->nvm.minor_ver, + hw->nvm.eetrack, ver, build, patch); /* add the size of '\0' */ @@ -3762,8 +4489,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - /* Convert word count to byte count */ - return hw->nvm.sr_words << 1; + return hw->nvm.flash_size; } static int @@ -3771,26 +4497,24 @@ ice_get_eeprom(struct rte_eth_dev *dev, struct rte_dev_eeprom_info *eeprom) { struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private); - uint16_t *data = eeprom->data; - uint16_t first_word, last_word, nwords; enum ice_status status = ICE_SUCCESS; + uint8_t *data = eeprom->data; - first_word = eeprom->offset >> 1; - last_word = (eeprom->offset + eeprom->length - 1) >> 1; - nwords = last_word - first_word + 1; + eeprom->magic = hw->vendor_id | (hw->device_id << 16); - if (first_word >= hw->nvm.sr_words || - last_word >= hw->nvm.sr_words) { - PMD_DRV_LOG(ERR, "Requested EEPROM bytes out of range."); - return -EINVAL; + status = ice_acquire_nvm(hw, ICE_RES_READ); + if (status) { + PMD_DRV_LOG(ERR, "acquire nvm failed."); + return -EIO; } - eeprom->magic = hw->vendor_id | (hw->device_id << 16); + status = ice_read_flat_nvm(hw, eeprom->offset, &eeprom->length, + data, false); + + ice_release_nvm(hw); - status = ice_read_sr_buf(hw, first_word, &nwords, data); if (status) { PMD_DRV_LOG(ERR, "EEPROM read failed."); - eeprom->length = sizeof(uint16_t) * nwords; return -EIO; } @@ -3866,6 +4590,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi) ice_stat_update_40(hw, GLV_BPRCH(idx), GLV_BPRCL(idx), vsi->offset_loaded, &oes->rx_broadcast, &nes->rx_broadcast); + /* enlarge the limitation when rx_bytes overflowed */ + if (vsi->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(vsi->old_rx_bytes) > nes->rx_bytes) + nes->rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + nes->rx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_rx_bytes); + } + vsi->old_rx_bytes = nes->rx_bytes; /* exclude CRC bytes */ nes->rx_bytes -= (nes->rx_unicast + nes->rx_multicast + nes->rx_broadcast) * RTE_ETHER_CRC_LEN; @@ -3892,6 +4623,13 @@ ice_update_vsi_stats(struct ice_vsi *vsi) /* GLV_TDPC not supported */ ice_stat_update_32(hw, GLV_TEPC(idx), vsi->offset_loaded, &oes->tx_errors, &nes->tx_errors); + /* enlarge the limitation when tx_bytes overflowed */ + if (vsi->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(vsi->old_tx_bytes) > nes->tx_bytes) + nes->tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + nes->tx_bytes += ICE_RXTX_BYTES_HIGH(vsi->old_tx_bytes); + } + vsi->old_tx_bytes = nes->tx_bytes; vsi->offset_loaded = true; PMD_DRV_LOG(DEBUG, "************** VSI[%u] stats start **************", @@ -3939,6 +4677,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw) ice_stat_update_32(hw, PRTRPB_RDPC, pf->offset_loaded, &os->eth.rx_discards, &ns->eth.rx_discards); + /* enlarge the limitation when rx_bytes overflowed */ + if (pf->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(pf->old_rx_bytes) > ns->eth.rx_bytes) + ns->eth.rx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + ns->eth.rx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_rx_bytes); + } + pf->old_rx_bytes = ns->eth.rx_bytes; /* Workaround: CRC size should not be included in byte statistics, * so subtract RTE_ETHER_CRC_LEN from the byte counter for each rx @@ -3969,6 +4714,13 @@ ice_read_stats_registers(struct ice_pf *pf, struct ice_hw *hw) GLPRT_BPTCL(hw->port_info->lport), pf->offset_loaded, &os->eth.tx_broadcast, &ns->eth.tx_broadcast); + /* enlarge the limitation when tx_bytes overflowed */ + if (pf->offset_loaded) { + if (ICE_RXTX_BYTES_LOW(pf->old_tx_bytes) > ns->eth.tx_bytes) + ns->eth.tx_bytes += (uint64_t)1 << ICE_40_BIT_WIDTH; + ns->eth.tx_bytes += ICE_RXTX_BYTES_HIGH(pf->old_tx_bytes); + } + pf->old_tx_bytes = ns->eth.tx_bytes; ns->eth.tx_bytes -= (ns->eth.tx_unicast + ns->eth.tx_multicast + ns->eth.tx_broadcast) * RTE_ETHER_CRC_LEN; @@ -4379,32 +5131,17 @@ RTE_PMD_REGISTER_KMOD_DEP(net_ice, "* igb_uio | uio_pci_generic | vfio-pci"); RTE_PMD_REGISTER_PARAM_STRING(net_ice, ICE_PROTO_XTR_ARG "=[queue:]" ICE_SAFE_MODE_SUPPORT_ARG "=<0|1>" - ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>"); - -RTE_INIT(ice_init_log) -{ - ice_logtype_init = rte_log_register("pmd.net.ice.init"); - if (ice_logtype_init >= 0) - rte_log_set_level(ice_logtype_init, RTE_LOG_NOTICE); - ice_logtype_driver = rte_log_register("pmd.net.ice.driver"); - if (ice_logtype_driver >= 0) - rte_log_set_level(ice_logtype_driver, RTE_LOG_NOTICE); + ICE_PIPELINE_MODE_SUPPORT_ARG "=<0|1>" + ICE_FLOW_MARK_SUPPORT_ARG "=<0|1>"); +RTE_LOG_REGISTER(ice_logtype_init, pmd.net.ice.init, NOTICE); +RTE_LOG_REGISTER(ice_logtype_driver, pmd.net.ice.driver, NOTICE); #ifdef RTE_LIBRTE_ICE_DEBUG_RX - ice_logtype_rx = rte_log_register("pmd.net.ice.rx"); - if (ice_logtype_rx >= 0) - rte_log_set_level(ice_logtype_rx, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_rx, pmd.net.ice.rx, DEBUG); #endif - #ifdef RTE_LIBRTE_ICE_DEBUG_TX - ice_logtype_tx = rte_log_register("pmd.net.ice.tx"); - if (ice_logtype_tx >= 0) - rte_log_set_level(ice_logtype_tx, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_tx, pmd.net.ice.tx, DEBUG); #endif - #ifdef RTE_LIBRTE_ICE_DEBUG_TX_FREE - ice_logtype_tx_free = rte_log_register("pmd.net.ice.tx_free"); - if (ice_logtype_tx_free >= 0) - rte_log_set_level(ice_logtype_tx_free, RTE_LOG_DEBUG); +RTE_LOG_REGISTER(ice_logtype_tx_free, pmd.net.ice.tx_free, DEBUG); #endif -}