X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Fmlx5%2Fmlx5_rxq.c;h=85399eff541cb5b8b137486c5f6bd6586dadf49f;hb=b2e0e28e30767386a31bfb03aed724aa8b0a7198;hp=632d451036fcceda5a34abd645a5bd085cb26a2a;hpb=78c7406b7b5acd3a3498ad619f63c16989ef6956;p=dpdk.git

diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 632d451036..85399eff54 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -331,7 +331,7 @@ priv_rx_intr_vec_enable(struct priv *priv)
 	if (!priv->dev->data->dev_conf.intr_conf.rxq)
 		return 0;
 	priv_rx_intr_vec_disable(priv);
-	intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
+	intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 	if (intr_handle->intr_vec == NULL) {
 		ERROR("failed to allocate memory for interrupt vector,"
 		      " Rx interrupts will not be supported");
@@ -396,6 +396,8 @@ priv_rx_intr_vec_disable(struct priv *priv)
 
 	if (!priv->dev->data->dev_conf.intr_conf.rxq)
 		return;
+	if (!intr_handle->intr_vec)
+		goto free;
 	for (i = 0; i != n; ++i) {
 		struct mlx5_rxq_ctrl *rxq_ctrl;
 		struct mlx5_rxq_data *rxq_data;
@@ -411,8 +413,10 @@ priv_rx_intr_vec_disable(struct priv *priv)
 		rxq_ctrl = container_of(rxq_data, struct mlx5_rxq_ctrl, rxq);
 		mlx5_priv_rxq_ibv_release(priv, rxq_ctrl->ibv);
 	}
+free:
 	rte_intr_free_epoll_fd(intr_handle);
-	free(intr_handle->intr_vec);
+	if (intr_handle->intr_vec)
+		free(intr_handle->intr_vec);
 	intr_handle->nb_efd = 0;
 	intr_handle->intr_vec = NULL;
 }
@@ -617,7 +621,7 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
 		 * make cq_ci and rq_ci aligned.
 		 */
 		if (rxq_check_vec_support(rxq_data) < 0)
-			cqe_n *= 2;
+			attr.cq.ibv.cqe *= 2;
 	} else if (priv->cqe_comp && rxq_data->hw_timestamp) {
 		DEBUG("Rx CQE compression is disabled for HW timestamp");
 	}
@@ -726,6 +730,9 @@ mlx5_priv_rxq_ibv_new(struct priv *priv, uint16_t idx)
 	};
 	rxq_data->cq_db = cq_info.dbrec;
 	rxq_data->cqes = (volatile struct mlx5_cqe (*)[])(uintptr_t)cq_info.buf;
+	rxq_data->cq_uar = cq_info.cq_uar;
+	rxq_data->cqn = cq_info.cqn;
+	rxq_data->cq_arm_sn = 0;
 	/* Update doorbell counter. */
 	rxq_data->rq_ci = (1 << rxq_data->elts_n) >> rxq_data->sges_n;
 	rte_wmb();
@@ -887,6 +894,7 @@ mlx5_priv_rxq_new(struct priv *priv, uint16_t idx, uint16_t desc,
 				 0, socket);
 	if (!tmpl)
 		return NULL;
+	tmpl->socket = socket;
 	if (priv->dev->data->dev_conf.intr_conf.rxq)
 		tmpl->irq = 1;
 	/* Enable scattered packets support for this queue if necessary. */
@@ -1113,7 +1121,7 @@ mlx5_priv_ind_table_ibv_new(struct priv *priv, uint16_t queues[],
 	struct mlx5_ind_table_ibv *ind_tbl;
 	const unsigned int wq_n = rte_is_power_of_2(queues_n) ?
 		log2above(queues_n) :
-		priv->ind_table_max_size;
+		log2above(priv->ind_table_max_size);
 	struct ibv_wq *wq[1 << wq_n];
 	unsigned int i;
 	unsigned int j;
@@ -1258,7 +1266,8 @@ mlx5_priv_ind_table_ibv_verify(struct priv *priv)
  * @param hash_fields
  *   Verbs protocol hash field to make the RSS on.
  * @param queues
- *   Queues entering in hash queue.
+ *   Queues entering in hash queue. In case of empty hash_fields only the
+ *   first queue index will be taken for the indirection table.
  * @param queues_n
  *   Number of queues.
  *
@@ -1273,6 +1282,7 @@ mlx5_priv_hrxq_new(struct priv *priv, uint8_t *rss_key, uint8_t rss_key_len,
 	struct mlx5_ind_table_ibv *ind_tbl;
 	struct ibv_qp *qp;
 
+	queues_n = hash_fields ? queues_n : 1;
 	ind_tbl = mlx5_priv_ind_table_ibv_get(priv, queues, queues_n);
 	if (!ind_tbl)
 		ind_tbl = mlx5_priv_ind_table_ibv_new(priv, queues, queues_n);
@@ -1325,7 +1335,8 @@ error:
  * @param rss_conf
  *   RSS configuration for the Rx hash queue.
  * @param queues
- *   Queues entering in hash queue.
+ *   Queues entering in hash queue. In case of empty hash_fields only the
+ *   first queue index will be taken for the indirection table.
  * @param queues_n
  *   Number of queues.
  *
@@ -1338,6 +1349,7 @@ mlx5_priv_hrxq_get(struct priv *priv, uint8_t *rss_key, uint8_t rss_key_len,
 {
 	struct mlx5_hrxq *hrxq;
 
+	queues_n = hash_fields ? queues_n : 1;
 	LIST_FOREACH(hrxq, &priv->hrxqs, next) {
 		struct mlx5_ind_table_ibv *ind_tbl;