X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=drivers%2Fnet%2Focteontx%2Focteontx_ethdev.c;h=6d67d257c02d565b07d77ce54bdf9af201695c60;hb=caccf8b318cafcdafe39faa3c5ce3eef67007621;hp=498ea2a297131ba211301885535511c206169911;hpb=197438ee9f18d5afcc7494664a23c6bc5bb49b86;p=dpdk.git diff --git a/drivers/net/octeontx/octeontx_ethdev.c b/drivers/net/octeontx/octeontx_ethdev.c index 498ea2a297..6d67d257c0 100644 --- a/drivers/net/octeontx/octeontx_ethdev.c +++ b/drivers/net/octeontx/octeontx_ethdev.c @@ -1,34 +1,7 @@ -/* - * BSD LICENSE - * - * Copyright (C) Cavium Inc. 2017. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * * Neither the name of Cavium networks nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2017 Cavium, Inc */ + #include #include #include @@ -43,16 +16,21 @@ #include #include #include +#include #include -#include +#include #include "octeontx_ethdev.h" +#include "octeontx_rxtx.h" #include "octeontx_logs.h" struct octeontx_vdev_init_params { uint8_t nr_port; }; +uint16_t +rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX]; + enum octeontx_link_speed { OCTEONTX_LINK_SPEED_SGMII, OCTEONTX_LINK_SPEED_XAUI, @@ -64,6 +42,27 @@ enum octeontx_link_speed { OCTEONTX_LINK_SPEED_RESERVE2 }; +int otx_net_logtype_mbox; +int otx_net_logtype_init; +int otx_net_logtype_driver; + +RTE_INIT(otx_net_init_log); +static void +otx_net_init_log(void) +{ + otx_net_logtype_mbox = rte_log_register("pmd.net.octeontx.mbox"); + if (otx_net_logtype_mbox >= 0) + rte_log_set_level(otx_net_logtype_mbox, RTE_LOG_NOTICE); + + otx_net_logtype_init = rte_log_register("pmd.net.octeontx.init"); + if (otx_net_logtype_init >= 0) + rte_log_set_level(otx_net_logtype_init, RTE_LOG_NOTICE); + + otx_net_logtype_driver = rte_log_register("pmd.net.octeontx.driver"); + if (otx_net_logtype_driver >= 0) + rte_log_set_level(otx_net_logtype_driver, RTE_LOG_NOTICE); +} + /* Parse integer from integer argument */ static int parse_integer_arg(const char *key __rte_unused, @@ -123,7 +122,7 @@ octeontx_port_open(struct octeontx_nic *nic) int res; res = 0; - + memset(&bgx_port_conf, 0x0, sizeof(bgx_port_conf)); PMD_INIT_FUNC_TRACE(); res = octeontx_bgx_port_open(nic->port_id, &bgx_port_conf); @@ -160,6 +159,22 @@ octeontx_port_close(struct octeontx_nic *nic) octeontx_log_dbg("port closed %d", nic->port_id); } +static int +octeontx_port_start(struct octeontx_nic *nic) +{ + PMD_INIT_FUNC_TRACE(); + + return octeontx_bgx_port_start(nic->port_id); +} + +static int +octeontx_port_stop(struct octeontx_nic *nic) +{ + PMD_INIT_FUNC_TRACE(); + + return octeontx_bgx_port_stop(nic->port_id); +} + static void octeontx_port_promisc_set(struct octeontx_nic *nic, int en) { @@ -182,7 +197,7 @@ octeontx_port_promisc_set(struct octeontx_nic *nic, int en) nic->port_id, en ? "set" : "unset"); } -static void +static int octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) { octeontx_mbox_bgx_port_stats_t bgx_stats; @@ -191,8 +206,10 @@ octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) PMD_INIT_FUNC_TRACE(); res = octeontx_bgx_port_stats(nic->port_id, &bgx_stats); - if (res < 0) + if (res < 0) { octeontx_log_err("failed to get port stats %d", nic->port_id); + return res; + } stats->ipackets = bgx_stats.rx_packets; stats->ibytes = bgx_stats.rx_bytes; @@ -204,6 +221,8 @@ octeontx_port_stats(struct octeontx_nic *nic, struct rte_eth_stats *stats) octeontx_log_dbg("port%d stats inpkts=%" PRIx64 " outpkts=%" PRIx64 "", nic->port_id, stats->ipackets, stats->opackets); + + return 0; } static void @@ -243,6 +262,8 @@ octeontx_dev_configure(struct rte_eth_dev *dev) struct rte_eth_rxmode *rxmode = &conf->rxmode; struct rte_eth_txmode *txmode = &conf->txmode; struct octeontx_nic *nic = octeontx_pmd_priv(dev); + uint64_t configured_offloads; + uint64_t unsupported_offloads; int ret; PMD_INIT_FUNC_TRACE(); @@ -264,34 +285,38 @@ octeontx_dev_configure(struct rte_eth_dev *dev) return -EINVAL; } - if (!rxmode->hw_strip_crc) { + configured_offloads = rxmode->offloads; + + if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) { PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); - rxmode->hw_strip_crc = 1; + configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP; } - if (rxmode->hw_ip_checksum) { - PMD_INIT_LOG(NOTICE, "rxcksum not supported"); - rxmode->hw_ip_checksum = 0; - } + unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS; - if (rxmode->split_hdr_size) { - octeontx_log_err("rxmode does not support split header"); - return -EINVAL; + if (unsupported_offloads) { + PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. " + "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n", + unsupported_offloads, configured_offloads, + (uint64_t)OCTEONTX_RX_OFFLOADS); + return -ENOTSUP; } - if (rxmode->hw_vlan_filter) { - octeontx_log_err("VLAN filter not supported"); - return -EINVAL; - } + configured_offloads = txmode->offloads; - if (rxmode->hw_vlan_extend) { - octeontx_log_err("VLAN extended not supported"); - return -EINVAL; + if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { + PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); + configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; } - if (rxmode->enable_lro) { - octeontx_log_err("LRO not supported"); - return -EINVAL; + unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS; + + if (unsupported_offloads) { + PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported." + "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n", + unsupported_offloads, configured_offloads, + (uint64_t)OCTEONTX_TX_OFFLOADS); + return -ENOTSUP; } if (conf->link_speeds & ETH_LINK_SPEED_FIXED) { @@ -328,35 +353,145 @@ octeontx_dev_configure(struct rte_eth_dev *dev) } static void -octeontx_dev_promisc_enable(struct rte_eth_dev *dev) +octeontx_dev_close(struct rte_eth_dev *dev) { + struct octeontx_txq *txq = NULL; struct octeontx_nic *nic = octeontx_pmd_priv(dev); + unsigned int i; + int ret; PMD_INIT_FUNC_TRACE(); - octeontx_port_promisc_set(nic, 1); + + rte_event_dev_close(nic->evdev); + + ret = octeontx_pko_channel_close(nic->base_ochan); + if (ret < 0) { + octeontx_log_err("failed to close channel %d VF%d %d %d", + nic->base_ochan, nic->port_id, nic->num_tx_queues, + ret); + } + /* Free txq resources for this port */ + for (i = 0; i < nic->num_tx_queues; i++) { + txq = dev->data->tx_queues[i]; + if (!txq) + continue; + + rte_free(txq); + } +} + +static int +octeontx_dev_start(struct rte_eth_dev *dev) +{ + struct octeontx_nic *nic = octeontx_pmd_priv(dev); + int ret; + + ret = 0; + + PMD_INIT_FUNC_TRACE(); + /* + * Tx start + */ + dev->tx_pkt_burst = octeontx_xmit_pkts; + ret = octeontx_pko_channel_start(nic->base_ochan); + if (ret < 0) { + octeontx_log_err("fail to conf VF%d no. txq %d chan %d ret %d", + nic->port_id, nic->num_tx_queues, nic->base_ochan, + ret); + goto error; + } + + /* + * Rx start + */ + dev->rx_pkt_burst = octeontx_recv_pkts; + ret = octeontx_pki_port_start(nic->port_id); + if (ret < 0) { + octeontx_log_err("fail to start Rx on port %d", nic->port_id); + goto channel_stop_error; + } + + /* + * Start port + */ + ret = octeontx_port_start(nic); + if (ret < 0) { + octeontx_log_err("failed start port %d", ret); + goto pki_port_stop_error; + } + + PMD_TX_LOG(DEBUG, "pko: start channel %d no.of txq %d port %d", + nic->base_ochan, nic->num_tx_queues, nic->port_id); + + ret = rte_event_dev_start(nic->evdev); + if (ret < 0) { + octeontx_log_err("failed to start evdev: ret (%d)", ret); + goto pki_port_stop_error; + } + + /* Success */ + return ret; + +pki_port_stop_error: + octeontx_pki_port_stop(nic->port_id); +channel_stop_error: + octeontx_pko_channel_stop(nic->base_ochan); +error: + return ret; } static void -octeontx_dev_promisc_disable(struct rte_eth_dev *dev) +octeontx_dev_stop(struct rte_eth_dev *dev) { struct octeontx_nic *nic = octeontx_pmd_priv(dev); + int ret; PMD_INIT_FUNC_TRACE(); - octeontx_port_promisc_set(nic, 0); + + rte_event_dev_stop(nic->evdev); + + ret = octeontx_port_stop(nic); + if (ret < 0) { + octeontx_log_err("failed to req stop port %d res=%d", + nic->port_id, ret); + return; + } + + ret = octeontx_pki_port_stop(nic->port_id); + if (ret < 0) { + octeontx_log_err("failed to stop pki port %d res=%d", + nic->port_id, ret); + return; + } + + ret = octeontx_pko_channel_stop(nic->base_ochan); + if (ret < 0) { + octeontx_log_err("failed to stop channel %d VF%d %d %d", + nic->base_ochan, nic->port_id, nic->num_tx_queues, + ret); + return; + } + + dev->tx_pkt_burst = NULL; + dev->rx_pkt_burst = NULL; } -static inline int -octeontx_atomic_write_link_status(struct rte_eth_dev *dev, - struct rte_eth_link *link) +static void +octeontx_dev_promisc_enable(struct rte_eth_dev *dev) { - struct rte_eth_link *dst = &dev->data->dev_link; - struct rte_eth_link *src = link; + struct octeontx_nic *nic = octeontx_pmd_priv(dev); - if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst, - *(uint64_t *)src) == 0) - return -1; + PMD_INIT_FUNC_TRACE(); + octeontx_port_promisc_set(nic, 1); +} - return 0; +static void +octeontx_dev_promisc_disable(struct rte_eth_dev *dev) +{ + struct octeontx_nic *nic = octeontx_pmd_priv(dev); + + PMD_INIT_FUNC_TRACE(); + octeontx_port_promisc_set(nic, 0); } static int @@ -389,7 +524,6 @@ octeontx_dev_link_update(struct rte_eth_dev *dev, struct rte_eth_link link; int res; - res = 0; PMD_INIT_FUNC_TRACE(); res = octeontx_port_link_status(nic); @@ -423,23 +557,24 @@ octeontx_dev_link_update(struct rte_eth_dev *dev, case OCTEONTX_LINK_SPEED_RESERVE1: case OCTEONTX_LINK_SPEED_RESERVE2: default: + link.link_speed = ETH_SPEED_NUM_NONE; octeontx_log_err("incorrect link speed %d", nic->speed); break; } - link.link_duplex = ETH_LINK_AUTONEG; - link.link_autoneg = ETH_LINK_SPEED_AUTONEG; + link.link_duplex = ETH_LINK_FULL_DUPLEX; + link.link_autoneg = ETH_LINK_AUTONEG; - return octeontx_atomic_write_link_status(dev, &link); + return rte_eth_linkstatus_set(dev, &link); } -static void +static int octeontx_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats) { struct octeontx_nic *nic = octeontx_pmd_priv(dev); PMD_INIT_FUNC_TRACE(); - octeontx_port_stats(nic, stats); + return octeontx_port_stats(nic, stats); } static void @@ -451,7 +586,7 @@ octeontx_dev_stats_reset(struct rte_eth_dev *dev) octeontx_port_stats_clr(nic); } -static void +static int octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *addr) { @@ -462,6 +597,8 @@ octeontx_dev_default_mac_addr_set(struct rte_eth_dev *dev, if (ret != 0) octeontx_log_err("failed to set MAC address on port %d", nic->port_id); + + return ret; } static void @@ -476,17 +613,16 @@ octeontx_dev_info(struct rte_eth_dev *dev, ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G | ETH_LINK_SPEED_40G; - dev_info->driver_name = RTE_STR(rte_octeontx_pmd); dev_info->max_mac_addrs = 1; dev_info->max_rx_pktlen = PKI_MAX_PKTLEN; dev_info->max_rx_queues = 1; dev_info->max_tx_queues = PKO_MAX_NUM_DQ; dev_info->min_rx_bufsize = 0; - dev_info->pci_dev = NULL; dev_info->default_rxconf = (struct rte_eth_rxconf) { .rx_free_thresh = 0, .rx_drop_en = 0, + .offloads = OCTEONTX_RX_OFFLOADS, }; dev_info->default_txconf = (struct rte_eth_txconf) { @@ -497,7 +633,191 @@ octeontx_dev_info(struct rte_eth_dev *dev, ETH_TXQ_FLAGS_NOXSUMS, }; - dev_info->tx_offload_capa = DEV_TX_OFFLOAD_MT_LOCKFREE; + dev_info->rx_offload_capa = OCTEONTX_RX_OFFLOADS; + dev_info->tx_offload_capa = OCTEONTX_TX_OFFLOADS; +} + +static void +octeontx_dq_info_getter(octeontx_dq_t *dq, void *out) +{ + ((octeontx_dq_t *)out)->lmtline_va = dq->lmtline_va; + ((octeontx_dq_t *)out)->ioreg_va = dq->ioreg_va; + ((octeontx_dq_t *)out)->fc_status_va = dq->fc_status_va; +} + +static int +octeontx_vf_start_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, + uint16_t qidx) +{ + struct octeontx_txq *txq; + int res; + + PMD_INIT_FUNC_TRACE(); + + if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STARTED) + return 0; + + txq = dev->data->tx_queues[qidx]; + + res = octeontx_pko_channel_query_dqs(nic->base_ochan, + &txq->dq, + sizeof(octeontx_dq_t), + txq->queue_id, + octeontx_dq_info_getter); + if (res < 0) { + res = -EFAULT; + goto close_port; + } + + dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STARTED; + return res; + +close_port: + (void)octeontx_port_stop(nic); + octeontx_pko_channel_stop(nic->base_ochan); + octeontx_pko_channel_close(nic->base_ochan); + dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; + return res; +} + +static int +octeontx_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct octeontx_nic *nic = octeontx_pmd_priv(dev); + + PMD_INIT_FUNC_TRACE(); + qidx = qidx % PKO_VF_NUM_DQ; + return octeontx_vf_start_tx_queue(dev, nic, qidx); +} + +static inline int +octeontx_vf_stop_tx_queue(struct rte_eth_dev *dev, struct octeontx_nic *nic, + uint16_t qidx) +{ + int ret = 0; + + RTE_SET_USED(nic); + PMD_INIT_FUNC_TRACE(); + + if (dev->data->tx_queue_state[qidx] == RTE_ETH_QUEUE_STATE_STOPPED) + return 0; + + dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; + return ret; +} + +static int +octeontx_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t qidx) +{ + struct octeontx_nic *nic = octeontx_pmd_priv(dev); + + PMD_INIT_FUNC_TRACE(); + qidx = qidx % PKO_VF_NUM_DQ; + + return octeontx_vf_stop_tx_queue(dev, nic, qidx); +} + +static void +octeontx_dev_tx_queue_release(void *tx_queue) +{ + struct octeontx_txq *txq = tx_queue; + int res; + + PMD_INIT_FUNC_TRACE(); + + if (txq) { + res = octeontx_dev_tx_queue_stop(txq->eth_dev, txq->queue_id); + if (res < 0) + octeontx_log_err("failed stop tx_queue(%d)\n", + txq->queue_id); + + rte_free(txq); + } +} + +static int +octeontx_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, + uint16_t nb_desc, unsigned int socket_id, + const struct rte_eth_txconf *tx_conf) +{ + struct octeontx_nic *nic = octeontx_pmd_priv(dev); + struct octeontx_txq *txq = NULL; + uint16_t dq_num; + int res = 0; + uint64_t configured_offloads; + uint64_t unsupported_offloads; + + RTE_SET_USED(nb_desc); + RTE_SET_USED(socket_id); + + dq_num = (nic->port_id * PKO_VF_NUM_DQ) + qidx; + + /* Socket id check */ + if (socket_id != (unsigned int)SOCKET_ID_ANY && + socket_id != (unsigned int)nic->node) + PMD_TX_LOG(INFO, "socket_id expected %d, configured %d", + socket_id, nic->node); + + /* Free memory prior to re-allocation if needed. */ + if (dev->data->tx_queues[qidx] != NULL) { + PMD_TX_LOG(DEBUG, "freeing memory prior to re-allocation %d", + qidx); + octeontx_dev_tx_queue_release(dev->data->tx_queues[qidx]); + dev->data->tx_queues[qidx] = NULL; + } + + configured_offloads = tx_conf->offloads; + + if (!(configured_offloads & DEV_TX_OFFLOAD_MT_LOCKFREE)) { + PMD_INIT_LOG(NOTICE, "cant disable lockfree tx"); + configured_offloads |= DEV_TX_OFFLOAD_MT_LOCKFREE; + } + + unsupported_offloads = configured_offloads & ~OCTEONTX_TX_OFFLOADS; + if (unsupported_offloads) { + PMD_INIT_LOG(ERR, "Tx offloads 0x%" PRIx64 " are not supported." + "Requested 0x%" PRIx64 " supported 0x%" PRIx64 ".\n", + unsupported_offloads, configured_offloads, + (uint64_t)OCTEONTX_TX_OFFLOADS); + return -ENOTSUP; + } + + /* Allocating tx queue data structure */ + txq = rte_zmalloc_socket("ethdev TX queue", sizeof(struct octeontx_txq), + RTE_CACHE_LINE_SIZE, nic->node); + if (txq == NULL) { + octeontx_log_err("failed to allocate txq=%d", qidx); + res = -ENOMEM; + goto err; + } + + txq->eth_dev = dev; + txq->queue_id = dq_num; + dev->data->tx_queues[qidx] = txq; + dev->data->tx_queue_state[qidx] = RTE_ETH_QUEUE_STATE_STOPPED; + + res = octeontx_pko_channel_query_dqs(nic->base_ochan, + &txq->dq, + sizeof(octeontx_dq_t), + txq->queue_id, + octeontx_dq_info_getter); + if (res < 0) { + res = -EFAULT; + goto err; + } + + PMD_TX_LOG(DEBUG, "[%d]:[%d] txq=%p nb_desc=%d lmtline=%p ioreg_va=%p fc_status_va=%p", + qidx, txq->queue_id, txq, nb_desc, txq->dq.lmtline_va, + txq->dq.ioreg_va, + txq->dq.fc_status_va); + + return res; + +err: + if (txq) + rte_free(txq); + + return res; } static int @@ -517,6 +837,8 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, uint8_t gaura; unsigned int ev_queues = (nic->ev_queues * nic->port_id) + qidx; unsigned int ev_ports = (nic->ev_ports * nic->port_id) + qidx; + uint64_t configured_offloads; + uint64_t unsupported_offloads; RTE_SET_USED(nb_desc); @@ -539,6 +861,22 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, port = nic->port_id; + configured_offloads = rx_conf->offloads; + + if (!(configured_offloads & DEV_RX_OFFLOAD_CRC_STRIP)) { + PMD_INIT_LOG(NOTICE, "can't disable hw crc strip"); + configured_offloads |= DEV_RX_OFFLOAD_CRC_STRIP; + } + + unsupported_offloads = configured_offloads & ~OCTEONTX_RX_OFFLOADS; + + if (unsupported_offloads) { + PMD_INIT_LOG(ERR, "Rx offloads 0x%" PRIx64 " are not supported. " + "Requested 0x%" PRIx64 " supported 0x%" PRIx64 "\n", + unsupported_offloads, configured_offloads, + (uint64_t)OCTEONTX_RX_OFFLOADS); + return -ENOTSUP; + } /* Rx deferred start is not supported */ if (rx_conf->rx_deferred_start) { octeontx_log_err("rx deferred start not supported"); @@ -619,6 +957,7 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, pki_hash.tag_slc = 1; pki_hash.tag_dlf = 1; pki_hash.tag_slf = 1; + pki_hash.tag_prt = 1; octeontx_pki_port_hash_config(port, &pki_hash); } @@ -630,7 +969,7 @@ octeontx_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t qidx, pki_qos.qpg_qos = PKI_QPG_QOS_NONE; pki_qos.num_entry = 1; pki_qos.drop_policy = 0; - pki_qos.tag_type = 2L; + pki_qos.tag_type = 0L; pki_qos.qos_entry[0].port_add = 0; pki_qos.qos_entry[0].gaura = gaura; pki_qos.qos_entry[0].ggrp_ok = ev_queues; @@ -666,18 +1005,58 @@ octeontx_dev_rx_queue_release(void *rxq) rte_free(rxq); } +static const uint32_t * +octeontx_dev_supported_ptypes_get(struct rte_eth_dev *dev) +{ + static const uint32_t ptypes[] = { + RTE_PTYPE_L3_IPV4, + RTE_PTYPE_L3_IPV4_EXT, + RTE_PTYPE_L3_IPV6, + RTE_PTYPE_L3_IPV6_EXT, + RTE_PTYPE_L4_TCP, + RTE_PTYPE_L4_UDP, + RTE_PTYPE_L4_FRAG, + RTE_PTYPE_UNKNOWN + }; + + if (dev->rx_pkt_burst == octeontx_recv_pkts) + return ptypes; + + return NULL; +} + +static int +octeontx_pool_ops(struct rte_eth_dev *dev, const char *pool) +{ + RTE_SET_USED(dev); + + if (!strcmp(pool, "octeontx_fpavf")) + return 0; + + return -ENOTSUP; +} + /* Initialize and register driver with DPDK Application */ static const struct eth_dev_ops octeontx_dev_ops = { .dev_configure = octeontx_dev_configure, .dev_infos_get = octeontx_dev_info, + .dev_close = octeontx_dev_close, + .dev_start = octeontx_dev_start, + .dev_stop = octeontx_dev_stop, .promiscuous_enable = octeontx_dev_promisc_enable, .promiscuous_disable = octeontx_dev_promisc_disable, .link_update = octeontx_dev_link_update, .stats_get = octeontx_dev_stats_get, .stats_reset = octeontx_dev_stats_reset, .mac_addr_set = octeontx_dev_default_mac_addr_set, + .tx_queue_start = octeontx_dev_tx_queue_start, + .tx_queue_stop = octeontx_dev_tx_queue_stop, + .tx_queue_setup = octeontx_dev_tx_queue_setup, + .tx_queue_release = octeontx_dev_tx_queue_release, .rx_queue_setup = octeontx_dev_rx_queue_setup, .rx_queue_release = octeontx_dev_rx_queue_release, + .dev_supported_ptypes_get = octeontx_dev_supported_ptypes_get, + .pool_ops_supported = octeontx_pool_ops, }; /* Create Ethdev interface per BGX LMAC ports */ @@ -700,6 +1079,8 @@ octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, if (eth_dev == NULL) return -ENODEV; + eth_dev->tx_pkt_burst = octeontx_xmit_pkts; + eth_dev->rx_pkt_burst = octeontx_recv_pkts; return 0; } @@ -791,10 +1172,13 @@ octeontx_create(struct rte_vdev_device *dev, int port, uint8_t evdev, nic->num_tx_queues); PMD_INIT_LOG(DEBUG, "speed %d mtu %d", nic->speed, nic->mtu); + rte_octeontx_pchan_map[(nic->base_ochan >> 8) & 0x7] + [(nic->base_ochan >> 4) & 0xF] = data->port_id; + return data->port_id; err: - if (port) + if (nic) octeontx_port_close(nic); if (eth_dev != NULL) { @@ -972,6 +1356,7 @@ octeontx_probe(struct rte_vdev_device *dev) res = -ENOTSUP; goto parse_error; } + rte_mbuf_set_platform_mempool_ops("octeontx_fpavf"); probe_once = 1; return 0;