X-Git-Url: http://git.droids-corp.org/?a=blobdiff_plain;f=lib%2Flibrte_pmd_e1000%2Fem_rxtx.c;h=ed3a6fcc808f1547b3a876ce64f8165ced57f387;hb=08b563ffb19d8baf59dd84200f25bc85031d18a7;hp=5967fe90a35006ec0cb33adc05a8ddb3fda80b0b;hpb=3b46fb77ebdb6bb6b47c578a2986077dcff68a19;p=dpdk.git diff --git a/lib/librte_pmd_e1000/em_rxtx.c b/lib/librte_pmd_e1000/em_rxtx.c index 5967fe90a3..ed3a6fcc80 100644 --- a/lib/librte_pmd_e1000/em_rxtx.c +++ b/lib/librte_pmd_e1000/em_rxtx.c @@ -1,40 +1,38 @@ /*- * BSD LICENSE - * - * Copyright(c) 2010-2013 Intel Corporation. All rights reserved. + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions * are met: - * - * * Redistributions of source code must retain the above copyright + * + * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the * distribution. - * * Neither the name of Intel Corporation nor the names of its - * contributors may be used to endorse or promote products derived + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * */ #include -#include #include #include #include @@ -75,6 +73,7 @@ #include "e1000_logs.h" #include "e1000/e1000_api.h" #include "e1000_ethdev.h" +#include "e1000/e1000_osdep.h" #define E1000_TXD_VLAN_SHIFT 16 @@ -86,13 +85,12 @@ rte_rxmbuf_alloc(struct rte_mempool *mp) struct rte_mbuf *m; m = __rte_mbuf_raw_alloc(mp); - __rte_mbuf_sanity_check_raw(m, RTE_MBUF_PKT, 0); + __rte_mbuf_sanity_check_raw(m, 0); return (m); } #define RTE_MBUF_DATA_DMA_ADDR(mb) \ - (uint64_t) ((mb)->buf_physaddr + \ - (uint64_t) ((char *)((mb)->pkt.data) - (char *)(mb)->buf_addr)) + (uint64_t) ((mb)->buf_physaddr + (mb)->data_off) #define RTE_MBUF_DATA_DMA_ADDR_DEFAULT(mb) \ (uint64_t) ((mb)->buf_physaddr + RTE_PKTMBUF_HEADROOM) @@ -121,6 +119,7 @@ struct em_rx_queue { volatile struct e1000_rx_desc *rx_ring; /**< RX ring virtual address. */ uint64_t rx_ring_phys_addr; /**< RX ring DMA address. */ volatile uint32_t *rdt_reg_addr; /**< RDT register address. */ + volatile uint32_t *rdh_reg_addr; /**< RDH register address. */ struct em_rx_entry *sw_ring; /**< address of RX software ring. */ struct rte_mbuf *pkt_first_seg; /**< First segment of current packet. */ struct rte_mbuf *pkt_last_seg; /**< Last segment of current packet. */ @@ -144,13 +143,34 @@ enum { EM_CTX_NUM = 1, /**< CTX NUM */ }; +/** Offload features */ +union em_vlan_macip { + uint32_t data; + struct { + uint16_t l3_len:9; /**< L3 (IP) Header Length. */ + uint16_t l2_len:7; /**< L2 (MAC) Header Length. */ + uint16_t vlan_tci; + /**< VLAN Tag Control Identifier (CPU order). */ + } f; +}; + +/* + * Compare mask for vlan_macip_len.data, + * should be in sync with em_vlan_macip.f layout. + * */ +#define TX_VLAN_CMP_MASK 0xFFFF0000 /**< VLAN length - 16-bits. */ +#define TX_MAC_LEN_CMP_MASK 0x0000FE00 /**< MAC length - 7-bits. */ +#define TX_IP_LEN_CMP_MASK 0x000001FF /**< IP length - 9-bits. */ +/** MAC+IP length. */ +#define TX_MACIP_LEN_CMP_MASK (TX_MAC_LEN_CMP_MASK | TX_IP_LEN_CMP_MASK) + /** * Structure to check if new context need be built */ struct em_ctx_info { - uint16_t flags; /**< ol_flags related to context build. */ - uint32_t cmp_mask; /**< compare mask */ - union rte_vlan_macip hdrlen; /**< L2 and L3 header lenghts */ + uint16_t flags; /**< ol_flags related to context build. */ + uint32_t cmp_mask; /**< compare mask */ + union em_vlan_macip hdrlen; /**< L2 and L3 header lenghts */ }; /** @@ -219,7 +239,7 @@ static inline void em_set_xmit_ctx(struct em_tx_queue* txq, volatile struct e1000_context_desc *ctx_txd, uint16_t flags, - union rte_vlan_macip hdrlen) + union em_vlan_macip hdrlen) { uint32_t cmp_mask, cmd_len; uint16_t ipcse, l2len; @@ -229,19 +249,20 @@ em_set_xmit_ctx(struct em_tx_queue* txq, cmd_len = E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_C; l2len = hdrlen.f.l2_len; - ipcse = l2len + hdrlen.f.l3_len; + ipcse = (uint16_t)(l2len + hdrlen.f.l3_len); /* setup IPCS* fields */ - ctx.lower_setup.ip_fields.ipcss = l2len; - ctx.lower_setup.ip_fields.ipcso =l2len + - offsetof(struct ipv4_hdr, hdr_checksum); + ctx.lower_setup.ip_fields.ipcss = (uint8_t)l2len; + ctx.lower_setup.ip_fields.ipcso = (uint8_t)(l2len + + offsetof(struct ipv4_hdr, hdr_checksum)); /* * When doing checksum or TCP segmentation with IPv6 headers, * IPCSE field should be set t0 0. */ if (flags & PKT_TX_IP_CKSUM) { - ctx.lower_setup.ip_fields.ipcse = rte_cpu_to_le_16(ipcse - 1); + ctx.lower_setup.ip_fields.ipcse = + (uint16_t)rte_cpu_to_le_16(ipcse - 1); cmd_len |= E1000_TXD_CMD_IP; cmp_mask |= TX_MACIP_LEN_CMP_MASK; } else { @@ -249,18 +270,18 @@ em_set_xmit_ctx(struct em_tx_queue* txq, } /* setup TUCS* fields */ - ctx.upper_setup.tcp_fields.tucss = ipcse; + ctx.upper_setup.tcp_fields.tucss = (uint8_t)ipcse; ctx.upper_setup.tcp_fields.tucse = 0; switch (flags & PKT_TX_L4_MASK) { case PKT_TX_UDP_CKSUM: - ctx.upper_setup.tcp_fields.tucso = ipcse + - offsetof(struct udp_hdr, dgram_cksum); + ctx.upper_setup.tcp_fields.tucso = (uint8_t)(ipcse + + offsetof(struct udp_hdr, dgram_cksum)); cmp_mask |= TX_MACIP_LEN_CMP_MASK; break; case PKT_TX_TCP_CKSUM: - ctx.upper_setup.tcp_fields.tucso = ipcse + - offsetof(struct tcp_hdr, cksum); + ctx.upper_setup.tcp_fields.tucso = (uint8_t)(ipcse + + offsetof(struct tcp_hdr, cksum)); cmd_len |= E1000_TXD_CMD_TCP; cmp_mask |= TX_MACIP_LEN_CMP_MASK; break; @@ -284,7 +305,7 @@ em_set_xmit_ctx(struct em_tx_queue* txq, */ static inline uint32_t what_ctx_update(struct em_tx_queue *txq, uint16_t flags, - union rte_vlan_macip hdrlen) + union em_vlan_macip hdrlen) { /* If match with the current context */ if (likely (txq->ctx_cache.flags == flags && @@ -308,9 +329,9 @@ em_xmit_cleanup(struct em_tx_queue *txq) uint16_t nb_tx_to_clean; /* Determine the last descriptor needing to be cleaned */ - desc_to_clean_to = last_desc_cleaned + txq->tx_rs_thresh; + desc_to_clean_to = (uint16_t)(last_desc_cleaned + txq->tx_rs_thresh); if (desc_to_clean_to >= nb_tx_desc) - desc_to_clean_to = desc_to_clean_to - nb_tx_desc; + desc_to_clean_to = (uint16_t)(desc_to_clean_to - nb_tx_desc); /* Check to make sure the last descriptor to clean is done */ desc_to_clean_to = sw_ring[desc_to_clean_to].last_id; @@ -327,10 +348,11 @@ em_xmit_cleanup(struct em_tx_queue *txq) /* Figure out how many descriptors will be cleaned */ if (last_desc_cleaned > desc_to_clean_to) - nb_tx_to_clean = ((nb_tx_desc - last_desc_cleaned) + - desc_to_clean_to); + nb_tx_to_clean = (uint16_t)((nb_tx_desc - last_desc_cleaned) + + desc_to_clean_to); else - nb_tx_to_clean = desc_to_clean_to - last_desc_cleaned; + nb_tx_to_clean = (uint16_t)(desc_to_clean_to - + last_desc_cleaned); PMD_TX_FREE_LOG(DEBUG, "Cleaning %4u TX descriptors: %4u to %4u " @@ -348,7 +370,7 @@ em_xmit_cleanup(struct em_tx_queue *txq) /* Update the txq to reflect the last descriptor that was cleaned */ txq->last_desc_cleaned = desc_to_clean_to; - txq->nb_tx_free += nb_tx_to_clean; + txq->nb_tx_free = (uint16_t)(txq->nb_tx_free + nb_tx_to_clean); /* No Error */ return (0); @@ -389,7 +411,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t tx_ol_req; uint32_t ctx; uint32_t new_ctx; - union rte_vlan_macip hdrlen; + union em_vlan_macip hdrlen; txq = tx_queue; sw_ring = txq->sw_ring; @@ -416,9 +438,12 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, ol_flags = tx_pkt->ol_flags; /* If hardware offload required */ - tx_ol_req = ol_flags & (PKT_TX_IP_CKSUM | PKT_TX_L4_MASK); + tx_ol_req = (uint16_t)(ol_flags & (PKT_TX_IP_CKSUM | + PKT_TX_L4_MASK)); if (tx_ol_req) { - hdrlen = tx_pkt->pkt.vlan_macip; + hdrlen.f.vlan_tci = tx_pkt->vlan_tci; + hdrlen.f.l2_len = tx_pkt->l2_len; + hdrlen.f.l3_len = tx_pkt->l3_len; /* If new context to be built or reuse the exist ctx. */ ctx = what_ctx_update(txq, tx_ol_req, hdrlen); @@ -431,7 +456,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, * This will always be the number of segments + the number of * Context descriptors required to transmit the packet */ - nb_used = tx_pkt->pkt.nb_segs + new_ctx; + nb_used = (uint16_t)(tx_pkt->nb_segs + new_ctx); /* * The number of descriptors that must be allocated for a @@ -451,7 +476,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, " tx_first=%u tx_last=%u\n", (unsigned) txq->port_id, (unsigned) txq->queue_id, - (unsigned) tx_pkt->pkt.pkt_len, + (unsigned) tx_pkt->pkt_len, (unsigned) tx_id, (unsigned) tx_last); @@ -513,8 +538,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, /* Set VLAN Tag offload fields. */ if (ol_flags & PKT_TX_VLAN_PKT) { cmd_type_len |= E1000_TXD_CMD_VLE; - popts_spec = tx_pkt->pkt.vlan_macip.f.vlan_tci << - E1000_TXD_VLAN_SHIFT; + popts_spec = tx_pkt->vlan_tci << E1000_TXD_VLAN_SHIFT; } if (tx_ol_req) { @@ -563,7 +587,7 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, /* * Set up Transmit Data Descriptor. */ - slen = m_seg->pkt.data_len; + slen = m_seg->data_len; buf_dma_addr = RTE_MBUF_DATA_DMA_ADDR(m_seg); txd->buffer_addr = rte_cpu_to_le_64(buf_dma_addr); @@ -573,15 +597,15 @@ eth_em_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, txe->last_id = tx_last; tx_id = txe->next_id; txe = txn; - m_seg = m_seg->pkt.next; + m_seg = m_seg->next; } while (m_seg != NULL); /* * The last packet data descriptor needs End Of Packet (EOP) */ cmd_type_len |= E1000_TXD_CMD_EOP; - txq->nb_tx_used += nb_used; - txq->nb_tx_free -= nb_used; + txq->nb_tx_used = (uint16_t)(txq->nb_tx_used + nb_used); + txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_used); /* Set RS bit only on threshold packets' last descriptor */ if (txq->nb_tx_used >= txq->tx_rs_thresh) { @@ -624,8 +648,8 @@ rx_desc_status_to_pkt_flags(uint32_t rx_status) uint16_t pkt_flags; /* Check if VLAN present */ - pkt_flags = (uint16_t) (rx_status & E1000_RXD_STAT_VP) ? - PKT_RX_VLAN_PKT : 0; + pkt_flags = (uint16_t)((rx_status & E1000_RXD_STAT_VP) ? + PKT_RX_VLAN_PKT : 0); return pkt_flags; } @@ -768,19 +792,20 @@ eth_em_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, */ pkt_len = (uint16_t) (rte_le_to_cpu_16(rxd.length) - rxq->crc_len); - rxm->pkt.data = (char*) rxm->buf_addr + RTE_PKTMBUF_HEADROOM; - rte_packet_prefetch(rxm->pkt.data); - rxm->pkt.nb_segs = 1; - rxm->pkt.next = NULL; - rxm->pkt.pkt_len = pkt_len; - rxm->pkt.data_len = pkt_len; - rxm->pkt.in_port = rxq->port_id; + rxm->data_off = RTE_PKTMBUF_HEADROOM; + rte_packet_prefetch((char *)rxm->buf_addr + rxm->data_off); + rxm->nb_segs = 1; + rxm->next = NULL; + rxm->pkt_len = pkt_len; + rxm->data_len = pkt_len; + rxm->port = rxq->port_id; rxm->ol_flags = rx_desc_status_to_pkt_flags(status); - rxm->ol_flags |= rx_desc_error_to_pkt_flags(rxd.errors); + rxm->ol_flags = (uint16_t)(rxm->ol_flags | + rx_desc_error_to_pkt_flags(rxd.errors)); /* Only valid if PKT_RX_VLAN_PKT set in pkt_flags */ - rxm->pkt.vlan_macip.f.vlan_tci = rte_le_to_cpu_16(rxd.special); + rxm->vlan_tci = rte_le_to_cpu_16(rxd.special); /* * Store the mbuf address into the next entry of the array @@ -936,8 +961,8 @@ eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, * Set data length & data buffer address of mbuf. */ data_len = rte_le_to_cpu_16(rxd.length); - rxm->pkt.data_len = data_len; - rxm->pkt.data = (char*) rxm->buf_addr + RTE_PKTMBUF_HEADROOM; + rxm->data_len = data_len; + rxm->data_off = RTE_PKTMBUF_HEADROOM; /* * If this is the first buffer of the received packet, @@ -949,12 +974,12 @@ eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, */ if (first_seg == NULL) { first_seg = rxm; - first_seg->pkt.pkt_len = data_len; - first_seg->pkt.nb_segs = 1; + first_seg->pkt_len = data_len; + first_seg->nb_segs = 1; } else { - first_seg->pkt.pkt_len += data_len; - first_seg->pkt.nb_segs++; - last_seg->pkt.next = rxm; + first_seg->pkt_len += data_len; + first_seg->nb_segs++; + last_seg->next = rxm; } /* @@ -977,18 +1002,18 @@ eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, * mbuf, subtract the length of that CRC part from the * data length of the previous mbuf. */ - rxm->pkt.next = NULL; + rxm->next = NULL; if (unlikely(rxq->crc_len > 0)) { - first_seg->pkt.pkt_len -= ETHER_CRC_LEN; + first_seg->pkt_len -= ETHER_CRC_LEN; if (data_len <= ETHER_CRC_LEN) { rte_pktmbuf_free_seg(rxm); - first_seg->pkt.nb_segs--; - last_seg->pkt.data_len = (uint16_t) - (last_seg->pkt.data_len - + first_seg->nb_segs--; + last_seg->data_len = (uint16_t) + (last_seg->data_len - (ETHER_CRC_LEN - data_len)); - last_seg->pkt.next = NULL; + last_seg->next = NULL; } else - rxm->pkt.data_len = + rxm->data_len = (uint16_t) (data_len - ETHER_CRC_LEN); } @@ -999,16 +1024,18 @@ eth_em_recv_scattered_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, * - IP checksum flag, * - error flags. */ - first_seg->pkt.in_port = rxq->port_id; + first_seg->port = rxq->port_id; first_seg->ol_flags = rx_desc_status_to_pkt_flags(status); - first_seg->ol_flags |= rx_desc_error_to_pkt_flags(rxd.errors); + first_seg->ol_flags = (uint16_t)(first_seg->ol_flags | + rx_desc_error_to_pkt_flags(rxd.errors)); /* Only valid if PKT_RX_VLAN_PKT set in pkt_flags */ - rxm->pkt.vlan_macip.f.vlan_tci = rte_le_to_cpu_16(rxd.special); + rxm->vlan_tci = rte_le_to_cpu_16(rxd.special); /* Prefetch data of first segment, if configured to do so. */ - rte_packet_prefetch(first_seg->pkt.data); + rte_packet_prefetch((char *)first_seg->buf_addr + + first_seg->data_off); /* * Store the mbuf address into the next entry of the array @@ -1088,14 +1115,19 @@ ring_dma_zone_reserve(struct rte_eth_dev *dev, const char *ring_name, const struct rte_memzone *mz; char z_name[RTE_MEMZONE_NAMESIZE]; - rte_snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d", + snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d", dev->driver->pci_drv.name, ring_name, dev->data->port_id, queue_id); if ((mz = rte_memzone_lookup(z_name)) != 0) return (mz); +#ifdef RTE_LIBRTE_XEN_DOM0 + return rte_memzone_reserve_bounded(z_name, ring_size, + socket_id, 0, CACHE_LINE_SIZE, RTE_PGSIZE_2M); +#else return rte_memzone_reserve(z_name, ring_size, socket_id, 0); +#endif } static void @@ -1192,28 +1224,27 @@ eth_em_tx_queue_setup(struct rte_eth_dev *dev, tx_free_thresh = tx_conf->tx_free_thresh; if (tx_free_thresh == 0) - tx_free_thresh = RTE_MIN(nb_desc / 4, DEFAULT_TX_FREE_THRESH); + tx_free_thresh = (uint16_t)RTE_MIN(nb_desc / 4, + DEFAULT_TX_FREE_THRESH); tx_rs_thresh = tx_conf->tx_rs_thresh; if (tx_rs_thresh == 0) - tx_rs_thresh = RTE_MIN(tx_free_thresh, DEFAULT_TX_RS_THRESH); + tx_rs_thresh = (uint16_t)RTE_MIN(tx_free_thresh, + DEFAULT_TX_RS_THRESH); if (tx_free_thresh >= (nb_desc - 3)) { - RTE_LOG(ERR, PMD, - "tx_free_thresh must be less than the " - "number of TX descriptors minus 3. " - "(tx_free_thresh=%u port=%d queue=%d)\n", - tx_free_thresh, dev->data->port_id, queue_idx); + RTE_LOG(ERR, PMD, "tx_free_thresh must be less than the " + "number of TX descriptors minus 3. (tx_free_thresh=%u " + "port=%d queue=%d)\n", (unsigned int)tx_free_thresh, + (int)dev->data->port_id, (int)queue_idx); return -(EINVAL); } if (tx_rs_thresh > tx_free_thresh) { - RTE_LOG(ERR, PMD, - "tx_rs_thresh must be less than or equal to " - "tx_free_thresh. " - "(tx_free_thresh=%u tx_rs_thresh=%u " - "port=%d queue=%d)\n", - tx_free_thresh, tx_rs_thresh, dev->data->port_id, - queue_idx); + RTE_LOG(ERR, PMD, "tx_rs_thresh must be less than or equal to " + "tx_free_thresh. (tx_free_thresh=%u tx_rs_thresh=%u " + "port=%d queue=%d)\n", (unsigned int)tx_free_thresh, + (unsigned int)tx_rs_thresh, (int)dev->data->port_id, + (int)queue_idx); return -(EINVAL); } @@ -1224,11 +1255,10 @@ eth_em_tx_queue_setup(struct rte_eth_dev *dev, * accumulates WTHRESH descriptors. */ if (tx_conf->tx_thresh.wthresh != 0 && tx_rs_thresh != 1) { - RTE_LOG(ERR, PMD, - "TX WTHRESH must be set to 0 if " - "tx_rs_thresh is greater than 1. " - "(tx_rs_thresh=%u port=%d queue=%d)\n", - tx_rs_thresh, dev->data->port_id, queue_idx); + RTE_LOG(ERR, PMD, "TX WTHRESH must be set to 0 if " + "tx_rs_thresh is greater than 1. (tx_rs_thresh=%u " + "port=%d queue=%d)\n", (unsigned int)tx_rs_thresh, + (int)dev->data->port_id, (int)queue_idx); return -(EINVAL); } @@ -1271,7 +1301,11 @@ eth_em_tx_queue_setup(struct rte_eth_dev *dev, txq->port_id = dev->data->port_id; txq->tdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_TDT(queue_idx)); +#ifndef RTE_LIBRTE_XEN_DOM0 txq->tx_ring_phys_addr = (uint64_t) tz->phys_addr; +#else + txq->tx_ring_phys_addr = rte_mem_phy2mch(tz->memseg_id, tz->phys_addr); +#endif txq->tx_ring = (struct e1000_data_desc *) tz->addr; PMD_INIT_LOG(DEBUG, "sw_ring=%p hw_ring=%p dma_addr=0x%"PRIx64"\n", @@ -1395,7 +1429,12 @@ eth_em_rx_queue_setup(struct rte_eth_dev *dev, 0 : ETHER_CRC_LEN); rxq->rdt_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_RDT(queue_idx)); + rxq->rdh_reg_addr = E1000_PCI_REG_ADDR(hw, E1000_RDH(queue_idx)); +#ifndef RTE_LIBRTE_XEN_DOM0 rxq->rx_ring_phys_addr = (uint64_t) rz->phys_addr; +#else + rxq->rx_ring_phys_addr = rte_mem_phy2mch(rz->memseg_id, rz->phys_addr); +#endif rxq->rx_ring = (struct e1000_rx_desc *) rz->addr; PMD_INIT_LOG(DEBUG, "sw_ring=%p hw_ring=%p dma_addr=0x%"PRIx64"\n", @@ -1407,6 +1446,51 @@ eth_em_rx_queue_setup(struct rte_eth_dev *dev, return (0); } +uint32_t +eth_em_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id) +{ +#define EM_RXQ_SCAN_INTERVAL 4 + volatile struct e1000_rx_desc *rxdp; + struct em_rx_queue *rxq; + uint32_t desc = 0; + + if (rx_queue_id >= dev->data->nb_rx_queues) { + PMD_RX_LOG(DEBUG,"Invalid RX queue_id=%d\n", rx_queue_id); + return 0; + } + + rxq = dev->data->rx_queues[rx_queue_id]; + rxdp = &(rxq->rx_ring[rxq->rx_tail]); + + while ((desc < rxq->nb_rx_desc) && + (rxdp->status & E1000_RXD_STAT_DD)) { + desc += EM_RXQ_SCAN_INTERVAL; + rxdp += EM_RXQ_SCAN_INTERVAL; + if (rxq->rx_tail + desc >= rxq->nb_rx_desc) + rxdp = &(rxq->rx_ring[rxq->rx_tail + + desc - rxq->nb_rx_desc]); + } + + return desc; +} + +int +eth_em_rx_descriptor_done(void *rx_queue, uint16_t offset) +{ + volatile struct e1000_rx_desc *rxdp; + struct em_rx_queue *rxq = rx_queue; + uint32_t desc; + + if (unlikely(offset >= rxq->nb_rx_desc)) + return 0; + desc = rxq->rx_tail + offset; + if (desc >= rxq->nb_rx_desc) + desc -= rxq->nb_rx_desc; + + rxdp = &rxq->rx_ring[desc]; + return !!(rxdp->status & E1000_RXD_STAT_DD); +} + void em_dev_clear_queues(struct rte_eth_dev *dev) { @@ -1436,7 +1520,7 @@ em_dev_clear_queues(struct rte_eth_dev *dev) * Returns (BSIZE | BSEX | FLXBUF) fields of RCTL register. */ static uint32_t -em_rctl_bsize(enum e1000_mac_type hwtyp, uint32_t *bufsz) +em_rctl_bsize(__rte_unused enum e1000_mac_type hwtyp, uint32_t *bufsz) { /* * For BSIZE & BSEX all configurable sizes are: @@ -1518,7 +1602,6 @@ em_alloc_rx_queue_mbufs(struct em_rx_queue *rxq) if (mbuf == NULL) { PMD_INIT_LOG(ERR, "RX mbuf alloc failed " "queue_id=%hu\n", rxq->queue_id); - em_rx_queue_release(rxq); return (-ENOMEM); } @@ -1641,7 +1724,7 @@ eth_em_rx_init(struct rte_eth_dev *dev) * limit for packet length, jumbo frame of any size * can be accepted, thus we have to enable scattered * rx if jumbo frames are enabled (or if buffer size - * is too small to accomodate non-jumbo packets) + * is too small to accommodate non-jumbo packets) * to avoid splitting packets that don't fit into * one buffer. */ @@ -1653,6 +1736,11 @@ eth_em_rx_init(struct rte_eth_dev *dev) } } + if (dev->data->dev_conf.rxmode.enable_scatter) { + dev->rx_pkt_burst = eth_em_recv_scattered_pkts; + dev->data->scattered_rx = 1; + } + /* * Setup the Checksum Register. * Receive Full-Packet Checksum Offload is mutually exclusive with RSS.