hostsim test
[aversive.git] / modules / hardware / timer / Makefile
1 TARGET = timer
2
3 # List C source files here. (C dependencies are automatically generated.)
4 ifeq ($(HOST),avr)
5 SRC = timer_init.c \
6 timer_intr.c \
7 timer_conf_check.c \
8 timer0_startstop.c \
9 timer1_startstop.c \
10 timer2_startstop.c \
11 timer3_startstop.c \
12 timer4_startstop.c \
13 timer5_startstop.c \
14 timer0_getset.c \
15 timer1_getset.c \
16 timer2_getset.c \
17 timer3_getset.c \
18 timer4_getset.c \
19 timer5_getset.c \
20 timer0_register_OV.c \
21 timer1_register_OV.c \
22 timer2_register_OV.c \
23 timer3_register_OV.c \
24 timer4_register_OV.c \
25 timer5_register_OV.c \
26 timer0_register_OC_at_tics.c \
27 timer1_register_OC_at_tics.c \
28 timer2_register_OC_at_tics.c \
29 timer3_register_OC_at_tics.c \
30 timer4_register_OC_at_tics.c \
31 timer5_register_OC_at_tics.c \
32 timer0_register_OC_in_us.c \
33 timer1_register_OC_in_us.c \
34 timer2_register_OC_in_us.c \
35 timer3_register_OC_in_us.c \
36 timer4_register_OC_in_us.c \
37 timer5_register_OC_in_us.c \
38 timer0_prescaler.c \
39 timer1_prescaler.c \
40 timer2_prescaler.c \
41 timer3_prescaler.c \
42 timer4_prescaler.c \
43 timer5_prescaler.c
44 else
45 SRC = timer_host.c
46 endif
47
48 include $(AVERSIVE_DIR)/mk/aversive_module.mk