#   BSD LICENSE
#
#   Copyright 2016 Freescale Semiconductor, Inc.
#   Copyright 2017 NXP.
#
#   Redistribution and use in source and binary forms, with or without
#   modification, are permitted provided that the following conditions
#   are met:
#
#     * Redistributions of source code must retain the above copyright
#       notice, this list of conditions and the following disclaimer.
#     * Redistributions in binary form must reproduce the above copyright
#       notice, this list of conditions and the following disclaimer in
#       the documentation and/or other materials provided with the
#       distribution.
#     * Neither the name of NXP nor the names of its
#       contributors may be used to endorse or promote products derived
#       from this software without specific prior written permission.
#
#   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
#   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
#   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
#   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
#   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
#   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
#   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
#   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
#   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
#   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
#   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#

#include "defconfig_arm64-armv8a-linuxapp-gcc"

# NXP (Freescale) - Soc Architecture with FMAN, QMAN & BMAN support
CONFIG_RTE_MACHINE="dpaa"
CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
CONFIG_RTE_LIBRTE_VHOST_NUMA=n
CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n

#
# Compile Environment Abstraction Layer
#
CONFIG_RTE_MAX_LCORE=4
CONFIG_RTE_MAX_NUMA_NODES=1
CONFIG_RTE_CACHE_LINE_SIZE=64
CONFIG_RTE_PKTMBUF_HEADROOM=128

# NXP DPAA Bus
CONFIG_RTE_LIBRTE_DPAA_BUS=y
CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n

# NXP DPAA Mempool
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa"

# Compile software NXP DPAA PMD
CONFIG_RTE_LIBRTE_DPAA_PMD=y

#
# FSL DPAA caam - crypto driver
#
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n
CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n

# DPAA CAAM driver instances
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4

#
# Number of sessions to create in the session memory pool
# on a single DPAA SEC device.
#
CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048