net/hinic: optimize Rx performance for x86
authorXiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Sat, 25 Jul 2020 08:15:34 +0000 (16:15 +0800)
committerFerruh Yigit <ferruh.yigit@intel.com>
Wed, 29 Jul 2020 22:41:23 +0000 (00:41 +0200)
For x86 platform, the rq cqe without cache aligned, which can
improve performance for some gateway scenarios.

Fixes: 361a9ccf81d6 ("net/hinic: optimize Rx performance")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
drivers/net/hinic/hinic_pmd_rx.h

index 49fa565..8a45f2d 100644 (file)
@@ -35,7 +35,11 @@ struct hinic_rq_cqe {
        u32 rss_hash;
 
        u32 rsvd[4];
+#if defined(RTE_ARCH_ARM64)
 } __rte_cache_aligned;
+#else
+};
+#endif
 
 struct hinic_rq_cqe_sect {
        struct hinic_sge        sge;