From: Alejandro Lucero <alejandro.lucero@netronome.com>
Date: Wed, 8 Nov 2017 12:28:11 +0000 (+0000)
Subject: net/nfp: fix possible bad shif operation
X-Git-Tag: spdx-start~860
X-Git-Url: http://git.droids-corp.org/?p=dpdk.git;a=commitdiff_plain;h=1fdbf9b06a45d78f0f94b9c793847047070d6827;hp=f5cba91b095d54e8d7fcea57e515b5b4453b02ba

net/nfp: fix possible bad shif operation

We do not know how big can the BAR be, but we know anything less
than 1MB is an error. This BAR needs to be big enough for accessing
most of NFP internals.

Coverity issue: 195024
Fixes: d12206e00590 ("net/nfp: add NSP user space interface")

Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
---

diff --git a/drivers/net/nfp/nfp_nfpu.c b/drivers/net/nfp/nfp_nfpu.c
index 5775d8daec..f11afef356 100644
--- a/drivers/net/nfp/nfp_nfpu.c
+++ b/drivers/net/nfp/nfp_nfpu.c
@@ -75,8 +75,13 @@ nfpu_open(struct rte_pci_device *pci_dev, nfpu_desc_t *desc, int nfp)
 	/* barsz in log2 */
 	while (barsz >>= 1)
 		i++;
+
 	barsz = i;
 
+	/* Sanity check: we can assume any bar size less than 1MB an error */
+	if (barsz < 20)
+		return -1;
+
 	/* Getting address for NFP expansion BAR registers */
 	cfg_base = pci_dev->mem_resource[0].addr;
 	cfg_base = (uint8_t *)cfg_base + NFP_CFG_EXP_BAR_CFG_BASE;