From: Alex Marginean Date: Mon, 2 Mar 2020 14:32:09 +0000 (+0530) Subject: net/enetc: init SI transactions attribute register X-Git-Url: http://git.droids-corp.org/?p=dpdk.git;a=commitdiff_plain;h=d84612e9bd6b2f106558ffb515d32000288ee73d net/enetc: init SI transactions attribute register This was left to its default value. With the patch transactions are: - coherent, - do not allocate in downstream cache (there is none on LS1028a), - merge surrounding data for BD writes, - overwrite surrounding data for frame data writes. Signed-off-by: Alex Marginean Acked-by: Gagandeep Singh --- diff --git a/drivers/net/enetc/base/enetc_hw.h b/drivers/net/enetc/base/enetc_hw.h index 00813284ee..66fad58e5e 100644 --- a/drivers/net/enetc/base/enetc_hw.h +++ b/drivers/net/enetc/base/enetc_hw.h @@ -22,6 +22,8 @@ #define ENETC_SIMR 0x0 #define ENETC_SIMR_EN BIT(31) +#define ENETC_SICAR0 0x40 +#define ENETC_SICAR0_COHERENT 0x2B2B6727 #define ENETC_SIPMAR0 0x80 #define ENETC_SIPMAR1 0x84 diff --git a/drivers/net/enetc/enetc_ethdev.c b/drivers/net/enetc/enetc_ethdev.c index eb637d0306..1716e11dd4 100644 --- a/drivers/net/enetc/enetc_ethdev.c +++ b/drivers/net/enetc/enetc_ethdev.c @@ -150,6 +150,12 @@ enetc_hardware_init(struct enetc_eth_hw *hw) /* WA for Rx lock-up HW erratum */ enetc_port_wr(enetc_hw, ENETC_PM0_RX_FIFO, 1); + /* set ENETC transaction flags to coherent, don't allocate. + * BD writes merge with surrounding cache line data, frame data writes + * overwrite cache line. + */ + enetc_wr(enetc_hw, ENETC_SICAR0, ENETC_SICAR0_COHERENT); + /* Enabling Station Interface */ enetc_wr(enetc_hw, ENETC_SIMR, ENETC_SIMR_EN);