From 586db080585ba3b0f3befae01f458ad34cf2720a Mon Sep 17 00:00:00 2001 From: Adrien Mazarguil Date: Fri, 1 Sep 2017 10:06:24 +0200 Subject: [PATCH] net/mlx4: remove Tx inline compilation option This should be a run-time parameter. Signed-off-by: Adrien Mazarguil --- config/common_base | 1 - drivers/net/mlx4/Makefile | 4 ---- drivers/net/mlx4/mlx4.c | 6 ------ drivers/net/mlx4/mlx4.h | 4 ---- 4 files changed, 15 deletions(-) diff --git a/config/common_base b/config/common_base index 4354970e38..439f3cceb5 100644 --- a/config/common_base +++ b/config/common_base @@ -215,7 +215,6 @@ CONFIG_RTE_LIBRTE_FM10K_INC_VECTOR=y CONFIG_RTE_LIBRTE_MLX4_PMD=n CONFIG_RTE_LIBRTE_MLX4_DEBUG=n CONFIG_RTE_LIBRTE_MLX4_DEBUG_BROKEN_VERBS=n -CONFIG_RTE_LIBRTE_MLX4_MAX_INLINE=0 CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8 # diff --git a/drivers/net/mlx4/Makefile b/drivers/net/mlx4/Makefile index f9257fcbcc..bd713e2e08 100644 --- a/drivers/net/mlx4/Makefile +++ b/drivers/net/mlx4/Makefile @@ -68,10 +68,6 @@ else CFLAGS += -DNDEBUG -UPEDANTIC endif -ifdef CONFIG_RTE_LIBRTE_MLX4_MAX_INLINE -CFLAGS += -DMLX4_PMD_MAX_INLINE=$(CONFIG_RTE_LIBRTE_MLX4_MAX_INLINE) -endif - ifdef CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE CFLAGS += -DMLX4_PMD_TX_MP_CACHE=$(CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE) endif diff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c index 0bbcb7b433..394b87c4c2 100644 --- a/drivers/net/mlx4/mlx4.c +++ b/drivers/net/mlx4/mlx4.c @@ -1428,7 +1428,6 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) (uintptr_t)addr); RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf); /* Put packet into send queue. */ -#if MLX4_PMD_MAX_INLINE > 0 if (length <= txq->max_inline) err = txq->if_qp->send_pending_inline (txq->qp, @@ -1436,7 +1435,6 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) length, send_flags); else -#endif err = txq->if_qp->send_pending (txq->qp, addr, @@ -1578,9 +1576,7 @@ txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc, MLX4_PMD_SGE_WR_N) ? priv->device_attr.max_sge : MLX4_PMD_SGE_WR_N), -#if MLX4_PMD_MAX_INLINE > 0 .max_inline_data = MLX4_PMD_MAX_INLINE, -#endif }, .qp_type = IBV_QPT_RAW_PACKET, /* Do *NOT* enable this, completions events are managed per @@ -1598,10 +1594,8 @@ txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc, (void *)dev, strerror(ret)); goto error; } -#if MLX4_PMD_MAX_INLINE > 0 /* ibv_create_qp() updates this value. */ tmpl.max_inline = attr.init.cap.max_inline_data; -#endif attr.mod = (struct ibv_exp_qp_attr){ /* Move the QP to this state. */ .qp_state = IBV_QPS_INIT, diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index 5c2005da84..256e6446db 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -84,9 +84,7 @@ #define MLX4_PMD_SGE_WR_N 4 /* Maximum size for inline data. */ -#ifndef MLX4_PMD_MAX_INLINE #define MLX4_PMD_MAX_INLINE 0 -#endif /* * Maximum number of cached Memory Pools (MPs) per TX queue. Each RTE MP @@ -267,9 +265,7 @@ struct txq { struct ibv_qp *qp; /* Queue Pair. */ struct ibv_exp_qp_burst_family *if_qp; /* QP burst interface. */ struct ibv_exp_cq_family *if_cq; /* CQ interface. */ -#if MLX4_PMD_MAX_INLINE > 0 uint32_t max_inline; /* Max inline send size <= MLX4_PMD_MAX_INLINE. */ -#endif unsigned int elts_n; /* (*elts)[] length. */ struct txq_elt (*elts)[]; /* TX elements. */ unsigned int elts_head; /* Current index in (*elts)[]. */ -- 2.20.1