From: Fabrice Desclaux Date: Tue, 26 Jun 2012 21:19:08 +0000 (+0200) Subject: debug board X-Git-Tag: v2~12 X-Git-Url: http://git.droids-corp.org/?p=protos%2Fxbee-elec.git;a=commitdiff_plain;h=2e3b9ff6c16c7b30a6523e3a5793e95fdcbe5264 debug board --- diff --git a/debugboard/debugboard.sch b/debugboard/debugboard.sch new file mode 100644 index 0000000..77ebd2a --- /dev/null +++ b/debugboard/debugboard.sch @@ -0,0 +1,405 @@ +v 20110115 2 +N 67500 56900 68500 56900 4 +N 68500 56500 67200 56500 4 +C 68500 50500 1 0 0 connector16-2.sym +{ +T 69200 57400 5 10 1 1 0 6 1 +refdes=CONN2 +T 68800 57350 5 10 0 0 0 0 1 +device=CONNECTOR_16 +T 68800 57550 5 10 0 0 0 0 1 +footprint=SIP16N +} +C 67100 56200 1 0 0 gnd-1.sym +N 68500 56100 67600 56100 4 +{ +T 67600 56200 5 10 1 1 0 0 1 +netname=PDI_DATA +} +N 68500 55700 67600 55700 4 +{ +T 67200 55800 5 10 1 1 0 0 1 +netname=PDI_CLK_RESET +} +N 68500 55300 67600 55300 4 +{ +T 67600 55400 5 10 1 1 0 0 1 +netname=TMS +} +N 68500 54900 67600 54900 4 +{ +T 67600 55000 5 10 1 1 0 0 1 +netname=TDI +} +N 68500 54500 67600 54500 4 +{ +T 67600 54600 5 10 1 1 0 0 1 +netname=TCK +} +N 68500 54100 67600 54100 4 +{ +T 67600 54200 5 10 1 1 0 0 1 +netname=TDO +} +N 68500 53700 67200 53700 4 +C 67100 53400 1 0 0 gnd-1.sym +N 68500 53300 67600 53300 4 +{ +T 67600 53400 5 10 1 1 0 0 1 +netname=RX +} +N 68500 52900 67600 52900 4 +{ +T 67600 53000 5 10 1 1 0 0 1 +netname=TX +} +N 68500 50900 67200 50900 4 +C 67100 50600 1 0 0 gnd-1.sym +N 68500 52500 67200 52500 4 +C 67100 52200 1 0 0 gnd-1.sym +C 40100 39900 0 0 0 title-A1.sym +C 47700 52300 1 0 0 ft232rl.sym +{ +T 50200 57100 5 10 1 1 0 6 1 +refdes=U1 +T 48000 57400 5 10 0 0 0 0 1 +device=FT232RL +T 48000 57600 5 10 0 0 0 0 1 +footprint=SSOP28 +} +C 42400 55300 1 0 0 usb.sym +{ +T 43100 56700 5 10 1 1 0 0 1 +refdes=CONN1 +T 42500 56700 5 10 1 1 0 0 1 +device=USB +T 42800 67950 5 10 0 0 0 0 1 +footprint=conn_usb2 +} +N 43700 56100 47700 56100 4 +N 47700 55800 43700 55800 4 +C 44300 56400 1 0 0 vcc-1.sym +N 43700 56400 44500 56400 4 +C 44400 55200 1 0 0 gnd-1.sym +N 43700 55500 44500 55500 4 +C 46800 56400 1 0 0 vcc-1.sym +N 47000 56400 47700 56400 4 +C 67300 56900 1 0 0 vdd-1.sym +C 47200 56800 1 0 0 vdd-1.sym +N 47700 56700 47400 56700 4 +N 47400 56700 47400 56800 4 +C 42200 55600 1 90 0 capacitor-1.sym +{ +T 41500 55800 5 10 0 0 90 0 1 +device=CAPACITOR +T 41700 56300 5 10 1 1 180 0 1 +refdes=C1 +T 41300 55800 5 10 0 0 90 0 1 +symversion=0.1 +T 41400 55900 5 10 1 1 0 0 1 +value=10n +} +N 42000 56500 42000 57300 4 +N 42000 57300 44100 57300 4 +N 44100 57300 44100 56400 4 +N 42000 55600 42000 54900 4 +N 42000 54900 44100 54900 4 +N 44100 54900 44100 55500 4 +C 47600 51900 1 0 0 gnd-1.sym +N 47200 52300 49900 52300 4 +N 47700 52300 47700 52200 4 +C 51200 54200 1 0 0 resistor-2.sym +{ +T 51600 54550 5 10 0 0 0 0 1 +device=RESISTOR +T 51400 54500 5 10 1 1 0 0 1 +refdes=R1 +T 51500 54200 5 10 1 1 0 0 1 +value=270 +} +C 51200 53900 1 0 0 resistor-2.sym +{ +T 51600 54250 5 10 0 0 0 0 1 +device=RESISTOR +T 51400 53700 5 10 1 1 0 0 1 +refdes=R3 +T 51500 53900 5 10 1 1 0 0 1 +value=270 +} +C 53300 54200 1 0 1 led-2.sym +{ +T 53000 54600 5 10 1 1 0 6 1 +refdes=D2 +T 53200 54800 5 10 0 0 0 6 1 +device=LED +} +C 53300 53900 1 0 1 led-2.sym +{ +T 53000 53700 5 10 1 1 0 6 1 +refdes=D4 +T 53200 54500 5 10 0 0 0 6 1 +device=LED +} +C 54000 54300 1 0 0 vdd-1.sym +N 50500 54300 51200 54300 4 +N 52100 54300 52400 54300 4 +N 53300 54300 54200 54300 4 +N 53300 54000 54200 54000 4 +N 54200 54000 54200 54300 4 +N 52400 54000 52100 54000 4 +N 51200 54000 50500 54000 4 +C 47400 52500 1 90 0 capacitor-1.sym +{ +T 46700 52700 5 10 0 0 90 0 1 +device=CAPACITOR +T 46900 53200 5 10 1 1 180 0 1 +refdes=C4 +T 46500 52700 5 10 0 0 90 0 1 +symversion=0.1 +T 46500 52800 5 10 1 1 0 0 1 +value=100n +} +N 47700 53400 47200 53400 4 +N 47200 52500 47200 52300 4 +C 48800 58200 1 90 0 capacitor-1.sym +{ +T 48100 58400 5 10 0 0 90 0 1 +device=CAPACITOR +T 48300 58900 5 10 1 1 180 0 1 +refdes=C2 +T 47900 58400 5 10 0 0 90 0 1 +symversion=0.1 +T 47900 58500 5 10 1 1 0 0 1 +value=100n +} +C 49900 58200 1 90 0 capacitor-1.sym +{ +T 49200 58400 5 10 0 0 90 0 1 +device=CAPACITOR +T 49400 58900 5 10 1 1 180 0 1 +refdes=C3 +T 49000 58400 5 10 0 0 90 0 1 +symversion=0.1 +T 49000 58500 5 10 1 1 0 0 1 +value=100n +} +C 48400 59200 1 0 0 vdd-1.sym +C 49500 59200 1 0 0 vcc-1.sym +C 48500 57800 1 0 0 gnd-1.sym +C 49600 57800 1 0 0 gnd-1.sym +N 48600 59200 48600 59100 4 +N 48600 58200 48600 58100 4 +N 49700 58100 49700 58200 4 +N 49700 59100 49700 59200 4 +N 50500 56700 51500 56700 4 +{ +T 51100 56700 5 10 1 1 0 0 1 +netname=TX +} +N 50500 56400 51500 56400 4 +{ +T 51100 56400 5 10 1 1 0 0 1 +netname=RX +} +N 50500 54600 50500 55200 4 +N 50500 55200 51100 55200 4 +N 51100 55200 51100 55000 4 +N 50500 55800 51100 55800 4 +N 51100 55800 51100 55700 4 +C 51000 54700 1 0 0 gnd-1.sym +C 51000 55400 1 0 0 gnd-1.sym +C 58600 50000 1 0 0 header10-2.sym +{ +T 58600 52000 5 10 0 1 0 0 1 +device=HEADER10 +T 59200 52100 5 10 1 1 0 0 1 +refdes=J3 +} +C 58500 58300 1 0 0 header6-2.sym +{ +T 58500 59900 5 10 0 1 0 0 1 +device=HEADER8 +T 59100 59600 5 10 1 1 0 0 1 +refdes=J1 +} +C 58600 54500 1 0 0 header6-2.sym +{ +T 58600 56100 5 10 0 1 0 0 1 +device=HEADER8 +T 59200 55800 5 10 1 1 0 0 1 +refdes=J2 +} +C 58700 45000 1 0 0 header10-2.sym +{ +T 58700 47000 5 10 0 1 0 0 1 +device=HEADER10 +T 59300 47100 5 10 1 1 0 0 1 +refdes=J4 +} +T 59100 47200 9 18 1 0 0 0 2 +jtag + +T 59000 52400 9 18 1 0 0 0 1 +isp10 +T 59000 56200 9 18 1 0 0 0 1 +isp6 +T 59000 60000 9 18 1 0 0 0 1 +pdi +N 68500 52100 67600 52100 4 +{ +T 67600 52200 5 10 1 1 0 0 1 +netname=MOSI +} +N 68500 51300 67600 51300 4 +{ +T 67600 51400 5 10 1 1 0 0 1 +netname=SCK +} +N 68500 51700 67600 51700 4 +{ +T 67600 51800 5 10 1 1 0 0 1 +netname=MISO +} +N 60000 54700 60700 54700 4 +C 60600 54400 1 0 0 gnd-1.sym +N 60900 55100 60000 55100 4 +{ +T 60400 55200 5 10 1 1 0 0 1 +netname=MOSI +} +N 58600 55100 57700 55100 4 +{ +T 57700 55200 5 10 1 1 0 0 1 +netname=SCK +} +N 58600 55500 57700 55500 4 +{ +T 57700 55600 5 10 1 1 0 0 1 +netname=MISO +} +N 58600 51800 57700 51800 4 +{ +T 57700 51900 5 10 1 1 0 0 1 +netname=MOSI +} +N 58600 50600 57700 50600 4 +{ +T 57700 50700 5 10 1 1 0 0 1 +netname=SCK +} +N 58600 50200 57700 50200 4 +{ +T 57700 50300 5 10 1 1 0 0 1 +netname=MISO +} +N 60700 55500 60000 55500 4 +C 60500 55500 1 0 0 vdd-1.sym +N 60000 50200 60700 50200 4 +C 60600 49900 1 0 0 gnd-1.sym +N 60000 50600 60700 50600 4 +N 60700 50600 60700 50200 4 +N 60700 51800 60000 51800 4 +C 60500 51800 1 0 0 vdd-1.sym +N 58600 54700 57700 54700 4 +{ +T 57000 54800 5 10 1 1 0 0 1 +netname=PDI_CLK_RESET +} +N 58600 51000 57700 51000 4 +{ +T 57000 51100 5 10 1 1 0 0 1 +netname=PDI_CLK_RESET +} +N 59900 58500 60600 58500 4 +C 60500 58200 1 0 0 gnd-1.sym +N 60600 59300 59900 59300 4 +C 60400 59300 1 0 0 vdd-1.sym +N 58500 59300 57600 59300 4 +{ +T 57600 59400 5 10 1 1 0 0 1 +netname=PDI_DATA +} +N 58500 58500 57600 58500 4 +{ +T 56900 58600 5 10 1 1 0 0 1 +netname=PDI_CLK_RESET +} +N 58700 46000 57800 46000 4 +{ +T 57800 46100 5 10 1 1 0 0 1 +netname=TMS +} +N 58700 45200 57800 45200 4 +{ +T 57800 45300 5 10 1 1 0 0 1 +netname=TDI +} +N 58700 46800 57800 46800 4 +{ +T 57800 46900 5 10 1 1 0 0 1 +netname=TCK +} +N 58700 46400 57800 46400 4 +{ +T 57800 46500 5 10 1 1 0 0 1 +netname=TDO +} +N 57300 45600 58700 45600 4 +C 57100 45600 1 0 0 vdd-1.sym +N 60100 45200 61900 45200 4 +C 61800 44900 1 0 0 gnd-1.sym +N 60100 46800 61900 46800 4 +N 61900 46800 61900 45200 4 +N 61000 46000 60100 46000 4 +{ +T 60100 46100 5 10 1 1 0 0 1 +netname=PDI_CLK_RESET +} +C 61000 46400 1 0 0 vdd-1.sym +N 60100 46400 61200 46400 4 +C 45800 48700 1 0 0 resistor-2.sym +{ +T 46200 49050 5 10 0 0 0 0 1 +device=RESISTOR +T 46000 49000 5 10 1 1 0 0 1 +refdes=R2 +T 46100 48700 5 10 1 1 0 0 1 +value=270 +} +C 45800 48400 1 0 0 resistor-2.sym +{ +T 46200 48750 5 10 0 0 0 0 1 +device=RESISTOR +T 46000 48200 5 10 1 1 0 0 1 +refdes=R4 +T 46100 48400 5 10 1 1 0 0 1 +value=270 +} +C 47000 48700 1 0 0 led-2.sym +{ +T 47300 49100 5 10 1 1 0 0 1 +refdes=D1 +T 47100 49300 5 10 0 0 0 0 1 +device=LED +} +C 47000 48400 1 0 0 led-2.sym +{ +T 47300 48200 5 10 1 1 0 0 1 +refdes=D3 +T 47100 49000 5 10 0 0 0 0 1 +device=LED +} +N 46700 48800 47000 48800 4 +N 47900 48800 48800 48800 4 +N 47900 48500 48800 48500 4 +N 47000 48500 46700 48500 4 +C 45000 48800 1 0 0 vdd-1.sym +C 44500 48500 1 0 0 vcc-1.sym +N 44700 48500 45800 48500 4 +N 45200 48800 45800 48800 4 +N 48800 48800 48800 48300 4 +C 48700 48000 1 0 0 gnd-1.sym +T 46200 49500 9 18 1 0 0 0 1 +power leds +T 48500 51500 9 18 1 0 0 0 1 +usb to serial diff --git a/debugboard/gafrc b/debugboard/gafrc new file mode 100644 index 0000000..f3dd10c --- /dev/null +++ b/debugboard/gafrc @@ -0,0 +1 @@ +(component-library "../gschem-sym") diff --git a/gschem-sym/ft232rl.sym b/gschem-sym/ft232rl.sym new file mode 100644 index 0000000..0ecfb85 --- /dev/null +++ b/gschem-sym/ft232rl.sym @@ -0,0 +1,328 @@ +v 20070216 1 +P 2800 2000 2500 2000 1 0 0 +{ +T 2600 2050 5 8 1 1 0 0 1 +pinnumber=23 +T 2600 1950 5 8 0 1 0 2 1 +pinseq=23 +T 2450 2000 9 8 1 1 0 6 1 +pinlabel=CBUS0 +T 2450 2000 5 8 0 1 0 8 1 +pintype=io +} +P 2800 1700 2500 1700 1 0 0 +{ +T 2600 1750 5 8 1 1 0 0 1 +pinnumber=22 +T 2600 1650 5 8 0 1 0 2 1 +pinseq=22 +T 2450 1700 9 8 1 1 0 6 1 +pinlabel=CBUS1 +T 2450 1700 5 8 0 1 0 8 1 +pintype=io +} +P 2800 1400 2500 1400 1 0 0 +{ +T 2600 1450 5 8 1 1 0 0 1 +pinnumber=13 +T 2600 1350 5 8 0 1 0 2 1 +pinseq=13 +T 2450 1400 9 8 1 1 0 6 1 +pinlabel=CBUS2 +T 2450 1400 5 8 0 1 0 8 1 +pintype=io +} +P 2800 1100 2500 1100 1 0 0 +{ +T 2600 1150 5 8 1 1 0 0 1 +pinnumber=14 +T 2600 1050 5 8 0 1 0 2 1 +pinseq=14 +T 2450 1100 9 8 1 1 0 6 1 +pinlabel=CBUS3 +T 2450 1100 5 8 0 1 0 8 1 +pintype=io +} +P 2800 800 2500 800 1 0 0 +{ +T 2600 850 5 8 1 1 0 0 1 +pinnumber=12 +T 2600 750 5 8 0 1 0 2 1 +pinseq=12 +T 2450 800 9 8 1 1 0 6 1 +pinlabel=CBUS4 +T 2450 800 5 8 0 1 0 8 1 +pintype=io +} +P 2800 3500 2500 3500 1 0 0 +{ +T 2600 3550 5 8 1 1 0 0 1 +pinnumber=11 +T 2600 3450 5 8 0 1 0 2 1 +pinseq=11 +T 2450 3500 9 8 1 1 0 6 1 +pinlabel=\_CTS#\_ +T 2450 3500 5 8 0 1 0 8 1 +pintype=io +} +P 2800 2600 2500 2600 1 0 0 +{ +T 2600 2650 5 8 1 1 0 0 1 +pinnumber=10 +T 2600 2550 5 8 0 1 0 2 1 +pinseq=10 +T 2450 2600 9 8 1 1 0 6 1 +pinlabel=\_DCD#\_ +T 2450 2600 5 8 0 1 0 8 1 +pintype=io +} +P 2800 2900 2500 2900 1 0 0 +{ +T 2600 2950 5 8 1 1 0 0 1 +pinnumber=9 +T 2600 2850 5 8 0 1 0 2 1 +pinseq=9 +T 2450 2900 9 8 1 1 0 6 1 +pinlabel=\_DSR#\_ +T 2450 2900 5 8 0 1 0 8 1 +pintype=io +} +P 2800 3200 2500 3200 1 0 0 +{ +T 2600 3250 5 8 1 1 0 0 1 +pinnumber=2 +T 2600 3150 5 8 0 1 0 2 1 +pinseq=2 +T 2450 3200 9 8 1 1 0 6 1 +pinlabel=\_DTR#\_ +T 2450 3200 5 8 0 1 0 8 1 +pintype=io +} +P 2800 2300 2500 2300 1 0 0 +{ +T 2600 2350 5 8 1 1 0 0 1 +pinnumber=6 +T 2600 2250 5 8 0 1 0 2 1 +pinseq=6 +T 2450 2300 9 8 1 1 0 6 1 +pinlabel=\_RI#\_ +T 2450 2300 5 8 0 1 0 8 1 +pintype=io +} +P 2800 3800 2500 3800 1 0 0 +{ +T 2600 3850 5 8 1 1 0 0 1 +pinnumber=3 +T 2600 3750 5 8 0 1 0 2 1 +pinseq=3 +T 2450 3800 9 8 1 1 0 6 1 +pinlabel=\_RTS#\_ +T 2450 3800 5 8 0 1 0 8 1 +pintype=io +} +P 2800 4100 2500 4100 1 0 0 +{ +T 2600 4150 5 8 1 1 0 0 1 +pinnumber=5 +T 2600 4050 5 8 0 1 0 2 1 +pinseq=5 +T 2450 4100 9 8 1 1 0 6 1 +pinlabel=RXD +T 2450 4100 5 8 0 1 0 8 1 +pintype=io +} +P 2800 4400 2500 4400 1 0 0 +{ +T 2600 4450 5 8 1 1 0 0 1 +pinnumber=1 +T 2600 4350 5 8 0 1 0 2 1 +pinseq=1 +T 2450 4400 9 8 1 1 0 6 1 +pinlabel=TXD +T 2450 4400 5 8 0 1 0 8 1 +pintype=io +} +P 0 1100 300 1100 1 0 0 +{ +T 200 1150 5 8 1 1 0 6 1 +pinnumber=17 +T 200 1050 5 8 0 1 0 8 1 +pinseq=17 +T 350 1100 9 8 1 1 0 0 1 +pinlabel=3V3OUT +T 350 1100 5 8 0 1 0 2 1 +pintype=pwr +} +P 0 2900 300 2900 1 0 0 +{ +T 200 2950 5 8 1 1 0 6 1 +pinnumber=8 +T 200 2850 5 8 0 1 0 8 1 +pinseq=8 +T 350 2900 9 8 1 1 0 0 1 +pinlabel=NC +T 350 2900 5 8 0 1 0 2 1 +pintype=io +} +P 0 2300 300 2300 1 0 0 +{ +T 200 2350 5 8 1 1 0 6 1 +pinnumber=24 +T 200 2250 5 8 0 1 0 8 1 +pinseq=24 +T 350 2300 9 8 1 1 0 0 1 +pinlabel=NC +T 350 2300 5 8 0 1 0 2 1 +pintype=io +} +P 0 2000 300 2000 1 0 0 +{ +T 200 2050 5 8 1 1 0 6 1 +pinnumber=27 +T 200 1950 5 8 0 1 0 8 1 +pinseq=27 +T 350 2000 9 8 1 1 0 0 1 +pinlabel=OSCI +T 350 2000 5 8 0 1 0 2 1 +pintype=io +} +P 0 1700 300 1700 1 0 0 +{ +T 200 1750 5 8 1 1 0 6 1 +pinnumber=28 +T 200 1650 5 8 0 1 0 8 1 +pinseq=28 +T 350 1700 9 8 1 1 0 0 1 +pinlabel=OSCO +T 350 1700 5 8 0 1 0 2 1 +pintype=io +} +P 0 2600 300 2600 1 0 0 +{ +T 200 2650 5 8 1 1 0 6 1 +pinnumber=19 +T 200 2550 5 8 0 1 0 8 1 +pinseq=19 +T 350 2600 9 8 1 1 0 0 1 +pinlabel=\_RESET#\_ +T 350 2600 5 8 0 1 0 2 1 +pintype=io +} +P 0 3800 300 3800 1 0 0 +{ +T 200 3850 5 8 1 1 0 6 1 +pinnumber=16 +T 200 3750 5 8 0 1 0 8 1 +pinseq=16 +T 350 3800 9 8 1 1 0 0 1 +pinlabel=USBDM +T 350 3800 5 8 0 1 0 2 1 +pintype=io +} +P 0 3500 300 3500 1 0 0 +{ +T 200 3550 5 8 1 1 0 6 1 +pinnumber=15 +T 200 3450 5 8 0 1 0 8 1 +pinseq=15 +T 350 3500 9 8 1 1 0 0 1 +pinlabel=USBDP +T 350 3500 5 8 0 1 0 2 1 +pintype=io +} +P 0 4100 300 4100 1 0 0 +{ +T 200 4150 5 8 1 1 0 6 1 +pinnumber=20 +T 200 4050 5 8 0 1 0 8 1 +pinseq=20 +T 350 4100 9 8 1 1 0 0 1 +pinlabel=VCC +T 350 4100 5 8 0 1 0 2 1 +pintype=pwr +} +P 0 4400 300 4400 1 0 0 +{ +T 200 4450 5 8 1 1 0 6 1 +pinnumber=4 +T 200 4350 5 8 0 1 0 8 1 +pinseq=4 +T 350 4400 9 8 1 1 0 0 1 +pinlabel=VCCIO +T 350 4400 5 8 0 1 0 2 1 +pintype=pwr +} +P 600 0 600 300 1 0 0 +{ +T 650 100 5 8 1 1 0 0 1 +pinnumber=25 +T 650 100 5 8 0 1 0 2 1 +pinseq=25 +T 600 350 9 8 1 1 0 3 1 +pinlabel=AGND +T 600 500 5 8 0 1 0 3 1 +pintype=pwr +} +P 1000 0 1000 300 1 0 0 +{ +T 1050 100 5 8 1 1 0 0 1 +pinnumber=7 +T 1050 100 5 8 0 1 0 2 1 +pinseq=7 +T 1000 350 9 8 1 1 0 3 1 +pinlabel=GND +T 1000 500 5 8 0 1 0 3 1 +pintype=pwr +} +P 1400 0 1400 300 1 0 0 +{ +T 1450 100 5 8 1 1 0 0 1 +pinnumber=18 +T 1450 100 5 8 0 1 0 2 1 +pinseq=18 +T 1400 350 9 8 1 1 0 3 1 +pinlabel=GND +T 1400 500 5 8 0 1 0 3 1 +pintype=pwr +} +P 1800 0 1800 300 1 0 0 +{ +T 1850 100 5 8 1 1 0 0 1 +pinnumber=21 +T 1850 100 5 8 0 1 0 2 1 +pinseq=21 +T 1800 350 9 8 1 1 0 3 1 +pinlabel=GND +T 1800 500 5 8 0 1 0 3 1 +pintype=pwr +} +P 2200 0 2200 300 1 0 0 +{ +T 2250 100 5 8 1 1 0 0 1 +pinnumber=26 +T 2250 100 5 8 0 1 0 2 1 +pinseq=26 +T 2200 350 9 8 1 1 0 3 1 +pinlabel=TEST +T 2200 500 5 8 0 1 0 3 1 +pintype=io +} +B 300 300 2200 4400 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 2500 4800 8 10 1 1 0 6 1 +refdes=U? +T 300 4800 9 10 1 0 0 0 1 +FT232RL +T 300 5100 5 10 0 0 0 0 1 +device=FT232RL +T 300 5300 5 10 0 0 0 0 1 +footprint=SSOP28 +T 300 5500 5 10 0 0 0 0 1 +author=andrewmATthehacktoryDOTcom +T 300 5700 5 10 0 0 0 0 1 +documentation=http://www.ftdichip.com/Documents/DataSheets/DS_FT232R.pdf +T 300 5900 5 10 0 0 0 0 1 +description=FTDA FT232RL USB to UART bridge +T 300 6100 5 10 0 0 0 0 1 +dist-license=GPL +T 300 6300 5 10 0 0 0 0 1 +use-license=unlimited diff --git a/gschem-sym/header6-2.sym b/gschem-sym/header6-2.sym new file mode 100644 index 0000000..496f886 --- /dev/null +++ b/gschem-sym/header6-2.sym @@ -0,0 +1,79 @@ +v 20110115 2 +P 0 1000 300 1000 1 0 0 +{ +T 100 1050 5 8 1 1 0 0 1 +pinnumber=1 +T 100 1050 9 8 0 1 0 0 1 +pinlabel=1 +T 100 1050 5 8 0 0 0 0 1 +pinseq=1 +T 100 1050 5 8 0 0 0 0 1 +pintype=pas +} +P 1100 1000 1400 1000 1 0 1 +{ +T 1200 1050 5 8 1 1 0 0 1 +pinnumber=2 +T 1200 1050 9 8 0 1 0 0 1 +pinlabel=2 +T 1200 1050 5 8 0 0 0 0 1 +pinseq=2 +T 1200 1050 5 8 0 0 0 0 1 +pintype=pas +} +P 0 600 300 600 1 0 0 +{ +T 100 650 5 8 1 1 0 0 1 +pinnumber=3 +T 100 650 9 8 0 1 0 0 1 +pinlabel=3 +T 100 650 5 8 0 0 0 0 1 +pinseq=3 +T 100 650 5 8 0 0 0 0 1 +pintype=pas +} +P 1100 600 1400 600 1 0 1 +{ +T 1200 650 5 8 1 1 0 0 1 +pinnumber=4 +T 1200 650 9 8 0 1 0 0 1 +pinlabel=4 +T 1200 650 5 8 0 0 0 0 1 +pinseq=4 +T 1200 650 5 8 0 0 0 0 1 +pintype=pas +} +P 0 200 300 200 1 0 0 +{ +T 100 250 5 8 1 1 0 0 1 +pinnumber=5 +T 100 250 9 8 0 1 0 0 1 +pinlabel=5 +T 100 250 5 8 0 0 0 0 1 +pinseq=5 +T 100 250 5 8 0 0 0 0 1 +pintype=pas +} +P 1100 200 1400 200 1 0 1 +{ +T 1250 250 5 8 1 1 0 0 1 +pinnumber=6 +T 1250 250 9 8 0 1 0 0 1 +pinlabel=6 +T 1250 250 5 8 0 0 0 0 1 +pinseq=6 +T 1250 250 5 8 0 0 0 0 1 +pintype=pas +} +L 300 400 1100 400 3 0 0 0 -1 -1 +L 300 800 1100 800 3 0 0 0 -1 -1 +L 700 1200 700 0 3 0 0 0 -1 -1 +B 300 0 800 1200 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 0 1600 5 10 0 1 0 0 1 +device=HEADER8 +T 0 1600 5 10 0 1 0 0 1 +numslots=0 +T 0 1600 5 10 0 1 0 0 1 +description=Header 8 pins +T 600 1300 8 10 1 1 0 0 1 +refdes=J? diff --git a/gschem-sym/usb.sym b/gschem-sym/usb.sym new file mode 100644 index 0000000..53e6b88 --- /dev/null +++ b/gschem-sym/usb.sym @@ -0,0 +1,42 @@ +v 20070708 1 +T 700 1400 8 10 1 1 0 0 1 +refdes=CONN? +T 100 1400 9 10 1 1 0 0 1 +device=USB +T 400 12650 8 10 0 0 0 0 1 +footprint=conn_usb2 +B 100 0 800 1300 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +P 1300 200 900 200 1 0 0 +{ +T 1100 290 5 10 1 1 0 0 1 +pinnumber=4 +T 400 180 5 10 1 1 0 0 1 +pinlabel=GND +} +P 1300 500 900 500 1 0 0 +{ +T 1100 530 5 10 1 1 0 0 1 +pinnumber=3 +T 600 520 5 10 1 1 0 0 1 +pinlabel=D+ +} +P 1300 800 900 800 1 0 0 +{ +T 1100 870 5 10 1 1 0 0 1 +pinnumber=2 +T 600 860 5 10 1 1 0 0 1 +pinlabel=D- +} +P 1300 1100 900 1100 1 0 0 +{ +T 1100 1110 5 10 1 1 0 0 1 +pinnumber=1 +T 400 1100 5 10 1 1 0 0 1 +pinlabel=VCC +} +T 400 12450 8 10 0 0 0 0 1 +T 400 13650 8 10 0 0 0 0 1 +T 400 13850 8 10 0 0 0 0 1 +numslots=0 +T 400 14050 8 10 0 0 0 0 1 +author=Sean D'Epagnier