1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2017 Intel Corporation
7 #include <rte_crypto.h>
8 #include <rte_cryptodev.h>
9 #include <rte_cycles.h>
10 #include <rte_malloc.h>
12 #include "cperf_ops.h"
13 #include "cperf_test_pmd_cyclecount.h"
14 #include "cperf_test_common.h"
16 #define PRETTY_HDR_FMT "%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n"
17 #define PRETTY_LINE_FMT "%12u%12u%12u%12u%12u%12u%12u%12.0f%12.0f%12.0f\n"
18 #define CSV_HDR_FMT "%s,%s,%s,%s,%s,%s,%s,%s,%s,%s\n"
19 #define CSV_LINE_FMT "%10u;%10u;%u;%u;%u;%u;%u;%.f3;%.f3;%.f3\n"
21 struct cperf_pmd_cyclecount_ctx {
26 struct rte_mempool *pool;
27 struct rte_crypto_op **ops;
28 struct rte_crypto_op **ops_processed;
30 struct rte_cryptodev_sym_session *sess;
32 cperf_populate_ops_t populate_ops;
34 uint32_t src_buf_offset;
35 uint32_t dst_buf_offset;
37 const struct cperf_options *options;
38 const struct cperf_test_vector *test_vector;
41 struct pmd_cyclecount_state {
42 struct cperf_pmd_cyclecount_ctx *ctx;
43 const struct cperf_options *opts;
49 uint32_t ops_enq_retries;
50 uint32_t ops_deq_retries;
51 double cycles_per_build;
52 double cycles_per_enq;
53 double cycles_per_deq;
56 static const uint16_t iv_offset =
57 sizeof(struct rte_crypto_op) + sizeof(struct rte_crypto_sym_op);
60 cperf_pmd_cyclecount_test_free(struct cperf_pmd_cyclecount_ctx *ctx)
64 rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
65 rte_cryptodev_sym_session_free(ctx->sess);
69 rte_mempool_free(ctx->pool);
74 if (ctx->ops_processed)
75 rte_free(ctx->ops_processed);
82 cperf_pmd_cyclecount_test_constructor(struct rte_mempool *sess_mp,
83 uint8_t dev_id, uint16_t qp_id,
84 const struct cperf_options *options,
85 const struct cperf_test_vector *test_vector,
86 const struct cperf_op_fns *op_fns)
88 struct cperf_pmd_cyclecount_ctx *ctx = NULL;
90 /* preallocate buffers for crypto ops as they can get quite big */
91 size_t alloc_sz = sizeof(struct rte_crypto_op *) *
92 options->nb_descriptors;
94 ctx = rte_malloc(NULL, sizeof(struct cperf_pmd_cyclecount_ctx), 0);
101 ctx->populate_ops = op_fns->populate_ops;
102 ctx->options = options;
103 ctx->test_vector = test_vector;
105 /* IV goes at the end of the crypto operation */
106 uint16_t iv_offset = sizeof(struct rte_crypto_op) +
107 sizeof(struct rte_crypto_sym_op);
109 ctx->sess = op_fns->sess_create(
110 sess_mp, dev_id, options, test_vector, iv_offset);
111 if (ctx->sess == NULL)
114 if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
115 &ctx->src_buf_offset, &ctx->dst_buf_offset,
119 ctx->ops = rte_malloc("ops", alloc_sz, 0);
123 ctx->ops_processed = rte_malloc("ops_processed", alloc_sz, 0);
124 if (!ctx->ops_processed)
130 cperf_pmd_cyclecount_test_free(ctx);
135 /* benchmark alloc-build-free of ops */
137 pmd_cyclecount_bench_ops(struct pmd_cyclecount_state *state, uint32_t cur_op,
138 uint16_t test_burst_size)
140 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
141 uint32_t iter_ops_needed =
142 RTE_MIN(state->opts->nb_descriptors, iter_ops_left);
143 uint32_t cur_iter_op;
145 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
146 cur_iter_op += test_burst_size) {
147 uint32_t burst_size = RTE_MIN(state->opts->total_ops - cur_op,
149 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
151 /* Allocate objects containing crypto operations and mbufs */
152 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
155 "Failed to allocate more crypto operations "
156 "from the crypto operation pool.\n"
157 "Consider increasing the pool size "
162 /* Setup crypto op, attach mbuf etc */
163 (state->ctx->populate_ops)(ops,
164 state->ctx->src_buf_offset,
165 state->ctx->dst_buf_offset,
167 state->ctx->sess, state->opts,
168 state->ctx->test_vector, iv_offset);
170 #ifdef CPERF_LINEARIZATION_ENABLE
171 /* Check if source mbufs require coalescing */
172 if (state->linearize) {
174 for (i = 0; i < burst_size; i++) {
175 struct rte_mbuf *src = ops[i]->sym->m_src;
176 rte_pktmbuf_linearize(src);
179 #endif /* CPERF_LINEARIZATION_ENABLE */
180 rte_mempool_put_bulk(state->ctx->pool, (void **)ops,
187 /* allocate and build ops (no free) */
189 pmd_cyclecount_build_ops(struct pmd_cyclecount_state *state,
190 uint32_t iter_ops_needed, uint16_t test_burst_size)
192 uint32_t cur_iter_op;
194 for (cur_iter_op = 0; cur_iter_op < iter_ops_needed;
195 cur_iter_op += test_burst_size) {
196 uint32_t burst_size = RTE_MIN(
197 iter_ops_needed - cur_iter_op, test_burst_size);
198 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
200 /* Allocate objects containing crypto operations and mbufs */
201 if (rte_mempool_get_bulk(state->ctx->pool, (void **)ops,
204 "Failed to allocate more crypto operations "
205 "from the crypto operation pool.\n"
206 "Consider increasing the pool size "
211 /* Setup crypto op, attach mbuf etc */
212 (state->ctx->populate_ops)(ops,
213 state->ctx->src_buf_offset,
214 state->ctx->dst_buf_offset,
216 state->ctx->sess, state->opts,
217 state->ctx->test_vector, iv_offset);
222 /* benchmark enqueue, returns number of ops enqueued */
224 pmd_cyclecount_bench_enq(struct pmd_cyclecount_state *state,
225 uint32_t iter_ops_needed, uint16_t test_burst_size)
227 /* Enqueue full descriptor ring of ops on crypto device */
228 uint32_t cur_iter_op = 0;
229 while (cur_iter_op < iter_ops_needed) {
230 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
232 struct rte_crypto_op **ops = &state->ctx->ops[cur_iter_op];
235 burst_enqd = rte_cryptodev_enqueue_burst(state->ctx->dev_id,
236 state->ctx->qp_id, ops, burst_size);
238 /* if we couldn't enqueue anything, the queue is full */
240 /* don't try to dequeue anything we didn't enqueue */
244 if (burst_enqd < burst_size)
245 state->ops_enq_retries++;
246 state->ops_enqd += burst_enqd;
247 cur_iter_op += burst_enqd;
249 return iter_ops_needed;
252 /* benchmark dequeue */
254 pmd_cyclecount_bench_deq(struct pmd_cyclecount_state *state,
255 uint32_t iter_ops_needed, uint16_t test_burst_size)
257 /* Dequeue full descriptor ring of ops on crypto device */
258 uint32_t cur_iter_op = 0;
259 while (cur_iter_op < iter_ops_needed) {
260 uint32_t burst_size = RTE_MIN(iter_ops_needed - cur_iter_op,
262 struct rte_crypto_op **ops_processed =
263 &state->ctx->ops[cur_iter_op];
266 burst_deqd = rte_cryptodev_dequeue_burst(state->ctx->dev_id,
267 state->ctx->qp_id, ops_processed, burst_size);
269 if (burst_deqd < burst_size)
270 state->ops_deq_retries++;
271 state->ops_deqd += burst_deqd;
272 cur_iter_op += burst_deqd;
276 /* run benchmark per burst size */
278 pmd_cyclecount_bench_burst_sz(
279 struct pmd_cyclecount_state *state, uint16_t test_burst_size)
288 /* reset all counters */
292 state->ops_enq_retries = 0;
294 state->ops_deq_retries = 0;
297 * Benchmark crypto op alloc-build-free separately.
299 tsc_start = rte_rdtsc_precise();
301 for (cur_op = 0; cur_op < state->opts->total_ops;
302 cur_op += state->opts->nb_descriptors) {
303 if (unlikely(pmd_cyclecount_bench_ops(
304 state, cur_op, test_burst_size)))
308 tsc_end = rte_rdtsc_precise();
309 tsc_op = tsc_end - tsc_start;
313 * Hardware acceleration cyclecount benchmarking loop.
315 * We're benchmarking raw enq/deq performance by filling up the device
316 * queue, so we never get any failed enqs unless the driver won't accept
317 * the exact number of descriptors we requested, or the driver won't
318 * wrap around the end of the TX ring. However, since we're only
319 * dequeueing once we've filled up the queue, we have to benchmark it
320 * piecemeal and then average out the results.
323 while (cur_op < state->opts->total_ops) {
324 uint32_t iter_ops_left = state->opts->total_ops - cur_op;
325 uint32_t iter_ops_needed = RTE_MIN(
326 state->opts->nb_descriptors, iter_ops_left);
327 uint32_t iter_ops_allocd = iter_ops_needed;
329 /* allocate and build ops */
330 if (unlikely(pmd_cyclecount_build_ops(state, iter_ops_needed,
334 tsc_start = rte_rdtsc_precise();
336 /* fill up TX ring */
337 iter_ops_needed = pmd_cyclecount_bench_enq(state,
338 iter_ops_needed, test_burst_size);
340 tsc_end = rte_rdtsc_precise();
342 tsc_enq += tsc_end - tsc_start;
344 /* allow for HW to catch up */
346 rte_delay_us_block(state->delay);
348 tsc_start = rte_rdtsc_precise();
351 pmd_cyclecount_bench_deq(state, iter_ops_needed,
354 tsc_end = rte_rdtsc_precise();
356 tsc_deq += tsc_end - tsc_start;
358 cur_op += iter_ops_needed;
361 * we may not have processed all ops that we allocated, so
362 * free everything we've allocated.
364 rte_mempool_put_bulk(state->ctx->pool,
365 (void **)state->ctx->ops, iter_ops_allocd);
368 state->cycles_per_build = (double)tsc_op / state->opts->total_ops;
369 state->cycles_per_enq = (double)tsc_enq / state->ops_enqd;
370 state->cycles_per_deq = (double)tsc_deq / state->ops_deqd;
376 cperf_pmd_cyclecount_test_runner(void *test_ctx)
378 struct pmd_cyclecount_state state = {0};
379 const struct cperf_options *opts;
380 uint16_t test_burst_size;
381 uint8_t burst_size_idx = 0;
383 state.ctx = test_ctx;
384 opts = state.ctx->options;
386 state.lcore = rte_lcore_id();
389 static int only_once;
390 static bool warmup = true;
393 * We need a small delay to allow for hardware to process all the crypto
394 * operations. We can't automatically figure out what the delay should
395 * be, so we leave it up to the user (by default it's 0).
397 state.delay = 1000 * opts->pmdcc_delay;
399 #ifdef CPERF_LINEARIZATION_ENABLE
400 struct rte_cryptodev_info dev_info;
402 /* Check if source mbufs require coalescing */
403 if (opts->segments_sz < ctx->options->max_buffer_size) {
404 rte_cryptodev_info_get(state.ctx->dev_id, &dev_info);
405 if ((dev_info.feature_flags &
406 RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) ==
411 #endif /* CPERF_LINEARIZATION_ENABLE */
413 state.ctx->lcore_id = state.lcore;
415 /* Get first size from range or list */
416 if (opts->inc_burst_size != 0)
417 test_burst_size = opts->min_burst_size;
419 test_burst_size = opts->burst_size_list[0];
421 while (test_burst_size <= opts->max_burst_size) {
422 /* do a benchmark run */
423 if (pmd_cyclecount_bench_burst_sz(&state, test_burst_size))
427 * First run is always a warm up run.
436 printf(PRETTY_HDR_FMT, "lcore id", "Buf Size",
437 "Burst Size", "Enqueued",
438 "Dequeued", "Enq Retries",
439 "Deq Retries", "Cycles/Op",
440 "Cycles/Enq", "Cycles/Deq");
443 printf(PRETTY_LINE_FMT, state.ctx->lcore_id,
444 opts->test_buffer_size, test_burst_size,
445 state.ops_enqd, state.ops_deqd,
446 state.ops_enq_retries,
447 state.ops_deq_retries,
448 state.cycles_per_build,
449 state.cycles_per_enq,
450 state.cycles_per_deq);
453 printf(CSV_HDR_FMT, "# lcore id", "Buf Size",
454 "Burst Size", "Enqueued",
455 "Dequeued", "Enq Retries",
456 "Deq Retries", "Cycles/Op",
457 "Cycles/Enq", "Cycles/Deq");
460 printf(CSV_LINE_FMT, state.ctx->lcore_id,
461 opts->test_buffer_size, test_burst_size,
462 state.ops_enqd, state.ops_deqd,
463 state.ops_enq_retries,
464 state.ops_deq_retries,
465 state.cycles_per_build,
466 state.cycles_per_enq,
467 state.cycles_per_deq);
470 /* Get next size from range or list */
471 if (opts->inc_burst_size != 0)
472 test_burst_size += opts->inc_burst_size;
474 if (++burst_size_idx == opts->burst_size_count)
476 test_burst_size = opts->burst_size_list[burst_size_idx];
484 cperf_pmd_cyclecount_test_destructor(void *arg)
486 struct cperf_pmd_cyclecount_ctx *ctx = arg;
491 cperf_pmd_cyclecount_test_free(ctx);