1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright(c) 2015-2016 Intel Corporation.
4 Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver
5 ==================================================
7 QAT documentation consists of three parts:
9 * Details of the symmetric crypto service below.
10 * Details of the `compression service <http://doc.dpdk.org/guides/compressdevs/qat_comp.html>`_
11 in the compressdev drivers section.
12 * Details of building the common QAT infrastructure and the PMDs to support the
13 above services. See :ref:`building_qat` below.
16 Symmetric Crypto Service on QAT
17 -------------------------------
19 The QAT crypto PMD provides poll mode crypto driver support for the following
20 hardware accelerator devices:
22 * ``Intel QuickAssist Technology DH895xCC``
23 * ``Intel QuickAssist Technology C62x``
24 * ``Intel QuickAssist Technology C3xxx``
25 * ``Intel QuickAssist Technology D15xx``
26 * ``Intel QuickAssist Technology C4xxx``
32 The QAT PMD has support for:
36 * ``RTE_CRYPTO_CIPHER_3DES_CBC``
37 * ``RTE_CRYPTO_CIPHER_3DES_CTR``
38 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
39 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
40 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
41 * ``RTE_CRYPTO_CIPHER_AES128_CTR``
42 * ``RTE_CRYPTO_CIPHER_AES192_CTR``
43 * ``RTE_CRYPTO_CIPHER_AES256_CTR``
44 * ``RTE_CRYPTO_CIPHER_SNOW3G_UEA2``
45 * ``RTE_CRYPTO_CIPHER_NULL``
46 * ``RTE_CRYPTO_CIPHER_KASUMI_F8``
47 * ``RTE_CRYPTO_CIPHER_DES_CBC``
48 * ``RTE_CRYPTO_CIPHER_AES_DOCSISBPI``
49 * ``RTE_CRYPTO_CIPHER_DES_DOCSISBPI``
50 * ``RTE_CRYPTO_CIPHER_ZUC_EEA3``
54 * ``RTE_CRYPTO_AUTH_SHA1_HMAC``
55 * ``RTE_CRYPTO_AUTH_SHA224_HMAC``
56 * ``RTE_CRYPTO_AUTH_SHA256_HMAC``
57 * ``RTE_CRYPTO_AUTH_SHA384_HMAC``
58 * ``RTE_CRYPTO_AUTH_SHA512_HMAC``
59 * ``RTE_CRYPTO_AUTH_AES_XCBC_MAC``
60 * ``RTE_CRYPTO_AUTH_SNOW3G_UIA2``
61 * ``RTE_CRYPTO_AUTH_MD5_HMAC``
62 * ``RTE_CRYPTO_AUTH_NULL``
63 * ``RTE_CRYPTO_AUTH_KASUMI_F9``
64 * ``RTE_CRYPTO_AUTH_AES_GMAC``
65 * ``RTE_CRYPTO_AUTH_ZUC_EIA3``
66 * ``RTE_CRYPTO_AUTH_AES_CMAC``
68 Supported AEAD algorithms:
70 * ``RTE_CRYPTO_AEAD_AES_GCM``
71 * ``RTE_CRYPTO_AEAD_AES_CCM``
77 * Only supports the session-oriented API implementation (session-less APIs are not supported).
78 * SNOW 3G (UEA2), KASUMI (F8) and ZUC (EEA3) supported only if cipher length and offset fields are byte-multiple.
79 * SNOW 3G (UIA2) and ZUC (EIA3) supported only if hash length and offset fields are byte-multiple.
80 * No BSD support as BSD QAT kernel driver not available.
81 * ZUC EEA3/EIA3 is not supported by dh895xcc devices
82 * Maximum additional authenticated data (AAD) for GCM is 240 bytes long and must be passed to the device in a buffer rounded up to the nearest block-size multiple (x16) and padded with zeros.
83 * Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
85 Extra notes on KASUMI F9
86 ~~~~~~~~~~~~~~~~~~~~~~~~
88 When using KASUMI F9 authentication algorithm, the input buffer must be
89 constructed according to the
90 `3GPP KASUMI specification <http://cryptome.org/3gpp/35201-900.pdf>`_
91 (section 4.4, page 13). The input buffer has to have COUNT (4 bytes),
92 FRESH (4 bytes), MESSAGE and DIRECTION (1 bit) concatenated. After the DIRECTION
93 bit, a single '1' bit is appended, followed by between 0 and 7 '0' bits, so that
94 the total length of the buffer is multiple of 8 bits. Note that the actual
95 message can be any length, specified in bits.
97 Once this buffer is passed this way, when creating the crypto operation,
98 length of data to authenticate "op.sym.auth.data.length" must be the length
99 of all the items described above, including the padding at the end.
100 Also, offset of data to authenticate "op.sym.auth.data.offset"
101 must be such that points at the start of the COUNT bytes.
110 A QAT device can host multiple acceleration services:
112 * symmetric cryptography
115 These services are provided to DPDK applications via PMDs which register to
116 implement the corresponding cryptodev and compressdev APIs. The PMDs use
117 common QAT driver code which manages the QAT PCI device. They also depend on a
118 QAT kernel driver being installed on the platform, see :ref:`qat_kernel` below.
121 Configuring and Building the DPDK QAT PMDs
122 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
125 Further information on configuring, building and installing DPDK is described
126 `here <http://doc.dpdk.org/guides/linux_gsg/build_dpdk.html>`_.
129 Quick instructions for QAT cryptodev PMD are as follows:
131 .. code-block:: console
133 cd to the top-level DPDK directory
135 sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
138 Quick instructions for QAT compressdev PMD are as follows:
140 .. code-block:: console
142 cd to the top-level DPDK directory
150 These are the build configuration options affecting QAT, and their default values:
152 .. code-block:: console
154 CONFIG_RTE_LIBRTE_PMD_QAT=y
155 CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n
156 CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48
157 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16
158 CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536
160 CONFIG_RTE_LIBRTE_PMD_QAT must be enabled for any QAT PMD to be built.
162 The QAT cryptodev PMD has an external dependency on libcrypto, so is not
163 built by default. CONFIG_RTE_LIBRTE_PMD_QAT_SYM should be enabled to build it.
165 The QAT compressdev PMD has no external dependencies, so needs no configuration
166 options and is built by default.
168 The number of VFs per PF varies - see table below. If multiple QAT packages are
169 installed on a platform then CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES should be
170 adjusted to the number of VFs which the QAT common code will need to handle.
171 Note, there are separate config items for max cryptodevs CONFIG_RTE_CRYPTO_MAX_DEVS
172 and max compressdevs CONFIG_RTE_COMPRESS_MAX_DEVS, if necessary these should be
173 adjusted to handle the total of QAT and other devices which the process will use.
175 QAT allocates internal structures to handle SGLs. For the compression service
176 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS can be changed if more segments are needed.
177 An extra (max_inflight_ops x 16) bytes per queue_pair will be used for every increment.
179 QAT compression PMD needs intermediate buffers to support Deflate compression
180 with Dynamic Huffman encoding. CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE
181 specifies the size of a single buffer, the PMD will allocate a multiple of these,
182 plus some extra space for associated meta-data. For GEN2 devices, 20 buffers plus
183 1472 bytes are allocated.
187 If the compressed output of a Deflate operation using Dynamic Huffman
188 Encoding is too big to fit in an intermediate buffer, then the
189 operation will return RTE_COMP_OP_STATUS_ERROR and an error will be
190 displayed. Options for the application in this case
191 are to split the input data into smaller chunks and resubmit
192 in multiple operations or to configure QAT with
193 larger intermediate buffers.
196 Device and driver naming
197 ~~~~~~~~~~~~~~~~~~~~~~~~
199 * The qat cryptodev driver name is "crypto_qat".
200 The "rte_cryptodev_devices_get()" returns the devices exposed by this driver.
202 * Each qat crypto device has a unique name, in format
203 "<pci bdf>_<service>", e.g. "0000:41:01.0_qat_sym".
204 This name can be passed to "rte_cryptodev_get_dev_id()" to get the device_id.
208 The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the "-devtype" parameter.
210 The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
212 * The qat compressdev driver name is "compress_qat".
213 The rte_compressdev_devices_get() returns the devices exposed by this driver.
215 * Each qat compression device has a unique name, in format
216 <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
217 This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
221 Dependency on the QAT kernel driver
222 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
224 To use QAT an SRIOV-enabled QAT kernel driver is required. The VF
225 devices created and initialised by this driver will be used by the QAT PMDs.
227 Instructions for installation are below, but first an explanation of the
228 relationships between the PF/VF devices and the PMDs visible to
231 Each QuickAssist PF device exposes a number of VF devices. Each VF device can
232 enable one cryptodev PMD and/or one compressdev PMD.
233 These QAT PMDs share the same underlying device and pci-mgmt code, but are
234 enumerated independently on their respective APIs and appear as independent
235 devices to applications.
239 Each VF can only be used by one DPDK process. It is not possible to share
240 the same VF across multiple processes, even if these processes are using
241 different acceleration services.
243 Conversely one DPDK process can use one or more QAT VFs and can expose both
244 cryptodev and compressdev instances on each of those VFs.
247 Available kernel drivers
248 ~~~~~~~~~~~~~~~~~~~~~~~~
250 Kernel drivers for each device are listed in the following table. Scroll right
251 to check that the driver and device supports the service you require.
254 .. _table_qat_pmds_drivers:
256 .. table:: QAT device generations, devices and drivers
258 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
259 | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF | cryptodev | compressdev |
260 +=====+==========+===============+===============+============+========+======+========+========+===========+=============+
261 | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 | Yes | No |
262 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
263 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | No |
264 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
265 | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 | Yes | No |
266 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
267 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
268 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
269 | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 | Yes | No |
270 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
271 | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
272 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
273 | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | Yes | No |
274 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
275 | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | Yes | No |
276 +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
279 The ``Driver`` column indicates either the Linux kernel version in which
280 support for this device was introduced or a driver available on Intel's 01.org
281 website. There are both linux and 01.org kernel drivers available for some
282 devices. p = release pending.
284 If you are running on a kernel which includes a driver for your device, see
285 `Installation using kernel.org driver`_ below. Otherwise see
286 `Installation using 01.org QAT driver`_.
289 Installation using kernel.org driver
290 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
292 The examples below are based on the C62x device, if you have a different device
293 use the corresponding values in the above table.
295 In BIOS ensure that SRIOV is enabled and either:
298 * Enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
300 Check that the QAT driver is loaded on your system, by executing::
304 You should see the kernel module for your device listed, e.g.::
307 intel_qat 82336 1 qat_c62x
309 Next, you need to expose the Virtual Functions (VFs) using the sysfs file system.
311 First find the BDFs (Bus-Device-Function) of the physical functions (PFs) of
316 You should see output similar to::
318 1a:00.0 Co-processor: Intel Corporation Device 37c8
319 3d:00.0 Co-processor: Intel Corporation Device 37c8
320 3f:00.0 Co-processor: Intel Corporation Device 37c8
322 Enable the VFs for each PF by echoing the number of VFs per PF to the pci driver::
324 echo 16 > /sys/bus/pci/drivers/c6xx/0000:1a:00.0/sriov_numvfs
325 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3d:00.0/sriov_numvfs
326 echo 16 > /sys/bus/pci/drivers/c6xx/0000:3f:00.0/sriov_numvfs
328 Check that the VFs are available for use. For example ``lspci -d:37c9`` should
329 list 48 VF devices available for a ``C62x`` device.
331 To complete the installation follow the instructions in
332 `Binding the available VFs to the DPDK UIO driver`_.
336 If the QAT kernel modules are not loaded and you see an error like ``Failed
337 to load MMP firmware qat_895xcc_mmp.bin`` in kernel logs, this may be as a
338 result of not using a distribution, but just updating the kernel directly.
340 Download firmware from the `kernel firmware repo
341 <http://git.kernel.org/cgit/linux/kernel/git/firmware/linux-firmware.git/tree/>`_.
343 Copy qat binaries to ``/lib/firmware``::
345 cp qat_895xcc.bin /lib/firmware
346 cp qat_895xcc_mmp.bin /lib/firmware
348 Change to your linux source root directory and start the qat kernel modules::
350 insmod ./drivers/crypto/qat/qat_common/intel_qat.ko
351 insmod ./drivers/crypto/qat/qat_dh895xcc/qat_dh895xcc.ko
356 If you see the following warning in ``/var/log/messages`` it can be ignored:
357 ``IOMMU should be enabled for SR-IOV to work correctly``.
360 Installation using 01.org QAT driver
361 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
363 Download the latest QuickAssist Technology Driver from `01.org
364 <https://01.org/packet-processing/intel%C2%AE-quickassist-technology-drivers-and-patches>`_.
365 Consult the *Getting Started Guide* at the same URL for further information.
367 The steps below assume you are:
369 * Building on a platform with one ``C62x`` device.
370 * Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
371 * On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
373 In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
375 Uninstall any existing QAT driver, for example by running:
377 * ``./installer.sh uninstall`` in the directory where originally installed.
380 Build and install the SRIOV-enabled QAT driver::
385 # Copy the package to this location and unpack
386 tar zxof qat1.7.l.4.2.0-000xx.tar.gz
388 ./configure --enable-icp-sriov=host
391 You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
392 You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
394 Confirm the driver is correctly installed and is using firmware version 4.2.0::
396 cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
399 Confirm the presence of 48 VF devices - 16 per PF::
404 To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
408 If using a later kernel and the build fails with an error relating to
409 ``strict_stroul`` not being available apply the following patch:
413 /QAT/QAT1.6/quickassist/utilities/downloader/Target_CoreLibs/uclo/include/linux/uclo_platform.h
414 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,5)
415 + #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (kstrtoul((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
417 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,38)
418 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; if (strict_strtoull((str), (base), (num))) printk("Error strtoull convert %s\n", str); }
420 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)
421 #define STR_TO_64(str, base, num, endPtr) {endPtr=NULL; strict_strtoll((str), (base), (num));}
423 #define STR_TO_64(str, base, num, endPtr) \
427 *(num) = -(simple_strtoull((str+1), &(endPtr), (base))); \
429 *(num) = simple_strtoull((str), &(endPtr), (base)); \
439 If the build fails due to missing header files you may need to do following::
441 sudo yum install zlib-devel
442 sudo yum install openssl-devel
443 sudo yum install libudev-devel
447 If the build or install fails due to mismatching kernel sources you may need to do the following::
449 sudo yum install kernel-headers-`uname -r`
450 sudo yum install kernel-src-`uname -r`
451 sudo yum install kernel-devel-`uname -r`
454 Binding the available VFs to the DPDK UIO driver
455 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
457 Unbind the VFs from the stock driver so they can be bound to the uio driver.
459 For an Intel(R) QuickAssist Technology DH895xCC device
460 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
462 The unbind command below assumes ``BDFs`` of ``03:01.00-03:04.07``, if your
463 VFs are different adjust the unbind command below::
465 for device in $(seq 1 4); do \
466 for fn in $(seq 0 7); do \
467 echo -n 0000:03:0${device}.${fn} > \
468 /sys/bus/pci/devices/0000\:03\:0${device}.${fn}/driver/unbind; \
472 For an Intel(R) QuickAssist Technology C62x device
473 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
475 The unbind command below assumes ``BDFs`` of ``1a:01.00-1a:02.07``,
476 ``3d:01.00-3d:02.07`` and ``3f:01.00-3f:02.07``, if your VFs are different
477 adjust the unbind command below::
479 for device in $(seq 1 2); do \
480 for fn in $(seq 0 7); do \
481 echo -n 0000:1a:0${device}.${fn} > \
482 /sys/bus/pci/devices/0000\:1a\:0${device}.${fn}/driver/unbind; \
484 echo -n 0000:3d:0${device}.${fn} > \
485 /sys/bus/pci/devices/0000\:3d\:0${device}.${fn}/driver/unbind; \
487 echo -n 0000:3f:0${device}.${fn} > \
488 /sys/bus/pci/devices/0000\:3f\:0${device}.${fn}/driver/unbind; \
492 For Intel(R) QuickAssist Technology C3xxx or D15xx device
493 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
495 The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your
496 VFs are different adjust the unbind command below::
498 for device in $(seq 1 2); do \
499 for fn in $(seq 0 7); do \
500 echo -n 0000:01:0${device}.${fn} > \
501 /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \
505 Bind to the DPDK uio driver
506 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
508 Install the DPDK igb_uio driver, bind the VF PCI Device id to it and use lspci
509 to confirm the VF devices are now in use by igb_uio kernel driver,
510 e.g. for the C62x device::
512 cd to the top-level DPDK directory
514 insmod ./build/kmod/igb_uio.ko
515 echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id
519 Another way to bind the VFs to the DPDK UIO driver is by using the
520 ``dpdk-devbind.py`` script::
522 cd to the top-level DPDK directory
523 ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
528 QAT crypto PMD can be tested by running the test application::
533 ./test -l1 -n1 -w <your qat bdf>
534 RTE>>cryptodev_qat_autotest
536 QAT compression PMD can be tested by running the test application::
539 sed -i 's,\(CONFIG_RTE_COMPRESSDEV_TEST\)=n,\1=y,' build/.config
542 ./test -l1 -n1 -w <your qat bdf>
543 RTE>>compressdev_autotest
549 There are 2 sets of trace available via the dynamic logging feature:
551 * pmd.qat_dp exposes trace on the data-path.
552 * pmd.qat_general exposes all other trace.
554 pmd.qat exposes both sets of traces.
555 They can be enabled using the log-level option (where 8=maximum log level) on
556 the process cmdline, e.g. using any of the following::
558 --log-level="pmd.qat_general,8"
559 --log-level="pmd.qat_dp,8"
560 --log-level="pmd.qat,8"
564 The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
565 RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
566 for meson build and config/common_base for gnu make.
567 Also the dynamic global log level overrides both sets of trace, so e.g. no
568 QAT trace would display in this case::
570 --log-level="7" --log-level="pmd.qat_general,8"