1 .. SPDX-License-Identifier: BSD-3-Clause
2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox Technologies, Ltd
8 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
9 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** , **Mellanox
10 ConnectX-5**, **Mellanox ConnectX-6**, **Mellanox ConnectX-6DX** and
11 **Mellanox BlueField** families of 10/25/40/50/100/200 Gb/s adapters
12 as well as their virtual functions (VF) in SR-IOV context.
14 Information and documentation about these adapters can be found on the
15 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
16 `Mellanox community <http://community.mellanox.com/welcome>`__.
18 There is also a `section dedicated to this poll mode driver
19 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
23 Due to external dependencies, this driver is disabled in default configuration
24 of the "make" build. It can be enabled with ``CONFIG_RTE_LIBRTE_MLX5_PMD=y``
25 or by using "meson" build system which will detect dependencies.
30 Besides its dependency on libibverbs (that implies libmlx5 and associated
31 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
32 operations such as querying/updating the MTU and flow control parameters.
34 For security reasons and robustness, this driver only deals with virtual
35 memory addresses. The way resources allocations are handled by the kernel,
36 combined with hardware specifications that allow to handle virtual memory
37 addresses directly, ensure that DPDK applications cannot access random
38 physical memory (or memory that does not belong to the current process).
40 This capability allows the PMD to coexist with kernel network interfaces
41 which remain functional, although they stop receiving unicast packets as
42 long as they share the same MAC address.
43 This means legacy linux control tools (for example: ethtool, ifconfig and
44 more) can operate on the same network interfaces that owned by the DPDK
47 The PMD can use libibverbs and libmlx5 to access the device firmware
48 or directly the hardware components.
49 There are different levels of objects and bypassing abilities
50 to get the best performances:
52 - Verbs is a complete high-level generic API
53 - Direct Verbs is a device-specific API
54 - DevX allows to access firmware objects
55 - Direct Rules manages flow steering at low-level hardware layer
57 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
63 - Multi arch support: x86_64, POWER8, ARMv8, i686.
64 - Multiple TX and RX queues.
65 - Support for scattered TX and RX frames.
66 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
67 - Several RSS hash keys, one for each flow type.
68 - Default RSS operation with no hash key specification.
69 - Configurable RETA table.
70 - Link flow control (pause frame).
71 - Support for multiple MAC addresses.
75 - RX CRC stripping configuration.
76 - Promiscuous mode on PF and VF.
77 - Multicast promiscuous mode on PF and VF.
78 - Hardware checksum offloads.
79 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
81 - Flow API, including :ref:`flow_isolated_mode`.
83 - KVM and VMware ESX SR-IOV modes are supported.
84 - RSS hash result is supported.
85 - Hardware TSO for generic IP or UDP tunnel, including VXLAN and GRE.
86 - Hardware checksum Tx offload for generic IP or UDP tunnel, including VXLAN and GRE.
88 - Statistics query including Basic, Extended and per queue.
90 - Tunnel types: VXLAN, L3 VXLAN, VXLAN-GPE, GRE, MPLSoGRE, MPLSoUDP, IP-in-IP, Geneve.
91 - Tunnel HW offloads: packet type, inner/outer RSS, IP and UDP checksum verification.
92 - NIC HW offloads: encapsulation (vxlan, gre, mplsoudp, mplsogre), NAT, routing, TTL
93 increment/decrement, count, drop, mark. For details please see :ref:`mlx5_offloads_support`.
94 - Flow insertion rate of more then million flows per second, when using Direct Rules.
95 - Support for multiple rte_flow groups.
101 - For secondary process:
103 - Forked secondary process not supported.
104 - External memory unregistered in EAL memseg list cannot be used for DMA
105 unless such memory has been registered by ``mlx5_mr_update_ext_mp()`` in
106 primary process and remapped to the same virtual address in secondary
107 process. If the external memory is registered by primary process but has
108 different virtual address in secondary process, unexpected error may happen.
110 - Flow pattern without any specific vlan will match for vlan packets as well:
112 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
113 Meaning, the flow rule::
115 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
117 Will only match vlan packets with vid=3. and the flow rules::
119 flow create 0 ingress pattern eth / ipv4 / end ...
123 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
125 Will match any ipv4 packet (VLAN included).
127 - VLAN pop offload command:
129 - Flow rules having a VLAN pop offload command as one of their actions and
130 are lacking a match on VLAN as one of their items are not supported.
131 - The command is not supported on egress traffic.
133 - VLAN push offload is not supported on ingress traffic.
135 - VLAN set PCP offload is not supported on existing headers.
137 - A multi segment packet must have not more segments than reported by dev_infos_get()
138 in tx_desc_lim.nb_seg_max field. This value depends on maximal supported Tx descriptor
139 size and ``txq_inline_min`` settings and may be from 2 (worst case forced by maximal
140 inline settings) to 58.
142 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
143 to 0 are not supported.
145 - VXLAN TSO and checksum offloads are not supported on VM.
147 - L3 VXLAN and VXLAN-GPE tunnels cannot be supported together with MPLSoGRE and MPLSoUDP.
149 - Match on Geneve header supports the following fields only:
155 Currently, the only supported options length value is 0.
157 - VF: flow rules created on VF devices can only match traffic targeted at the
158 configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).
162 MAC addresses not already present in the bridge table of the associated
163 kernel network device will be added and cleaned up by the PMD when closing
164 the device. In case of ungraceful program termination, some entries may
165 remain present and should be removed manually by other means.
167 - When Multi-Packet Rx queue is configured (``mprq_en``), a Rx packet can be
168 externally attached to a user-provided mbuf with having EXT_ATTACHED_MBUF in
169 ol_flags. As the mempool for the external buffer is managed by PMD, all the
170 Rx mbufs must be freed before the device is closed. Otherwise, the mempool of
171 the external buffers will be freed by PMD and the application which still
172 holds the external buffers may be corrupted.
174 - If Multi-Packet Rx queue is configured (``mprq_en``) and Rx CQE compression is
175 enabled (``rxq_cqe_comp_en``) at the same time, RSS hash result is not fully
176 supported. Some Rx packets may not have PKT_RX_RSS_HASH.
178 - IPv6 Multicast messages are not supported on VM, while promiscuous mode
179 and allmulticast mode are both set to off.
180 To receive IPv6 Multicast messages on VM, explicitly set the relevant
181 MAC address using rte_eth_dev_mac_addr_add() API.
183 - The amount of descriptors in Tx queue may be limited by data inline settings.
184 Inline data require the more descriptor building blocks and overall block
185 amount may exceed the hardware supported limits. The application should
186 reduce the requested Tx size or adjust data inline settings with
187 ``txq_inline_max`` and ``txq_inline_mpw`` devargs keys.
189 - E-Switch decapsulation Flow:
191 - can be applied to PF port only.
192 - must specify VF port action (packet redirection from PF to VF).
193 - optionally may specify tunnel inner source and destination MAC addresses.
195 - E-Switch encapsulation Flow:
197 - can be applied to VF ports only.
198 - must specify PF port action (packet redirection from VF to PF).
200 - ICMP/ICMP6 code/type matching, IP-in-IP and MPLS flow matching are all
201 mutually exclusive features which cannot be supported together
202 (see :ref:`mlx5_firmware_config`).
206 - Requires DevX and DV flow to be enabled.
207 - KEEP_CRC offload cannot be supported with LRO.
208 - The first mbuf length, without head-room, must be big enough to include the
210 - Rx queue with LRO offload enabled, receiving a non-LRO packet, can forward
211 it with size limited to max LRO size, not to max RX packet length.
216 MLX5 supports various methods to report statistics:
218 Port statistics can be queried using ``rte_eth_stats_get()``. The received and sent statistics are through SW only and counts the number of packets received or sent successfully by the PMD. The imissed counter is the amount of packets that could not be delivered to SW because a queue was full. Packets not received due to congestion in the bus or on the NIC can be queried via the rx_discards_phy xstats counter.
220 Extended statistics can be queried using ``rte_eth_xstats_get()``. The extended statistics expose a wider set of counters counted by the device. The extended port statistics counts the number of packets received or sent successfully by the port. As Mellanox NICs are using the :ref:`Bifurcated Linux Driver <linux_gsg_linux_drivers>` those counters counts also packet received or sent by the Linux kernel. The counters with ``_phy`` suffix counts the total events on the physical port, therefore not valid for VF.
222 Finally per-flow statistics can by queried using ``rte_flow_query`` when attaching a count action for specific flow. The flow counter counts the number of packets received successfully by the port and match the specific flow.
230 These options can be modified in the ``.config`` file.
232 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
234 Toggle compilation of librte_pmd_mlx5 itself.
236 - ``CONFIG_RTE_IBVERBS_LINK_DLOPEN`` (default **n**)
238 Build PMD with additional code to make it loadable without hard
239 dependencies on **libibverbs** nor **libmlx5**, which may not be installed
240 on the target system.
242 In this mode, their presence is still required for it to run properly,
243 however their absence won't prevent a DPDK application from starting (with
244 ``CONFIG_RTE_BUILD_SHARED_LIB`` disabled) and they won't show up as
245 missing with ``ldd(1)``.
247 It works by moving these dependencies to a purpose-built rdma-core "glue"
248 plug-in which must either be installed in a directory whose name is based
249 on ``CONFIG_RTE_EAL_PMD_PATH`` suffixed with ``-glue`` if set, or in a
250 standard location for the dynamic linker (e.g. ``/lib``) if left to the
251 default empty string (``""``).
253 This option has no performance impact.
255 - ``CONFIG_RTE_IBVERBS_LINK_STATIC`` (default **n**)
257 Embed static flavor of the dependencies **libibverbs** and **libmlx5**
258 in the PMD shared library or the executable static binary.
260 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
262 Toggle debugging code and stricter compilation flags. Enabling this option
263 adds additional run-time checks and debugging messages at the cost of
268 For BlueField, target should be set to ``arm64-bluefield-linux-gcc``. This
269 will enable ``CONFIG_RTE_LIBRTE_MLX5_PMD`` and set ``RTE_CACHE_LINE_SIZE`` to
270 64. Default armv8a configuration of make build and meson build set it to 128
271 then brings performance degradation.
273 Environment variables
274 ~~~~~~~~~~~~~~~~~~~~~
278 A list of directories in which to search for the rdma-core "glue" plug-in,
279 separated by colons or semi-colons.
281 Only matters when compiled with ``CONFIG_RTE_IBVERBS_LINK_DLOPEN``
282 enabled and most useful when ``CONFIG_RTE_EAL_PMD_PATH`` is also set,
283 since ``LD_LIBRARY_PATH`` has no effect in this case.
285 - ``MLX5_SHUT_UP_BF``
287 Configures HW Tx doorbell register as IO-mapped.
289 By default, the HW Tx doorbell is configured as a write-combining register.
290 The register would be flushed to HW usually when the write-combining buffer
291 becomes full, but it depends on CPU design.
293 Except for vectorized Tx burst routines, a write memory barrier is enforced
294 after updating the register so that the update can be immediately visible to
297 When vectorized Tx burst is called, the barrier is set only if the burst size
298 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
299 variable will bring better latency even though the maximum throughput can
302 Run-time configuration
303 ~~~~~~~~~~~~~~~~~~~~~~
305 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
306 because it is affected by their state. Forcing them down prevents packets
309 - **ethtool** operations on related kernel interfaces also affect the PMD.
311 - ``rxq_cqe_comp_en`` parameter [int]
313 A nonzero value enables the compression of CQE on RX side. This feature
314 allows to save PCI bandwidth and improve performance. Enabled by default.
318 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
320 - POWER9 and ARMv8 with ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
323 - ``rxq_cqe_pad_en`` parameter [int]
325 A nonzero value enables 128B padding of CQE on RX side. The size of CQE
326 is aligned with the size of a cacheline of the core. If cacheline size is
327 128B, the CQE size is configured to be 128B even though the device writes
328 only 64B data on the cacheline. This is to avoid unnecessary cache
329 invalidation by device's two consecutive writes on to one cacheline.
330 However in some architecture, it is more beneficial to update entire
331 cacheline with padding the rest 64B rather than striding because
332 read-modify-write could drop performance a lot. On the other hand,
333 writing extra data will consume more PCIe bandwidth and could also drop
334 the maximum throughput. It is recommended to empirically set this
335 parameter. Disabled by default.
339 - CPU having 128B cacheline with ConnectX-5 and BlueField.
341 - ``rxq_pkt_pad_en`` parameter [int]
343 A nonzero value enables padding Rx packet to the size of cacheline on PCI
344 transaction. This feature would waste PCI bandwidth but could improve
345 performance by avoiding partial cacheline write which may cause costly
346 read-modify-copy in memory transaction on some architectures. Disabled by
351 - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
353 - POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5, ConnectX-6, ConnectX-6 DX
356 - ``mprq_en`` parameter [int]
358 A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is
359 configured as Multi-Packet RQ if the total number of Rx queues is
360 ``rxqs_min_mprq`` or more and Rx scatter isn't configured. Disabled by
363 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
364 by posting a single large buffer for multiple packets. Instead of posting a
365 buffers per a packet, one large buffer is posted in order to receive multiple
366 packets on the buffer. A MPRQ buffer consists of multiple fixed-size strides
367 and each stride receives one packet. MPRQ can improve throughput for
368 small-packet traffic.
370 When MPRQ is enabled, max_rx_pkt_len can be larger than the size of
371 user-provided mbuf even if DEV_RX_OFFLOAD_SCATTER isn't enabled. PMD will
372 configure large stride size enough to accommodate max_rx_pkt_len as long as
373 device allows. Note that this can waste system memory compared to enabling Rx
374 scatter and multi-segment packet.
376 - ``mprq_log_stride_num`` parameter [int]
378 Log 2 of the number of strides for Multi-Packet Rx queue. Configuring more
379 strides can reduce PCIe traffic further. If configured value is not in the
380 range of device capability, the default value will be set with a warning
381 message. The default value is 4 which is 16 strides per a buffer, valid only
382 if ``mprq_en`` is set.
384 The size of Rx queue should be bigger than the number of strides.
386 - ``mprq_max_memcpy_len`` parameter [int]
388 The maximum length of packet to memcpy in case of Multi-Packet Rx queue. Rx
389 packet is mem-copied to a user-provided mbuf if the size of Rx packet is less
390 than or equal to this parameter. Otherwise, PMD will attach the Rx packet to
391 the mbuf by external buffer attachment - ``rte_pktmbuf_attach_extbuf()``.
392 A mempool for external buffers will be allocated and managed by PMD. If Rx
393 packet is externally attached, ol_flags field of the mbuf will have
394 EXT_ATTACHED_MBUF and this flag must be preserved. ``RTE_MBUF_HAS_EXTBUF()``
395 checks the flag. The default value is 128, valid only if ``mprq_en`` is set.
397 - ``rxqs_min_mprq`` parameter [int]
399 Configure Rx queues as Multi-Packet RQ if the total number of Rx queues is
400 greater or equal to this value. The default value is 12, valid only if
403 - ``txq_inline`` parameter [int]
405 Amount of data to be inlined during TX operations. This parameter is
406 deprecated and converted to the new parameter ``txq_inline_max`` providing
407 partial compatibility.
409 - ``txqs_min_inline`` parameter [int]
411 Enable inline data send only when the number of TX queues is greater or equal
414 This option should be used in combination with ``txq_inline_max`` and
415 ``txq_inline_mpw`` below and does not affect ``txq_inline_min`` settings above.
417 If this option is not specified the default value 16 is used for BlueField
418 and 8 for other platforms
420 The data inlining consumes the CPU cycles, so this option is intended to
421 auto enable inline data if we have enough Tx queues, which means we have
422 enough CPU cores and PCI bandwidth is getting more critical and CPU
423 is not supposed to be bottleneck anymore.
425 The copying data into WQE improves latency and can improve PPS performance
426 when PCI back pressure is detected and may be useful for scenarios involving
427 heavy traffic on many queues.
429 Because additional software logic is necessary to handle this mode, this
430 option should be used with care, as it may lower performance when back
431 pressure is not expected.
433 If inline data are enabled it may affect the maximal size of Tx queue in
434 descriptors because the inline data increase the descriptor size and
435 queue size limits supported by hardware may be exceeded.
437 - ``txq_inline_min`` parameter [int]
439 Minimal amount of data to be inlined into WQE during Tx operations. NICs
440 may require this minimal data amount to operate correctly. The exact value
441 may depend on NIC operation mode, requested offloads, etc. It is strongly
442 recommended to omit this parameter and use the default values. Anyway,
443 applications using this parameter should take into consideration that
444 specifying an inconsistent value may prevent the NIC from sending packets.
446 If ``txq_inline_min`` key is present the specified value (may be aligned
447 by the driver in order not to exceed the limits and provide better descriptor
448 space utilization) will be used by the driver and it is guaranteed that
449 requested amount of data bytes are inlined into the WQE beside other inline
450 settings. This key also may update ``txq_inline_max`` value (default
451 or specified explicitly in devargs) to reserve the space for inline data.
453 If ``txq_inline_min`` key is not present, the value may be queried by the
454 driver from the NIC via DevX if this feature is available. If there is no DevX
455 enabled/supported the value 18 (supposing L2 header including VLAN) is set
456 for ConnectX-4 and ConnectX-4LX, and 0 is set by default for ConnectX-5
457 and newer NICs. If packet is shorter the ``txq_inline_min`` value, the entire
460 For ConnectX-4 NIC, driver does not allow specifying value below 18
461 (minimal L2 header, including VLAN), error will be raised.
463 For ConnectX-4LX NIC, it is allowed to specify values below 18, but
464 it is not recommended and may prevent NIC from sending packets over
467 Please, note, this minimal data inlining disengages eMPW feature (Enhanced
468 Multi-Packet Write), because last one does not support partial packet inlining.
469 This is not very critical due to minimal data inlining is mostly required
470 by ConnectX-4 and ConnectX-4 Lx, these NICs do not support eMPW feature.
472 - ``txq_inline_max`` parameter [int]
474 Specifies the maximal packet length to be completely inlined into WQE
475 Ethernet Segment for ordinary SEND method. If packet is larger than specified
476 value, the packet data won't be copied by the driver at all, data buffer
477 is addressed with a pointer. If packet length is less or equal all packet
478 data will be copied into WQE. This may improve PCI bandwidth utilization for
479 short packets significantly but requires the extra CPU cycles.
481 The data inline feature is controlled by number of Tx queues, if number of Tx
482 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
483 is engaged, if there are not enough Tx queues (which means not enough CPU cores
484 and CPU resources are scarce), data inline is not performed by the driver.
485 Assigning ``txqs_min_inline`` with zero always enables the data inline.
487 The default ``txq_inline_max`` value is 290. The specified value may be adjusted
488 by the driver in order not to exceed the limit (930 bytes) and to provide better
489 WQE space filling without gaps, the adjustment is reflected in the debug log.
490 Also, the default value (290) may be decreased in run-time if the large transmit
491 queue size is requested and hardware does not support enough descriptor
492 amount, in this case warning is emitted. If ``txq_inline_max`` key is
493 specified and requested inline settings can not be satisfied then error
496 - ``txq_inline_mpw`` parameter [int]
498 Specifies the maximal packet length to be completely inlined into WQE for
499 Enhanced MPW method. If packet is large the specified value, the packet data
500 won't be copied, and data buffer is addressed with pointer. If packet length
501 is less or equal, all packet data will be copied into WQE. This may improve PCI
502 bandwidth utilization for short packets significantly but requires the extra
505 The data inline feature is controlled by number of TX queues, if number of Tx
506 queues is larger than ``txqs_min_inline`` key parameter, the inline feature
507 is engaged, if there are not enough Tx queues (which means not enough CPU cores
508 and CPU resources are scarce), data inline is not performed by the driver.
509 Assigning ``txqs_min_inline`` with zero always enables the data inline.
511 The default ``txq_inline_mpw`` value is 268. The specified value may be adjusted
512 by the driver in order not to exceed the limit (930 bytes) and to provide better
513 WQE space filling without gaps, the adjustment is reflected in the debug log.
514 Due to multiple packets may be included to the same WQE with Enhanced Multi
515 Packet Write Method and overall WQE size is limited it is not recommended to
516 specify large values for the ``txq_inline_mpw``. Also, the default value (268)
517 may be decreased in run-time if the large transmit queue size is requested
518 and hardware does not support enough descriptor amount, in this case warning
519 is emitted. If ``txq_inline_mpw`` key is specified and requested inline
520 settings can not be satisfied then error will be raised.
522 - ``txqs_max_vec`` parameter [int]
524 Enable vectorized Tx only when the number of TX queues is less than or
525 equal to this value. This parameter is deprecated and ignored, kept
526 for compatibility issue to not prevent driver from probing.
528 - ``txq_mpw_hdr_dseg_en`` parameter [int]
530 A nonzero value enables including two pointers in the first block of TX
531 descriptor. The parameter is deprecated and ignored, kept for compatibility
534 - ``txq_max_inline_len`` parameter [int]
536 Maximum size of packet to be inlined. This limits the size of packet to
537 be inlined. If the size of a packet is larger than configured value, the
538 packet isn't inlined even though there's enough space remained in the
539 descriptor. Instead, the packet is included with pointer. This parameter
540 is deprecated and converted directly to ``txq_inline_mpw`` providing full
541 compatibility. Valid only if eMPW feature is engaged.
543 - ``txq_mpw_en`` parameter [int]
545 A nonzero value enables Enhanced Multi-Packet Write (eMPW) for ConnectX-5,
546 ConnectX-6, ConnectX-6 DX and BlueField. eMPW allows the TX burst function to pack
547 up multiple packets in a single descriptor session in order to save PCI bandwidth
548 and improve performance at the cost of a slightly higher CPU usage. When
549 ``txq_inline_mpw`` is set along with ``txq_mpw_en``, TX burst function copies
550 entire packet data on to TX descriptor instead of including pointer of packet.
552 The Enhanced Multi-Packet Write feature is enabled by default if NIC supports
553 it, can be disabled by explicit specifying 0 value for ``txq_mpw_en`` option.
554 Also, if minimal data inlining is requested by non-zero ``txq_inline_min``
555 option or reported by the NIC, the eMPW feature is disengaged.
557 - ``tx_db_nc`` parameter [int]
559 The rdma core library can map doorbell register in two ways, depending on the
560 environment variable "MLX5_SHUT_UP_BF":
562 - As regular cached memory, if the variable is either missing or set to zero.
563 - As non-cached memory, if the variable is present and set to not "0" value.
565 The type of mapping may slightly affect the Tx performance, the optimal choice
566 is strongly relied on the host architecture and should be deduced practically.
568 If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
569 memory, the PMD will perform the extra write memory barrier after writing to
570 doorbell, it might increase the needed CPU clocks per packet to send, but
571 latency might be improved.
573 If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
574 cached memory, the PMD will not perform the extra write memory barrier
575 after writing to doorbell, on some architectures it might improve the
578 If ``tx_db_nc`` is set to two, the doorbell is forced to be mapped to regular
579 memory, the PMD will use heuristics to decide whether write memory barrier
580 should be performed. For bursts with size multiple of recommended one (64 pkts)
581 it is supposed the next burst is coming and no need to issue the extra memory
582 barrier (it is supposed to be issued in the next coming burst, at least after
583 descriptor writing). It might increase latency (on some hosts till next
584 packets transmit) and should be used with care.
586 If ``tx_db_nc`` is omitted or set to zero, the preset (if any) environment
587 variable "MLX5_SHUT_UP_BF" value is used. If there is no "MLX5_SHUT_UP_BF",
588 the default ``tx_db_nc`` value is zero for ARM64 hosts and one for others.
590 - ``tx_vec_en`` parameter [int]
592 A nonzero value enables Tx vector on ConnectX-5, ConnectX-6, ConnectX-6 DX
593 and BlueField NICs if the number of global Tx queues on the port is less than
594 ``txqs_max_vec``. The parameter is deprecated and ignored.
596 - ``rx_vec_en`` parameter [int]
598 A nonzero value enables Rx vector if the port is not configured in
599 multi-segment otherwise this parameter is ignored.
603 - ``vf_nl_en`` parameter [int]
605 A nonzero value enables Netlink requests from the VF to add/remove MAC
606 addresses or/and enable/disable promiscuous/all multicast on the Netdevice.
607 Otherwise the relevant configuration must be run with Linux iproute2 tools.
608 This is a prerequisite to receive this kind of traffic.
610 Enabled by default, valid only on VF devices ignored otherwise.
612 - ``l3_vxlan_en`` parameter [int]
614 A nonzero value allows L3 VXLAN and VXLAN-GPE flow creation. To enable
615 L3 VXLAN or VXLAN-GPE, users has to configure firmware and enable this
616 parameter. This is a prerequisite to receive this kind of traffic.
620 - ``dv_xmeta_en`` parameter [int]
622 A nonzero value enables extensive flow metadata support if device is
623 capable and driver supports it. This can enable extensive support of
624 ``MARK`` and ``META`` item of ``rte_flow``. The newly introduced
625 ``SET_TAG`` and ``SET_META`` actions do not depend on ``dv_xmeta_en``.
627 There are some possible configurations, depending on parameter value:
629 - 0, this is default value, defines the legacy mode, the ``MARK`` and
630 ``META`` related actions and items operate only within NIC Tx and
631 NIC Rx steering domains, no ``MARK`` and ``META`` information crosses
632 the domain boundaries. The ``MARK`` item is 24 bits wide, the ``META``
633 item is 32 bits wide and match supported on egress only.
635 - 1, this engages extensive metadata mode, the ``MARK`` and ``META``
636 related actions and items operate within all supported steering domains,
637 including FDB, ``MARK`` and ``META`` information may cross the domain
638 boundaries. The ``MARK`` item is 24 bits wide, the ``META`` item width
639 depends on kernel and firmware configurations and might be 0, 16 or
640 32 bits. Within NIC Tx domain ``META`` data width is 32 bits for
641 compatibility, the actual width of data transferred to the FDB domain
642 depends on kernel configuration and may be vary. The actual supported
643 width can be retrieved in runtime by series of rte_flow_validate()
646 - 2, this engages extensive metadata mode, the ``MARK`` and ``META``
647 related actions and items operate within all supported steering domains,
648 including FDB, ``MARK`` and ``META`` information may cross the domain
649 boundaries. The ``META`` item is 32 bits wide, the ``MARK`` item width
650 depends on kernel and firmware configurations and might be 0, 16 or
651 24 bits. The actual supported width can be retrieved in runtime by
652 series of rte_flow_validate() trials.
654 +------+-----------+-----------+-------------+-------------+
655 | Mode | ``MARK`` | ``META`` | ``META`` Tx | FDB/Through |
656 +======+===========+===========+=============+=============+
657 | 0 | 24 bits | 32 bits | 32 bits | no |
658 +------+-----------+-----------+-------------+-------------+
659 | 1 | 24 bits | vary 0-32 | 32 bits | yes |
660 +------+-----------+-----------+-------------+-------------+
661 | 2 | vary 0-32 | 32 bits | 32 bits | yes |
662 +------+-----------+-----------+-------------+-------------+
664 If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
665 ignored and the device is configured to operate in legacy mode (0).
667 Disabled by default (set to 0).
669 The Direct Verbs/Rules (engaged with ``dv_flow_en`` = 1) supports all
670 of the extensive metadata features. The legacy Verbs supports FLAG and
671 MARK metadata actions over NIC Rx steering domain only.
673 - ``dv_flow_en`` parameter [int]
675 A nonzero value enables the DV flow steering assuming it is supported
678 Enabled by default if supported.
680 - ``dv_esw_en`` parameter [int]
682 A nonzero value enables E-Switch using Direct Rules.
684 Enabled by default if supported.
686 - ``mr_ext_memseg_en`` parameter [int]
688 A nonzero value enables extending memseg when registering DMA memory. If
689 enabled, the number of entries in MR (Memory Region) lookup table on datapath
690 is minimized and it benefits performance. On the other hand, it worsens memory
691 utilization because registered memory is pinned by kernel driver. Even if a
692 page in the extended chunk is freed, that doesn't become reusable until the
693 entire memory is freed.
697 - ``representor`` parameter [list]
699 This parameter can be used to instantiate DPDK Ethernet devices from
700 existing port (or VF) representors configured on the device.
702 It is a standard parameter whose format is described in
703 :ref:`ethernet_device_standard_device_arguments`.
705 For instance, to probe port representors 0 through 2::
709 - ``max_dump_files_num`` parameter [int]
711 The maximum number of files per PMD entity that may be created for debug information.
712 The files will be created in /var/log directory or in current directory.
714 set to 128 by default.
716 - ``lro_timeout_usec`` parameter [int]
718 The maximum allowed duration of an LRO session, in micro-seconds.
719 PMD will set the nearest value supported by HW, which is not bigger than
720 the input ``lro_timeout_usec`` value.
721 If this parameter is not specified, by default PMD will set
722 the smallest value supported by HW.
724 .. _mlx5_firmware_config:
726 Firmware configuration
727 ~~~~~~~~~~~~~~~~~~~~~~
729 Firmware features can be configured as key/value pairs.
731 The command to set a value is::
733 mlxconfig -d <device> set <key>=<value>
735 The command to query a value is::
737 mlxconfig -d <device> query | grep <key>
739 The device name for the command ``mlxconfig`` can be either the PCI address,
740 or the mst device name found with::
744 Below are some firmware configurations listed.
750 value: 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
756 - maximum number of SR-IOV virtual functions::
760 - enable DevX (required by Direct Rules and other features)::
764 - aggressive CQE zipping::
768 - L3 VXLAN and VXLAN-GPE destination UDP port::
771 IP_OVER_VXLAN_PORT=<udp dport>
773 - enable IP-in-IP tunnel flow matching::
775 FLEX_PARSER_PROFILE_ENABLE=0
777 - enable MPLS flow matching::
779 FLEX_PARSER_PROFILE_ENABLE=1
781 - enable ICMP/ICMP6 code/type fields matching::
783 FLEX_PARSER_PROFILE_ENABLE=2
785 - enable Geneve flow matching::
787 FLEX_PARSER_PROFILE_ENABLE=0
792 This driver relies on external libraries and kernel drivers for resources
793 allocations and initialization. The following dependencies are not part of
794 DPDK and must be installed separately:
798 User space Verbs framework used by librte_pmd_mlx5. This library provides
799 a generic interface between the kernel and low-level user space drivers
802 It allows slow and privileged operations (context initialization, hardware
803 resources allocations) to be managed by the kernel and fast operations to
804 never leave user space.
808 Low-level user space driver library for Mellanox
809 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices, it is automatically loaded
812 This library basically implements send/receive calls to the hardware
817 They provide the kernel-side Verbs API and low level device drivers that
818 manage actual hardware initialization and resources sharing with user
821 Unlike most other PMDs, these modules must remain loaded and bound to
824 - mlx5_core: hardware driver managing Mellanox
825 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices and related Ethernet kernel
827 - mlx5_ib: InifiniBand device driver.
828 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
830 - **Firmware update**
832 Mellanox OFED/EN releases include firmware updates for
833 ConnectX-4/ConnectX-5/ConnectX-6/BlueField adapters.
835 Because each release provides new features, these updates must be applied to
836 match the kernel modules and libraries they come with.
840 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
846 Either RDMA Core library with a recent enough Linux kernel release
847 (recommended) or Mellanox OFED/EN, which provides compatibility with older
850 RDMA Core with Linux Kernel
851 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
853 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
854 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
855 (see `RDMA Core installation documentation`_)
856 - When building for i686 use:
858 - rdma-core version 18.0 or above built with 32bit support.
859 - Kernel version 4.14.41 or above.
861 - Starting with rdma-core v21, static libraries can be built::
864 CFLAGS=-fPIC cmake -DIN_PLACE=1 -DENABLE_STATIC=1 -GNinja ..
867 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
868 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
870 If rdma-core libraries are built but not installed, DPDK makefile can link them,
871 thanks to these environment variables:
873 - ``EXTRA_CFLAGS=-I/path/to/rdma-core/build/include``
874 - ``EXTRA_LDFLAGS=-L/path/to/rdma-core/build/lib``
875 - ``PKG_CONFIG_PATH=/path/to/rdma-core/build/lib/pkgconfig``
880 - Mellanox OFED version: ** 4.5, 4.6** /
881 Mellanox EN version: **4.5, 4.6**
884 - ConnectX-4: **12.21.1000** and above.
885 - ConnectX-4 Lx: **14.21.1000** and above.
886 - ConnectX-5: **16.21.1000** and above.
887 - ConnectX-5 Ex: **16.21.1000** and above.
888 - ConnectX-6: **20.99.5374** and above.
889 - ConnectX-6 DX: **22.27.0090** and above.
890 - BlueField: **18.25.1010** and above.
892 While these libraries and kernel modules are available on OpenFabrics
893 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
894 managers on most distributions, this PMD requires Ethernet extensions that
895 may not be supported at the moment (this is a work in progress).
898 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__ and
900 <http://www.mellanox.com/page/products_dyn?product_family=27&mtag=linux>`__
901 include the necessary support and should be used in the meantime. For DPDK,
902 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
903 required from that distribution.
907 Several versions of Mellanox OFED/EN are available. Installing the version
908 this DPDK release was developed and tested against is strongly
909 recommended. Please check the `prerequisites`_.
914 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
915 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
916 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
917 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
918 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
919 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
920 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
921 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
922 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
923 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
924 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
925 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
926 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
927 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
928 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
929 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
930 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
931 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
932 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
933 * Mellanox(R) ConnectX(R)-6 200G MCX654106A-HCAT (4x200G)
934 * Mellanox(R) ConnectX(R)-6DX EN 100G MCX623106AN-CDAT (2*100g)
935 * Mellanox(R) ConnectX(R)-6DX EN 200G MCX623105AN-VDAT (1*200g)
937 Quick Start Guide on OFED/EN
938 ----------------------------
940 1. Download latest Mellanox OFED/EN. For more info check the `prerequisites`_.
943 2. Install the required libraries and kernel modules either by installing
944 only the required set, or by installing the entire Mellanox OFED/EN::
946 ./mlnxofedinstall --upstream-libs --dpdk
948 3. Verify the firmware is the correct one::
952 4. Verify all ports links are set to Ethernet::
954 mlxconfig -d <mst device> query | grep LINK_TYPE
958 Link types may have to be configured to Ethernet::
960 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
962 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
964 For hypervisors, verify SR-IOV is enabled on the NIC::
966 mlxconfig -d <mst device> query | grep SRIOV_EN
969 If needed, configure SR-IOV::
971 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
972 mlxfwreset -d <mst device> reset
974 5. Restart the driver::
976 /etc/init.d/openibd restart
980 service openibd restart
982 If link type was changed, firmware must be reset as well::
984 mlxfwreset -d <mst device> reset
986 For hypervisors, after reset write the sysfs number of virtual functions
989 To dynamically instantiate a given number of virtual functions (VFs)::
991 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
993 6. Compile DPDK and you are ready to go. See instructions on
994 :ref:`Development Kit Build System <Development_Kit_Build_System>`
996 Enable switchdev mode
997 ---------------------
999 Switchdev mode is a mode in E-Switch, that binds between representor and VF.
1000 Representor is a port in DPDK that is connected to a VF in such a way
1001 that assuming there are no offload flows, each packet that is sent from the VF
1002 will be received by the corresponding representor. While each packet that is
1003 sent to a representor will be received by the VF.
1004 This is very useful in case of SRIOV mode, where the first packet that is sent
1005 by the VF will be received by the DPDK application which will decide if this
1006 flow should be offloaded to the E-Switch. After offloading the flow packet
1007 that the VF that are matching the flow will not be received any more by
1008 the DPDK application.
1010 1. Enable SRIOV mode::
1012 mlxconfig -d <mst device> set SRIOV_EN=true
1014 2. Configure the max number of VFs::
1016 mlxconfig -d <mst device> set NUM_OF_VFS=<num of vfs>
1020 mlxfwreset -d <mst device> reset
1022 3. Configure the actual number of VFs::
1024 echo <num of vfs > /sys/class/net/<net device>/device/sriov_numvfs
1026 4. Unbind the device (can be rebind after the switchdev mode)::
1028 echo -n "<device pci address" > /sys/bus/pci/drivers/mlx5_core/unbind
1030 5. Enbale switchdev mode::
1032 echo switchdev > /sys/class/net/<net device>/compat/devlink/mode
1037 1. Configure aggressive CQE Zipping for maximum performance::
1039 mlxconfig -d <mst device> s CQE_COMPRESSION=1
1041 To set it back to the default CQE Zipping mode use::
1043 mlxconfig -d <mst device> s CQE_COMPRESSION=0
1045 2. In case of virtualization:
1047 - Make sure that hypervisor kernel is 3.16 or newer.
1048 - Configure boot with ``iommu=pt``.
1049 - Use 1G huge pages.
1050 - Make sure to allocate a VM on huge pages.
1051 - Make sure to set CPU pinning.
1053 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
1054 for better performance. For VMs, verify that the right CPU
1055 and NUMA node are pinned according to the above. Run::
1059 to identify the NUMA node to which the PCIe adapter is connected.
1061 4. If more than one adapter is used, and root complex capabilities allow
1062 to put both adapters on the same NUMA node without PCI bandwidth degradation,
1063 it is recommended to locate both adapters on the same NUMA node.
1064 This in order to forward packets from one to the other without
1065 NUMA performance penalty.
1067 5. Disable pause frames::
1069 ethtool -A <netdev> rx off tx off
1071 6. Verify IO non-posted prefetch is disabled by default. This can be checked
1072 via the BIOS configuration. Please contact you server provider for more
1073 information about the settings.
1077 On some machines, depends on the machine integrator, it is beneficial
1078 to set the PCI max read request parameter to 1K. This can be
1079 done in the following way:
1081 To query the read request size use::
1083 setpci -s <NIC PCI address> 68.w
1085 If the output is different than 3XXX, set it by::
1087 setpci -s <NIC PCI address> 68.w=3XXX
1089 The XXX can be different on different systems. Make sure to configure
1090 according to the setpci output.
1092 7. To minimize overhead of searching Memory Regions:
1094 - '--socket-mem' is recommended to pin memory by predictable amount.
1095 - Configure per-lcore cache when creating Mempools for packet buffer.
1096 - Refrain from dynamically allocating/freeing memory in run-time.
1098 .. _mlx5_offloads_support:
1100 Supported hardware offloads
1101 ---------------------------
1103 .. table:: Minimal SW/HW versions for queue offloads
1105 ============== ===== ===== ========= ===== ========== ==========
1106 Offload DPDK Linux rdma-core OFED firmware hardware
1107 ============== ===== ===== ========= ===== ========== ==========
1108 common base 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1109 checksums 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1110 Rx timestamp 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1111 TSO 17.11 4.14 16 4.2-1 12.21.1000 ConnectX-4
1112 LRO 19.08 N/A N/A 4.6-4 16.25.6406 ConnectX-5
1113 ============== ===== ===== ========= ===== ========== ==========
1115 .. table:: Minimal SW/HW versions for rte_flow offloads
1117 +-----------------------+-----------------+-----------------+
1118 | Offload | with E-Switch | with vNIC |
1119 +=======================+=================+=================+
1120 | Count | | DPDK 19.05 | | DPDK 19.02 |
1121 | | | OFED 4.6 | | OFED 4.6 |
1122 | | | rdma-core 24 | | rdma-core 23 |
1123 | | | ConnectX-5 | | ConnectX-5 |
1124 +-----------------------+-----------------+-----------------+
1125 | Drop / Queue / RSS | | DPDK 19.05 | | DPDK 18.11 |
1126 | | | OFED 4.6 | | OFED 4.5 |
1127 | | | rdma-core 24 | | rdma-core 23 |
1128 | | | ConnectX-5 | | ConnectX-4 |
1129 +-----------------------+-----------------+-----------------+
1130 | Encapsulation | | DPDK 19.05 | | DPDK 19.02 |
1131 | (VXLAN / NVGRE / RAW) | | OFED 4.6-2 | | OFED 4.6 |
1132 | | | rdma-core 24 | | rdma-core 23 |
1133 | | | ConnectX-5 | | ConnectX-5 |
1134 +-----------------------+-----------------+-----------------+
1135 | | Header rewrite | | DPDK 19.05 | | DPDK 19.02 |
1136 | | (set_ipv4_src / | | OFED 4.6-2 | | OFED 4.6-2 |
1137 | | set_ipv4_dst / | | rdma-core 24 | | rdma-core 23 |
1138 | | set_ipv6_src / | | ConnectX-5 | | ConnectX-5 |
1139 | | set_ipv6_dst / | | | | |
1140 | | set_tp_src / | | | | |
1141 | | set_tp_dst / | | | | |
1142 | | dec_ttl / | | | | |
1143 | | set_ttl / | | | | |
1144 | | set_mac_src / | | | | |
1145 | | set_mac_dst) | | | | |
1147 | | (of_set_vlan_vid) | | DPDK 19.11 | | DPDK 19.11 |
1148 | | | OFED 4.6-4 | | OFED 4.6-4 |
1149 | | | ConnectX-5 | | ConnectX-5 |
1150 +-----------------------+-----------------+-----------------+
1151 | Jump | | DPDK 19.05 | | DPDK 19.02 |
1152 | | | OFED 4.6-4 | | OFED 4.6-4 |
1153 | | | rdma-core 24 | | N/A |
1154 | | | ConnectX-5 | | ConnectX-5 |
1155 +-----------------------+-----------------+-----------------+
1156 | Mark / Flag | | DPDK 19.05 | | DPDK 18.11 |
1157 | | | OFED 4.6 | | OFED 4.5 |
1158 | | | rdma-core 24 | | rdma-core 23 |
1159 | | | ConnectX-5 | | ConnectX-4 |
1160 +-----------------------+-----------------+-----------------+
1161 | Port ID | | DPDK 19.05 | | N/A |
1162 | | | OFED 4.6 | | N/A |
1163 | | | rdma-core 24 | | N/A |
1164 | | | ConnectX-5 | | N/A |
1165 +-----------------------+-----------------+-----------------+
1166 | | VLAN | | DPDK 19.11 | | DPDK 19.11 |
1167 | | (of_pop_vlan / | | OFED 4.6-4 | | OFED 4.6-4 |
1168 | | of_push_vlan / | | ConnectX-5 | | ConnectX-5 |
1169 | | of_set_vlan_pcp / | | |
1170 | | of_set_vlan_vid) | | |
1171 +-----------------------+-----------------+-----------------+
1176 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
1177 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
1179 Since ``testpmd`` defaults to IP RSS mode and there is currently no
1180 command-line parameter to enable additional protocols (UDP and TCP as well
1181 as IP), the following commands must be entered from its CLI to get the same
1182 behavior as librte_pmd_mlx4::
1185 > port config all rss all
1191 This section demonstrates how to launch **testpmd** with Mellanox
1192 ConnectX-4/ConnectX-5/ConnectX-6/BlueField devices managed by librte_pmd_mlx5.
1194 #. Load the kernel modules::
1196 modprobe -a ib_uverbs mlx5_core mlx5_ib
1198 Alternatively if MLNX_OFED/MLNX_EN is fully installed, the following script
1201 /etc/init.d/openibd restart
1205 User space I/O kernel modules (uio and igb_uio) are not used and do
1206 not have to be loaded.
1208 #. Make sure Ethernet interfaces are in working order and linked to kernel
1209 verbs. Related sysfs entries should be present::
1211 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
1220 #. Optionally, retrieve their PCI bus addresses for whitelisting::
1223 for intf in eth2 eth3 eth4 eth5;
1225 (cd "/sys/class/net/${intf}/device/" && pwd -P);
1228 sed -n 's,.*/\(.*\),-w \1,p'
1237 #. Request huge pages::
1239 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
1241 #. Start testpmd with basic parameters::
1243 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
1248 EAL: PCI device 0000:05:00.0 on NUMA socket 0
1249 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1250 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
1251 PMD: librte_pmd_mlx5: 1 port(s) detected
1252 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
1253 EAL: PCI device 0000:05:00.1 on NUMA socket 0
1254 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1255 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
1256 PMD: librte_pmd_mlx5: 1 port(s) detected
1257 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
1258 EAL: PCI device 0000:06:00.0 on NUMA socket 0
1259 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1260 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
1261 PMD: librte_pmd_mlx5: 1 port(s) detected
1262 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
1263 EAL: PCI device 0000:06:00.1 on NUMA socket 0
1264 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
1265 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
1266 PMD: librte_pmd_mlx5: 1 port(s) detected
1267 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
1268 Interactive-mode selected
1269 Configuring Port 0 (socket 0)
1270 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
1271 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
1272 Port 0: E4:1D:2D:E7:0C:FE
1273 Configuring Port 1 (socket 0)
1274 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
1275 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
1276 Port 1: E4:1D:2D:E7:0C:FF
1277 Configuring Port 2 (socket 0)
1278 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
1279 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
1280 Port 2: E4:1D:2D:E7:0C:FA
1281 Configuring Port 3 (socket 0)
1282 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
1283 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
1284 Port 3: E4:1D:2D:E7:0C:FB
1285 Checking link statuses...
1286 Port 0 Link Up - speed 40000 Mbps - full-duplex
1287 Port 1 Link Up - speed 40000 Mbps - full-duplex
1288 Port 2 Link Up - speed 10000 Mbps - full-duplex
1289 Port 3 Link Up - speed 10000 Mbps - full-duplex