2 Copyright 2015 6WIND S.A.
3 Copyright 2015 Mellanox
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34 The MLX5 poll mode driver library (**librte_pmd_mlx5**) provides support
35 for **Mellanox ConnectX-4**, **Mellanox ConnectX-4 Lx** and **Mellanox
36 ConnectX-5** families of 10/25/40/50/100 Gb/s adapters as well as their
37 virtual functions (VF) in SR-IOV context.
39 Information and documentation about these adapters can be found on the
40 `Mellanox website <http://www.mellanox.com>`__. Help is also provided by the
41 `Mellanox community <http://community.mellanox.com/welcome>`__.
43 There is also a `section dedicated to this poll mode driver
44 <http://www.mellanox.com/page/products_dyn?product_family=209&mtag=pmd_for_dpdk>`__.
48 Due to external dependencies, this driver is disabled by default. It must
49 be enabled manually by setting ``CONFIG_RTE_LIBRTE_MLX5_PMD=y`` and
52 Implementation details
53 ----------------------
55 Besides its dependency on libibverbs (that implies libmlx5 and associated
56 kernel support), librte_pmd_mlx5 relies heavily on system calls for control
57 operations such as querying/updating the MTU and flow control parameters.
59 For security reasons and robustness, this driver only deals with virtual
60 memory addresses. The way resources allocations are handled by the kernel
61 combined with hardware specifications that allow it to handle virtual memory
62 addresses directly ensure that DPDK applications cannot access random
63 physical memory (or memory that does not belong to the current process).
65 This capability allows the PMD to coexist with kernel network interfaces
66 which remain functional, although they stop receiving unicast packets as
67 long as they share the same MAC address.
68 This means legacy linux control tools (for example: ethtool, ifconfig and
69 more) can operate on the same network interfaces that owned by the DPDK
72 Enabling librte_pmd_mlx5 causes DPDK applications to be linked against
78 - Multi arch support: x86_64, POWER8, ARMv8.
79 - Multiple TX and RX queues.
80 - Support for scattered TX and RX frames.
81 - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues.
82 - Several RSS hash keys, one for each flow type.
83 - Configurable RETA table.
84 - Support for multiple MAC addresses.
88 - RX CRC stripping configuration.
90 - Multicast promiscuous mode.
91 - Hardware checksum offloads.
92 - Flow director (RTE_FDIR_MODE_PERFECT, RTE_FDIR_MODE_PERFECT_MAC_VLAN and
96 - KVM and VMware ESX SR-IOV modes are supported.
97 - RSS hash result is supported.
99 - Hardware checksum TX offload for VXLAN and GRE.
101 - Statistics query including Basic, Extended and per queue.
107 - Inner RSS for VXLAN frames is not supported yet.
108 - Port statistics through software counters only. Flow statistics are
109 supported by hardware counters.
110 - Hardware checksum RX offloads for VXLAN inner header are not supported yet.
111 - Forked secondary process not supported.
112 - Flow pattern without any specific vlan will match for vlan packets as well:
114 When VLAN spec is not specified in the pattern, the matching rule will be created with VLAN as a wild card.
115 Meaning, the flow rule::
117 flow create 0 ingress pattern eth / vlan vid is 3 / ipv4 / end ...
119 Will only match vlan packets with vid=3. and the flow rules::
121 flow create 0 ingress pattern eth / ipv4 / end ...
125 flow create 0 ingress pattern eth / vlan / ipv4 / end ...
127 Will match any ipv4 packet (VLAN included).
129 - A multi segment packet must have less than 6 segments in case the Tx burst function
130 is set to multi-packet send or Enhanced multi-packet send. Otherwise it must have
131 less than 50 segments.
132 - Count action for RTE flow is only supported in Mellanox OFED 4.2.
133 - Flows with a VXLAN Network Identifier equal (or ends to be equal)
134 to 0 are not supported.
135 - VXLAN TSO and checksum offloads are not supported on VM.
143 These options can be modified in the ``.config`` file.
145 - ``CONFIG_RTE_LIBRTE_MLX5_PMD`` (default **n**)
147 Toggle compilation of librte_pmd_mlx5 itself.
149 - ``CONFIG_RTE_LIBRTE_MLX5_DEBUG`` (default **n**)
151 Toggle debugging code and stricter compilation flags. Enabling this option
152 adds additional run-time checks and debugging messages at the cost of
155 - ``CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE`` (default **8**)
157 Maximum number of cached memory pools (MPs) per TX queue. Each MP from
158 which buffers are to be transmitted must be associated to memory regions
159 (MRs). This is a slow operation that must be cached.
161 This value is always 1 for RX queues since they use a single MP.
163 Environment variables
164 ~~~~~~~~~~~~~~~~~~~~~
166 - ``MLX5_PMD_ENABLE_PADDING``
168 Enables HW packet padding in PCI bus transactions.
170 When packet size is cache aligned and CRC stripping is enabled, 4 fewer
171 bytes are written to the PCI bus. Enabling padding makes such packets
174 In cases where PCI bandwidth is the bottleneck, padding can improve
177 This is disabled by default since this can also decrease performance for
178 unaligned packet sizes.
180 - ``MLX5_SHUT_UP_BF``
182 Configures HW Tx doorbell register as IO-mapped.
184 By default, the HW Tx doorbell is configured as a write-combining register.
185 The register would be flushed to HW usually when the write-combining buffer
186 becomes full, but it depends on CPU design.
188 Except for vectorized Tx burst routines, a write memory barrier is enforced
189 after updating the register so that the update can be immediately visible to
192 When vectorized Tx burst is called, the barrier is set only if the burst size
193 is not aligned to MLX5_VPMD_TX_MAX_BURST. However, setting this environmental
194 variable will bring better latency even though the maximum throughput can
197 Run-time configuration
198 ~~~~~~~~~~~~~~~~~~~~~~
200 - librte_pmd_mlx5 brings kernel network interfaces up during initialization
201 because it is affected by their state. Forcing them down prevents packets
204 - **ethtool** operations on related kernel interfaces also affect the PMD.
206 - ``rxq_cqe_comp_en`` parameter [int]
208 A nonzero value enables the compression of CQE on RX side. This feature
209 allows to save PCI bandwidth and improve performance. Enabled by default.
213 - x86_64 with ConnectX-4, ConnectX-4 LX and ConnectX-5.
214 - POWER8 and ARMv8 with ConnectX-4 LX and ConnectX-5.
216 - ``txq_inline`` parameter [int]
218 Amount of data to be inlined during TX operations. Improves latency.
219 Can improve PPS performance when PCI back pressure is detected and may be
220 useful for scenarios involving heavy traffic on many queues.
222 Because additional software logic is necessary to handle this mode, this
223 option should be used with care, as it can lower performance when back
224 pressure is not expected.
226 - ``txqs_min_inline`` parameter [int]
228 Enable inline send only when the number of TX queues is greater or equal
231 This option should be used in combination with ``txq_inline`` above.
233 On ConnectX-4, ConnectX-4 LX and ConnectX-5 without Enhanced MPW:
235 - Disabled by default.
236 - In case ``txq_inline`` is set recommendation is 4.
238 On ConnectX-5 with Enhanced MPW:
240 - Set to 8 by default.
242 - ``txq_mpw_en`` parameter [int]
244 A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and
245 enhanced multi-packet send (Enhanced MPS) for ConnectX-5. MPS allows the
246 TX burst function to pack up multiple packets in a single descriptor
247 session in order to save PCI bandwidth and improve performance at the
248 cost of a slightly higher CPU usage. When ``txq_inline`` is set along
249 with ``txq_mpw_en``, TX burst function tries to copy entire packet data
250 on to TX descriptor instead of including pointer of packet only if there
251 is enough room remained in the descriptor. ``txq_inline`` sets
252 per-descriptor space for either pointers or inlined packets. In addition,
253 Enhanced MPS supports hybrid mode - mixing inlined packets and pointers
254 in the same descriptor.
256 This option cannot be used in conjunction with ``tso`` below. When ``tso``
257 is set, ``txq_mpw_en`` is disabled.
259 It is currently only supported on the ConnectX-4 Lx and ConnectX-5
260 families of adapters. Enabled by default.
262 - ``txq_mpw_hdr_dseg_en`` parameter [int]
264 A nonzero value enables including two pointers in the first block of TX
265 descriptor. This can be used to lessen CPU load for memory copy.
267 Effective only when Enhanced MPS is supported. Disabled by default.
269 - ``txq_max_inline_len`` parameter [int]
271 Maximum size of packet to be inlined. This limits the size of packet to
272 be inlined. If the size of a packet is larger than configured value, the
273 packet isn't inlined even though there's enough space remained in the
274 descriptor. Instead, the packet is included with pointer.
276 Effective only when Enhanced MPS is supported. The default value is 256.
278 - ``tso`` parameter [int]
280 A nonzero value enables hardware TSO.
281 When hardware TSO is enabled, packets marked with TCP segmentation
282 offload will be divided into segments by the hardware. Disabled by default.
284 - ``tx_vec_en`` parameter [int]
286 A nonzero value enables Tx vector on ConnectX-5 only NIC if the number of
287 global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS.
289 Enabled by default on ConnectX-5.
291 - ``rx_vec_en`` parameter [int]
293 A nonzero value enables Rx vector if the port is not configured in
294 multi-segment otherwise this parameter is ignored.
301 This driver relies on external libraries and kernel drivers for resources
302 allocations and initialization. The following dependencies are not part of
303 DPDK and must be installed separately:
307 User space Verbs framework used by librte_pmd_mlx5. This library provides
308 a generic interface between the kernel and low-level user space drivers
311 It allows slow and privileged operations (context initialization, hardware
312 resources allocations) to be managed by the kernel and fast operations to
313 never leave user space.
317 Low-level user space driver library for Mellanox ConnectX-4/ConnectX-5
318 devices, it is automatically loaded by libibverbs.
320 This library basically implements send/receive calls to the hardware
325 They provide the kernel-side Verbs API and low level device drivers that
326 manage actual hardware initialization and resources sharing with user
329 Unlike most other PMDs, these modules must remain loaded and bound to
332 - mlx5_core: hardware driver managing Mellanox ConnectX-4/ConnectX-5
333 devices and related Ethernet kernel network devices.
334 - mlx5_ib: InifiniBand device driver.
335 - ib_uverbs: user space driver for Verbs (entry point for libibverbs).
337 - **Firmware update**
339 Mellanox OFED releases include firmware updates for ConnectX-4/ConnectX-5
342 Because each release provides new features, these updates must be applied to
343 match the kernel modules and libraries they come with.
347 Both libraries are BSD and GPL licensed. Linux kernel modules are GPL
353 Either RDMA Core library with a recent enough Linux kernel release
354 (recommended) or Mellanox OFED, which provides compatibility with older
357 RMDA Core with Linux Kernel
358 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
360 - Minimal kernel version : v4.14 or the most recent 4.14-rc (see `Linux installation documentation`_)
361 - Minimal rdma-core version: v15+ commit 0c5f5765213a ("Merge pull request #227 from yishaih/tm")
362 (see `RDMA Core installation documentation`_)
364 .. _`Linux installation documentation`: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git/plain/Documentation/admin-guide/README.rst
365 .. _`RDMA Core installation documentation`: https://raw.githubusercontent.com/linux-rdma/rdma-core/master/README.md
370 - Mellanox OFED version: **4.2**.
373 - ConnectX-4: **12.21.1000** and above.
374 - ConnectX-4 Lx: **14.21.1000** and above.
375 - ConnectX-5: **16.21.1000** and above.
376 - ConnectX-5 Ex: **16.21.1000** and above.
378 While these libraries and kernel modules are available on OpenFabrics
379 Alliance's `website <https://www.openfabrics.org/>`__ and provided by package
380 managers on most distributions, this PMD requires Ethernet extensions that
381 may not be supported at the moment (this is a work in progress).
384 <http://www.mellanox.com/page/products_dyn?product_family=26&mtag=linux>`__
385 includes the necessary support and should be used in the meantime. For DPDK,
386 only libibverbs, libmlx5, mlnx-ofed-kernel packages and firmware updates are
387 required from that distribution.
391 Several versions of Mellanox OFED are available. Installing the version
392 this DPDK release was developed and tested against is strongly
393 recommended. Please check the `prerequisites`_.
398 * Mellanox(R) ConnectX(R)-4 10G MCX4111A-XCAT (1x10G)
399 * Mellanox(R) ConnectX(R)-4 10G MCX4121A-XCAT (2x10G)
400 * Mellanox(R) ConnectX(R)-4 25G MCX4111A-ACAT (1x25G)
401 * Mellanox(R) ConnectX(R)-4 25G MCX4121A-ACAT (2x25G)
402 * Mellanox(R) ConnectX(R)-4 40G MCX4131A-BCAT (1x40G)
403 * Mellanox(R) ConnectX(R)-4 40G MCX413A-BCAT (1x40G)
404 * Mellanox(R) ConnectX(R)-4 40G MCX415A-BCAT (1x40G)
405 * Mellanox(R) ConnectX(R)-4 50G MCX4131A-GCAT (1x50G)
406 * Mellanox(R) ConnectX(R)-4 50G MCX413A-GCAT (1x50G)
407 * Mellanox(R) ConnectX(R)-4 50G MCX414A-BCAT (2x50G)
408 * Mellanox(R) ConnectX(R)-4 50G MCX415A-GCAT (2x50G)
409 * Mellanox(R) ConnectX(R)-4 50G MCX416A-BCAT (2x50G)
410 * Mellanox(R) ConnectX(R)-4 50G MCX416A-GCAT (2x50G)
411 * Mellanox(R) ConnectX(R)-4 50G MCX415A-CCAT (1x100G)
412 * Mellanox(R) ConnectX(R)-4 100G MCX416A-CCAT (2x100G)
413 * Mellanox(R) ConnectX(R)-4 Lx 10G MCX4121A-XCAT (2x10G)
414 * Mellanox(R) ConnectX(R)-4 Lx 25G MCX4121A-ACAT (2x25G)
415 * Mellanox(R) ConnectX(R)-5 100G MCX556A-ECAT (2x100G)
416 * Mellanox(R) ConnectX(R)-5 Ex EN 100G MCX516A-CDAT (2x100G)
418 Quick Start Guide on OFED
419 -------------------------
421 1. Download latest Mellanox OFED. For more info check the `prerequisites`_.
424 2. Install the required libraries and kernel modules either by installing
425 only the required set, or by installing the entire Mellanox OFED:
427 .. code-block:: console
429 ./mlnxofedinstall --upstream-libs --dpdk
431 3. Verify the firmware is the correct one:
433 .. code-block:: console
437 4. Verify all ports links are set to Ethernet:
439 .. code-block:: console
441 mlxconfig -d <mst device> query | grep LINK_TYPE
445 Link types may have to be configured to Ethernet:
447 .. code-block:: console
449 mlxconfig -d <mst device> set LINK_TYPE_P1/2=1/2/3
451 * LINK_TYPE_P1=<1|2|3> , 1=Infiniband 2=Ethernet 3=VPI(auto-sense)
453 For hypervisors verify SR-IOV is enabled on the NIC:
455 .. code-block:: console
457 mlxconfig -d <mst device> query | grep SRIOV_EN
460 If needed, set enable the set the relevant fields:
462 .. code-block:: console
464 mlxconfig -d <mst device> set SRIOV_EN=1 NUM_OF_VFS=16
465 mlxfwreset -d <mst device> reset
467 5. Restart the driver:
469 .. code-block:: console
471 /etc/init.d/openibd restart
475 .. code-block:: console
477 service openibd restart
479 If link type was changed, firmware must be reset as well:
481 .. code-block:: console
483 mlxfwreset -d <mst device> reset
485 For hypervisors, after reset write the sysfs number of virtual functions
488 To dynamically instantiate a given number of virtual functions (VFs):
490 .. code-block:: console
492 echo [num_vfs] > /sys/class/infiniband/mlx5_0/device/sriov_numvfs
494 6. Compile DPDK and you are ready to go. See instructions on
495 :ref:`Development Kit Build System <Development_Kit_Build_System>`
500 1. Configure aggressive CQE Zipping for maximum performance:
502 .. code-block:: console
504 mlxconfig -d <mst device> s CQE_COMPRESSION=1
506 To set it back to the default CQE Zipping mode use:
508 .. code-block:: console
510 mlxconfig -d <mst device> s CQE_COMPRESSION=0
512 2. In case of virtualization:
514 - Make sure that hypervisor kernel is 3.16 or newer.
515 - Configure boot with ``iommu=pt``.
517 - Make sure to allocate a VM on huge pages.
518 - Make sure to set CPU pinning.
520 3. Use the CPU near local NUMA node to which the PCIe adapter is connected,
521 for better performance. For VMs, verify that the right CPU
522 and NUMA node are pinned according to the above. Run:
524 .. code-block:: console
528 to identify the NUMA node to which the PCIe adapter is connected.
530 4. If more than one adapter is used, and root complex capabilities allow
531 to put both adapters on the same NUMA node without PCI bandwidth degradation,
532 it is recommended to locate both adapters on the same NUMA node.
533 This in order to forward packets from one to the other without
534 NUMA performance penalty.
536 5. Disable pause frames:
538 .. code-block:: console
540 ethtool -A <netdev> rx off tx off
542 6. Verify IO non-posted prefetch is disabled by default. This can be checked
543 via the BIOS configuration. Please contact you server provider for more
544 information about the settings.
548 On some machines, depends on the machine integrator, it is beneficial
549 to set the PCI max read request parameter to 1K. This can be
550 done in the following way:
552 To query the read request size use:
554 .. code-block:: console
556 setpci -s <NIC PCI address> 68.w
558 If the output is different than 3XXX, set it by:
560 .. code-block:: console
562 setpci -s <NIC PCI address> 68.w=3XXX
564 The XXX can be different on different systems. Make sure to configure
565 according to the setpci output.
570 Compared to librte_pmd_mlx4 that implements a single RSS configuration per
571 port, librte_pmd_mlx5 supports per-protocol RSS configuration.
573 Since ``testpmd`` defaults to IP RSS mode and there is currently no
574 command-line parameter to enable additional protocols (UDP and TCP as well
575 as IP), the following commands must be entered from its CLI to get the same
576 behavior as librte_pmd_mlx4:
578 .. code-block:: console
581 > port config all rss all
587 This section demonstrates how to launch **testpmd** with Mellanox
588 ConnectX-4/ConnectX-5 devices managed by librte_pmd_mlx5.
590 #. Load the kernel modules:
592 .. code-block:: console
594 modprobe -a ib_uverbs mlx5_core mlx5_ib
596 Alternatively if MLNX_OFED is fully installed, the following script can
599 .. code-block:: console
601 /etc/init.d/openibd restart
605 User space I/O kernel modules (uio and igb_uio) are not used and do
606 not have to be loaded.
608 #. Make sure Ethernet interfaces are in working order and linked to kernel
609 verbs. Related sysfs entries should be present:
611 .. code-block:: console
613 ls -d /sys/class/net/*/device/infiniband_verbs/uverbs* | cut -d / -f 5
617 .. code-block:: console
624 #. Optionally, retrieve their PCI bus addresses for whitelisting:
626 .. code-block:: console
629 for intf in eth2 eth3 eth4 eth5;
631 (cd "/sys/class/net/${intf}/device/" && pwd -P);
634 sed -n 's,.*/\(.*\),-w \1,p'
638 .. code-block:: console
645 #. Request huge pages:
647 .. code-block:: console
649 echo 1024 > /sys/kernel/mm/hugepages/hugepages-2048kB/nr_hugepages/nr_hugepages
651 #. Start testpmd with basic parameters:
653 .. code-block:: console
655 testpmd -l 8-15 -n 4 -w 05:00.0 -w 05:00.1 -w 06:00.0 -w 06:00.1 -- --rxq=2 --txq=2 -i
659 .. code-block:: console
662 EAL: PCI device 0000:05:00.0 on NUMA socket 0
663 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
664 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_0" (VF: false)
665 PMD: librte_pmd_mlx5: 1 port(s) detected
666 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fe
667 EAL: PCI device 0000:05:00.1 on NUMA socket 0
668 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
669 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_1" (VF: false)
670 PMD: librte_pmd_mlx5: 1 port(s) detected
671 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:ff
672 EAL: PCI device 0000:06:00.0 on NUMA socket 0
673 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
674 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_2" (VF: false)
675 PMD: librte_pmd_mlx5: 1 port(s) detected
676 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fa
677 EAL: PCI device 0000:06:00.1 on NUMA socket 0
678 EAL: probe driver: 15b3:1013 librte_pmd_mlx5
679 PMD: librte_pmd_mlx5: PCI information matches, using device "mlx5_3" (VF: false)
680 PMD: librte_pmd_mlx5: 1 port(s) detected
681 PMD: librte_pmd_mlx5: port 1 MAC address is e4:1d:2d:e7:0c:fb
682 Interactive-mode selected
683 Configuring Port 0 (socket 0)
684 PMD: librte_pmd_mlx5: 0x8cba80: TX queues number update: 0 -> 2
685 PMD: librte_pmd_mlx5: 0x8cba80: RX queues number update: 0 -> 2
686 Port 0: E4:1D:2D:E7:0C:FE
687 Configuring Port 1 (socket 0)
688 PMD: librte_pmd_mlx5: 0x8ccac8: TX queues number update: 0 -> 2
689 PMD: librte_pmd_mlx5: 0x8ccac8: RX queues number update: 0 -> 2
690 Port 1: E4:1D:2D:E7:0C:FF
691 Configuring Port 2 (socket 0)
692 PMD: librte_pmd_mlx5: 0x8cdb10: TX queues number update: 0 -> 2
693 PMD: librte_pmd_mlx5: 0x8cdb10: RX queues number update: 0 -> 2
694 Port 2: E4:1D:2D:E7:0C:FA
695 Configuring Port 3 (socket 0)
696 PMD: librte_pmd_mlx5: 0x8ceb58: TX queues number update: 0 -> 2
697 PMD: librte_pmd_mlx5: 0x8ceb58: RX queues number update: 0 -> 2
698 Port 3: E4:1D:2D:E7:0C:FB
699 Checking link statuses...
700 Port 0 Link Up - speed 40000 Mbps - full-duplex
701 Port 1 Link Up - speed 40000 Mbps - full-duplex
702 Port 2 Link Up - speed 10000 Mbps - full-duplex
703 Port 3 Link Up - speed 10000 Mbps - full-duplex