1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2021 Marvell.
9 #define ROC_SE_MAJOR_OP_FC 0x33
10 #define ROC_SE_FC_MINOR_OP_ENCRYPT 0x0
11 #define ROC_SE_FC_MINOR_OP_DECRYPT 0x1
12 #define ROC_SE_FC_MINOR_OP_HMAC_FIRST 0x10
14 #define ROC_SE_MAJOR_OP_HASH 0x34
15 #define ROC_SE_MAJOR_OP_HMAC 0x35
16 #define ROC_SE_MAJOR_OP_ZUC_SNOW3G 0x37
17 #define ROC_SE_MAJOR_OP_KASUMI 0x38
18 #define ROC_SE_MAJOR_OP_MISC 0x01
20 #define ROC_SE_MAX_AAD_SIZE 64
21 #define ROC_SE_MAX_MAC_LEN 64
23 #define ROC_SE_OFF_CTRL_LEN 8
24 #define ROC_SE_DMA_MODE (1 << 7)
26 #define ROC_SE_MAX_SG_IN_OUT_CNT 32
27 #define ROC_SE_MAX_SG_CNT (ROC_SE_MAX_SG_IN_OUT_CNT / 2)
29 #define ROC_SE_SG_LIST_HDR_SIZE (8u)
30 #define ROC_SE_SG_ENTRY_SIZE sizeof(struct roc_se_sglist_comp)
32 #define ROC_SE_ZS_EA 0x1
33 #define ROC_SE_ZS_IA 0x2
34 #define ROC_SE_K_F8 0x4
35 #define ROC_SE_K_F9 0x8
37 #define ROC_SE_FC_GEN 0x1
38 #define ROC_SE_PDCP 0x2
39 #define ROC_SE_KASUMI 0x3
40 #define ROC_SE_HASH_HMAC 0x4
42 #define ROC_SE_OP_CIPHER_ENCRYPT 0x1
43 #define ROC_SE_OP_CIPHER_DECRYPT 0x2
44 #define ROC_SE_OP_CIPHER_MASK \
45 (ROC_SE_OP_CIPHER_ENCRYPT | ROC_SE_OP_CIPHER_DECRYPT)
47 #define ROC_SE_OP_AUTH_VERIFY 0x4
48 #define ROC_SE_OP_AUTH_GENERATE 0x8
49 #define ROC_SE_OP_AUTH_MASK \
50 (ROC_SE_OP_AUTH_VERIFY | ROC_SE_OP_AUTH_GENERATE)
52 #define ROC_SE_OP_ENCODE (ROC_SE_OP_CIPHER_ENCRYPT | ROC_SE_OP_AUTH_GENERATE)
53 #define ROC_SE_OP_DECODE (ROC_SE_OP_CIPHER_DECRYPT | ROC_SE_OP_AUTH_VERIFY)
55 #define ROC_SE_ALWAYS_USE_SEPARATE_BUF
58 * Parameters for Flexi Crypto
61 #define ROC_SE_VALID_AAD_BUF 0x01
62 #define ROC_SE_VALID_MAC_BUF 0x02
63 #define ROC_SE_VALID_IV_BUF 0x04
64 #define ROC_SE_SINGLE_BUF_INPLACE 0x08
65 #define ROC_SE_SINGLE_BUF_HEADROOM 0x10
67 #define ROC_SE_ENCR_IV_OFFSET(__d_offs) (((__d_offs) >> 32) & 0xffff)
68 #define ROC_SE_ENCR_OFFSET(__d_offs) (((__d_offs) >> 16) & 0xffff)
69 #define ROC_SE_AUTH_OFFSET(__d_offs) ((__d_offs) & 0xffff)
70 #define ROC_SE_ENCR_DLEN(__d_lens) ((__d_lens) >> 32)
71 #define ROC_SE_AUTH_DLEN(__d_lens) ((__d_lens) & 0xffffffff)
73 typedef enum { ROC_SE_FROM_CTX = 0, ROC_SE_FROM_DPTR = 1 } roc_se_input_type;
78 ROC_SE_SHA2_SHA224 = 3,
79 ROC_SE_SHA2_SHA256 = 4,
80 ROC_SE_SHA2_SHA384 = 5,
81 ROC_SE_SHA2_SHA512 = 6,
84 ROC_SE_SHA3_SHA224 = 10,
85 ROC_SE_SHA3_SHA256 = 11,
86 ROC_SE_SHA3_SHA384 = 12,
87 ROC_SE_SHA3_SHA512 = 13,
88 ROC_SE_SHA3_SHAKE256 = 14,
89 ROC_SE_SHA3_SHAKE512 = 15,
91 /* These are only for software use */
92 ROC_SE_ZUC_EIA3 = 0x90,
93 ROC_SE_SNOW3G_UIA2 = 0x91,
94 ROC_SE_AES_CMAC_EIA2 = 0x92,
95 ROC_SE_KASUMI_F9_CBC = 0x93,
96 ROC_SE_KASUMI_F9_ECB = 0x94,
100 /* To support passthrough */
101 ROC_SE_PASSTHROUGH = 0x0,
103 * These are defined by MC for Flexi crypto
104 * for field of 4 bits
106 ROC_SE_DES3_CBC = 0x1,
107 ROC_SE_DES3_ECB = 0x2,
108 ROC_SE_AES_CBC = 0x3,
109 ROC_SE_AES_ECB = 0x4,
110 ROC_SE_AES_CFB = 0x5,
111 ROC_SE_AES_CTR = 0x6,
112 ROC_SE_AES_GCM = 0x7,
113 ROC_SE_AES_XTS = 0x8,
114 ROC_SE_CHACHA20 = 0x9,
116 /* These are only for software use */
117 ROC_SE_ZUC_EEA3 = 0x90,
118 ROC_SE_SNOW3G_UEA2 = 0x91,
119 ROC_SE_AES_CTR_EEA2 = 0x92,
120 ROC_SE_KASUMI_F8_CBC = 0x93,
121 ROC_SE_KASUMI_F8_ECB = 0x94,
122 } roc_se_cipher_type;
125 /* Microcode errors */
126 ROC_SE_NO_ERR = 0x00,
127 ROC_SE_ERR_OPCODE_UNSUPPORTED = 0x01,
130 ROC_SE_ERR_SCATTER_GATHER_WRITE_LENGTH = 0x02,
131 ROC_SE_ERR_SCATTER_GATHER_LIST = 0x03,
132 ROC_SE_ERR_SCATTER_GATHER_NOT_SUPPORTED = 0x04,
135 ROC_SE_ERR_GC_LENGTH_INVALID = 0x41,
136 ROC_SE_ERR_GC_RANDOM_LEN_INVALID = 0x42,
137 ROC_SE_ERR_GC_DATA_LEN_INVALID = 0x43,
138 ROC_SE_ERR_GC_DRBG_TYPE_INVALID = 0x44,
139 ROC_SE_ERR_GC_CTX_LEN_INVALID = 0x45,
140 ROC_SE_ERR_GC_CIPHER_UNSUPPORTED = 0x46,
141 ROC_SE_ERR_GC_AUTH_UNSUPPORTED = 0x47,
142 ROC_SE_ERR_GC_OFFSET_INVALID = 0x48,
143 ROC_SE_ERR_GC_HASH_MODE_UNSUPPORTED = 0x49,
144 ROC_SE_ERR_GC_DRBG_ENTROPY_LEN_INVALID = 0x4a,
145 ROC_SE_ERR_GC_DRBG_ADDNL_LEN_INVALID = 0x4b,
146 ROC_SE_ERR_GC_ICV_MISCOMPARE = 0x4c,
147 ROC_SE_ERR_GC_DATA_UNALIGNED = 0x4d,
150 ROC_SE_ERR_REQ_PENDING = 0xfe,
151 ROC_SE_ERR_REQ_TIMEOUT = 0xff,
156 ROC_SE_AES_128_BIT = 0x1,
157 ROC_SE_AES_192_BIT = 0x2,
158 ROC_SE_AES_256_BIT = 0x3
161 struct roc_se_sglist_comp {
171 struct roc_se_enc_context {
172 uint64_t iv_source : 1;
173 uint64_t aes_key : 2;
174 uint64_t rsvd_60 : 1;
175 uint64_t enc_cipher : 4;
176 uint64_t auth_input_type : 1;
177 uint64_t rsvd_52_54 : 3;
178 uint64_t hash_type : 4;
179 uint64_t mac_len : 8;
180 uint64_t rsvd_39_0 : 40;
181 uint8_t encr_key[32];
185 struct roc_se_hmac_context {
190 struct roc_se_context {
191 struct roc_se_enc_context enc;
192 struct roc_se_hmac_context hmac;
195 struct roc_se_zuc_snow3g_ctx {
196 uint8_t encr_auth_iv[16];
198 uint8_t zuc_const[32];
201 struct roc_se_kasumi_ctx {
207 struct roc_se_buf_ptr {
214 struct roc_se_iov_ptr {
216 struct roc_se_buf_ptr bufs[0];
219 struct roc_se_fc_params {
222 struct roc_se_buf_ptr bufs[1];
224 struct roc_se_iov_ptr *src_iov;
225 struct roc_se_iov_ptr *dst_iov;
230 struct roc_se_buf_ptr meta_buf;
231 struct roc_se_buf_ptr ctx_buf;
235 struct roc_se_buf_ptr aad_buf __plt_cache_aligned;
236 struct roc_se_buf_ptr mac_buf;
239 PLT_STATIC_ASSERT((offsetof(struct roc_se_fc_params, aad_buf) % 128) == 0);
241 #define ROC_SE_PDCP_ALG_TYPE_ZUC 0
242 #define ROC_SE_PDCP_ALG_TYPE_SNOW3G 1
243 #define ROC_SE_PDCP_ALG_TYPE_AES_CTR 2
246 /* Below fields are accessed by sw */
247 uint64_t enc_cipher : 8;
248 uint64_t hash_type : 8;
249 uint64_t mac_len : 8;
250 uint64_t auth_key_len : 8;
251 uint64_t fc_type : 4;
253 uint64_t zsk_flags : 3;
255 uint64_t pdcp_alg_type : 2;
257 union cpt_inst_w4 template_w4;
258 /* Below fields are accessed by hardware */
260 struct roc_se_context fctx;
261 struct roc_se_zuc_snow3g_ctx zs_ctx;
262 struct roc_se_kasumi_ctx k_ctx;
264 uint8_t auth_key[1024];
267 int __roc_api roc_se_auth_key_set(struct roc_se_ctx *se_ctx,
268 roc_se_auth_type type, const uint8_t *key,
269 uint16_t key_len, uint16_t mac_len);
271 int __roc_api roc_se_ciph_key_set(struct roc_se_ctx *se_ctx,
272 roc_se_cipher_type type, const uint8_t *key,
273 uint16_t key_len, uint8_t *salt);
275 #endif /* __ROC_SE_H__ */