1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
10 #include <rte_atomic.h>
11 #include <rte_cycles.h>
13 #include "otx2_mbox.h"
15 #define RVU_AF_AFPF_MBOX0 (0x02000)
16 #define RVU_AF_AFPF_MBOX1 (0x02008)
18 #define RVU_PF_PFAF_MBOX0 (0xC00)
19 #define RVU_PF_PFAF_MBOX1 (0xC08)
21 #define RVU_PF_VFX_PFVF_MBOX0 (0x0000)
22 #define RVU_PF_VFX_PFVF_MBOX1 (0x0008)
24 #define RVU_VF_VFPF_MBOX0 (0x0000)
25 #define RVU_VF_VFPF_MBOX1 (0x0008)
28 otx2_mbox_fini(struct otx2_mbox *mbox)
37 otx2_mbox_reset(struct otx2_mbox *mbox, int devid)
39 struct otx2_mbox_dev *mdev = &mbox->dev[devid];
40 struct mbox_hdr *tx_hdr =
41 (struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->tx_start);
42 struct mbox_hdr *rx_hdr =
43 (struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->rx_start);
45 rte_spinlock_lock(&mdev->mbox_lock);
52 rte_spinlock_unlock(&mdev->mbox_lock);
56 otx2_mbox_init(struct otx2_mbox *mbox, uintptr_t hwbase,
57 uintptr_t reg_base, int direction, int ndevs)
59 struct otx2_mbox_dev *mdev;
62 mbox->reg_base = reg_base;
63 mbox->hwbase = hwbase;
68 mbox->tx_start = MBOX_DOWN_TX_START;
69 mbox->rx_start = MBOX_DOWN_RX_START;
70 mbox->tx_size = MBOX_DOWN_TX_SIZE;
71 mbox->rx_size = MBOX_DOWN_RX_SIZE;
75 mbox->tx_start = MBOX_DOWN_RX_START;
76 mbox->rx_start = MBOX_DOWN_TX_START;
77 mbox->tx_size = MBOX_DOWN_RX_SIZE;
78 mbox->rx_size = MBOX_DOWN_TX_SIZE;
80 case MBOX_DIR_AFPF_UP:
81 case MBOX_DIR_PFVF_UP:
82 mbox->tx_start = MBOX_UP_TX_START;
83 mbox->rx_start = MBOX_UP_RX_START;
84 mbox->tx_size = MBOX_UP_TX_SIZE;
85 mbox->rx_size = MBOX_UP_RX_SIZE;
87 case MBOX_DIR_PFAF_UP:
88 case MBOX_DIR_VFPF_UP:
89 mbox->tx_start = MBOX_UP_RX_START;
90 mbox->rx_start = MBOX_UP_TX_START;
91 mbox->tx_size = MBOX_UP_RX_SIZE;
92 mbox->rx_size = MBOX_UP_TX_SIZE;
100 case MBOX_DIR_AFPF_UP:
101 mbox->trigger = RVU_AF_AFPF_MBOX0;
105 case MBOX_DIR_PFAF_UP:
106 mbox->trigger = RVU_PF_PFAF_MBOX1;
110 case MBOX_DIR_PFVF_UP:
111 mbox->trigger = RVU_PF_VFX_PFVF_MBOX0;
115 case MBOX_DIR_VFPF_UP:
116 mbox->trigger = RVU_VF_VFPF_MBOX1;
123 mbox->dev = malloc(ndevs * sizeof(struct otx2_mbox_dev));
125 otx2_mbox_fini(mbox);
129 for (devid = 0; devid < ndevs; devid++) {
130 mdev = &mbox->dev[devid];
131 mdev->mbase = (void *)(mbox->hwbase + (devid * MBOX_SIZE));
132 rte_spinlock_init(&mdev->mbox_lock);
133 /* Init header to reset value */
134 otx2_mbox_reset(mbox, devid);