1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0) */
2 /* Copyright (C) 2014-2017 aQuantia Corporation. */
4 /* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
11 #define BIT(x) (1UL << (x))
12 #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
14 /* Hardware tx descriptor */
30 } __attribute__((__packed__));
33 } __attribute__((__packed__));
35 /* Hardware tx context descriptor */
54 } __attribute__((__packed__));
55 } __attribute__((__packed__));
57 enum aq_tx_desc_type {
58 tx_desc_type_desc = 1,
67 tx_desc_cmd_lso = 0x10,
68 tx_desc_cmd_wb = 0x20,
72 /* Hardware rx descriptor */
76 } __attribute__((__packed__));
78 /* Hardware rx descriptor writeback */
79 struct hw_atl_rxd_wb_s {
92 } __attribute__((__packed__));
94 struct hw_atl_stats_s {
110 } __attribute__((__packed__));
120 } __attribute__((__packed__));
122 struct hw_aq_atl_utils_fw_rpc {
149 u32 next_wol_pattern_offset;
153 u8 ipv4_source_address[4];
154 u8 ipv4_dest_address[4];
155 u16 tcp_source_port_number;
156 u16 tcp_dest_port_number;
157 } ipv4_tcp_syn_parameters;
161 u8 ipv6_source_address[16];
162 u8 ipv6_dest_address[16];
163 u16 tcp_source_port_number;
164 u16 tcp_dest_port_number;
165 } ipv6_tcp_syn_parameters;
169 } eapol_request_id_message_parameters;
177 } wol_bit_map_pattern;
180 } wol_magic_packet_pattern;
188 } msg_msm_pfc_quantas;
194 u32 aq_pm_wol_reason_arp_v4_pkt : 1;
195 u32 aq_pm_wol_reason_ipv4_ping_pkt : 1;
196 u32 aq_pm_wol_reason_ipv6_ns_pkt : 1;
197 u32 aq_pm_wol_reason_ipv6_ping_pkt : 1;
198 u32 aq_pm_wol_reason_link_up : 1;
199 u32 aq_pm_wol_reason_link_down : 1;
200 u32 aq_pm_wol_reason_maximum : 1;
210 u32 protocol_offload_type;
211 u32 protocol_offload_id;
212 u32 next_protocol_offload_offset;
217 u8 remote_ipv4_addr[4];
218 u8 host_ipv4_addr[4];
229 } __attribute__((__packed__));
231 struct hw_aq_atl_utils_mbox_header {
235 } __attribute__((__packed__));
243 u32 cable_diag_data[4];
247 } __attribute__((__packed__));
249 struct hw_aq_atl_utils_mbox {
250 struct hw_aq_atl_utils_mbox_header header;
251 struct hw_atl_stats_s stats;
252 struct hw_aq_info info;
253 } __attribute__((__packed__));
256 typedef u16 in_port_t;
257 typedef u32 ip4_addr_t;
259 typedef short int16_t;
260 typedef u32 fw_offset_t;
264 } __attribute__((__packed__));
266 struct offload_ka_v4 {
268 in_port_t local_port;
269 in_port_t remote_port;
270 u8 remote_mac_addr[6];
275 ip4_addr_t remote_ip;
276 } __attribute__((__packed__));
278 struct offload_ka_v6 {
280 in_port_t local_port;
281 in_port_t remote_port;
282 u8 remote_mac_addr[6];
286 struct ip6_addr local_ip;
287 struct ip6_addr remote_ip;
288 } __attribute__((__packed__));
290 struct offload_ip_info {
291 u8 v4_local_addr_count;
293 u8 v6_local_addr_count;
296 fw_offset_t v4_prefix;
298 fw_offset_t v6_prefix;
299 } __attribute__((__packed__));
301 struct offload_port_info {
304 fw_offset_t udp_port;
305 fw_offset_t tcp_port;
306 } __attribute__((__packed__));
308 struct offload_ka_info {
315 } __attribute__((__packed__));
317 struct offload_rr_info {
322 } __attribute__((__packed__));
324 struct offload_info {
325 u32 version; // current version is 0x00000000
326 u32 len; // The whole structure length
327 // including the variable-size buf
328 u8 mac_addr[6]; // 8 bytes to keep alignment. Only
329 // first 6 meaningful.
333 struct offload_ip_info ips;
334 struct offload_port_info ports;
335 struct offload_ka_info kas;
336 struct offload_rr_info rrs;
338 } __attribute__((__packed__));
340 struct smbus_read_request {
341 u32 offset; /* not used */
345 } __attribute__((__packed__));
347 struct smbus_write_request {
348 u32 offset; /* not used */
352 } __attribute__((__packed__));
354 enum macsec_msg_type {
356 macsec_add_rx_sc_msg,
357 macsec_add_tx_sc_msg,
358 macsec_add_rx_sa_msg,
359 macsec_add_tx_sa_msg,
360 macsec_get_stats_msg,
365 uint32_t egress_threshold;
366 uint32_t ingress_threshold;
367 uint32_t interrupts_enabled;
368 } __attribute__((__packed__));
372 uint32_t pi; /* Port identifier */
373 uint32_t sci[2]; /* Secure Channel identifier */
374 uint32_t sci_mask; /* 1: enable comparison of SCI, 0: don't care */
378 uint32_t sa_mask; /* 0: ignore mac_sa */
380 uint32_t da_mask; /* 0: ignore mac_da */
381 uint32_t validate_frames; /* 0: strict, 1:check, 2:disabled */
382 uint32_t replay_protect; /* 1: enabled, 0:disabled */
383 uint32_t anti_replay_window; /* default 0 */
384 /* 1: auto_rollover enabled (when SA next_pn is saturated */
386 } __attribute__((__packed__));
390 uint32_t pi; /* Port identifier */
391 uint32_t sci[2]; /* Secure Channel identifier */
392 uint32_t sci_mask; /* 1: enable comparison of SCI, 0: don't care */
393 uint32_t tci; /* TCI value, used if packet is not explicitly tagged */
396 uint32_t sa_mask; /* 0: ignore mac_sa */
398 uint32_t da_mask; /* 0: ignore mac_da */
400 uint32_t curr_an; /* SA index which currently used */
401 } __attribute__((__packed__));
406 uint32_t key[4]; /* 128 bit key */
407 } __attribute__((__packed__));
412 uint32_t key[4]; /* 128 bit key */
413 } __attribute__((__packed__));
416 uint32_t version_only;
417 uint32_t ingress_sa_index;
418 uint32_t egress_sa_index;
419 uint32_t egress_sc_index;
420 } __attribute__((__packed__));
422 struct macsec_stats {
423 uint32_t api_version;
424 /* Ingress Common Counters */
425 uint64_t in_ctl_pkts;
426 uint64_t in_tagged_miss_pkts;
427 uint64_t in_untagged_miss_pkts;
428 uint64_t in_notag_pkts;
429 uint64_t in_untagged_pkts;
430 uint64_t in_bad_tag_pkts;
431 uint64_t in_no_sci_pkts;
432 uint64_t in_unknown_sci_pkts;
433 uint64_t in_ctrl_prt_pass_pkts;
434 uint64_t in_unctrl_prt_pass_pkts;
435 uint64_t in_ctrl_prt_fail_pkts;
436 uint64_t in_unctrl_prt_fail_pkts;
437 uint64_t in_too_long_pkts;
438 uint64_t in_igpoc_ctl_pkts;
439 uint64_t in_ecc_error_pkts;
440 uint64_t in_unctrl_hit_drop_redir;
442 /* Egress Common Counters */
443 uint64_t out_ctl_pkts;
444 uint64_t out_unknown_sa_pkts;
445 uint64_t out_untagged_pkts;
446 uint64_t out_too_long;
447 uint64_t out_ecc_error_pkts;
448 uint64_t out_unctrl_hit_drop_redir;
450 /* Ingress SA Counters */
451 uint64_t in_untagged_hit_pkts;
452 uint64_t in_ctrl_hit_drop_redir_pkts;
453 uint64_t in_not_using_sa;
454 uint64_t in_unused_sa;
455 uint64_t in_not_valid_pkts;
456 uint64_t in_invalid_pkts;
458 uint64_t in_late_pkts;
459 uint64_t in_delayed_pkts;
460 uint64_t in_unchecked_pkts;
461 uint64_t in_validated_octets;
462 uint64_t in_decrypted_octets;
464 /* Egress SA Counters */
465 uint64_t out_sa_hit_drop_redirect;
466 uint64_t out_sa_protected2_pkts;
467 uint64_t out_sa_protected_pkts;
468 uint64_t out_sa_encrypted_pkts;
470 /* Egress SC Counters */
471 uint64_t out_sc_protected_pkts;
472 uint64_t out_sc_encrypted_pkts;
473 uint64_t out_sc_protected_octets;
474 uint64_t out_sc_encrypted_octets;
476 /* SA Counters expiration info */
477 uint32_t egress_threshold_expired;
478 uint32_t ingress_threshold_expired;
479 uint32_t egress_expired;
480 uint32_t ingress_expired;
481 } __attribute__((__packed__));
483 struct macsec_msg_fw_request {
484 uint32_t offset; /* not used */
488 struct macsec_cfg cfg;
489 struct add_rx_sc rxsc;
490 struct add_tx_sc txsc;
491 struct add_rx_sa rxsa;
492 struct add_tx_sa txsa;
493 struct get_stats stats;
495 } __attribute__((__packed__));
497 struct macsec_msg_fw_response {
499 struct macsec_stats stats;
500 } __attribute__((__packed__));
502 #define HAL_ATLANTIC_UTILS_CHIP_MIPS 0x00000001U
503 #define HAL_ATLANTIC_UTILS_CHIP_TPO2 0x00000002U
504 #define HAL_ATLANTIC_UTILS_CHIP_RPF2 0x00000004U
505 #define HAL_ATLANTIC_UTILS_CHIP_MPI_AQ 0x00000010U
506 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_A0 0x01000000U
507 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B0 0x02000000U
508 #define HAL_ATLANTIC_UTILS_CHIP_REVISION_B1 0x04000000U
511 #define IS_CHIP_FEATURE(_F_) (HAL_ATLANTIC_UTILS_CHIP_##_F_ & \
514 enum hal_atl_utils_fw_state_e {
521 #define HAL_ATLANTIC_RATE_10G BIT(0)
522 #define HAL_ATLANTIC_RATE_5G BIT(1)
523 #define HAL_ATLANTIC_RATE_5GSR BIT(2)
524 #define HAL_ATLANTIC_RATE_2GS BIT(3)
525 #define HAL_ATLANTIC_RATE_1G BIT(4)
526 #define HAL_ATLANTIC_RATE_100M BIT(5)
527 #define HAL_ATLANTIC_RATE_INVALID BIT(6)
529 #define HAL_ATLANTIC_UTILS_FW_MSG_PING 1U
530 #define HAL_ATLANTIC_UTILS_FW_MSG_ARP 2U
531 #define HAL_ATLANTIC_UTILS_FW_MSG_INJECT 3U
532 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_ADD 4U
533 #define HAL_ATLANTIC_UTILS_FW_MSG_WOL_DEL 5U
534 #define HAL_ATLANTIC_UTILS_FW_MSG_ENABLE_WAKEUP 6U
535 #define HAL_ATLANTIC_UTILS_FW_MSG_MSM_PFC 7U
536 #define HAL_ATLANTIC_UTILS_FW_MSG_PROVISIONING 8U
537 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_ADD 9U
538 #define HAL_ATLANTIC_UTILS_FW_MSG_OFFLOAD_DEL 10U
539 #define HAL_ATLANTIC_UTILS_FW_MSG_CABLE_DIAG 13U // 0xd
541 #define SMBUS_DEVICE_ID 0x50
543 enum hw_atl_fw2x_caps_lo {
544 CAPS_LO_10BASET_HD = 0x00,
546 CAPS_LO_100BASETX_HD,
547 CAPS_LO_100BASET4_HD,
548 CAPS_LO_100BASET2_HD,
549 CAPS_LO_100BASETX_FD,
550 CAPS_LO_100BASET2_FD,
551 CAPS_LO_1000BASET_HD,
552 CAPS_LO_1000BASET_FD,
553 CAPS_LO_2P5GBASET_FD,
562 enum hw_atl_fw2x_caps_hi {
563 CAPS_HI_RESERVED1 = 0x00,
567 CAPS_HI_ASYMMETRIC_PAUSE,
568 CAPS_HI_100BASETX_EEE,
571 CAPS_HI_1000BASET_FD_EEE,
572 CAPS_HI_2P5GBASET_FD_EEE,
573 CAPS_HI_5GBASET_FD_EEE,
574 CAPS_HI_10GBASET_FD_EEE,
584 CAPS_HI_MEDIA_DETECT,
589 CAPS_HI_EXT_LOOPBACK,
590 CAPS_HI_INT_LOOPBACK,
594 CAPS_HI_TRANSACTION_ID,
597 enum hw_atl_fw2x_rate {
598 FW2X_RATE_100M = BIT(CAPS_LO_100BASETX_FD),
599 FW2X_RATE_1G = BIT(CAPS_LO_1000BASET_FD),
600 FW2X_RATE_2G5 = BIT(CAPS_LO_2P5GBASET_FD),
601 FW2X_RATE_5G = BIT(CAPS_LO_5GBASET_FD),
602 FW2X_RATE_10G = BIT(CAPS_LO_10GBASET_FD),
607 struct aq_hw_link_status_s;
609 int hw_atl_utils_initfw(struct aq_hw_s *self, const struct aq_fw_ops **fw_ops);
611 int hw_atl_utils_soft_reset(struct aq_hw_s *self);
613 void hw_atl_utils_hw_chip_features_init(struct aq_hw_s *self, u32 *p);
615 int hw_atl_utils_mpi_read_mbox(struct aq_hw_s *self,
616 struct hw_aq_atl_utils_mbox_header *pmbox);
618 void hw_atl_utils_mpi_read_stats(struct aq_hw_s *self,
619 struct hw_aq_atl_utils_mbox *pmbox);
621 void hw_atl_utils_mpi_set(struct aq_hw_s *self,
622 enum hal_atl_utils_fw_state_e state,
625 int hw_atl_utils_mpi_get_link_status(struct aq_hw_s *self);
627 unsigned int hw_atl_utils_mbps_2_speed_index(unsigned int mbps);
629 unsigned int hw_atl_utils_hw_get_reg_length(void);
631 int hw_atl_utils_hw_get_regs(struct aq_hw_s *self,
634 int hw_atl_utils_hw_set_power(struct aq_hw_s *self,
635 unsigned int power_state);
637 int hw_atl_utils_hw_deinit(struct aq_hw_s *self);
639 int hw_atl_utils_get_fw_version(struct aq_hw_s *self, u32 *fw_version);
641 int hw_atl_utils_update_stats(struct aq_hw_s *self);
643 struct aq_stats_s *hw_atl_utils_get_hw_stats(struct aq_hw_s *self);
645 int hw_atl_utils_fw_downld_dwords(struct aq_hw_s *self, u32 a,
648 int hw_atl_utils_fw_upload_dwords(struct aq_hw_s *self, u32 a, u32 *p,
651 int hw_atl_utils_fw_set_wol(struct aq_hw_s *self, bool wol_enabled, u8 *mac);
653 int hw_atl_utils_fw_rpc_call(struct aq_hw_s *self, unsigned int rpc_size);
655 int hw_atl_utils_fw_rpc_wait(struct aq_hw_s *self,
656 struct hw_aq_atl_utils_fw_rpc **rpc);
658 extern const struct aq_fw_ops aq_fw_1x_ops;
659 extern const struct aq_fw_ops aq_fw_2x_ops;
661 #endif /* HW_ATL_UTILS_H */