1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
6 #ifndef _BNXT_FILTER_H_
7 #define _BNXT_FILTER_H_
11 #define bnxt_vlan_filter_exists(bp, filter, chk, vlan_id) \
12 (((filter)->enables & (chk)) && \
13 ((filter)->l2_ivlan == (vlan_id) && \
14 (filter)->l2_ivlan_mask == 0x0FFF) && \
15 !memcmp((filter)->l2_addr, (bp)->mac_addr, \
19 #define BNXT_FLOW_L2_VALID_FLAG BIT(0)
20 #define BNXT_FLOW_L2_SRC_VALID_FLAG BIT(1)
21 #define BNXT_FLOW_L2_INNER_SRC_VALID_FLAG BIT(2)
22 #define BNXT_FLOW_L2_DST_VALID_FLAG BIT(3)
23 #define BNXT_FLOW_L2_INNER_DST_VALID_FLAG BIT(4)
24 #define BNXT_FLOW_L2_DROP_FLAG BIT(5)
25 #define BNXT_FLOW_PARSE_INNER_FLAG BIT(6)
26 #define BNXT_FLOW_MARK_FLAG BIT(7)
28 struct bnxt_filter_info {
29 STAILQ_ENTRY(bnxt_filter_info) next;
31 uint64_t fw_l2_filter_id;
32 struct bnxt_filter_info *matching_l2_fltr_ptr;
33 uint64_t fw_em_filter_id;
34 uint64_t fw_ntuple_filter_id;
35 #define INVALID_MAC_INDEX ((uint16_t)-1)
37 #define HWRM_CFA_L2_FILTER 0
38 #define HWRM_CFA_EM_FILTER 1
39 #define HWRM_CFA_NTUPLE_FILTER 2
40 #define HWRM_CFA_TUNNEL_REDIRECT_FILTER 3
44 /* Filter Characteristics */
48 uint8_t l2_addr[RTE_ETHER_ADDR_LEN];
49 uint8_t l2_addr_mask[RTE_ETHER_ADDR_LEN];
52 uint16_t l2_ovlan_mask;
54 uint16_t l2_ivlan_mask;
55 uint8_t t_l2_addr[RTE_ETHER_ADDR_LEN];
56 uint8_t t_l2_addr_mask[RTE_ETHER_ADDR_LEN];
58 uint16_t t_l2_ovlan_mask;
60 uint16_t t_l2_ivlan_mask;
62 uint16_t mirror_vnic_id;
65 uint64_t l2_filter_id_hint;
68 uint8_t src_macaddr[6];
69 uint8_t dst_macaddr[6];
70 uint32_t dst_ipaddr[4];
71 uint32_t dst_ipaddr_mask[4];
72 uint32_t src_ipaddr[4];
73 uint32_t src_ipaddr_mask[4];
75 uint16_t dst_port_mask;
77 uint16_t src_port_mask;
79 uint16_t ip_addr_type;
82 /* Backptr to vnic. As of now, used only by an L2 filter
83 * to remember which vnic it was created on
85 struct bnxt_vnic_info *vnic;
89 struct bnxt_filter_info *bnxt_alloc_filter(struct bnxt *bp);
90 struct bnxt_filter_info *bnxt_alloc_vf_filter(struct bnxt *bp, uint16_t vf);
91 void bnxt_free_all_filters(struct bnxt *bp);
92 void bnxt_free_filter_mem(struct bnxt *bp);
93 int bnxt_alloc_filter_mem(struct bnxt *bp);
94 struct bnxt_filter_info *bnxt_get_unused_filter(struct bnxt *bp);
95 void bnxt_free_filter(struct bnxt *bp, struct bnxt_filter_info *filter);
96 struct bnxt_filter_info *bnxt_get_l2_filter(struct bnxt *bp,
97 struct bnxt_filter_info *nf, struct bnxt_vnic_info *vnic);
99 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_MACADDR \
100 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR
101 #define EM_FLOW_ALLOC_INPUT_EN_SRC_MACADDR \
102 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR
103 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_MACADDR \
104 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR
105 #define EM_FLOW_ALLOC_INPUT_EN_DST_MACADDR \
106 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR
107 #define NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE \
108 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE
109 #define EM_FLOW_ALLOC_INPUT_EN_ETHERTYPE \
110 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE
111 #define EM_FLOW_ALLOC_INPUT_EN_OVLAN_VID \
112 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID
113 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR \
114 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR
115 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_IPADDR_MASK \
116 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK
117 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR \
118 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR
119 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_IPADDR_MASK \
120 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK
121 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT \
122 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT
123 #define NTUPLE_FLTR_ALLOC_INPUT_EN_SRC_PORT_MASK \
124 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK
125 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT \
126 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT
127 #define NTUPLE_FLTR_ALLOC_INPUT_EN_DST_PORT_MASK \
128 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK
129 #define NTUPLE_FLTR_ALLOC_IN_EN_IP_PROTO \
130 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL
131 #define EM_FLOW_ALLOC_INPUT_EN_SRC_IPADDR \
132 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR
133 #define EM_FLOW_ALLOC_INPUT_EN_DST_IPADDR \
134 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR
135 #define EM_FLOW_ALLOC_INPUT_EN_SRC_PORT \
136 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT
137 #define EM_FLOW_ALLOC_INPUT_EN_DST_PORT \
138 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT
139 #define EM_FLOW_ALLOC_INPUT_EN_IP_PROTO \
140 HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL
141 #define EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
142 HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6
143 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
144 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6
145 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_VXLAN \
146 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN
147 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_NVGRE \
148 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE
149 #define CFA_NTUPLE_FILTER_ALLOC_REQ_TUNNEL_TYPE_IPGRE \
150 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE
151 #define L2_FILTER_ALLOC_INPUT_EN_L2_ADDR_MASK \
152 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK
153 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UDP \
154 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP
155 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_TCP \
156 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP
157 #define NTUPLE_FLTR_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \
158 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN
159 #define NTUPLE_FLTR_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \
160 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4
161 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID \
162 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
163 #define NTUPLE_FLTR_ALLOC_INPUT_EN_MIRROR_VNIC_ID \
164 HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID
165 #define L2_FILTER_ALLOC_INPUT_EN_T_NUM_VLANS \
166 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_NUM_VLANS
167 #define L2_FILTER_ALLOC_INPUT_EN_NUM_VLANS \
168 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_NUM_VLANS