1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2014-2018 Broadcom
6 #include <rte_bitmap.h>
7 #include <rte_memzone.h>
8 #include <rte_malloc.h>
12 #include "bnxt_hwrm.h"
13 #include "bnxt_ring.h"
19 #include "hsi_struct_def_dpdk.h"
22 * Generic ring handling
25 void bnxt_free_ring(struct bnxt_ring *ring)
30 if (ring->vmem_size && *ring->vmem) {
31 memset((char *)*ring->vmem, 0, ring->vmem_size);
34 ring->mem_zone = NULL;
41 int bnxt_init_ring_grps(struct bnxt *bp)
45 for (i = 0; i < bp->max_ring_grps; i++)
46 memset(&bp->grp_info[i], (uint8_t)HWRM_NA_SIGNATURE,
47 sizeof(struct bnxt_ring_grp_info));
52 int bnxt_alloc_ring_grps(struct bnxt *bp)
54 if (bp->max_tx_rings == 0) {
55 PMD_DRV_LOG(ERR, "No TX rings available!\n");
59 /* THOR does not support ring groups.
60 * But we will use the array to save RSS context IDs.
62 if (BNXT_CHIP_THOR(bp)) {
63 bp->max_ring_grps = BNXT_MAX_RSS_CTXTS_THOR;
64 } else if (bp->max_ring_grps < bp->rx_cp_nr_rings) {
65 /* 1 ring is for default completion ring */
66 PMD_DRV_LOG(ERR, "Insufficient resource: Ring Group\n");
70 if (BNXT_HAS_RING_GRPS(bp)) {
71 bp->grp_info = rte_zmalloc("bnxt_grp_info",
72 sizeof(*bp->grp_info) *
73 bp->max_ring_grps, 0);
76 "Failed to alloc grp info tbl.\n");
85 * Allocates a completion ring with vmem and stats optionally also allocating
86 * a TX and/or RX ring. Passing NULL as tx_ring_info and/or rx_ring_info
87 * to not allocate them.
89 * Order in the allocation is:
90 * stats - Always non-zero length
91 * cp vmem - Always zero-length, supported for the bnxt_ring abstraction
92 * tx vmem - Only non-zero length if tx_ring_info is not NULL
93 * rx vmem - Only non-zero length if rx_ring_info is not NULL
94 * cp bd ring - Always non-zero length
95 * tx bd ring - Only non-zero length if tx_ring_info is not NULL
96 * rx bd ring - Only non-zero length if rx_ring_info is not NULL
98 int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,
99 struct bnxt_tx_queue *txq,
100 struct bnxt_rx_queue *rxq,
101 struct bnxt_cp_ring_info *cp_ring_info,
102 struct bnxt_cp_ring_info *nq_ring_info,
105 struct bnxt_ring *cp_ring = cp_ring_info->cp_ring_struct;
106 struct bnxt_rx_ring_info *rx_ring_info = rxq ? rxq->rx_ring : NULL;
107 struct bnxt_tx_ring_info *tx_ring_info = txq ? txq->tx_ring : NULL;
108 struct bnxt_ring *tx_ring;
109 struct bnxt_ring *rx_ring;
110 struct rte_pci_device *pdev = bp->pdev;
111 uint64_t rx_offloads = bp->eth_dev->data->dev_conf.rxmode.offloads;
112 const struct rte_memzone *mz = NULL;
113 char mz_name[RTE_MEMZONE_NAMESIZE];
114 rte_iova_t mz_phys_addr_base;
115 rte_iova_t mz_phys_addr;
118 int stats_len = (tx_ring_info || rx_ring_info) ?
119 RTE_CACHE_LINE_ROUNDUP(sizeof(struct hwrm_stat_ctx_query_output) -
120 sizeof (struct hwrm_resp_hdr)) : 0;
121 stats_len = RTE_ALIGN(stats_len, 128);
123 int cp_vmem_start = stats_len;
124 int cp_vmem_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size);
125 cp_vmem_len = RTE_ALIGN(cp_vmem_len, 128);
127 int nq_vmem_len = nq_ring_info ?
128 RTE_CACHE_LINE_ROUNDUP(cp_ring->vmem_size) : 0;
129 nq_vmem_len = RTE_ALIGN(nq_vmem_len, 128);
131 int nq_vmem_start = cp_vmem_start + cp_vmem_len;
133 int tx_vmem_start = nq_vmem_start + nq_vmem_len;
135 tx_ring_info ? RTE_CACHE_LINE_ROUNDUP(tx_ring_info->
136 tx_ring_struct->vmem_size) : 0;
137 tx_vmem_len = RTE_ALIGN(tx_vmem_len, 128);
139 int rx_vmem_start = tx_vmem_start + tx_vmem_len;
140 int rx_vmem_len = rx_ring_info ?
141 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->
142 rx_ring_struct->vmem_size) : 0;
143 rx_vmem_len = RTE_ALIGN(rx_vmem_len, 128);
144 int ag_vmem_start = 0;
146 int cp_ring_start = 0;
147 int nq_ring_start = 0;
149 ag_vmem_start = rx_vmem_start + rx_vmem_len;
150 ag_vmem_len = rx_ring_info ? RTE_CACHE_LINE_ROUNDUP(
151 rx_ring_info->ag_ring_struct->vmem_size) : 0;
152 cp_ring_start = ag_vmem_start + ag_vmem_len;
153 cp_ring_start = RTE_ALIGN(cp_ring_start, 4096);
155 int cp_ring_len = RTE_CACHE_LINE_ROUNDUP(cp_ring->ring_size *
156 sizeof(struct cmpl_base));
157 cp_ring_len = RTE_ALIGN(cp_ring_len, 128);
158 nq_ring_start = cp_ring_start + cp_ring_len;
159 nq_ring_start = RTE_ALIGN(nq_ring_start, 4096);
161 int nq_ring_len = nq_ring_info ? cp_ring_len : 0;
163 int tx_ring_start = nq_ring_start + nq_ring_len;
164 tx_ring_start = RTE_ALIGN(tx_ring_start, 4096);
165 int tx_ring_len = tx_ring_info ?
166 RTE_CACHE_LINE_ROUNDUP(tx_ring_info->tx_ring_struct->ring_size *
167 sizeof(struct tx_bd_long)) : 0;
168 tx_ring_len = RTE_ALIGN(tx_ring_len, 4096);
170 int rx_ring_start = tx_ring_start + tx_ring_len;
171 rx_ring_start = RTE_ALIGN(rx_ring_start, 4096);
172 int rx_ring_len = rx_ring_info ?
173 RTE_CACHE_LINE_ROUNDUP(rx_ring_info->rx_ring_struct->ring_size *
174 sizeof(struct rx_prod_pkt_bd)) : 0;
175 rx_ring_len = RTE_ALIGN(rx_ring_len, 4096);
177 int ag_ring_start = rx_ring_start + rx_ring_len;
178 ag_ring_start = RTE_ALIGN(ag_ring_start, 4096);
179 int ag_ring_len = rx_ring_len * AGG_RING_SIZE_FACTOR;
180 ag_ring_len = RTE_ALIGN(ag_ring_len, 4096);
182 int ag_bitmap_start = ag_ring_start + ag_ring_len;
183 int ag_bitmap_len = rx_ring_info ?
184 RTE_CACHE_LINE_ROUNDUP(rte_bitmap_get_memory_footprint(
185 rx_ring_info->rx_ring_struct->ring_size *
186 AGG_RING_SIZE_FACTOR)) : 0;
188 int tpa_info_start = ag_bitmap_start + ag_bitmap_len;
189 int tpa_info_len = 0;
191 if (rx_ring_info && (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)) {
192 int tpa_max = BNXT_TPA_MAX_AGGS(bp);
194 tpa_info_len = tpa_max * sizeof(struct bnxt_tpa_info);
195 tpa_info_len = RTE_CACHE_LINE_ROUNDUP(tpa_info_len);
198 int total_alloc_len = tpa_info_start;
199 total_alloc_len += tpa_info_len;
201 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
202 "bnxt_%04x:%02x:%02x:%02x-%04x_%s", pdev->addr.domain,
203 pdev->addr.bus, pdev->addr.devid, pdev->addr.function, qidx,
205 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
206 mz = rte_memzone_lookup(mz_name);
208 mz = rte_memzone_reserve_aligned(mz_name, total_alloc_len,
211 RTE_MEMZONE_SIZE_HINT_ONLY |
212 RTE_MEMZONE_IOVA_CONTIG,
217 memset(mz->addr, 0, mz->len);
218 mz_phys_addr_base = mz->iova;
219 mz_phys_addr = mz->iova;
220 if ((unsigned long)mz->addr == mz_phys_addr_base) {
222 "Memzone physical address same as virtual.\n");
223 PMD_DRV_LOG(DEBUG, "Using rte_mem_virt2iova()\n");
224 for (sz = 0; sz < total_alloc_len; sz += getpagesize())
225 rte_mem_lock_page(((char *)mz->addr) + sz);
226 mz_phys_addr_base = rte_mem_virt2iova(mz->addr);
227 mz_phys_addr = rte_mem_virt2iova(mz->addr);
228 if (mz_phys_addr == RTE_BAD_IOVA) {
230 "unable to map ring address to physical memory\n");
237 tx_ring = tx_ring_info->tx_ring_struct;
239 tx_ring->bd = ((char *)mz->addr + tx_ring_start);
240 tx_ring_info->tx_desc_ring = (struct tx_bd_long *)tx_ring->bd;
241 tx_ring->bd_dma = mz_phys_addr + tx_ring_start;
242 tx_ring_info->tx_desc_mapping = tx_ring->bd_dma;
243 tx_ring->mem_zone = (const void *)mz;
247 if (tx_ring->vmem_size) {
249 (void **)((char *)mz->addr + tx_vmem_start);
250 tx_ring_info->tx_buf_ring =
251 (struct bnxt_sw_tx_bd *)tx_ring->vmem;
257 rx_ring = rx_ring_info->rx_ring_struct;
259 rx_ring->bd = ((char *)mz->addr + rx_ring_start);
260 rx_ring_info->rx_desc_ring =
261 (struct rx_prod_pkt_bd *)rx_ring->bd;
262 rx_ring->bd_dma = mz_phys_addr + rx_ring_start;
263 rx_ring_info->rx_desc_mapping = rx_ring->bd_dma;
264 rx_ring->mem_zone = (const void *)mz;
268 if (rx_ring->vmem_size) {
270 (void **)((char *)mz->addr + rx_vmem_start);
271 rx_ring_info->rx_buf_ring =
272 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
275 rx_ring = rx_ring_info->ag_ring_struct;
277 rx_ring->bd = ((char *)mz->addr + ag_ring_start);
278 rx_ring_info->ag_desc_ring =
279 (struct rx_prod_pkt_bd *)rx_ring->bd;
280 rx_ring->bd_dma = mz->iova + ag_ring_start;
281 rx_ring_info->ag_desc_mapping = rx_ring->bd_dma;
282 rx_ring->mem_zone = (const void *)mz;
286 if (rx_ring->vmem_size) {
288 (void **)((char *)mz->addr + ag_vmem_start);
289 rx_ring_info->ag_buf_ring =
290 (struct bnxt_sw_rx_bd *)rx_ring->vmem;
293 rx_ring_info->ag_bitmap =
294 rte_bitmap_init(rx_ring_info->rx_ring_struct->ring_size *
295 AGG_RING_SIZE_FACTOR, (uint8_t *)mz->addr +
296 ag_bitmap_start, ag_bitmap_len);
299 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
300 rx_ring_info->tpa_info =
301 ((struct bnxt_tpa_info *)((char *)mz->addr +
305 cp_ring->bd = ((char *)mz->addr + cp_ring_start);
306 cp_ring->bd_dma = mz_phys_addr + cp_ring_start;
307 cp_ring_info->cp_desc_ring = cp_ring->bd;
308 cp_ring_info->cp_desc_mapping = cp_ring->bd_dma;
309 cp_ring->mem_zone = (const void *)mz;
313 if (cp_ring->vmem_size)
314 *cp_ring->vmem = ((char *)mz->addr + stats_len);
316 cp_ring_info->hw_stats = mz->addr;
317 cp_ring_info->hw_stats_map = mz_phys_addr;
319 cp_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
322 struct bnxt_ring *nq_ring = nq_ring_info->cp_ring_struct;
324 nq_ring->bd = (char *)mz->addr + nq_ring_start;
325 nq_ring->bd_dma = mz_phys_addr + nq_ring_start;
326 nq_ring_info->cp_desc_ring = nq_ring->bd;
327 nq_ring_info->cp_desc_mapping = nq_ring->bd_dma;
328 nq_ring->mem_zone = (const void *)mz;
332 if (nq_ring->vmem_size)
333 *nq_ring->vmem = (char *)mz->addr + nq_vmem_start;
335 nq_ring_info->hw_stats_ctx_id = HWRM_NA_SIGNATURE;
341 static void bnxt_init_dflt_coal(struct bnxt_coal *coal)
343 /* Tick values in micro seconds.
344 * 1 coal_buf x bufs_per_record = 1 completion record.
346 coal->num_cmpl_aggr_int = BNXT_NUM_CMPL_AGGR_INT;
347 /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
348 coal->num_cmpl_dma_aggr = BNXT_NUM_CMPL_DMA_AGGR;
349 /* This is a 6-bit value and must not be 0, or we'll get non stop IRQ */
350 coal->num_cmpl_dma_aggr_during_int = BNXT_NUM_CMPL_DMA_AGGR_DURING_INT;
351 coal->int_lat_tmr_max = BNXT_INT_LAT_TMR_MAX;
352 /* min timer set to 1/2 of interrupt timer */
353 coal->int_lat_tmr_min = BNXT_INT_LAT_TMR_MIN;
354 /* buf timer set to 1/4 of interrupt timer */
355 coal->cmpl_aggr_dma_tmr = BNXT_CMPL_AGGR_DMA_TMR;
356 coal->cmpl_aggr_dma_tmr_during_int = BNXT_CMPL_AGGR_DMA_TMR_DURING_INT;
359 static void bnxt_set_db(struct bnxt *bp,
360 struct bnxt_db_info *db,
365 if (BNXT_CHIP_THOR(bp)) {
367 db->doorbell = (char *)bp->doorbell_base + 0x10000;
369 db->doorbell = (char *)bp->doorbell_base + 0x4000;
371 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
372 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SQ;
374 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
375 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG:
376 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_SRQ;
378 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
379 db->db_key64 = DBR_PATH_L2 | DBR_TYPE_CQ;
381 case HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ:
382 db->db_key64 = DBR_PATH_L2;
385 db->db_key64 |= (uint64_t)fid << DBR_XID_SFT;
388 db->doorbell = (char *)bp->doorbell_base + map_idx * 0x80;
390 case HWRM_RING_ALLOC_INPUT_RING_TYPE_TX:
391 db->db_key32 = DB_KEY_TX;
393 case HWRM_RING_ALLOC_INPUT_RING_TYPE_RX:
394 db->db_key32 = DB_KEY_RX;
396 case HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL:
397 db->db_key32 = DB_KEY_CP;
404 static int bnxt_alloc_cmpl_ring(struct bnxt *bp, int queue_index,
405 struct bnxt_cp_ring_info *cpr)
407 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
408 uint32_t nq_ring_id = HWRM_NA_SIGNATURE;
409 int cp_ring_index = queue_index + BNXT_RX_VEC_START;
410 struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
414 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
416 if (BNXT_HAS_NQ(bp)) {
418 nq_ring_id = nqr->cp_ring_struct->fw_ring_id;
420 PMD_DRV_LOG(ERR, "NQ ring is NULL\n");
425 rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, cp_ring_index,
426 HWRM_NA_SIGNATURE, nq_ring_id, 0);
431 bnxt_set_db(bp, &cpr->cp_db, ring_type, cp_ring_index,
432 cp_ring->fw_ring_id);
438 int bnxt_alloc_rxtx_nq_ring(struct bnxt *bp)
440 struct bnxt_cp_ring_info *nqr;
441 struct bnxt_ring *ring;
442 int ring_index = BNXT_NUM_ASYNC_CPR(bp);
443 unsigned int socket_id;
447 if (!BNXT_HAS_NQ(bp) || bp->rxtx_nq_ring)
450 socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
452 nqr = rte_zmalloc_socket("nqr",
453 sizeof(struct bnxt_cp_ring_info),
454 RTE_CACHE_LINE_SIZE, socket_id);
458 ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
459 sizeof(struct bnxt_ring),
460 RTE_CACHE_LINE_SIZE, socket_id);
466 ring->bd = (void *)nqr->cp_desc_ring;
467 ring->bd_dma = nqr->cp_desc_mapping;
468 ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
469 ring->ring_mask = ring->ring_size - 1;
473 nqr->cp_ring_struct = ring;
474 rc = bnxt_alloc_rings(bp, 0, NULL, NULL, nqr, NULL, "l2_nqr");
481 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
483 rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, ring_index,
484 HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
491 bnxt_set_db(bp, &nqr->cp_db, ring_type, ring_index,
495 bp->rxtx_nq_ring = nqr;
500 /* Free RX/TX NQ ring. */
501 void bnxt_free_rxtx_nq_ring(struct bnxt *bp)
503 struct bnxt_cp_ring_info *nqr = bp->rxtx_nq_ring;
508 bnxt_free_nq_ring(bp, nqr);
510 bnxt_free_ring(nqr->cp_ring_struct);
511 rte_free(nqr->cp_ring_struct);
512 nqr->cp_ring_struct = NULL;
514 bp->rxtx_nq_ring = NULL;
517 static int bnxt_alloc_rx_ring(struct bnxt *bp, int queue_index)
519 struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
520 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
521 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
522 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
523 struct bnxt_ring *ring = rxr->rx_ring_struct;
527 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
529 rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type,
530 queue_index, cpr->hw_stats_ctx_id,
531 cp_ring->fw_ring_id, 0);
536 if (BNXT_HAS_RING_GRPS(bp))
537 bp->grp_info[queue_index].rx_fw_ring_id = ring->fw_ring_id;
538 bnxt_set_db(bp, &rxr->rx_db, ring_type, queue_index, ring->fw_ring_id);
539 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
544 static int bnxt_alloc_rx_agg_ring(struct bnxt *bp, int queue_index)
546 unsigned int map_idx = queue_index + bp->rx_cp_nr_rings;
547 struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
548 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
549 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
550 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
551 struct bnxt_ring *ring = rxr->ag_ring_struct;
552 uint32_t hw_stats_ctx_id = HWRM_NA_SIGNATURE;
556 ring->fw_rx_ring_id = rxr->rx_ring_struct->fw_ring_id;
558 if (BNXT_CHIP_THOR(bp)) {
559 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX_AGG;
560 hw_stats_ctx_id = cpr->hw_stats_ctx_id;
562 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_RX;
565 rc = bnxt_hwrm_ring_alloc(bp, ring, ring_type, map_idx,
566 hw_stats_ctx_id, cp_ring->fw_ring_id, 0);
572 if (BNXT_HAS_RING_GRPS(bp))
573 bp->grp_info[queue_index].ag_fw_ring_id = ring->fw_ring_id;
574 bnxt_set_db(bp, &rxr->ag_db, ring_type, map_idx, ring->fw_ring_id);
575 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
580 int bnxt_alloc_hwrm_rx_ring(struct bnxt *bp, int queue_index)
582 struct bnxt_rx_queue *rxq = bp->rx_queues[queue_index];
583 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
584 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
585 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
588 rc = bnxt_alloc_cmpl_ring(bp, queue_index, cpr);
592 if (BNXT_HAS_RING_GRPS(bp)) {
593 bp->grp_info[queue_index].fw_stats_ctx = cpr->hw_stats_ctx_id;
594 bp->grp_info[queue_index].cp_fw_ring_id = cp_ring->fw_ring_id;
597 if (!BNXT_NUM_ASYNC_CPR(bp) && !queue_index) {
599 * If a dedicated async event completion ring is not enabled,
600 * use the first completion ring from PF or VF as the default
601 * completion ring for async event handling.
603 bp->async_cp_ring = cpr;
604 rc = bnxt_hwrm_set_async_event_cr(bp);
609 rc = bnxt_alloc_rx_ring(bp, queue_index);
613 rc = bnxt_alloc_rx_agg_ring(bp, queue_index);
617 if (rxq->rx_started) {
618 if (bnxt_init_one_rx_ring(rxq)) {
620 "bnxt_init_one_rx_ring failed!\n");
621 bnxt_rx_queue_release_op(rxq);
625 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
626 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
628 rxq->index = queue_index;
634 "Failed to allocate receive queue %d, rc %d.\n",
639 /* Initialise all rings to -1, its used to free rings later if allocation
640 * of few rings fails.
642 static void bnxt_init_all_rings(struct bnxt *bp)
645 struct bnxt_rx_queue *rxq;
646 struct bnxt_ring *cp_ring;
647 struct bnxt_ring *ring;
648 struct bnxt_rx_ring_info *rxr;
649 struct bnxt_tx_queue *txq;
651 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
652 rxq = bp->rx_queues[i];
654 cp_ring = rxq->cp_ring->cp_ring_struct;
655 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
658 ring = rxr->rx_ring_struct;
659 ring->fw_ring_id = INVALID_HW_RING_ID;
661 ring = rxr->ag_ring_struct;
662 ring->fw_ring_id = INVALID_HW_RING_ID;
664 for (i = 0; i < bp->tx_cp_nr_rings; i++) {
665 txq = bp->tx_queues[i];
667 cp_ring = txq->cp_ring->cp_ring_struct;
668 cp_ring->fw_ring_id = INVALID_HW_RING_ID;
670 ring = txq->tx_ring->tx_ring_struct;
671 ring->fw_ring_id = INVALID_HW_RING_ID;
676 * [0] = default completion ring
677 * [1 -> +rx_cp_nr_rings] = rx_cp, rx rings
678 * [1+rx_cp_nr_rings + 1 -> +tx_cp_nr_rings] = tx_cp, tx rings
680 int bnxt_alloc_hwrm_rings(struct bnxt *bp)
682 struct bnxt_coal coal;
687 bnxt_init_dflt_coal(&coal);
688 bnxt_init_all_rings(bp);
690 for (i = 0; i < bp->rx_cp_nr_rings; i++) {
691 struct bnxt_rx_queue *rxq = bp->rx_queues[i];
692 struct bnxt_cp_ring_info *cpr = rxq->cp_ring;
693 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
694 struct bnxt_rx_ring_info *rxr = rxq->rx_ring;
696 if (bnxt_alloc_cmpl_ring(bp, i, cpr))
699 if (BNXT_HAS_RING_GRPS(bp)) {
700 bp->grp_info[i].fw_stats_ctx = cpr->hw_stats_ctx_id;
701 bp->grp_info[i].cp_fw_ring_id = cp_ring->fw_ring_id;
704 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
705 if (!BNXT_NUM_ASYNC_CPR(bp) && !i) {
707 * If a dedicated async event completion ring is not
708 * enabled, use the first completion ring as the default
709 * completion ring for async event handling.
711 bp->async_cp_ring = cpr;
712 rc = bnxt_hwrm_set_async_event_cr(bp);
717 if (bnxt_alloc_rx_ring(bp, i))
720 if (bnxt_alloc_rx_agg_ring(bp, i))
723 if (bnxt_init_one_rx_ring(rxq)) {
724 PMD_DRV_LOG(ERR, "bnxt_init_one_rx_ring failed!\n");
725 bnxt_rx_queue_release_op(rxq);
728 bnxt_db_write(&rxr->rx_db, rxr->rx_prod);
729 bnxt_db_write(&rxr->ag_db, rxr->ag_prod);
732 bnxt_rxq_vec_setup(rxq);
736 for (i = 0; i < bp->tx_cp_nr_rings; i++) {
737 struct bnxt_tx_queue *txq = bp->tx_queues[i];
738 struct bnxt_cp_ring_info *cpr = txq->cp_ring;
739 struct bnxt_ring *cp_ring = cpr->cp_ring_struct;
740 struct bnxt_tx_ring_info *txr = txq->tx_ring;
741 struct bnxt_ring *ring = txr->tx_ring_struct;
742 unsigned int idx = i + bp->rx_cp_nr_rings;
743 uint16_t tx_cosq_id = 0;
745 if (bnxt_alloc_cmpl_ring(bp, idx, cpr))
748 if (bp->vnic_cap_flags & BNXT_VNIC_CAP_COS_CLASSIFY)
749 tx_cosq_id = bp->tx_cosq_id[i < bp->max_lltc ? i : 0];
751 tx_cosq_id = bp->tx_cosq_id[0];
753 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_TX;
754 rc = bnxt_hwrm_ring_alloc(bp, ring,
756 i, cpr->hw_stats_ctx_id,
762 bnxt_set_db(bp, &txr->tx_db, ring_type, i, ring->fw_ring_id);
764 bnxt_hwrm_set_ring_coal(bp, &coal, cp_ring->fw_ring_id);
771 /* Allocate dedicated async completion ring. */
772 int bnxt_alloc_async_cp_ring(struct bnxt *bp)
774 struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
775 struct bnxt_ring *cp_ring;
779 if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
782 cp_ring = cpr->cp_ring_struct;
785 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_NQ;
787 ring_type = HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL;
789 rc = bnxt_hwrm_ring_alloc(bp, cp_ring, ring_type, 0,
790 HWRM_NA_SIGNATURE, HWRM_NA_SIGNATURE, 0);
797 bnxt_set_db(bp, &cpr->cp_db, ring_type, 0,
798 cp_ring->fw_ring_id);
805 return bnxt_hwrm_set_async_event_cr(bp);
808 /* Free dedicated async completion ring. */
809 void bnxt_free_async_cp_ring(struct bnxt *bp)
811 struct bnxt_cp_ring_info *cpr = bp->async_cp_ring;
813 if (BNXT_NUM_ASYNC_CPR(bp) == 0 || cpr == NULL)
817 bnxt_free_nq_ring(bp, cpr);
819 bnxt_free_cp_ring(bp, cpr);
821 bnxt_free_ring(cpr->cp_ring_struct);
822 rte_free(cpr->cp_ring_struct);
823 cpr->cp_ring_struct = NULL;
825 bp->async_cp_ring = NULL;
828 int bnxt_alloc_async_ring_struct(struct bnxt *bp)
830 struct bnxt_cp_ring_info *cpr = NULL;
831 struct bnxt_ring *ring = NULL;
832 unsigned int socket_id;
834 if (BNXT_NUM_ASYNC_CPR(bp) == 0)
837 socket_id = rte_lcore_to_socket_id(rte_get_master_lcore());
839 cpr = rte_zmalloc_socket("cpr",
840 sizeof(struct bnxt_cp_ring_info),
841 RTE_CACHE_LINE_SIZE, socket_id);
845 ring = rte_zmalloc_socket("bnxt_cp_ring_struct",
846 sizeof(struct bnxt_ring),
847 RTE_CACHE_LINE_SIZE, socket_id);
853 ring->bd = (void *)cpr->cp_desc_ring;
854 ring->bd_dma = cpr->cp_desc_mapping;
855 ring->ring_size = rte_align32pow2(DEFAULT_CP_RING_SIZE);
856 ring->ring_mask = ring->ring_size - 1;
860 bp->async_cp_ring = cpr;
861 cpr->cp_ring_struct = ring;
863 return bnxt_alloc_rings(bp, 0, NULL, NULL,
864 bp->async_cp_ring, NULL,