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34 #ifndef _HSI_STRUCT_DEF_DPDK_
35 #define _HSI_STRUCT_DEF_DPDK_
36 /* HSI and HWRM Specification 1.7.7 */
37 #define HWRM_VERSION_MAJOR 1
38 #define HWRM_VERSION_MINOR 7
39 #define HWRM_VERSION_UPDATE 7
41 #define HWRM_VERSION_STR "1.7.7"
43 * Following is the signature for HWRM message field that indicates not
44 * applicable (All F's). Need to cast it the size of the field if needed.
46 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
47 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
48 #define HWRM_MAX_RESP_LEN (248) /* hwrm_selftest_qlist */
49 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
50 #define HW_HASH_KEY_SIZE 40
51 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
52 #define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
53 #define HWRM_ROCE_SP_HSI_VERSION_MINOR 7
54 #define HWRM_ROCE_SP_HSI_VERSION_UPDATE 4
59 #define HWRM_VER_GET (UINT32_C(0x0))
60 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
61 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
62 /* Reserved for future use */
63 #define RESERVED1 (UINT32_C(0x10))
64 #define HWRM_FUNC_RESET (UINT32_C(0x11))
65 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
66 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
67 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
68 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
69 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
70 #define HWRM_FUNC_CFG (UINT32_C(0x17))
71 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
72 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
73 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
74 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
75 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
76 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
77 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
78 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
79 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
80 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
81 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
82 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
83 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
84 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
85 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
86 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
87 #define HWRM_PORT_LED_CFG (UINT32_C(0x2d))
88 #define HWRM_PORT_LED_QCFG (UINT32_C(0x2e))
89 #define HWRM_PORT_LED_QCAPS (UINT32_C(0x2f))
90 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
91 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
92 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
93 #define HWRM_FUNC_VLAN_CFG (UINT32_C(0x33))
94 #define HWRM_FUNC_VLAN_QCFG (UINT32_C(0x34))
95 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
96 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
97 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
98 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
99 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
100 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
101 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
102 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
103 #define HWRM_VNIC_FREE (UINT32_C(0x41))
104 #define HWRM_VNIC_CFG (UINT32_C(0x42))
105 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
106 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
107 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
108 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
109 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
110 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
111 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
112 #define HWRM_RING_ALLOC (UINT32_C(0x50))
113 #define HWRM_RING_FREE (UINT32_C(0x51))
114 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
115 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
116 #define HWRM_RING_RESET (UINT32_C(0x5e))
117 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
118 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
119 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
120 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
121 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
122 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
123 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
124 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
125 /* Reserved for future use */
126 #define HWRM_CFA_VLAN_ANTISPOOF_CFG (UINT32_C(0x94))
127 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
128 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
129 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
130 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
131 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
132 #define HWRM_CFA_EM_FLOW_ALLOC (UINT32_C(0x9c))
133 #define HWRM_CFA_EM_FLOW_FREE (UINT32_C(0x9d))
134 #define HWRM_CFA_EM_FLOW_CFG (UINT32_C(0x9e))
135 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
136 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
137 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
138 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
139 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
140 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
141 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
142 #define HWRM_FW_RESET (UINT32_C(0xc0))
143 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
144 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
145 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
146 #define HWRM_FWD_RESP (UINT32_C(0xd2))
147 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
148 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
149 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
150 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
151 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
152 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
153 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
154 #define HWRM_NVM_VALIDATE_OPTION (UINT32_C(0xffef))
155 #define HWRM_NVM_FLUSH (UINT32_C(0xfff0))
156 #define HWRM_NVM_GET_VARIABLE (UINT32_C(0xfff1))
157 #define HWRM_NVM_SET_VARIABLE (UINT32_C(0xfff2))
158 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
159 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
160 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
161 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
162 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
163 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
164 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
165 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
166 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
167 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
168 #define HWRM_NVM_READ (UINT32_C(0xfffd))
169 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
170 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
173 * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
174 * specification describes the data structures used in Ethernet packet or RDMA
175 * message data transfers as well as an abstract interface for managing Ethernet
176 * NIC hardware resources.
178 /* Ethernet Data path Host Structures */
180 * Description: The following three sections document the host structures used
181 * between device and software drivers for communicating Ethernet packets.
183 /* BD Ring Structures */
185 * Description: This structure is used to inform the NIC of a location for and
186 * an aggregation buffer that will be used for packet data that is received. An
187 * aggregation buffer creates a different kind of completion operation for a
188 * packet where a variable number of BDs may be used to place the packet in the
189 * host. RX Rings that have aggregation buffers are known as aggregation rings
190 * and must contain only aggregation buffers.
192 /* Short TX BD (16 bytes) */
196 * All bits in this field must be valid on the first BD of a
197 * packet. Only the packet_end bit must be valid for the
198 * remaining BDs of a packet.
200 /* This value identifies the type of buffer descriptor. */
201 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
202 #define TX_BD_SHORT_TYPE_SFT 0
204 * Indicates that this BD is 16B long and is
205 * used for normal L2 packet transmission.
207 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
209 * If set to 1, the packet ends with the data in the buffer
210 * pointed to by this descriptor. This flag must be valid on
213 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
215 * If set to 1, the device will not generate a completion for
216 * this transmit packet unless there is an error in it's
217 * processing. If this bit is set to 0, then the packet will be
218 * completed normally. This bit must be valid only on the first
221 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
223 * This value indicates how many 16B BD locations are consumed
224 * in the ring by this packet. A value of 1 indicates that this
225 * BD is the only BD (and that the it is a short BD). A value of
226 * 3 indicates either 3 short BDs or 1 long BD and one short BD
227 * in the packet. A value of 0 indicates that there are 32 BD
228 * locations in the packet (the maximum). This field is valid
229 * only on the first BD of a packet.
231 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
232 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
234 * This value is a hint for the length of the entire packet. It
235 * is used by the chip to optimize internal processing. The
236 * packet will be dropped if the hint is too short. This field
237 * is valid only on the first BD of a packet.
239 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
240 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
241 /* indicates packet length < 512B */
242 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
243 /* indicates 512 <= packet length < 1KB */
244 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
245 /* indicates 1KB <= packet length < 2KB */
246 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
247 /* indicates packet length >= 2KB */
248 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
249 #define TX_BD_SHORT_FLAGS_LHINT_LAST \
250 TX_BD_SHORT_FLAGS_LHINT_GTE2K
252 * If set to 1, the device immediately updates the Send Consumer
253 * Index after the buffer associated with this descriptor has
254 * been transferred via DMA to NIC memory from host memory. An
255 * interrupt may or may not be generated according to the state
256 * of the interrupt avoidance mechanisms. If this bit is set to
257 * 0, then the Consumer Index is only updated as soon as one of
258 * the host interrupt coalescing conditions has been met. This
259 * bit must be valid on the first BD of a packet.
261 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
263 * All bits in this field must be valid on the first BD of a
264 * packet. Only the packet_end bit must be valid for the
265 * remaining BDs of a packet.
267 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
268 #define TX_BD_SHORT_FLAGS_SFT 6
271 * This is the length of the host physical buffer this BD
272 * describes in bytes. This field must be valid on all BDs of a
277 * The opaque data field is pass through to the completion and
278 * can be used for any data that the driver wants to associate
279 * with the transmit BD. This field must be valid on the first
284 * This is the host physical address for the portion of the
285 * packet described by this TX BD. This value must be valid on
286 * all BDs of a packet.
288 } __attribute__((packed));
290 /* Long TX BD (32 bytes split to 2 16-byte struct) */
294 * All bits in this field must be valid on the first BD of a
295 * packet. Only the packet_end bit must be valid for the
296 * remaining BDs of a packet.
298 /* This value identifies the type of buffer descriptor. */
299 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
300 #define TX_BD_LONG_TYPE_SFT 0
302 * Indicates that this BD is 32B long and is
303 * used for normal L2 packet transmission.
305 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
307 * If set to 1, the packet ends with the data in the buffer
308 * pointed to by this descriptor. This flag must be valid on
311 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
313 * If set to 1, the device will not generate a completion for
314 * this transmit packet unless there is an error in it's
315 * processing. If this bit is set to 0, then the packet will be
316 * completed normally. This bit must be valid only on the first
319 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
321 * This value indicates how many 16B BD locations are consumed
322 * in the ring by this packet. A value of 1 indicates that this
323 * BD is the only BD (and that the it is a short BD). A value of
324 * 3 indicates either 3 short BDs or 1 long BD and one short BD
325 * in the packet. A value of 0 indicates that there are 32 BD
326 * locations in the packet (the maximum). This field is valid
327 * only on the first BD of a packet.
329 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
330 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
332 * This value is a hint for the length of the entire packet. It
333 * is used by the chip to optimize internal processing. The
334 * packet will be dropped if the hint is too short. This field
335 * is valid only on the first BD of a packet.
337 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
338 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
339 /* indicates packet length < 512B */
340 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
341 /* indicates 512 <= packet length < 1KB */
342 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
343 /* indicates 1KB <= packet length < 2KB */
344 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
345 /* indicates packet length >= 2KB */
346 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
347 #define TX_BD_LONG_FLAGS_LHINT_LAST \
348 TX_BD_LONG_FLAGS_LHINT_GTE2K
350 * If set to 1, the device immediately updates the Send Consumer
351 * Index after the buffer associated with this descriptor has
352 * been transferred via DMA to NIC memory from host memory. An
353 * interrupt may or may not be generated according to the state
354 * of the interrupt avoidance mechanisms. If this bit is set to
355 * 0, then the Consumer Index is only updated as soon as one of
356 * the host interrupt coalescing conditions has been met. This
357 * bit must be valid on the first BD of a packet.
359 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
361 * All bits in this field must be valid on the first BD of a
362 * packet. Only the packet_end bit must be valid for the
363 * remaining BDs of a packet.
365 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
366 #define TX_BD_LONG_FLAGS_SFT 6
369 * This is the length of the host physical buffer this BD
370 * describes in bytes. This field must be valid on all BDs of a
375 * The opaque data field is pass through to the completion and
376 * can be used for any data that the driver wants to associate
377 * with the transmit BD. This field must be valid on the first
382 * This is the host physical address for the portion of the
383 * packet described by this TX BD. This value must be valid on
384 * all BDs of a packet.
386 } __attribute__((packed));
388 /* last 16 bytes of Long TX BD */
389 struct tx_bd_long_hi {
392 * All bits in this field must be valid on the first BD of a
393 * packet. Their value on other BDs of the packet will be
397 * If set to 1, the controller replaces the TCP/UPD checksum
398 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
399 * checksum field of the encapsulated TCP/UDP packets with the
400 * hardware calculated TCP/UDP checksum for the packet
401 * associated with this descriptor. The flag is ignored if the
402 * LSO flag is set. This bit must be valid on the first BD of a
405 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
407 * If set to 1, the controller replaces the IP checksum of the
408 * normal packets, or the inner IP checksum of the encapsulated
409 * packets with the hardware calculated IP checksum for the
410 * packet associated with this descriptor. This bit must be
411 * valid on the first BD of a packet.
413 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
415 * If set to 1, the controller will not append an Ethernet CRC
416 * to the end of the frame. This bit must be valid on the first
417 * BD of a packet. Packet must be 64B or longer when this flag
418 * is set. It is not useful to use this bit with any form of TX
419 * offload such as CSO or LSO. The intent is that the packet
420 * from the host already has a valid Ethernet CRC on the packet.
422 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
424 * If set to 1, the device will record the time at which the
425 * packet was actually transmitted at the TX MAC. This bit must
426 * be valid on the first BD of a packet.
428 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
430 * If set to 1, The controller replaces the tunnel IP checksum
431 * field with hardware calculated IP checksum for the IP header
432 * of the packet associated with this descriptor. For outer UDP
433 * checksum, global outer UDP checksum TE_NIC register needs to
434 * be enabled. If the global outer UDP checksum TE_NIC register
435 * bit is set, outer UDP checksum will be calculated for the
436 * following cases: 1. Packets with tcp_udp_chksum flag set to
437 * offload checksum for inner packet AND the inner packet is
438 * TCP/UDP. If the inner packet is ICMP for example (non-
439 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
440 * checksum will not be calculated. 2. Packets with lso flag set
441 * which implies inner TCP checksum calculation as part of LSO
444 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
446 * If set to 1, the device will treat this packet with LSO(Large
447 * Send Offload) processing for both normal or encapsulated
448 * packets, which is a form of TCP segmentation. When this bit
449 * is 1, the hdr_size and mss fields must be valid. The driver
450 * doesn't need to set t_ip_chksum, ip_chksum, and
451 * tcp_udp_chksum flags since the controller will replace the
452 * appropriate checksum fields for segmented packets. When this
453 * bit is 1, the hdr_size and mss fields must be valid.
455 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
457 * If set to zero when LSO is '1', then the IPID will be treated
458 * as a 16b number and will be wrapped if it exceeds a value of
459 * 0xffff. If set to one when LSO is '1', then the IPID will be
460 * treated as a 15b number and will be wrapped if it exceeds a
463 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
465 * If set to zero when LSO is '1', then the IPID of the tunnel
466 * IP header will not be modified during LSO operations. If set
467 * to one when LSO is '1', then the IPID of the tunnel IP header
468 * will be incremented for each subsequent segment of an LSO
469 * operation. The flag is ignored if the LSO packet is a normal
470 * (non-tunneled) TCP packet.
472 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
474 * If set to '1', then the RoCE ICRC will be appended to the
475 * packet. Packet must be a valid RoCE format packet.
477 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
479 * If set to '1', then the FCoE CRC will be appended to the
480 * packet. Packet must be a valid FCoE format packet.
482 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
485 * When LSO is '1', this field must contain the offset of the
486 * TCP payload from the beginning of the packet in as 16b words.
487 * In case of encapsulated/tunneling packet, this field contains
488 * the offset of the inner TCP payload from beginning of the
489 * packet as 16-bit words. This value must be valid on the first
492 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
493 #define TX_BD_LONG_HDR_SIZE_SFT 0
496 * This is the MSS value that will be used to do the LSO
497 * processing. The value is the length in bytes of the TCP
498 * payload for each segment generated by the LSO operation. This
499 * value must be valid on the first BD of a packet.
501 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
502 #define TX_BD_LONG_MSS_SFT 0
506 * This value selects a CFA action to perform on the packet. Set
507 * this value to zero if no CFA action is desired. This value
508 * must be valid on the first BD of a packet.
512 * This value is action meta-data that defines CFA edit
513 * operations that are done in addition to any action editing.
515 /* When key=1, This is the VLAN tag VID value. */
516 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
517 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
518 /* When key=1, This is the VLAN tag DE value. */
519 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
520 /* When key=1, This is the VLAN tag PRI value. */
521 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
522 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
523 /* When key=1, This is the VLAN tag TPID select value. */
524 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
525 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
527 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
529 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
531 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
533 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
535 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
536 /* Value programmed in CFA VLANTPID register. */
537 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
538 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
539 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
540 /* When key=1, This is the VLAN tag TPID select value. */
541 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
542 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
544 * This field identifies the type of edit to be performed on the
545 * packet. This value must be valid on the first BD of a packet.
547 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
548 #define TX_BD_LONG_CFA_META_KEY_SFT 28
550 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
552 * - meta[17:16] - TPID select value (0 =
553 * 0x8100). - meta[15:12] - PRI/DE value. -
554 * meta[11:0] - VID value.
556 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
557 #define TX_BD_LONG_CFA_META_KEY_LAST \
558 TX_BD_LONG_CFA_META_KEY_VLAN_TAG
559 } __attribute__((packed));
561 /* RX Producer Packet BD (16 bytes) */
562 struct rx_prod_pkt_bd {
564 /* This value identifies the type of buffer descriptor. */
565 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
566 #define RX_PROD_PKT_BD_TYPE_SFT 0
568 * Indicates that this BD is 16B long and is an
569 * RX Producer (ie. empty) buffer descriptor.
571 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
573 * If set to 1, the packet will be placed at the address plus
574 * 2B. The 2 Bytes of padding will be written as zero.
577 * This is intended to be used when the host buffer is cache-
578 * line aligned to produce packets that are easy to parse in
579 * host memory while still allowing writes to be cache line
582 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
584 * If set to 1, the packet write will be padded out to the
585 * nearest cache-line with zero value padding.
588 * If receive buffers start/end on cache-line boundaries, this
589 * feature will ensure that all data writes on the PCI bus
590 * start/end on cache line boundaries.
592 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
594 * This value is the number of additional buffers in the ring
595 * that describe the buffer space to be consumed for the this
596 * packet. If the value is zero, then the packet must fit within
597 * the space described by this BD. If this value is 1 or more,
598 * it indicates how many additional "buffer" BDs are in the ring
599 * immediately following this BD to be used for the same network
600 * packet. Even if the packet to be placed does not need all the
601 * additional buffers, they will be consumed anyway.
603 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
604 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
605 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
606 #define RX_PROD_PKT_BD_FLAGS_SFT 6
609 * This is the length in Bytes of the host physical buffer where
610 * data for the packet may be placed in host memory.
613 * While this is a Byte resolution value, it is often
614 * advantageous to ensure that the buffers provided end on a
619 * The opaque data field is pass through to the completion and
620 * can be used for any data that the driver wants to associate
621 * with this receive buffer set.
625 * This is the host physical address where data for the packet
626 * may by placed in host memory.
629 * While this is a Byte resolution value, it is often
630 * advantageous to ensure that the buffers provide start on a
633 } __attribute__((packed));
635 /* Completion Ring Structures */
636 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
637 /* Base Completion Record (16 bytes) */
642 * This field indicates the exact type of the completion. By
643 * convention, the LSB identifies the length of the record in
644 * 16B units. Even values indicate 16B records. Odd values
645 * indicate 32B records.
647 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
648 #define CMPL_BASE_TYPE_SFT 0
649 /* TX L2 completion: Completion of TX packet. Length = 16B */
650 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
652 * RX L2 completion: Completion of and L2 RX
653 * packet. Length = 32B
655 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
657 * RX Aggregation Buffer completion : Completion
658 * of an L2 aggregation buffer in support of
659 * TPA, HDS, or Jumbo packet completion. Length
662 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
664 * RX L2 TPA Start Completion: Completion at the
665 * beginning of a TPA operation. Length = 32B
667 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
669 * RX L2 TPA End Completion: Completion at the
670 * end of a TPA operation. Length = 32B
672 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
674 * Statistics Ejection Completion: Completion of
675 * statistics data ejection buffer. Length = 16B
677 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
678 /* HWRM Command Completion: Completion of an HWRM command. */
679 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
680 /* Forwarded HWRM Request */
681 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
682 /* Forwarded HWRM Response */
683 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
684 /* HWRM Asynchronous Event Information */
685 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
686 /* CQ Notification */
687 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
688 /* SRQ Threshold Event */
689 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
690 /* DBQ Threshold Event */
691 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
692 /* QP Async Notification */
693 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
694 /* Function Async Notification */
695 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
704 * This value is written by the NIC such that it will be
705 * different for each pass through the completion queue. The
706 * even passes will write 1. The odd passes will write 0.
708 #define CMPL_BASE_V UINT32_C(0x1)
710 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
711 #define CMPL_BASE_INFO3_SFT 1
714 } __attribute__((packed));
716 /* TX Completion Record (16 bytes) */
720 * This field indicates the exact type of the completion. By
721 * convention, the LSB identifies the length of the record in
722 * 16B units. Even values indicate 16B records. Odd values
723 * indicate 32B records.
725 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
726 #define TX_CMPL_TYPE_SFT 0
727 /* TX L2 completion: Completion of TX packet. Length = 16B */
728 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
730 * When this bit is '1', it indicates a packet that has an error
731 * of some type. Type of error is indicated in error_flags.
733 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
735 * When this bit is '1', it indicates that the packet completed
736 * was transmitted using the push acceleration data provided by
737 * the driver. When this bit is '0', it indicates that the
738 * packet had not push acceleration data written or was executed
739 * as a normal packet even though push data was provided.
741 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
742 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
743 #define TX_CMPL_FLAGS_SFT 6
745 /* unused1 is 16 b */
748 * This is a copy of the opaque field from the first TX BD of
749 * this transmitted packet.
753 * This value is written by the NIC such that it will be
754 * different for each pass through the completion queue. The
755 * even passes will write 1. The odd passes will write 0.
757 #define TX_CMPL_V UINT32_C(0x1)
759 * This error indicates that there was some sort of problem with
760 * the BDs for the packet.
762 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
763 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
765 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
766 /* Bad Format: BDs were not formatted correctly. */
767 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
768 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
769 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
771 * When this bit is '1', it indicates that the length of the
772 * packet was zero. No packet was transmitted.
774 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
776 * When this bit is '1', it indicates that the packet was longer
777 * than the programmed limit in TDI. No packet was transmitted.
779 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
781 * When this bit is '1', it indicates that one or more of the
782 * BDs associated with this packet generated a PCI error. This
783 * probably means the address was not valid.
785 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
787 * When this bit is '1', it indicates that the packet was longer
788 * than indicated by the hint. No packet was transmitted.
790 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
792 * When this bit is '1', it indicates that the packet was
793 * dropped due to Poison TLP error on one or more of the TLPs in
794 * the PXP completion.
796 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
797 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
798 #define TX_CMPL_ERRORS_SFT 1
800 /* unused2 is 16 b */
802 /* unused3 is 32 b */
803 } __attribute__((packed));
805 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
809 * This field indicates the exact type of the completion. By
810 * convention, the LSB identifies the length of the record in
811 * 16B units. Even values indicate 16B records. Odd values
812 * indicate 32B records.
814 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
815 #define RX_PKT_CMPL_TYPE_SFT 0
817 * RX L2 completion: Completion of and L2 RX
818 * packet. Length = 32B
820 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
821 #define RX_PKT_CMPL_TYPE_RX_L2_TPA_START UINT32_C(0x13)
822 #define RX_PKT_CMPL_TYPE_RX_L2_TPA_END UINT32_C(0x15)
824 * When this bit is '1', it indicates a packet that has an error
825 * of some type. Type of error is indicated in error_flags.
827 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
828 /* This field indicates how the packet was placed in the buffer. */
829 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
830 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
831 /* Normal: Packet was placed using normal algorithm. */
832 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
833 /* Jumbo: Packet was placed using jumbo algorithm. */
834 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
836 * Header/Data Separation: Packet was placed
837 * using Header/Data separation algorithm. The
838 * separation location is indicated by the itype
841 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
842 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
843 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
844 /* This bit is '1' if the RSS field in this completion is valid. */
845 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
847 #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
849 * This value indicates what the inner packet determined for the
852 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
853 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
854 /* Not Known: Indicates that the packet type was not known. */
855 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
857 * IP Packet: Indicates that the packet was an
858 * IP packet, but further classification was not
861 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
863 * TCP Packet: Indicates that the packet was IP
864 * and TCP. This indicates that the
865 * payload_offset field is valid.
867 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
869 * UDP Packet: Indicates that the packet was IP
870 * and UDP. This indicates that the
871 * payload_offset field is valid.
873 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
875 * FCoE Packet: Indicates that the packet was
876 * recognized as a FCoE. This also indicates
877 * that the payload_offset field is valid.
879 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
881 * RoCE Packet: Indicates that the packet was
882 * recognized as a RoCE. This also indicates
883 * that the payload_offset field is valid.
885 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
887 * ICMP Packet: Indicates that the packet was
888 * recognized as ICMP. This indicates that the
889 * payload_offset field is valid.
891 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
893 * PtP packet wo/timestamp: Indicates that the
894 * packet was recognized as a PtP packet.
896 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
898 * PtP packet w/timestamp: Indicates that the
899 * packet was recognized as a PtP packet and
900 * that a timestamp was taken for the packet.
902 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
903 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
904 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
905 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
906 #define RX_PKT_CMPL_FLAGS_SFT 6
909 * This is the length of the data for the packet stored in the
910 * buffer(s) identified by the opaque value. This includes the
911 * packet BD and any associated buffer BDs. This does not
912 * include the the length of any data places in aggregation BDs.
916 * This is a copy of the opaque field from the RX BD this
917 * completion corresponds to.
922 * This value is written by the NIC such that it will be
923 * different for each pass through the completion queue. The
924 * even passes will write 1. The odd passes will write 0.
926 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
928 * This value is the number of aggregation buffers that follow
929 * this entry in the completion ring that are a part of this
930 * packet. If the value is zero, then the packet is completely
931 * contained in the buffer space provided for the packet in the
934 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
935 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
937 uint8_t rss_hash_type;
939 * This is the RSS hash type for the packet. The value is packed
940 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
941 * . The value of tuple_extrac_op provides the information about
942 * what fields the hash was computed on. * 0: The RSS hash was
943 * computed over source IP address, destination IP address,
944 * source port, and destination port of inner IP and TCP or UDP
945 * headers. Note: For non-tunneled packets, the packet headers
946 * are considered inner packet headers for the RSS hash
947 * computation purpose. * 1: The RSS hash was computed over
948 * source IP address and destination IP address of inner IP
949 * header. Note: For non-tunneled packets, the packet headers
950 * are considered inner packet headers for the RSS hash
951 * computation purpose. * 2: The RSS hash was computed over
952 * source IP address, destination IP address, source port, and
953 * destination port of IP and TCP or UDP headers of outer tunnel
954 * headers. Note: For non-tunneled packets, this value is not
955 * applicable. * 3: The RSS hash was computed over source IP
956 * address and destination IP address of IP header of outer
957 * tunnel headers. Note: For non-tunneled packets, this value is
958 * not applicable. Note that 4-tuples values listed above are
959 * applicable for layer 4 protocols supported and enabled for
960 * RSS in the hardware, HWRM firmware, and drivers. For example,
961 * if RSS hash is supported and enabled for TCP traffic only,
962 * then the values of tuple_extract_op corresponding to 4-tuples
963 * are only valid for TCP traffic.
965 uint8_t payload_offset;
967 * This value indicates the offset in bytes from the beginning
968 * of the packet where the inner payload starts. This value is
969 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
970 * indicates that header is 256B into the packet.
976 * This value is the RSS hash value calculated for the packet
977 * based on the mode bits and key value in the VNIC.
979 } __attribute__((packed));
981 /* last 16 bytes of RX Packet Completion Record */
982 struct rx_pkt_cmpl_hi {
985 * This indicates that the ip checksum was calculated for the
986 * inner packet and that the ip_cs_error field indicates if
987 * there was an error.
989 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
991 * This indicates that the TCP, UDP or ICMP checksum was
992 * calculated for the inner packet and that the l4_cs_error
993 * field indicates if there was an error.
995 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
997 * This indicates that the ip checksum was calculated for the
998 * tunnel header and that the t_ip_cs_error field indicates if
999 * there was an error.
1001 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1003 * This indicates that the UDP checksum was calculated for the
1004 * tunnel packet and that the t_l4_cs_error field indicates if
1005 * there was an error.
1007 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1008 /* This value indicates what format the metadata field is. */
1009 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1010 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
1011 /* No metadata informtaion. Value is zero. */
1012 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1014 * The metadata field contains the VLAN tag and
1015 * TPID value. - metadata[11:0] contains the
1016 * vlan VID value. - metadata[12] contains the
1017 * vlan DE value. - metadata[15:13] contains the
1018 * vlan PRI value. - metadata[31:16] contains
1019 * the vlan TPID value.
1021 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1022 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
1023 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
1025 * This field indicates the IP type for the inner-most IP
1026 * header. A value of '0' indicates IPv4. A value of '1'
1027 * indicates IPv6. This value is only valid if itype indicates a
1028 * packet with an IP header.
1030 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1033 * This is data from the CFA block as indicated by the
1034 * meta_format field.
1036 /* When meta_format=1, this value is the VLAN VID. */
1037 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1038 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1039 /* When meta_format=1, this value is the VLAN DE. */
1040 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1041 /* When meta_format=1, this value is the VLAN PRI. */
1042 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1043 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1044 /* When meta_format=1, this value is the VLAN TPID. */
1045 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1046 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1049 * This value is written by the NIC such that it will be
1050 * different for each pass through the completion queue. The
1051 * even passes will write 1. The odd passes will write 0.
1053 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1055 * This error indicates that there was some sort of problem with
1056 * the BDs for the packet that was found after part of the
1057 * packet was already placed. The packet should be treated as
1060 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1061 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1062 /* No buffer error */
1063 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1065 * Did Not Fit: Packet did not fit into packet
1066 * buffer provided. For regular placement, this
1067 * means the packet did not fit in the buffer
1068 * provided. For HDS and jumbo placement, this
1069 * means that the packet could not be placed
1070 * into 7 physical buffers or less.
1072 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
1073 (UINT32_C(0x1) << 1)
1075 * Not On Chip: All BDs needed for the packet
1076 * were not on-chip when the packet arrived.
1078 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1079 (UINT32_C(0x2) << 1)
1080 /* Bad Format: BDs were not formatted correctly. */
1081 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
1082 (UINT32_C(0x3) << 1)
1083 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1084 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1085 /* This indicates that there was an error in the IP header checksum. */
1086 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1088 * This indicates that there was an error in the TCP, UDP or
1091 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1093 * This indicates that there was an error in the tunnel IP
1096 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1098 * This indicates that there was an error in the tunnel UDP
1101 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1103 * This indicates that there was a CRC error on either an FCoE
1104 * or RoCE packet. The itype indicates the packet type.
1106 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1108 * This indicates that there was an error in the tunnel portion
1109 * of the packet when this field is non-zero.
1111 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1112 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1114 * No additional error occurred on the tunnel
1115 * portion of the packet of the packet does not
1118 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1120 * Indicates that IP header version does not
1121 * match expectation from L2 Ethertype for IPv4
1122 * and IPv6 in the tunnel header.
1124 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
1125 (UINT32_C(0x1) << 9)
1127 * Indicates that header length is out of range
1128 * in the tunnel header. Valid for IPv4.
1130 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
1131 (UINT32_C(0x2) << 9)
1133 * Indicates that the physical packet is shorter
1134 * than that claimed by the PPPoE header length
1135 * for a tunnel PPPoE packet.
1137 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1138 (UINT32_C(0x3) << 9)
1140 * Indicates that physical packet is shorter
1141 * than that claimed by the tunnel l3 header
1142 * length. Valid for IPv4, or IPv6 tunnel packet
1145 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1146 (UINT32_C(0x4) << 9)
1148 * Indicates that the physical packet is shorter
1149 * than that claimed by the tunnel UDP header
1150 * length for a tunnel UDP packet that is not
1153 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1154 (UINT32_C(0x5) << 9)
1156 * indicates that the IPv4 TTL or IPv6 hop limit
1157 * check have failed (e.g. TTL = 0) in the
1158 * tunnel header. Valid for IPv4, and IPv6.
1160 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1161 (UINT32_C(0x6) << 9)
1162 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1163 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1165 * This indicates that there was an error in the inner portion
1166 * of the packet when this field is non-zero.
1168 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1169 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1171 * No additional error occurred on the tunnel
1172 * portion of the packet of the packet does not
1175 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1177 * Indicates that IP header version does not
1178 * match expectation from L2 Ethertype for IPv4
1179 * and IPv6 or that option other than VFT was
1180 * parsed on FCoE packet.
1182 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1183 (UINT32_C(0x1) << 12)
1185 * indicates that header length is out of range.
1186 * Valid for IPv4 and RoCE
1188 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1189 (UINT32_C(0x2) << 12)
1191 * indicates that the IPv4 TTL or IPv6 hop limit
1192 * check have failed (e.g. TTL = 0). Valid for
1195 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1197 * Indicates that physical packet is shorter
1198 * than that claimed by the l3 header length.
1199 * Valid for IPv4, IPv6 packet or RoCE packets.
1201 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1202 (UINT32_C(0x4) << 12)
1204 * Indicates that the physical packet is shorter
1205 * than that claimed by the UDP header length
1206 * for a UDP packet that is not fragmented.
1208 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1209 (UINT32_C(0x5) << 12)
1211 * Indicates that TCP header length > IP
1212 * payload. Valid for TCP packets only.
1214 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1215 (UINT32_C(0x6) << 12)
1216 /* Indicates that TCP header length < 5. Valid for TCP. */
1217 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1218 (UINT32_C(0x7) << 12)
1220 * Indicates that TCP option headers result in a
1221 * TCP header size that does not match data
1222 * offset in TCP header. Valid for TCP.
1224 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1225 (UINT32_C(0x8) << 12)
1226 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1227 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1228 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1229 #define RX_PKT_CMPL_ERRORS_SFT 1
1232 * This field identifies the CFA action rule that was used for
1237 * This value holds the reordering sequence number for the
1238 * packet. If the reordering sequence is not valid, then this
1239 * value is zero. The reordering domain for the packet is in the
1240 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1241 * value contain the ordering domain value for the packet.
1243 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1244 #define RX_PKT_CMPL_REORDER_SFT 0
1245 } __attribute__((packed));
1247 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1248 struct rx_tpa_start_cmpl {
1249 uint16_t flags_type;
1251 * This field indicates the exact type of the completion. By
1252 * convention, the LSB identifies the length of the record in
1253 * 16B units. Even values indicate 16B records. Odd values
1254 * indicate 32B records.
1256 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1257 #define RX_TPA_START_CMPL_TYPE_SFT 0
1259 * RX L2 TPA Start Completion: Completion at the
1260 * beginning of a TPA operation. Length = 32B
1262 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1263 /* This bit will always be '0' for TPA start completions. */
1264 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1265 /* This field indicates how the packet was placed in the buffer. */
1266 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1267 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1269 * Jumbo: TPA Packet was placed using jumbo
1270 * algorithm. This means that the first buffer
1271 * will be filled with data before moving to
1272 * aggregation buffers. Each aggregation buffer
1273 * will be filled before moving to the next
1274 * aggregation buffer.
1276 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1278 * Header/Data Separation: Packet was placed
1279 * using Header/Data separation algorithm. The
1280 * separation location is indicated by the itype
1283 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1285 * GRO/Jumbo: Packet will be placed using
1286 * GRO/Jumbo where the first packet is filled
1287 * with data. Subsequent packets will be placed
1288 * such that any one packet does not span two
1289 * aggregation buffers unless it starts at the
1290 * beginning of an aggregation buffer.
1292 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO \
1293 (UINT32_C(0x5) << 7)
1295 * GRO/Header-Data Separation: Packet will be
1296 * placed using GRO/HDS where the header is in
1297 * the first packet. Payload of each packet will
1298 * be placed such that any one packet does not
1299 * span two aggregation buffers unless it starts
1300 * at the beginning of an aggregation buffer.
1302 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1303 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST \
1304 RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1305 /* This bit is '1' if the RSS field in this completion is valid. */
1306 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1308 #define RX_TPA_START_CMPL_FLAGS_UNUSED UINT32_C(0x800)
1310 * This value indicates what the inner packet determined for the
1313 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1314 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1315 /* TCP Packet: Indicates that the packet was IP and TCP. */
1316 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1317 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST \
1318 RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1319 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1320 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1323 * This value indicates the amount of packet data written to the
1324 * buffer the opaque field in this completion corresponds to.
1328 * This is a copy of the opaque field from the RX BD this
1329 * completion corresponds to.
1332 /* unused1 is 7 b */
1334 * This value is written by the NIC such that it will be
1335 * different for each pass through the completion queue. The
1336 * even passes will write 1. The odd passes will write 0.
1338 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1339 /* unused1 is 7 b */
1340 uint8_t rss_hash_type;
1342 * This is the RSS hash type for the packet. The value is packed
1343 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
1344 * . The value of tuple_extrac_op provides the information about
1345 * what fields the hash was computed on. * 0: The RSS hash was
1346 * computed over source IP address, destination IP address,
1347 * source port, and destination port of inner IP and TCP or UDP
1348 * headers. Note: For non-tunneled packets, the packet headers
1349 * are considered inner packet headers for the RSS hash
1350 * computation purpose. * 1: The RSS hash was computed over
1351 * source IP address and destination IP address of inner IP
1352 * header. Note: For non-tunneled packets, the packet headers
1353 * are considered inner packet headers for the RSS hash
1354 * computation purpose. * 2: The RSS hash was computed over
1355 * source IP address, destination IP address, source port, and
1356 * destination port of IP and TCP or UDP headers of outer tunnel
1357 * headers. Note: For non-tunneled packets, this value is not
1358 * applicable. * 3: The RSS hash was computed over source IP
1359 * address and destination IP address of IP header of outer
1360 * tunnel headers. Note: For non-tunneled packets, this value is
1361 * not applicable. Note that 4-tuples values listed above are
1362 * applicable for layer 4 protocols supported and enabled for
1363 * RSS in the hardware, HWRM firmware, and drivers. For example,
1364 * if RSS hash is supported and enabled for TCP traffic only,
1365 * then the values of tuple_extract_op corresponding to 4-tuples
1366 * are only valid for TCP traffic.
1370 * This is the aggregation ID that the completion is associated
1371 * with. Use this number to correlate the TPA start completion
1372 * with the TPA end completion.
1374 /* unused2 is 9 b */
1376 * This is the aggregation ID that the completion is associated
1377 * with. Use this number to correlate the TPA start completion
1378 * with the TPA end completion.
1380 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1381 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1384 * This value is the RSS hash value calculated for the packet
1385 * based on the mode bits and key value in the VNIC.
1387 } __attribute__((packed));
1389 /* last 16 bytes of RX L2 TPA Start Completion Record */
1390 struct rx_tpa_start_cmpl_hi {
1393 * This indicates that the ip checksum was calculated for the
1394 * inner packet and that the sum passed for all segments
1395 * included in the aggregation.
1397 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1399 * This indicates that the TCP, UDP or ICMP checksum was
1400 * calculated for the inner packet and that the sum passed for
1401 * all segments included in the aggregation.
1403 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1405 * This indicates that the ip checksum was calculated for the
1406 * tunnel header and that the sum passed for all segments
1407 * included in the aggregation.
1409 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1411 * This indicates that the UDP checksum was calculated for the
1412 * tunnel packet and that the sum passed for all segments
1413 * included in the aggregation.
1415 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1416 /* This value indicates what format the metadata field is. */
1417 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1418 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1419 /* No metadata informtaion. Value is zero. */
1420 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1422 * The metadata field contains the VLAN tag and
1423 * TPID value. - metadata[11:0] contains the
1424 * vlan VID value. - metadata[12] contains the
1425 * vlan DE value. - metadata[15:13] contains the
1426 * vlan PRI value. - metadata[31:16] contains
1427 * the vlan TPID value.
1429 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1430 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST \
1431 RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1433 * This field indicates the IP type for the inner-most IP
1434 * header. A value of '0' indicates IPv4. A value of '1'
1437 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1440 * This is data from the CFA block as indicated by the
1441 * meta_format field.
1443 /* When meta_format=1, this value is the VLAN VID. */
1444 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1445 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1446 /* When meta_format=1, this value is the VLAN DE. */
1447 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1448 /* When meta_format=1, this value is the VLAN PRI. */
1449 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1450 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1451 /* When meta_format=1, this value is the VLAN TPID. */
1452 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1453 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1455 /* unused4 is 15 b */
1457 * This value is written by the NIC such that it will be
1458 * different for each pass through the completion queue. The
1459 * even passes will write 1. The odd passes will write 0.
1461 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1462 /* unused4 is 15 b */
1465 * This field identifies the CFA action rule that was used for
1468 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1470 * This is the size in bytes of the inner most L4 header. This
1471 * can be subtracted from the payload_offset to determine the
1472 * start of the inner most L4 header.
1475 * This is the offset from the beginning of the packet in bytes
1476 * for the outer L3 header. If there is no outer L3 header, then
1477 * this value is zero.
1479 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1480 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1482 * This is the offset from the beginning of the packet in bytes
1483 * for the inner most L2 header.
1485 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1486 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1488 * This is the offset from the beginning of the packet in bytes
1489 * for the inner most L3 header.
1491 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1492 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1494 * This is the size in bytes of the inner most L4 header. This
1495 * can be subtracted from the payload_offset to determine the
1496 * start of the inner most L4 header.
1498 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1499 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1500 } __attribute__((packed));
1502 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1503 struct rx_tpa_end_cmpl {
1504 uint16_t flags_type;
1506 * This field indicates the exact type of the completion. By
1507 * convention, the LSB identifies the length of the record in
1508 * 16B units. Even values indicate 16B records. Odd values
1509 * indicate 32B records.
1511 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1512 #define RX_TPA_END_CMPL_TYPE_SFT 0
1514 * RX L2 TPA End Completion: Completion at the
1515 * end of a TPA operation. Length = 32B
1517 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1519 * When this bit is '1', it indicates a packet that has an error
1520 * of some type. Type of error is indicated in error_flags.
1522 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1523 /* This field indicates how the packet was placed in the buffer. */
1524 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1525 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1527 * Jumbo: TPA Packet was placed using jumbo
1528 * algorithm. This means that the first buffer
1529 * will be filled with data before moving to
1530 * aggregation buffers. Each aggregation buffer
1531 * will be filled before moving to the next
1532 * aggregation buffer.
1534 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1536 * Header/Data Separation: Packet was placed
1537 * using Header/Data separation algorithm. The
1538 * separation location is indicated by the itype
1541 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1543 * GRO/Jumbo: Packet will be placed using
1544 * GRO/Jumbo where the first packet is filled
1545 * with data. Subsequent packets will be placed
1546 * such that any one packet does not span two
1547 * aggregation buffers unless it starts at the
1548 * beginning of an aggregation buffer.
1550 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1552 * GRO/Header-Data Separation: Packet will be
1553 * placed using GRO/HDS where the header is in
1554 * the first packet. Payload of each packet will
1555 * be placed such that any one packet does not
1556 * span two aggregation buffers unless it starts
1557 * at the beginning of an aggregation buffer.
1559 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1560 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST \
1561 RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1563 #define RX_TPA_END_CMPL_FLAGS_UNUSED_MASK UINT32_C(0xc00)
1564 #define RX_TPA_END_CMPL_FLAGS_UNUSED_SFT 10
1566 * This value indicates what the inner packet determined for the
1567 * packet was. - 2 TCP Packet Indicates that the packet was IP
1568 * and TCP. This indicates that the ip_cs field is valid and
1569 * that the tcp_udp_cs field is valid and contains the TCP
1570 * checksum. This also indicates that the payload_offset field
1573 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1574 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1575 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1576 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1579 * This value is zero for TPA End completions. There is no data
1580 * in the buffer that corresponds to the opaque value in this
1585 * This is a copy of the opaque field from the RX BD this
1586 * completion corresponds to.
1588 uint8_t agg_bufs_v1;
1589 /* unused1 is 1 b */
1591 * This value is written by the NIC such that it will be
1592 * different for each pass through the completion queue. The
1593 * even passes will write 1. The odd passes will write 0.
1595 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1597 * This value is the number of aggregation buffers that follow
1598 * this entry in the completion ring that are a part of this
1599 * aggregation packet. If the value is zero, then the packet is
1600 * completely contained in the buffer space provided in the
1601 * aggregation start completion.
1603 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1604 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1605 /* unused1 is 1 b */
1607 /* This value is the number of segments in the TPA operation. */
1608 uint8_t payload_offset;
1610 * This value indicates the offset in bytes from the beginning
1611 * of the packet where the inner payload starts. This value is
1612 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
1613 * indicates an offset of 256 bytes.
1617 * This is the aggregation ID that the completion is associated
1618 * with. Use this number to correlate the TPA start completion
1619 * with the TPA end completion.
1621 /* unused2 is 1 b */
1623 * This is the aggregation ID that the completion is associated
1624 * with. Use this number to correlate the TPA start completion
1625 * with the TPA end completion.
1627 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1628 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1631 * For non-GRO packets, this value is the timestamp delta
1632 * between earliest and latest timestamp values for TPA packet.
1633 * If packets were not time stamped, then delta will be zero.
1634 * For GRO packets, this field is zero except for the following
1635 * sub-fields. - tsdelta[31] Timestamp present indication. When
1636 * '0', no Timestamp option is in the packet. When '1', then a
1637 * Timestamp option is present in the packet.
1639 } __attribute__((packed));
1641 /* last 16 bytes of RX TPA End Completion Record */
1642 struct rx_tpa_end_cmpl_hi {
1643 uint32_t tpa_dup_acks;
1644 /* unused3 is 28 b */
1646 * This value is the number of duplicate ACKs that have been
1647 * received as part of the TPA operation.
1649 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1650 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1651 /* unused3 is 28 b */
1652 uint16_t tpa_seg_len;
1654 * This value is the valid when TPA completion is active. It
1655 * indicates the length of the longest segment of the TPA
1656 * operation for LRO mode and the length of the first segment in
1657 * GRO mode. This value may be used by GRO software to re-
1658 * construct the original packet stream from the TPA packet.
1659 * This is the length of all but the last segment for GRO. In
1660 * LRO mode this value may be used to indicate MSS size to the
1664 /* unused4 is 16 b */
1667 * This value is written by the NIC such that it will be
1668 * different for each pass through the completion queue. The
1669 * even passes will write 1. The odd passes will write 0.
1671 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1673 * This error indicates that there was some sort of problem with
1674 * the BDs for the packet that was found after part of the
1675 * packet was already placed. The packet should be treated as
1678 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1679 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1681 * This error occurs when there is a fatal HW
1682 * problem in the chip only. It indicates that
1683 * there were not BDs on chip but that there was
1684 * adequate reservation. provided by the TPA
1687 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1688 (UINT32_C(0x2) << 1)
1690 * This error occurs when TPA block was not
1691 * configured to reserve adequate BDs for TPA
1692 * operations on this RX ring. All data for the
1693 * TPA operation was not placed. This error can
1694 * also be generated when the number of segments
1695 * is not programmed correctly in TPA and the 33
1696 * total aggregation buffers allowed for the TPA
1697 * operation has been exceeded.
1699 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR \
1700 (UINT32_C(0x4) << 1)
1701 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST \
1702 RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1703 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1704 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1706 /* unused5 is 16 b */
1707 uint32_t start_opaque;
1709 * This is the opaque value that was completed for the TPA start
1710 * completion that corresponds to this TPA end completion.
1712 } __attribute__((packed));
1714 /* HWRM Forwarded Request (16 bytes) */
1715 struct hwrm_fwd_req_cmpl {
1716 uint16_t req_len_type;
1717 /* Length of forwarded request in bytes. */
1719 * This field indicates the exact type of the completion. By
1720 * convention, the LSB identifies the length of the record in
1721 * 16B units. Even values indicate 16B records. Odd values
1722 * indicate 32B records.
1724 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1725 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1726 /* Forwarded HWRM Request */
1727 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1728 /* Length of forwarded request in bytes. */
1729 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1730 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1733 * Source ID of this request. Typically used in forwarding
1734 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1735 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1739 /* unused1 is 32 b */
1740 uint32_t req_buf_addr_v[2];
1741 /* Address of forwarded request. */
1743 * This value is written by the NIC such that it will be
1744 * different for each pass through the completion queue. The
1745 * even passes will write 1. The odd passes will write 0.
1747 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1748 /* Address of forwarded request. */
1749 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1750 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1751 } __attribute__((packed));
1753 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1754 struct hwrm_async_event_cmpl {
1756 /* unused1 is 10 b */
1758 * This field indicates the exact type of the completion. By
1759 * convention, the LSB identifies the length of the record in
1760 * 16B units. Even values indicate 16B records. Odd values
1761 * indicate 32B records.
1763 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1764 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1765 /* HWRM Asynchronous Event Information */
1766 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1767 /* unused1 is 10 b */
1769 /* Identifiers of events. */
1770 /* Link status changed */
1771 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1772 /* Link MTU changed */
1773 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1774 /* Link speed changed */
1775 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1776 /* DCB Configuration changed */
1777 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1778 /* Port connection not allowed */
1779 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1780 /* Link speed configuration was not allowed */
1781 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1783 /* Link speed configuration change */
1784 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1785 /* Port PHY configuration change */
1786 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1787 /* Function driver unloaded */
1788 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1789 /* Function driver loaded */
1790 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1791 /* Function FLR related processing has completed */
1792 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1793 /* PF driver unloaded */
1794 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1795 /* PF driver loaded */
1796 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1797 /* VF Function Level Reset (FLR) */
1798 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1799 /* VF MAC Address Change */
1800 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1801 /* PF-VF communication channel status change. */
1802 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1804 /* VF Configuration Change */
1805 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1807 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1808 uint32_t event_data2;
1809 /* Event specific data */
1813 * This value is written by the NIC such that it will be
1814 * different for each pass through the completion queue. The
1815 * even passes will write 1. The odd passes will write 0.
1817 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1819 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1820 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1821 uint8_t timestamp_lo;
1822 /* 8-lsb timestamp from POR (100-msec resolution) */
1823 uint16_t timestamp_hi;
1824 /* 16-lsb timestamp from POR (100-msec resolution) */
1825 uint32_t event_data1;
1826 /* Event specific data */
1827 } __attribute__((packed));
1831 * Description: This function is called by a driver to determine the HWRM
1832 * interface version supported by the HWRM firmware, the version of HWRM
1833 * firmware implementation, the name of HWRM firmware, the versions of other
1834 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1835 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1836 * be considered an invalid version.
1838 /* Input (24 bytes) */
1839 struct hwrm_ver_get_input {
1842 * This value indicates what type of request this is. The format
1843 * for the rest of the command is determined by this field.
1847 * This value indicates the what completion ring the request
1848 * will be optionally completed on. If the value is -1, then no
1849 * CR completion will be generated. Any other value must be a
1850 * valid CR ring_id value for this function.
1853 /* This value indicates the command sequence number. */
1856 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1857 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1862 * This is the host address where the response will be written
1863 * when the request is complete. This area must be 16B aligned
1864 * and must be cleared to zero before the request is made.
1866 uint8_t hwrm_intf_maj;
1868 * This field represents the major version of HWRM interface
1869 * specification supported by the driver HWRM implementation.
1870 * The interface major version is intended to change only when
1871 * non backward compatible changes are made to the HWRM
1872 * interface specification.
1874 uint8_t hwrm_intf_min;
1876 * This field represents the minor version of HWRM interface
1877 * specification supported by the driver HWRM implementation. A
1878 * change in interface minor version is used to reflect
1879 * significant backward compatible modification to HWRM
1880 * interface specification. This can be due to addition or
1881 * removal of functionality. HWRM interface specifications with
1882 * the same major version but different minor versions are
1885 uint8_t hwrm_intf_upd;
1887 * This field represents the update version of HWRM interface
1888 * specification supported by the driver HWRM implementation.
1889 * The interface update version is used to reflect minor changes
1890 * or bug fixes to a released HWRM interface specification.
1892 uint8_t unused_0[5];
1893 } __attribute__((packed));
1895 /* Output (128 bytes) */
1896 struct hwrm_ver_get_output {
1897 uint16_t error_code;
1899 * Pass/Fail or error type Note: receiver to verify the in
1900 * parameters, and fail the call with an error when appropriate
1903 /* This field returns the type of original request. */
1905 /* This field provides original sequence number of the command. */
1908 * This field is the length of the response in bytes. The last
1909 * byte of the response is a valid flag that will read as '1'
1910 * when the command has been completely written to memory.
1912 uint8_t hwrm_intf_maj;
1914 * This field represents the major version of HWRM interface
1915 * specification supported by the HWRM implementation. The
1916 * interface major version is intended to change only when non
1917 * backward compatible changes are made to the HWRM interface
1918 * specification. A HWRM implementation that is compliant with
1919 * this specification shall provide value of 1 in this field.
1921 uint8_t hwrm_intf_min;
1923 * This field represents the minor version of HWRM interface
1924 * specification supported by the HWRM implementation. A change
1925 * in interface minor version is used to reflect significant
1926 * backward compatible modification to HWRM interface
1927 * specification. This can be due to addition or removal of
1928 * functionality. HWRM interface specifications with the same
1929 * major version but different minor versions are compatible. A
1930 * HWRM implementation that is compliant with this specification
1931 * shall provide value of 2 in this field.
1933 uint8_t hwrm_intf_upd;
1935 * This field represents the update version of HWRM interface
1936 * specification supported by the HWRM implementation. The
1937 * interface update version is used to reflect minor changes or
1938 * bug fixes to a released HWRM interface specification. A HWRM
1939 * implementation that is compliant with this specification
1940 * shall provide value of 2 in this field.
1942 uint8_t hwrm_intf_rsvd;
1943 uint8_t hwrm_fw_maj;
1945 * This field represents the major version of HWRM firmware. A
1946 * change in firmware major version represents a major firmware
1949 uint8_t hwrm_fw_min;
1951 * This field represents the minor version of HWRM firmware. A
1952 * change in firmware minor version represents significant
1953 * firmware functionality changes.
1955 uint8_t hwrm_fw_bld;
1957 * This field represents the build version of HWRM firmware. A
1958 * change in firmware build version represents bug fixes to a
1959 * released firmware.
1961 uint8_t hwrm_fw_rsvd;
1963 * This field is a reserved field. This field can be used to
1964 * represent firmware branches or customer specific releases
1965 * tied to a specific (major,minor,update) version of the HWRM
1968 uint8_t mgmt_fw_maj;
1970 * This field represents the major version of mgmt firmware. A
1971 * change in major version represents a major release.
1973 uint8_t mgmt_fw_min;
1975 * This field represents the minor version of mgmt firmware. A
1976 * change in minor version represents significant functionality
1979 uint8_t mgmt_fw_bld;
1981 * This field represents the build version of mgmt firmware. A
1982 * change in update version represents bug fixes.
1984 uint8_t mgmt_fw_rsvd;
1986 * This field is a reserved field. This field can be used to
1987 * represent firmware branches or customer specific releases
1988 * tied to a specific (major,minor,update) version
1990 uint8_t netctrl_fw_maj;
1992 * This field represents the major version of network control
1993 * firmware. A change in major version represents a major
1996 uint8_t netctrl_fw_min;
1998 * This field represents the minor version of network control
1999 * firmware. A change in minor version represents significant
2000 * functionality changes.
2002 uint8_t netctrl_fw_bld;
2004 * This field represents the build version of network control
2005 * firmware. A change in update version represents bug fixes.
2007 uint8_t netctrl_fw_rsvd;
2009 * This field is a reserved field. This field can be used to
2010 * represent firmware branches or customer specific releases
2011 * tied to a specific (major,minor,update) version
2013 uint32_t dev_caps_cfg;
2015 * This field is used to indicate device's capabilities and
2019 * If set to 1, then secure firmware update behavior is
2020 * supported. If set to 0, then secure firmware update behavior
2023 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
2026 * If set to 1, then firmware based DCBX agent is supported. If
2027 * set to 0, then firmware based DCBX agent capability is not
2028 * supported on this device.
2030 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
2033 * If set to 1, then HWRM short command format is supported. If
2034 * set to 0, then HWRM short command format is not supported.
2036 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
2039 * If set to 1, then HWRM short command format is required. If
2040 * set to 0, then HWRM short command format is not required.
2042 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
2044 uint8_t roce_fw_maj;
2046 * This field represents the major version of RoCE firmware. A
2047 * change in major version represents a major release.
2049 uint8_t roce_fw_min;
2051 * This field represents the minor version of RoCE firmware. A
2052 * change in minor version represents significant functionality
2055 uint8_t roce_fw_bld;
2057 * This field represents the build version of RoCE firmware. A
2058 * change in update version represents bug fixes.
2060 uint8_t roce_fw_rsvd;
2062 * This field is a reserved field. This field can be used to
2063 * represent firmware branches or customer specific releases
2064 * tied to a specific (major,minor,update) version
2066 char hwrm_fw_name[16];
2068 * This field represents the name of HWRM FW (ASCII chars with
2071 char mgmt_fw_name[16];
2073 * This field represents the name of mgmt FW (ASCII chars with
2076 char netctrl_fw_name[16];
2078 * This field represents the name of network control firmware
2079 * (ASCII chars with NULL at the end).
2081 uint32_t reserved2[4];
2083 * This field is reserved for future use. The responder should
2084 * set it to 0. The requester should ignore this field.
2086 char roce_fw_name[16];
2088 * This field represents the name of RoCE FW (ASCII chars with
2092 /* This field returns the chip number. */
2094 /* This field returns the revision of chip. */
2096 /* This field returns the chip metal number. */
2097 uint8_t chip_bond_id;
2098 /* This field returns the bond id of the chip. */
2099 uint8_t chip_platform_type;
2101 * This value indicates the type of platform used for chip
2105 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
2106 /* FPGA platform of the chip. */
2107 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
2108 /* Palladium platform of the chip. */
2109 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
2110 uint16_t max_req_win_len;
2112 * This field returns the maximum value of request window that
2113 * is supported by the HWRM. The request window is mapped into
2114 * device address space using MMIO.
2116 uint16_t max_resp_len;
2117 /* This field returns the maximum value of response buffer in bytes. */
2118 uint16_t def_req_timeout;
2120 * This field returns the default request timeout value in
2128 * This field is used in Output records to indicate that the
2129 * output is completely written to RAM. This field should be
2130 * read as '1' to indicate that the output has been completely
2131 * written. When writing a command completion or response to an
2132 * internal processor, the order of writes has to be such that
2133 * this field is written last.
2135 } __attribute__((packed));
2137 /* hwrm_func_reset */
2139 * Description: This command resets a hardware function (PCIe function) and
2140 * frees any resources used by the function. This command shall be initiated by
2141 * the driver after an FLR has occurred to prepare the function for re-use. This
2142 * command may also be initiated by a driver prior to doing it's own
2143 * configuration. This command puts the function into the reset state. In the
2144 * reset state, global and port related features of the chip are not available.
2147 * Note: This command will reset a function that has already been disabled or
2148 * idled. The command returns all the resources owned by the function so a new
2149 * driver may allocate and configure resources normally.
2151 /* Input (24 bytes) */
2152 struct hwrm_func_reset_input {
2155 * This value indicates what type of request this is. The format
2156 * for the rest of the command is determined by this field.
2160 * This value indicates the what completion ring the request
2161 * will be optionally completed on. If the value is -1, then no
2162 * CR completion will be generated. Any other value must be a
2163 * valid CR ring_id value for this function.
2166 /* This value indicates the command sequence number. */
2169 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2170 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2175 * This is the host address where the response will be written
2176 * when the request is complete. This area must be 16B aligned
2177 * and must be cleared to zero before the request is made.
2180 /* This bit must be '1' for the vf_id_valid field to be configured. */
2181 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
2184 * The ID of the VF that this PF is trying to reset. Only the
2185 * parent PF shall be allowed to reset a child VF. A parent PF
2186 * driver shall use this field only when a specific child VF is
2187 * requested to be reset.
2189 uint8_t func_reset_level;
2190 /* This value indicates the level of a function reset. */
2192 * Reset the caller function and its children
2193 * VFs (if any). If no children functions exist,
2194 * then reset the caller function only.
2196 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
2197 /* Reset the caller function only */
2198 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
2200 * Reset all children VFs of the caller function
2201 * driver if the caller is a PF driver. It is an
2202 * error to specify this level by a VF driver.
2203 * It is an error to specify this level by a PF
2204 * driver with no children VFs.
2206 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2209 * Reset a specific VF of the caller function
2210 * driver if the caller is the parent PF driver.
2211 * It is an error to specify this level by a VF
2212 * driver. It is an error to specify this level
2213 * by a PF driver that is not the parent of the
2214 * VF that is being requested to reset.
2216 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
2218 } __attribute__((packed));
2220 /* Output (16 bytes) */
2221 struct hwrm_func_reset_output {
2222 uint16_t error_code;
2224 * Pass/Fail or error type Note: receiver to verify the in
2225 * parameters, and fail the call with an error when appropriate
2228 /* This field returns the type of original request. */
2230 /* This field provides original sequence number of the command. */
2233 * This field is the length of the response in bytes. The last
2234 * byte of the response is a valid flag that will read as '1'
2235 * when the command has been completely written to memory.
2243 * This field is used in Output records to indicate that the
2244 * output is completely written to RAM. This field should be
2245 * read as '1' to indicate that the output has been completely
2246 * written. When writing a command completion or response to an
2247 * internal processor, the order of writes has to be such that
2248 * this field is written last.
2250 } __attribute__((packed));
2252 /* hwrm_func_qcaps */
2254 * Description: This command returns capabilities of a function. The input FID
2255 * value is used to indicate what function is being queried. This allows a
2256 * physical function driver to query virtual functions that are children of the
2257 * physical function. The output FID value is needed to configure Rings and
2258 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2260 /* Input (24 bytes) */
2261 struct hwrm_func_qcaps_input {
2264 * This value indicates what type of request this is. The format
2265 * for the rest of the command is determined by this field.
2269 * This value indicates the what completion ring the request
2270 * will be optionally completed on. If the value is -1, then no
2271 * CR completion will be generated. Any other value must be a
2272 * valid CR ring_id value for this function.
2275 /* This value indicates the command sequence number. */
2278 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2279 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2284 * This is the host address where the response will be written
2285 * when the request is complete. This area must be 16B aligned
2286 * and must be cleared to zero before the request is made.
2290 * Function ID of the function that is being queried. 0xFF...
2291 * (All Fs) if the query is for the requesting function.
2293 uint16_t unused_0[3];
2294 } __attribute__((packed));
2296 /* Output (80 bytes) */
2297 struct hwrm_func_qcaps_output {
2298 uint16_t error_code;
2300 * Pass/Fail or error type Note: receiver to verify the in
2301 * parameters, and fail the call with an error when appropriate
2304 /* This field returns the type of original request. */
2306 /* This field provides original sequence number of the command. */
2309 * This field is the length of the response in bytes. The last
2310 * byte of the response is a valid flag that will read as '1'
2311 * when the command has been completely written to memory.
2315 * FID value. This value is used to identify operations on the
2316 * PCI bus as belonging to a particular PCI function.
2320 * Port ID of port that this function is associated with. Valid
2321 * only for the PF. 0xFF... (All Fs) if this function is not
2322 * associated with any port. 0xFF... (All Fs) if this function
2323 * is called from a VF.
2326 /* If 1, then Push mode is supported on this function. */
2327 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2329 * If 1, then the global MSI-X auto-masking is enabled for the
2332 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2335 * If 1, then the Precision Time Protocol (PTP) processing is
2336 * supported on this function. The HWRM should enable PTP on
2337 * only a single Physical Function (PF) per port.
2339 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2341 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2342 * supported on this function.
2344 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2346 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2347 * supported on this function.
2349 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2351 * If 1, then control and configuration of WoL magic packet are
2352 * supported on this function.
2354 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
2357 * If 1, then control and configuration of bitmap pattern packet
2358 * are supported on this function.
2360 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2362 * If set to 1, then the control and configuration of rate limit
2363 * of an allocated TX ring on the queried function is supported.
2365 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2367 * If 1, then control and configuration of minimum and maximum
2368 * bandwidths are supported on the queried function.
2370 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2372 * If the query is for a VF, then this flag shall be ignored. If
2373 * this query is for a PF and this flag is set to 1, then the PF
2374 * has the capability to set the rate limits on the TX rings of
2375 * its children VFs. If this query is for a PF and this flag is
2376 * set to 0, then the PF does not have the capability to set the
2377 * rate limits on the TX rings of its children VFs.
2379 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
2382 * If the query is for a VF, then this flag shall be ignored. If
2383 * this query is for a PF and this flag is set to 1, then the PF
2384 * has the capability to set the minimum and/or maximum
2385 * bandwidths for its children VFs. If this query is for a PF
2386 * and this flag is set to 0, then the PF does not have the
2387 * capability to set the minimum or maximum bandwidths for its
2390 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2392 * Standard TX Ring mode is used for the allocation of TX ring
2393 * and underlying scheduling resources that allow bandwidth
2394 * reservation and limit settings on the queried function. If
2395 * set to 1, then standard TX ring mode is supported on the
2396 * queried function. If set to 0, then standard TX ring mode is
2397 * not available on the queried function.
2399 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
2401 uint8_t mac_address[6];
2403 * This value is current MAC address configured for this
2404 * function. A value of 00-00-00-00-00-00 indicates no MAC
2405 * address is currently configured.
2407 uint16_t max_rsscos_ctx;
2409 * The maximum number of RSS/COS contexts that can be allocated
2412 uint16_t max_cmpl_rings;
2414 * The maximum number of completion rings that can be allocated
2417 uint16_t max_tx_rings;
2419 * The maximum number of transmit rings that can be allocated to
2422 uint16_t max_rx_rings;
2424 * The maximum number of receive rings that can be allocated to
2427 uint16_t max_l2_ctxs;
2429 * The maximum number of L2 contexts that can be allocated to
2434 * The maximum number of VNICs that can be allocated to the
2437 uint16_t first_vf_id;
2439 * The identifier for the first VF enabled on a PF. This is
2440 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2441 * this command is called on a PF with SR-IOV disabled or on a
2446 * The maximum number of VFs that can be allocated to the
2447 * function. This is valid only on the PF with SR-IOV enabled.
2448 * 0xFF... (All Fs) if this command is called on a PF with SR-
2449 * IOV disabled or on a VF.
2451 uint16_t max_stat_ctx;
2453 * The maximum number of statistic contexts that can be
2454 * allocated to the function.
2456 uint32_t max_encap_records;
2458 * The maximum number of Encapsulation records that can be
2459 * offloaded by this function.
2461 uint32_t max_decap_records;
2463 * The maximum number of decapsulation records that can be
2464 * offloaded by this function.
2466 uint32_t max_tx_em_flows;
2468 * The maximum number of Exact Match (EM) flows that can be
2469 * offloaded by this function on the TX side.
2471 uint32_t max_tx_wm_flows;
2473 * The maximum number of Wildcard Match (WM) flows that can be
2474 * offloaded by this function on the TX side.
2476 uint32_t max_rx_em_flows;
2478 * The maximum number of Exact Match (EM) flows that can be
2479 * offloaded by this function on the RX side.
2481 uint32_t max_rx_wm_flows;
2483 * The maximum number of Wildcard Match (WM) flows that can be
2484 * offloaded by this function on the RX side.
2486 uint32_t max_mcast_filters;
2488 * The maximum number of multicast filters that can be supported
2489 * by this function on the RX side.
2491 uint32_t max_flow_id;
2493 * The maximum value of flow_id that can be supported in
2494 * completion records.
2496 uint32_t max_hw_ring_grps;
2498 * The maximum number of HW ring groups that can be supported on
2501 uint16_t max_sp_tx_rings;
2503 * The maximum number of strict priority transmit rings that can
2504 * be allocated to the function. This number indicates the
2505 * maximum number of TX rings that can be assigned strict
2506 * priorities out of the maximum number of TX rings that can be
2507 * allocated (max_tx_rings) to the function.
2512 * This field is used in Output records to indicate that the
2513 * output is completely written to RAM. This field should be
2514 * read as '1' to indicate that the output has been completely
2515 * written. When writing a command completion or response to an
2516 * internal processor, the order of writes has to be such that
2517 * this field is written last.
2519 } __attribute__((packed));
2521 /* hwrm_func_qcfg */
2523 * Description: This command returns the current configuration of a function.
2524 * The input FID value is used to indicate what function is being queried. This
2525 * allows a physical function driver to query virtual functions that are
2526 * children of the physical function. The output FID value is needed to
2527 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
2528 * the PCI bus. This command should be called by every driver after
2529 * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
2530 * The values returned by hwrm_func_qcfg are the values the driver shall use.
2531 * These values may be different than what was originally requested in the
2532 * 'hwrm_func_cfg' command.
2534 /* Input (24 bytes) */
2535 struct hwrm_func_qcfg_input {
2538 * This value indicates what type of request this is. The format
2539 * for the rest of the command is determined by this field.
2543 * This value indicates the what completion ring the request
2544 * will be optionally completed on. If the value is -1, then no
2545 * CR completion will be generated. Any other value must be a
2546 * valid CR ring_id value for this function.
2549 /* This value indicates the command sequence number. */
2552 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2553 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2558 * This is the host address where the response will be written
2559 * when the request is complete. This area must be 16B aligned
2560 * and must be cleared to zero before the request is made.
2564 * Function ID of the function that is being queried. 0xFF...
2565 * (All Fs) if the query is for the requesting function.
2567 uint16_t unused_0[3];
2568 } __attribute__((packed));
2570 /* Output (72 bytes) */
2571 struct hwrm_func_qcfg_output {
2572 uint16_t error_code;
2574 * Pass/Fail or error type Note: receiver to verify the in
2575 * parameters, and fail the call with an error when appropriate
2578 /* This field returns the type of original request. */
2580 /* This field provides original sequence number of the command. */
2583 * This field is the length of the response in bytes. The last
2584 * byte of the response is a valid flag that will read as '1'
2585 * when the command has been completely written to memory.
2589 * FID value. This value is used to identify operations on the
2590 * PCI bus as belonging to a particular PCI function.
2594 * Port ID of port that this function is associated with.
2595 * 0xFF... (All Fs) if this function is not associated with any
2600 * This value is the current VLAN setting for this function. The
2601 * value of 0 for this field indicates no priority tagging or
2602 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2603 * Control Information (TCI) format that includes both Priority
2604 * Code Point (PCP) and VLAN Identifier (VID).
2608 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2609 * the port associated with this function.
2611 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2614 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2615 * enabled on the port associated with this function.
2617 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2619 * If set to 1, then FW based DCBX agent is enabled and running
2620 * on the port associated with this function. If set to 0, then
2621 * DCBX agent is not running in the firmware.
2623 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2626 * Standard TX Ring mode is used for the allocation of TX ring
2627 * and underlying scheduling resources that allow bandwidth
2628 * reservation and limit settings on the queried function. If
2629 * set to 1, then standard TX ring mode is enabled on the
2630 * queried function. If set to 0, then the standard TX ring mode
2631 * is disabled on the queried function. In this extended TX ring
2632 * resource mode, the minimum and maximum bandwidth settings are
2633 * not supported to allow the allocation of TX rings to span
2634 * multiple scheduler nodes.
2636 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
2639 * If set to 1 then FW based LLDP agent is enabled and running
2640 * on the port associated with this function. If set to 0 then
2641 * the LLDP agent is not running in the firmware.
2643 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
2645 * If set to 1, then multi-host mode is active for this
2646 * function. If set to 0, then multi-host mode is inactive for
2647 * this function or not applicable for this device.
2649 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST UINT32_C(0x20)
2650 uint8_t mac_address[6];
2652 * This value is current MAC address configured for this
2653 * function. A value of 00-00-00-00-00-00 indicates no MAC
2654 * address is currently configured.
2658 * This value is current PCI ID of this function. If ARI is
2659 * enabled, then it is Bus Number (8b):Function Number(8b).
2660 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2663 uint16_t alloc_rsscos_ctx;
2665 * The number of RSS/COS contexts currently allocated to the
2668 uint16_t alloc_cmpl_rings;
2670 * The number of completion rings currently allocated to the
2671 * function. This does not include the rings allocated to any
2672 * children functions if any.
2674 uint16_t alloc_tx_rings;
2676 * The number of transmit rings currently allocated to the
2677 * function. This does not include the rings allocated to any
2678 * children functions if any.
2680 uint16_t alloc_rx_rings;
2682 * The number of receive rings currently allocated to the
2683 * function. This does not include the rings allocated to any
2684 * children functions if any.
2686 uint16_t alloc_l2_ctx;
2687 /* The allocated number of L2 contexts to the function. */
2688 uint16_t alloc_vnics;
2689 /* The allocated number of vnics to the function. */
2692 * The maximum transmission unit of the function. For rings
2693 * allocated on this function, this default value is used if
2694 * ring MTU is not specified.
2698 * The maximum receive unit of the function. For vnics allocated
2699 * on this function, this default value is used if vnic MRU is
2702 uint16_t stat_ctx_id;
2703 /* The statistics context assigned to a function. */
2704 uint8_t port_partition_type;
2706 * The HWRM shall return Unknown value for this field when this
2707 * command is used to query VF's configuration.
2709 /* Single physical function */
2710 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2711 /* Multiple physical functions */
2712 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2713 /* Network Partitioning 1.0 */
2714 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
2715 /* Network Partitioning 1.5 */
2716 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
2717 /* Network Partitioning 2.0 */
2718 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
2720 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
2721 uint8_t port_pf_cnt;
2723 * This field will indicate number of physical functions on this
2724 * port_partition. HWRM shall return unavail (i.e. value of 0)
2725 * for this field when this command is used to query VF's
2726 * configuration or from older firmware that doesn't support
2729 /* number of PFs is not available */
2730 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PF_CNT_UNAVAIL UINT32_C(0x0)
2731 uint16_t dflt_vnic_id;
2732 /* The default VNIC ID assigned to a function that is being queried. */
2737 * Minimum BW allocated for this function. The HWRM will
2738 * translate this value into byte counter and time interval used
2739 * for the scheduler inside the device. A value of 0 indicates
2740 * the minimum bandwidth is not configured.
2742 /* The bandwidth value. */
2743 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2744 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2745 /* The granularity of the value (bits or bytes). */
2746 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
2747 /* Value is in bits. */
2748 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2749 /* Value is in bytes. */
2750 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
2751 (UINT32_C(0x1) << 28)
2752 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
2753 FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
2754 /* bw_value_unit is 3 b */
2755 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2756 UINT32_C(0xe0000000)
2757 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2758 /* Value is in Mb or MB (base 10). */
2759 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
2760 (UINT32_C(0x0) << 29)
2761 /* Value is in Kb or KB (base 10). */
2762 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
2763 (UINT32_C(0x2) << 29)
2764 /* Value is in bits or bytes. */
2765 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
2766 (UINT32_C(0x4) << 29)
2767 /* Value is in Gb or GB (base 10). */
2768 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
2769 (UINT32_C(0x6) << 29)
2770 /* Value is in 1/100th of a percentage of total bandwidth. */
2771 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2772 (UINT32_C(0x1) << 29)
2774 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2775 (UINT32_C(0x7) << 29)
2776 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2777 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2780 * Maximum BW allocated for this function. The HWRM will
2781 * translate this value into byte counter and time interval used
2782 * for the scheduler inside the device. A value of 0 indicates
2783 * that the maximum bandwidth is not configured.
2785 /* The bandwidth value. */
2786 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2787 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2788 /* The granularity of the value (bits or bytes). */
2789 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
2790 /* Value is in bits. */
2791 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2792 /* Value is in bytes. */
2793 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
2794 (UINT32_C(0x1) << 28)
2795 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
2796 FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
2797 /* bw_value_unit is 3 b */
2798 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2799 UINT32_C(0xe0000000)
2800 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2801 /* Value is in Mb or MB (base 10). */
2802 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
2803 (UINT32_C(0x0) << 29)
2804 /* Value is in Kb or KB (base 10). */
2805 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
2806 (UINT32_C(0x2) << 29)
2807 /* Value is in bits or bytes. */
2808 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
2809 (UINT32_C(0x4) << 29)
2810 /* Value is in Gb or GB (base 10). */
2811 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
2812 (UINT32_C(0x6) << 29)
2813 /* Value is in 1/100th of a percentage of total bandwidth. */
2814 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2815 (UINT32_C(0x1) << 29)
2817 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2818 (UINT32_C(0x7) << 29)
2819 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2820 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2823 * This value indicates the Edge virtual bridge mode for the
2824 * domain that this function belongs to.
2826 /* No Edge Virtual Bridging (EVB) */
2827 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2828 /* Virtual Ethernet Bridge (VEB) */
2829 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2830 /* Virtual Ethernet Port Aggregator (VEPA) */
2831 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2835 * The number of VFs that are allocated to the function. This is
2836 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2837 * this command is called on a PF with SR-IOV disabled or on a
2840 uint32_t alloc_mcast_filters;
2842 * The number of allocated multicast filters for this function
2845 uint32_t alloc_hw_ring_grps;
2846 /* The number of allocated HW ring groups for this function. */
2847 uint16_t alloc_sp_tx_rings;
2849 * The number of strict priority transmit rings out of currently
2850 * allocated TX rings to the function (alloc_tx_rings).
2855 * This field is used in Output records to indicate that the
2856 * output is completely written to RAM. This field should be
2857 * read as '1' to indicate that the output has been completely
2858 * written. When writing a command completion or response to an
2859 * internal processor, the order of writes has to be such that
2860 * this field is written last.
2862 } __attribute__((packed));
2864 /* hwrm_func_vlan_qcfg */
2866 * Description: This command should be called by PF driver to get the current
2867 * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
2870 /* Input (24 bytes) */
2871 struct hwrm_func_vlan_qcfg_input {
2874 * This value indicates what type of request this is. The format
2875 * for the rest of the command is determined by this field.
2879 * This value indicates the what completion ring the request
2880 * will be optionally completed on. If the value is -1, then no
2881 * CR completion will be generated. Any other value must be a
2882 * valid CR ring_id value for this function.
2885 /* This value indicates the command sequence number. */
2888 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2889 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2894 * This is the host address where the response will be written
2895 * when the request is complete. This area must be 16B aligned
2896 * and must be cleared to zero before the request is made.
2900 * Function ID of the function that is being configured. If set
2901 * to 0xFF... (All Fs), then the configuration is for the
2902 * requesting function.
2904 uint16_t unused_0[3];
2907 /* Output (40 bytes) */
2908 struct hwrm_func_vlan_qcfg_output {
2909 uint16_t error_code;
2911 * Pass/Fail or error type Note: receiver to verify the in
2912 * parameters, and fail the call with an error when appropriate
2915 /* This field returns the type of original request. */
2917 /* This field provides original sequence number of the command. */
2920 * This field is the length of the response in bytes. The last
2921 * byte of the response is a valid flag that will read as '1'
2922 * when the command has been completely written to memory.
2930 * This field is used in Output records to indicate that the
2931 * output is completely written to RAM. This field should be
2932 * read as '1' to indicate that the output has been completely
2933 * written. When writing a command completion or response to an
2934 * internal processor, the order of writes has to be such that
2935 * this field is written last.
2938 /* S-TAG VLAN identifier configured for the function. */
2940 /* S-TAG PCP value configured for the function. */
2944 * S-TAG TPID value configured for the function. This field is
2945 * specified in network byte order.
2948 /* C-TAG VLAN identifier configured for the function. */
2950 /* C-TAG PCP value configured for the function. */
2954 * C-TAG TPID value configured for the function. This field is
2955 * specified in network byte order.
2964 /* hwrm_func_vlan_cfg */
2966 * Description: This command allows PF driver to configure C-TAG, S-TAG and
2967 * corresponding PCP and TPID values for a function.
2969 /* Input (48 bytes) */
2970 struct hwrm_func_vlan_cfg_input {
2973 * This value indicates what type of request this is. The format
2974 * for the rest of the command is determined by this field.
2978 * This value indicates the what completion ring the request
2979 * will be optionally completed on. If the value is -1, then no
2980 * CR completion will be generated. Any other value must be a
2981 * valid CR ring_id value for this function.
2984 /* This value indicates the command sequence number. */
2987 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2988 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2993 * This is the host address where the response will be written
2994 * when the request is complete. This area must be 16B aligned
2995 * and must be cleared to zero before the request is made.
2999 * Function ID of the function that is being configured. If set
3000 * to 0xFF... (All Fs), then the configuration is for the
3001 * requesting function.
3006 /* This bit must be '1' for the stag_vid field to be configured. */
3007 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_VID UINT32_C(0x1)
3008 /* This bit must be '1' for the ctag_vid field to be configured. */
3009 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_VID UINT32_C(0x2)
3010 /* This bit must be '1' for the stag_pcp field to be configured. */
3011 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_PCP UINT32_C(0x4)
3012 /* This bit must be '1' for the ctag_pcp field to be configured. */
3013 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_PCP UINT32_C(0x8)
3014 /* This bit must be '1' for the stag_tpid field to be configured. */
3015 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_TPID UINT32_C(0x10)
3016 /* This bit must be '1' for the ctag_tpid field to be configured. */
3017 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_TPID UINT32_C(0x20)
3019 /* S-TAG VLAN identifier configured for the function. */
3021 /* S-TAG PCP value configured for the function. */
3025 * S-TAG TPID value configured for the function. This field is
3026 * specified in network byte order.
3029 /* C-TAG VLAN identifier configured for the function. */
3031 /* C-TAG PCP value configured for the function. */
3035 * C-TAG TPID value configured for the function. This field is
3036 * specified in network byte order.
3045 /* Output (16 bytes) */
3046 struct hwrm_func_vlan_cfg_output {
3047 uint16_t error_code;
3049 * Pass/Fail or error type Note: receiver to verify the in
3050 * parameters, and fail the call with an error when appropriate
3053 /* This field returns the type of original request. */
3055 /* This field provides original sequence number of the command. */
3058 * This field is the length of the response in bytes. The last
3059 * byte of the response is a valid flag that will read as '1'
3060 * when the command has been completely written to memory.
3068 * This field is used in Output records to indicate that the
3069 * output is completely written to RAM. This field should be
3070 * read as '1' to indicate that the output has been completely
3071 * written. When writing a command completion or response to an
3072 * internal processor, the order of writes has to be such that
3073 * this field is written last.
3079 * Description: This command allows configuration of a PF by the corresponding
3080 * PF driver. This command also allows configuration of a child VF by its parent
3081 * PF driver. The input FID value is used to indicate what function is being
3082 * configured. This allows a PF driver to configure the PF owned by itself or a
3083 * virtual function that is a child of the PF. This command allows to reserve
3084 * resources for a VF by its parent PF. To reverse the process, the command
3085 * should be called with all enables flags cleared for resources. This will free
3086 * allocated resources for the VF and return them to the resource pool. If this
3087 * command is requested by a VF driver to configure or reserve resources, then
3088 * the HWRM shall fail this command. If default MAC address and/or VLAN are
3089 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
3090 * filters for the function that is being configured. If source properties
3091 * checks are enabled and default MAC address and/or IP address are provided in
3092 * this command, then the HWRM shall set appropriate source property checks
3093 * based on provided MAC and/or IP addresses. The parent PF driver should not
3094 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
3095 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
3096 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
3097 * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
3098 * for itself or its children VFs. All function drivers shall call hwrm_func_cfg
3099 * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
3100 * that is, a request for resources may be larger than what can be supported by
3101 * the device and the HWRM will allocate the best set of resources available,
3102 * but that may be less than requested. If all the amounts requested could not
3103 * be fulfilled, the HWRM shall allocate what it could and return a status code
3104 * of success. A function driver should call hwrm_func_qcfg immediately after
3105 * hwrm_func_cfg to determine what resources were assigned to the configured
3106 * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
3107 * itself shall only allocate resources for the PF driver to use, not for its
3108 * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
3109 * available for the PF driver to use, not what is available to its children
3112 /* Input (88 bytes) */
3113 struct hwrm_func_cfg_input {
3116 * This value indicates what type of request this is. The format
3117 * for the rest of the command is determined by this field.
3121 * This value indicates the what completion ring the request
3122 * will be optionally completed on. If the value is -1, then no
3123 * CR completion will be generated. Any other value must be a
3124 * valid CR ring_id value for this function.
3127 /* This value indicates the command sequence number. */
3130 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3131 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3136 * This is the host address where the response will be written
3137 * when the request is complete. This area must be 16B aligned
3138 * and must be cleared to zero before the request is made.
3142 * Function ID of the function that is being configured. If set
3143 * to 0xFF... (All Fs), then the the configuration is for the
3144 * requesting function.
3150 * When this bit is '1', the function is disabled with source
3151 * MAC address check. This is an anti-spoofing check. If this
3152 * flag is set, then the function shall be configured to
3153 * disallow transmission of frames with the source MAC address
3154 * that is configured for this function.
3156 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE \
3159 * When this bit is '1', the function is enabled with source MAC
3160 * address check. This is an anti-spoofing check. If this flag
3161 * is set, then the function shall be configured to allow
3162 * transmission of frames with the source MAC address that is
3163 * configured for this function.
3165 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE \
3168 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK UINT32_C(0x1fc)
3169 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT 2
3171 * Standard TX Ring mode is used for the allocation of TX ring
3172 * and underlying scheduling resources that allow bandwidth
3173 * reservation and limit settings on the queried function. If
3174 * set to 1, then standard TX ring mode is requested to be
3175 * enabled on the function being configured.
3177 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE \
3180 * Standard TX Ring mode is used for the allocation of TX ring
3181 * and underlying scheduling resources that allow bandwidth
3182 * reservation and limit settings on the queried function. If
3183 * set to 1, then the standard TX ring mode is requested to be
3184 * disabled on the function being configured. In this extended
3185 * TX ring resource mode, the minimum and maximum bandwidth
3186 * settings are not supported to allow the allocation of TX
3187 * rings to span multiple scheduler nodes.
3189 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE \
3192 * If this bit is set, virtual mac address configured in this
3193 * command will be persistent over warm boot.
3195 #define HWRM_FUNC_CFG_INPUT_FLAGS_VIRT_MAC_PERSIST UINT32_C(0x800)
3197 * This bit only applies to the VF. If this bit is set, the
3198 * statistic context counters will not be cleared when the
3199 * statistic context is freed or a function reset is called on
3200 * VF. This bit will be cleared when the PF is unloaded or a
3201 * function reset is called on the PF.
3203 #define HWRM_FUNC_CFG_INPUT_FLAGS_NO_AUTOCLEAR_STATISTIC \
3206 /* This bit must be '1' for the mtu field to be configured. */
3207 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
3208 /* This bit must be '1' for the mru field to be configured. */
3209 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
3211 * This bit must be '1' for the num_rsscos_ctxs field to be
3214 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
3216 * This bit must be '1' for the num_cmpl_rings field to be
3219 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
3220 /* This bit must be '1' for the num_tx_rings field to be configured. */
3221 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
3222 /* This bit must be '1' for the num_rx_rings field to be configured. */
3223 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
3224 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
3225 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
3226 /* This bit must be '1' for the num_vnics field to be configured. */
3227 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
3229 * This bit must be '1' for the num_stat_ctxs field to be
3232 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
3234 * This bit must be '1' for the dflt_mac_addr field to be
3237 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
3238 /* This bit must be '1' for the dflt_vlan field to be configured. */
3239 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
3240 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
3241 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
3242 /* This bit must be '1' for the min_bw field to be configured. */
3243 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
3244 /* This bit must be '1' for the max_bw field to be configured. */
3245 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
3247 * This bit must be '1' for the async_event_cr field to be
3250 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
3252 * This bit must be '1' for the vlan_antispoof_mode field to be
3255 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
3257 * This bit must be '1' for the allowed_vlan_pris field to be
3260 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
3261 /* This bit must be '1' for the evb_mode field to be configured. */
3262 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
3264 * This bit must be '1' for the num_mcast_filters field to be
3267 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
3269 * This bit must be '1' for the num_hw_ring_grps field to be
3272 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
3275 * The maximum transmission unit of the function. The HWRM
3276 * should make sure that the mtu of the function does not exceed
3277 * the mtu of the physical port that this function is associated
3278 * with. In addition to configuring mtu per function, it is
3279 * possible to configure mtu per transmit ring. By default, the
3280 * mtu of each transmit ring associated with a function is equal
3281 * to the mtu of the function. The HWRM should make sure that
3282 * the mtu of each transmit ring that is assigned to a function
3287 * The maximum receive unit of the function. The HWRM should
3288 * make sure that the mru of the function does not exceed the
3289 * mru of the physical port that this function is associated
3290 * with. In addition to configuring mru per function, it is
3291 * possible to configure mru per vnic. By default, the mru of
3292 * each vnic associated with a function is equal to the mru of
3293 * the function. The HWRM should make sure that the mru of each
3294 * vnic that is assigned to a function has a valid mru.
3296 uint16_t num_rsscos_ctxs;
3297 /* The number of RSS/COS contexts requested for the function. */
3298 uint16_t num_cmpl_rings;
3300 * The number of completion rings requested for the function.
3301 * This does not include the rings allocated to any children
3304 uint16_t num_tx_rings;
3306 * The number of transmit rings requested for the function. This
3307 * does not include the rings allocated to any children
3310 uint16_t num_rx_rings;
3312 * The number of receive rings requested for the function. This
3313 * does not include the rings allocated to any children
3316 uint16_t num_l2_ctxs;
3317 /* The requested number of L2 contexts for the function. */
3319 /* The requested number of vnics for the function. */
3320 uint16_t num_stat_ctxs;
3321 /* The requested number of statistic contexts for the function. */
3322 uint16_t num_hw_ring_grps;
3324 * The number of HW ring groups that should be reserved for this
3327 uint8_t dflt_mac_addr[6];
3328 /* The default MAC address for the function being configured. */
3331 * The default VLAN for the function being configured. This
3332 * field's format is same as 802.1Q Tag's Tag Control
3333 * Information (TCI) format that includes both Priority Code
3334 * Point (PCP) and VLAN Identifier (VID).
3336 uint32_t dflt_ip_addr[4];
3338 * The default IP address for the function being configured.
3339 * This address is only used in enabling source property check.
3343 * Minimum BW allocated for this function. The HWRM will
3344 * translate this value into byte counter and time interval used
3345 * for the scheduler inside the device.
3347 /* The bandwidth value. */
3348 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
3349 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
3350 /* The granularity of the value (bits or bytes). */
3351 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
3352 /* Value is in bits. */
3353 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3354 /* Value is in bytes. */
3355 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3356 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
3357 FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
3358 /* bw_value_unit is 3 b */
3359 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK \
3360 UINT32_C(0xe0000000)
3361 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
3362 /* Value is in Mb or MB (base 10). */
3363 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
3364 (UINT32_C(0x0) << 29)
3365 /* Value is in Kb or KB (base 10). */
3366 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
3367 (UINT32_C(0x2) << 29)
3368 /* Value is in bits or bytes. */
3369 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
3370 (UINT32_C(0x4) << 29)
3371 /* Value is in Gb or GB (base 10). */
3372 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
3373 (UINT32_C(0x6) << 29)
3374 /* Value is in 1/100th of a percentage of total bandwidth. */
3375 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
3376 (UINT32_C(0x1) << 29)
3378 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
3379 (UINT32_C(0x7) << 29)
3380 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
3381 FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
3384 * Maximum BW allocated for this function. The HWRM will
3385 * translate this value into byte counter and time interval used
3386 * for the scheduler inside the device.
3388 /* The bandwidth value. */
3389 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
3391 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
3392 /* The granularity of the value (bits or bytes). */
3393 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
3394 /* Value is in bits. */
3395 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3396 /* Value is in bytes. */
3397 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3398 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
3399 FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
3400 /* bw_value_unit is 3 b */
3401 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
3402 UINT32_C(0xe0000000)
3403 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
3404 /* Value is in Mb or MB (base 10). */
3405 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
3406 (UINT32_C(0x0) << 29)
3407 /* Value is in Kb or KB (base 10). */
3408 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
3409 (UINT32_C(0x2) << 29)
3410 /* Value is in bits or bytes. */
3411 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
3412 (UINT32_C(0x4) << 29)
3413 /* Value is in Gb or GB (base 10). */
3414 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
3415 (UINT32_C(0x6) << 29)
3416 /* Value is in 1/100th of a percentage of total bandwidth. */
3417 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
3418 (UINT32_C(0x1) << 29)
3420 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
3421 (UINT32_C(0x7) << 29)
3422 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
3423 FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
3424 uint16_t async_event_cr;
3426 * ID of the target completion ring for receiving asynchronous
3427 * event completions. If this field is not valid, then the HWRM
3428 * shall use the default completion ring of the function that is
3429 * being configured as the target completion ring for providing
3430 * any asynchronous event completions for that function. If this
3431 * field is valid, then the HWRM shall use the completion ring
3432 * identified by this ID as the target completion ring for
3433 * providing any asynchronous event completions for the function
3434 * that is being configured.
3436 uint8_t vlan_antispoof_mode;
3437 /* VLAN Anti-spoofing mode. */
3438 /* No VLAN anti-spoofing checks are enabled */
3439 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
3440 /* Validate VLAN against the configured VLAN(s) */
3441 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
3443 /* Insert VLAN if it does not exist, otherwise discard */
3444 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
3447 * Insert VLAN if it does not exist, override
3451 HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
3453 uint8_t allowed_vlan_pris;
3455 * This bit field defines VLAN PRIs that are allowed on this
3456 * function. If nth bit is set, then VLAN PRI n is allowed on
3461 * The HWRM shall allow a PF driver to change EVB mode for the
3462 * partition it belongs to. The HWRM shall not allow a VF driver
3463 * to change the EVB mode. The HWRM shall take into account the
3464 * switching of EVB mode from one to another and reconfigure
3465 * hardware resources as appropriately. The switching from VEB
3466 * to VEPA mode requires the disabling of the loopback traffic.
3467 * Additionally, source knock outs are handled differently in
3468 * VEB and VEPA modes.
3470 /* No Edge Virtual Bridging (EVB) */
3471 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
3472 /* Virtual Ethernet Bridge (VEB) */
3473 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
3474 /* Virtual Ethernet Port Aggregator (VEPA) */
3475 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
3477 uint16_t num_mcast_filters;
3479 * The number of multicast filters that should be reserved for
3480 * this function on the RX side.
3482 } __attribute__((packed));
3484 /* Output (16 bytes) */
3485 struct hwrm_func_cfg_output {
3486 uint16_t error_code;
3488 * Pass/Fail or error type Note: receiver to verify the in
3489 * parameters, and fail the call with an error when appropriate
3492 /* This field returns the type of original request. */
3494 /* This field provides original sequence number of the command. */
3497 * This field is the length of the response in bytes. The last
3498 * byte of the response is a valid flag that will read as '1'
3499 * when the command has been completely written to memory.
3507 * This field is used in Output records to indicate that the
3508 * output is completely written to RAM. This field should be
3509 * read as '1' to indicate that the output has been completely
3510 * written. When writing a command completion or response to an
3511 * internal processor, the order of writes has to be such that
3512 * this field is written last.
3514 } __attribute__((packed));
3516 /* hwrm_func_qstats */
3518 * Description: This command returns statistics of a function. The input FID
3519 * value is used to indicate what function is being queried. This allows a
3520 * physical function driver to query virtual functions that are children of the
3521 * physical function. The HWRM shall return any unsupported counter with a value
3522 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3524 /* Input (24 bytes) */
3525 struct hwrm_func_qstats_input {
3528 * This value indicates what type of request this is. The format
3529 * for the rest of the command is determined by this field.
3533 * This value indicates the what completion ring the request
3534 * will be optionally completed on. If the value is -1, then no
3535 * CR completion will be generated. Any other value must be a
3536 * valid CR ring_id value for this function.
3539 /* This value indicates the command sequence number. */
3542 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3543 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3548 * This is the host address where the response will be written
3549 * when the request is complete. This area must be 16B aligned
3550 * and must be cleared to zero before the request is made.
3554 * Function ID of the function that is being queried. 0xFF...
3555 * (All Fs) if the query is for the requesting function.
3557 uint16_t unused_0[3];
3558 } __attribute__((packed));
3560 /* Output (176 bytes) */
3561 struct hwrm_func_qstats_output {
3562 uint16_t error_code;
3564 * Pass/Fail or error type Note: receiver to verify the in
3565 * parameters, and fail the call with an error when appropriate
3568 /* This field returns the type of original request. */
3570 /* This field provides original sequence number of the command. */
3573 * This field is the length of the response in bytes. The last
3574 * byte of the response is a valid flag that will read as '1'
3575 * when the command has been completely written to memory.
3577 uint64_t tx_ucast_pkts;
3578 /* Number of transmitted unicast packets on the function. */
3579 uint64_t tx_mcast_pkts;
3580 /* Number of transmitted multicast packets on the function. */
3581 uint64_t tx_bcast_pkts;
3582 /* Number of transmitted broadcast packets on the function. */
3583 uint64_t tx_err_pkts;
3585 * Number of transmitted packets that were discarded due to
3586 * internal NIC resource problems. For transmit, this can only
3587 * happen if TMP is configured to allow dropping in HOL blocking
3588 * conditions, which is not a normal configuration.
3590 uint64_t tx_drop_pkts;
3592 * Number of dropped packets on transmit path on the function.
3593 * These are packets that have been marked for drop by the TE
3594 * CFA block or are packets that exceeded the transmit MTU limit
3597 uint64_t tx_ucast_bytes;
3598 /* Number of transmitted bytes for unicast traffic on the function. */
3599 uint64_t tx_mcast_bytes;
3601 * Number of transmitted bytes for multicast traffic on the
3604 uint64_t tx_bcast_bytes;
3606 * Number of transmitted bytes for broadcast traffic on the
3609 uint64_t rx_ucast_pkts;
3610 /* Number of received unicast packets on the function. */
3611 uint64_t rx_mcast_pkts;
3612 /* Number of received multicast packets on the function. */
3613 uint64_t rx_bcast_pkts;
3614 /* Number of received broadcast packets on the function. */
3615 uint64_t rx_err_pkts;
3617 * Number of received packets that were discarded on the
3618 * function due to resource limitations. This can happen for 3
3619 * reasons. # The BD used for the packet has a bad format. #
3620 * There were no BDs available in the ring for the packet. #
3621 * There were no BDs available on-chip for the packet.
3623 uint64_t rx_drop_pkts;
3625 * Number of dropped packets on received path on the function.
3626 * These are packets that have been marked for drop by the RE
3629 uint64_t rx_ucast_bytes;
3630 /* Number of received bytes for unicast traffic on the function. */
3631 uint64_t rx_mcast_bytes;
3632 /* Number of received bytes for multicast traffic on the function. */
3633 uint64_t rx_bcast_bytes;
3634 /* Number of received bytes for broadcast traffic on the function. */
3635 uint64_t rx_agg_pkts;
3636 /* Number of aggregated unicast packets on the function. */
3637 uint64_t rx_agg_bytes;
3638 /* Number of aggregated unicast bytes on the function. */
3639 uint64_t rx_agg_events;
3640 /* Number of aggregation events on the function. */
3641 uint64_t rx_agg_aborts;
3642 /* Number of aborted aggregations on the function. */
3649 * This field is used in Output records to indicate that the
3650 * output is completely written to RAM. This field should be
3651 * read as '1' to indicate that the output has been completely
3652 * written. When writing a command completion or response to an
3653 * internal processor, the order of writes has to be such that
3654 * this field is written last.
3656 } __attribute__((packed));
3658 /* hwrm_func_clr_stats */
3660 * Description: This command clears statistics of a function. The input FID
3661 * value is used to indicate what function's statistics is being cleared. This
3662 * allows a physical function driver to clear statistics of virtual functions
3663 * that are children of the physical function.
3665 /* Input (24 bytes) */
3666 struct hwrm_func_clr_stats_input {
3669 * This value indicates what type of request this is. The format
3670 * for the rest of the command is determined by this field.
3674 * This value indicates the what completion ring the request
3675 * will be optionally completed on. If the value is -1, then no
3676 * CR completion will be generated. Any other value must be a
3677 * valid CR ring_id value for this function.
3680 /* This value indicates the command sequence number. */
3683 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3684 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3689 * This is the host address where the response will be written
3690 * when the request is complete. This area must be 16B aligned
3691 * and must be cleared to zero before the request is made.
3695 * Function ID of the function. 0xFF... (All Fs) if the query is
3696 * for the requesting function.
3698 uint16_t unused_0[3];
3699 } __attribute__((packed));
3701 /* Output (16 bytes) */
3702 struct hwrm_func_clr_stats_output {
3703 uint16_t error_code;
3705 * Pass/Fail or error type Note: receiver to verify the in
3706 * parameters, and fail the call with an error when appropriate
3709 /* This field returns the type of original request. */
3711 /* This field provides original sequence number of the command. */
3714 * This field is the length of the response in bytes. The last
3715 * byte of the response is a valid flag that will read as '1'
3716 * when the command has been completely written to memory.
3724 * This field is used in Output records to indicate that the
3725 * output is completely written to RAM. This field should be
3726 * read as '1' to indicate that the output has been completely
3727 * written. When writing a command completion or response to an
3728 * internal processor, the order of writes has to be such that
3729 * this field is written last.
3731 } __attribute__((packed));
3733 /* hwrm_func_vf_vnic_ids_query */
3734 /* Description: This command is used to query vf vnic ids. */
3735 /* Input (32 bytes) */
3736 struct hwrm_func_vf_vnic_ids_query_input {
3739 * This value indicates what type of request this is. The format
3740 * for the rest of the command is determined by this field.
3744 * This value indicates the what completion ring the request
3745 * will be optionally completed on. If the value is -1, then no
3746 * CR completion will be generated. Any other value must be a
3747 * valid CR ring_id value for this function.
3750 /* This value indicates the command sequence number. */
3753 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3754 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3759 * This is the host address where the response will be written
3760 * when the request is complete. This area must be 16B aligned
3761 * and must be cleared to zero before the request is made.
3765 * This value is used to identify a Virtual Function (VF). The
3766 * scope of VF ID is local within a PF.
3770 uint32_t max_vnic_id_cnt;
3771 /* Max number of vnic ids in vnic id table */
3772 uint64_t vnic_id_tbl_addr;
3773 /* This is the address for VF VNIC ID table */
3774 } __attribute__((packed));
3776 /* Output (16 bytes) */
3777 struct hwrm_func_vf_vnic_ids_query_output {
3778 uint16_t error_code;
3780 * Pass/Fail or error type Note: receiver to verify the in
3781 * parameters, and fail the call with an error when appropriate
3784 /* This field returns the type of original request. */
3786 /* This field provides original sequence number of the command. */
3789 * This field is the length of the response in bytes. The last
3790 * byte of the response is a valid flag that will read as '1'
3791 * when the command has been completely written to memory.
3793 uint32_t vnic_id_cnt;
3795 * Actual number of vnic ids Each VNIC ID is written as a 32-bit
3803 * This field is used in Output records to indicate that the
3804 * output is completely written to RAM. This field should be
3805 * read as '1' to indicate that the output has been completely
3806 * written. When writing a command completion or response to an
3807 * internal processor, the order of writes has to be such that
3808 * this field is written last.
3810 } __attribute__((packed));
3812 /* hwrm_func_drv_rgtr */
3814 * Description: This command is used by the function driver to register its
3815 * information with the HWRM. A function driver shall implement this command. A
3816 * function driver shall use this command during the driver initialization right
3817 * after the HWRM version discovery and default ring resources allocation.
3819 /* Input (80 bytes) */
3820 struct hwrm_func_drv_rgtr_input {
3823 * This value indicates what type of request this is. The format
3824 * for the rest of the command is determined by this field.
3828 * This value indicates the what completion ring the request
3829 * will be optionally completed on. If the value is -1, then no
3830 * CR completion will be generated. Any other value must be a
3831 * valid CR ring_id value for this function.
3834 /* This value indicates the command sequence number. */
3837 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3838 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3843 * This is the host address where the response will be written
3844 * when the request is complete. This area must be 16B aligned
3845 * and must be cleared to zero before the request is made.
3849 * When this bit is '1', the function driver is requesting all
3850 * requests from its children VF drivers to be forwarded to
3851 * itself. This flag can only be set by the PF driver. If a VF
3852 * driver sets this flag, it should be ignored by the HWRM.
3854 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3856 * When this bit is '1', the function is requesting none of the
3857 * requests from its children VF drivers to be forwarded to
3858 * itself. This flag can only be set by the PF driver. If a VF
3859 * driver sets this flag, it should be ignored by the HWRM.
3861 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
3863 /* This bit must be '1' for the os_type field to be configured. */
3864 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
3865 /* This bit must be '1' for the ver field to be configured. */
3866 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
3867 /* This bit must be '1' for the timestamp field to be configured. */
3868 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
3869 /* This bit must be '1' for the vf_req_fwd field to be configured. */
3870 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
3872 * This bit must be '1' for the async_event_fwd field to be
3875 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
3878 * This value indicates the type of OS. The values are based on
3879 * CIM_OperatingSystem.mof file as published by the DMTF.
3882 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
3883 /* Other OS not listed below. */
3884 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
3886 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
3888 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
3890 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
3892 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
3894 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
3895 /* VMware ESXi OS. */
3896 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
3897 /* Microsoft Windows 8 64-bit OS. */
3898 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
3899 /* Microsoft Windows Server 2012 R2 OS. */
3900 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
3902 /* This is the major version of the driver. */
3904 /* This is the minor version of the driver. */
3906 /* This is the update version of the driver. */
3911 * This is a 32-bit timestamp provided by the driver for keep
3912 * alive. The timestamp is in multiples of 1ms.
3915 uint32_t vf_req_fwd[8];
3917 * This is a 256-bit bit mask provided by the PF driver for
3918 * letting the HWRM know what commands issued by the VF driver
3919 * to the HWRM should be forwarded to the PF driver. Nth bit
3920 * refers to the Nth req_type. Setting Nth bit to 1 indicates
3921 * that requests from the VF driver with req_type equal to N
3922 * shall be forwarded to the parent PF driver. This field is not
3923 * valid for the VF driver.
3925 uint32_t async_event_fwd[8];
3927 * This is a 256-bit bit mask provided by the function driver
3928 * (PF or VF driver) to indicate the list of asynchronous event
3929 * completions to be forwarded. Nth bit refers to the Nth
3930 * event_id. Setting Nth bit to 1 by the function driver shall
3931 * result in the HWRM forwarding asynchronous event completion
3932 * with event_id equal to N. If all bits are set to 0 (value of
3933 * 0), then the HWRM shall not forward any asynchronous event
3934 * completion to this function driver.
3936 } __attribute__((packed));
3938 /* Output (16 bytes) */
3939 struct hwrm_func_drv_rgtr_output {
3940 uint16_t error_code;
3942 * Pass/Fail or error type Note: receiver to verify the in
3943 * parameters, and fail the call with an error when appropriate
3946 /* This field returns the type of original request. */
3948 /* This field provides original sequence number of the command. */
3951 * This field is the length of the response in bytes. The last
3952 * byte of the response is a valid flag that will read as '1'
3953 * when the command has been completely written to memory.
3961 * This field is used in Output records to indicate that the
3962 * output is completely written to RAM. This field should be
3963 * read as '1' to indicate that the output has been completely
3964 * written. When writing a command completion or response to an
3965 * internal processor, the order of writes has to be such that
3966 * this field is written last.
3968 } __attribute__((packed));
3970 /* hwrm_func_drv_unrgtr */
3972 * Description: This command is used by the function driver to un register with
3973 * the HWRM. A function driver shall implement this command. A function driver
3974 * shall use this command during the driver unloading.
3976 /* Input (24 bytes) */
3977 struct hwrm_func_drv_unrgtr_input {
3980 * This value indicates what type of request this is. The format
3981 * for the rest of the command is determined by this field.
3985 * This value indicates the what completion ring the request
3986 * will be optionally completed on. If the value is -1, then no
3987 * CR completion will be generated. Any other value must be a
3988 * valid CR ring_id value for this function.
3991 /* This value indicates the command sequence number. */
3994 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3995 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4000 * This is the host address where the response will be written
4001 * when the request is complete. This area must be 16B aligned
4002 * and must be cleared to zero before the request is made.
4006 * When this bit is '1', the function driver is notifying the
4007 * HWRM to prepare for the shutdown.
4009 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4012 } __attribute__((packed));
4014 /* Output (16 bytes) */
4015 struct hwrm_func_drv_unrgtr_output {
4016 uint16_t error_code;
4018 * Pass/Fail or error type Note: receiver to verify the in
4019 * parameters, and fail the call with an error when appropriate
4022 /* This field returns the type of original request. */
4024 /* This field provides original sequence number of the command. */
4027 * This field is the length of the response in bytes. The last
4028 * byte of the response is a valid flag that will read as '1'
4029 * when the command has been completely written to memory.
4037 * This field is used in Output records to indicate that the
4038 * output is completely written to RAM. This field should be
4039 * read as '1' to indicate that the output has been completely
4040 * written. When writing a command completion or response to an
4041 * internal processor, the order of writes has to be such that
4042 * this field is written last.
4044 } __attribute__((packed));
4046 /* hwrm_func_buf_rgtr */
4048 * Description: This command is used by the PF driver to register buffers used
4049 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4050 * register buffers for each PF-VF channel. A parent PF may issue this command
4051 * per child VF. If VF ID is not valid, then this command is used to register
4052 * buffers for all children VFs of the PF.
4054 /* Input (128 bytes) */
4055 struct hwrm_func_buf_rgtr_input {
4058 * This value indicates what type of request this is. The format
4059 * for the rest of the command is determined by this field.
4063 * This value indicates the what completion ring the request
4064 * will be optionally completed on. If the value is -1, then no
4065 * CR completion will be generated. Any other value must be a
4066 * valid CR ring_id value for this function.
4069 /* This value indicates the command sequence number. */
4072 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4073 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4078 * This is the host address where the response will be written
4079 * when the request is complete. This area must be 16B aligned
4080 * and must be cleared to zero before the request is made.
4083 /* This bit must be '1' for the vf_id field to be configured. */
4084 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4085 /* This bit must be '1' for the err_buf_addr field to be configured. */
4086 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
4089 * This value is used to identify a Virtual Function (VF). The
4090 * scope of VF ID is local within a PF.
4092 uint16_t req_buf_num_pages;
4094 * This field represents the number of pages used for request
4097 uint16_t req_buf_page_size;
4098 /* This field represents the page size used for request buffer(s). */
4100 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
4102 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
4104 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
4106 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
4108 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
4110 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
4112 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
4113 uint16_t req_buf_len;
4114 /* The length of the request buffer per VF in bytes. */
4115 uint16_t resp_buf_len;
4116 /* The length of the response buffer in bytes. */
4119 uint64_t req_buf_page_addr[10];
4120 /* This field represents the page address of req buffer. */
4121 uint64_t error_buf_addr;
4123 * This field is used to receive the error reporting from the
4124 * chipset. Only applicable for PFs.
4126 uint64_t resp_buf_addr;
4127 /* This field is used to receive the response forwarded by the HWRM. */
4128 } __attribute__((packed));
4130 /* Output (16 bytes) */
4131 struct hwrm_func_buf_rgtr_output {
4132 uint16_t error_code;
4134 * Pass/Fail or error type Note: receiver to verify the in
4135 * parameters, and fail the call with an error when appropriate
4138 /* This field returns the type of original request. */
4140 /* This field provides original sequence number of the command. */
4143 * This field is the length of the response in bytes. The last
4144 * byte of the response is a valid flag that will read as '1'
4145 * when the command has been completely written to memory.
4153 * This field is used in Output records to indicate that the
4154 * output is completely written to RAM. This field should be
4155 * read as '1' to indicate that the output has been completely
4156 * written. When writing a command completion or response to an
4157 * internal processor, the order of writes has to be such that
4158 * this field is written last.
4160 } __attribute__((packed));
4162 /* hwrm_func_buf_unrgtr */
4164 * Description: This command is used by the PF driver to unregister buffers used
4165 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4166 * unregister buffers for PF-VF communication. A parent PF may issue this
4167 * command to unregister buffers for communication between the PF and a specific
4168 * VF. If the VF ID is not valid, then this command is used to unregister
4169 * buffers used for communications with all children VFs of the PF.
4171 /* Input (24 bytes) */
4172 struct hwrm_func_buf_unrgtr_input {
4175 * This value indicates what type of request this is. The format
4176 * for the rest of the command is determined by this field.
4180 * This value indicates the what completion ring the request
4181 * will be optionally completed on. If the value is -1, then no
4182 * CR completion will be generated. Any other value must be a
4183 * valid CR ring_id value for this function.
4186 /* This value indicates the command sequence number. */
4189 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4190 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4195 * This is the host address where the response will be written
4196 * when the request is complete. This area must be 16B aligned
4197 * and must be cleared to zero before the request is made.
4200 /* This bit must be '1' for the vf_id field to be configured. */
4201 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4204 * This value is used to identify a Virtual Function (VF). The
4205 * scope of VF ID is local within a PF.
4208 } __attribute__((packed));
4210 /* Output (16 bytes) */
4211 struct hwrm_func_buf_unrgtr_output {
4212 uint16_t error_code;
4214 * Pass/Fail or error type Note: receiver to verify the in
4215 * parameters, and fail the call with an error when appropriate
4218 /* This field returns the type of original request. */
4220 /* This field provides original sequence number of the command. */
4223 * This field is the length of the response in bytes. The last
4224 * byte of the response is a valid flag that will read as '1'
4225 * when the command has been completely written to memory.
4233 * This field is used in Output records to indicate that the
4234 * output is completely written to RAM. This field should be
4235 * read as '1' to indicate that the output has been completely
4236 * written. When writing a command completion or response to an
4237 * internal processor, the order of writes has to be such that
4238 * this field is written last.
4240 } __attribute__((packed));
4242 /* hwrm_func_vf_cfg */
4244 * Description: This command allows configuration of a VF by its driver. If this
4245 * function is called by a PF driver, then the HWRM shall fail this command. If
4246 * guest VLAN and/or MAC address are provided in this command, then the HWRM
4247 * shall set up appropriate MAC/VLAN filters for the VF that is being
4248 * configured. A VF driver should set VF MTU/MRU using this command prior to
4249 * allocating RX VNICs or TX rings for the corresponding VF.
4251 /* Input (32 bytes) */
4253 struct hwrm_func_vf_cfg_input {
4256 * This value indicates what type of request this is. The format for the
4257 * rest of the command is determined by this field.
4261 * This value indicates the what completion ring the request will be
4262 * optionally completed on. If the value is -1, then no CR completion
4263 * will be generated. Any other value must be a valid CR ring_id value
4264 * for this function.
4267 /* This value indicates the command sequence number. */
4270 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
4271 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
4275 * This is the host address where the response will be written when the
4276 * request is complete. This area must be 16B aligned and must be
4277 * cleared to zero before the request is made.
4280 /* This bit must be '1' for the mtu field to be configured. */
4281 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
4282 /* This bit must be '1' for the guest_vlan field to be configured. */
4283 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
4285 * This bit must be '1' for the async_event_cr field to be configured.
4287 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
4288 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
4289 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
4292 * The maximum transmission unit requested on the function. The HWRM
4293 * should make sure that the mtu of the function does not exceed the mtu
4294 * of the physical port that this function is associated with. In
4295 * addition to requesting mtu per function, it is possible to configure
4296 * mtu per transmit ring. By default, the mtu of each transmit ring
4297 * associated with a function is equal to the mtu of the function. The
4298 * HWRM should make sure that the mtu of each transmit ring that is
4299 * assigned to a function has a valid mtu.
4301 uint16_t guest_vlan;
4303 * The guest VLAN for the function being configured. This field's format
4304 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
4305 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
4307 uint16_t async_event_cr;
4309 * ID of the target completion ring for receiving asynchronous event
4310 * completions. If this field is not valid, then the HWRM shall use the
4311 * default completion ring of the function that is being configured as
4312 * the target completion ring for providing any asynchronous event
4313 * completions for that function. If this field is valid, then the HWRM
4314 * shall use the completion ring identified by this ID as the target
4315 * completion ring for providing any asynchronous event completions for
4316 * the function that is being configured.
4318 uint8_t dflt_mac_addr[6];
4320 * This value is the current MAC address requested by the VF driver to
4321 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
4322 * MAC address configuration is requested by the VF driver. The parent
4323 * PF driver may reject or overwrite this MAC address.
4325 } __attribute__((packed));
4327 /* Output (16 bytes) */
4329 struct hwrm_func_vf_cfg_output {
4330 uint16_t error_code;
4332 * Pass/Fail or error type Note: receiver to verify the in parameters,
4333 * and fail the call with an error when appropriate
4336 /* This field returns the type of original request. */
4338 /* This field provides original sequence number of the command. */
4341 * This field is the length of the response in bytes. The last
4342 * byte of the response is a valid flag that will read as '1'
4343 * when the command has been completely written to memory.
4351 * This field is used in Output records to indicate that the output is
4352 * completely written to RAM. This field should be read as '1' to
4353 * indicate that the output has been completely written. When writing a
4354 * command completion or response to an internal processor, the order of
4355 * writes has to be such that this field is written last.
4357 } __attribute__((packed));
4359 /* hwrm_port_phy_cfg */
4361 * Description: This command configures the PHY device for the port. It allows
4362 * setting of the most generic settings for the PHY. The HWRM shall complete
4363 * this command as soon as PHY settings are configured. They may not be applied
4364 * when the command response is provided. A VF driver shall not be allowed to
4365 * configure PHY using this command. In a network partition mode, a PF driver
4366 * shall not be allowed to configure PHY using this command.
4368 /* Input (56 bytes) */
4369 struct hwrm_port_phy_cfg_input {
4372 * This value indicates what type of request this is. The format
4373 * for the rest of the command is determined by this field.
4377 * This value indicates the what completion ring the request
4378 * will be optionally completed on. If the value is -1, then no
4379 * CR completion will be generated. Any other value must be a
4380 * valid CR ring_id value for this function.
4383 /* This value indicates the command sequence number. */
4386 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4387 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4392 * This is the host address where the response will be written
4393 * when the request is complete. This area must be 16B aligned
4394 * and must be cleared to zero before the request is made.
4398 * When this bit is set to '1', the PHY for the port shall be
4399 * reset. # If this bit is set to 1, then the HWRM shall reset
4400 * the PHY after applying PHY configuration changes specified in
4401 * this command. # In order to guarantee that PHY configuration
4402 * changes specified in this command take effect, the HWRM
4403 * client should set this flag to 1. # If this bit is not set to
4404 * 1, then the HWRM may reset the PHY depending on the current
4405 * PHY configuration and settings specified in this command.
4407 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
4408 /* deprecated bit. Do not use!!! */
4409 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
4411 * When this bit is set to '1', the link shall be forced to the
4412 * force_link_speed value. When this bit is set to '1', the HWRM
4413 * client should not enable any of the auto negotiation related
4414 * fields represented by auto_XXX fields in this command. When
4415 * this bit is set to '1' and the HWRM client has enabled a
4416 * auto_XXX field in this command, then the HWRM shall ignore
4417 * the enabled auto_XXX field. When this bit is set to zero, the
4418 * link shall be allowed to autoneg.
4420 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
4422 * When this bit is set to '1', the auto-negotiation process
4423 * shall be restarted on the link.
4425 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
4427 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4428 * is requested to be enabled on this link. If EEE is not
4429 * supported on this port, then this flag shall be ignored by
4432 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
4434 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4435 * is requested to be disabled on this link. If EEE is not
4436 * supported on this port, then this flag shall be ignored by
4439 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
4441 * When this bit is set to '1' and EEE is enabled on this link,
4442 * then TX LPI is requested to be enabled on the link. If EEE is
4443 * not supported on this port, then this flag shall be ignored
4444 * by the HWRM. If EEE is disabled on this port, then this flag
4445 * shall be ignored by the HWRM.
4447 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
4449 * When this bit is set to '1' and EEE is enabled on this link,
4450 * then TX LPI is requested to be disabled on the link. If EEE
4451 * is not supported on this port, then this flag shall be
4452 * ignored by the HWRM. If EEE is disabled on this port, then
4453 * this flag shall be ignored by the HWRM.
4455 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
4457 * When set to 1, then the HWRM shall enable FEC
4458 * autonegotitation on this port if supported. When set to 0,
4459 * then this flag shall be ignored. If FEC autonegotiation is
4460 * not supported, then the HWRM shall ignore this flag.
4462 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
4464 * When set to 1, then the HWRM shall disable FEC
4465 * autonegotiation on this port if supported. When set to 0,
4466 * then this flag shall be ignored. If FEC autonegotiation is
4467 * not supported, then the HWRM shall ignore this flag.
4469 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
4472 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
4473 * Code) on this port if supported. When set to 0, then this
4474 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
4475 * then the HWRM shall ignore this flag.
4477 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
4480 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
4481 * (Fire Code) on this port if supported. When set to 0, then
4482 * this flag shall be ignored. If FEC CLAUSE 74 is not
4483 * supported, then the HWRM shall ignore this flag.
4485 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
4488 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
4489 * Solomon) on this port if supported. When set to 0, then this
4490 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
4491 * then the HWRM shall ignore this flag.
4493 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
4496 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
4497 * (Reed Solomon) on this port if supported. When set to 0, then
4498 * this flag shall be ignored. If FEC CLAUSE 91 is not
4499 * supported, then the HWRM shall ignore this flag.
4501 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
4504 * When this bit is set to '1', the link shall be forced to be
4505 * taken down. # When this bit is set to '1", all other command
4506 * input settings related to the link speed shall be ignored.
4507 * Once the link state is forced down, it can be explicitly
4508 * cleared from that state by setting this flag to '0'. # If
4509 * this flag is set to '0', then the link shall be cleared from
4510 * forced down state if the link is in forced down state. There
4511 * may be conditions (e.g. out-of-band or sideband configuration
4512 * changes for the link) outside the scope of the HWRM
4513 * implementation that may clear forced down link state.
4515 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
4517 /* This bit must be '1' for the auto_mode field to be configured. */
4518 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
4519 /* This bit must be '1' for the auto_duplex field to be configured. */
4520 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
4521 /* This bit must be '1' for the auto_pause field to be configured. */
4522 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
4524 * This bit must be '1' for the auto_link_speed field to be
4527 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
4529 * This bit must be '1' for the auto_link_speed_mask field to be
4532 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
4534 /* This bit must be '1' for the wirespeed field to be configured. */
4535 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
4536 /* This bit must be '1' for the lpbk field to be configured. */
4537 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
4538 /* This bit must be '1' for the preemphasis field to be configured. */
4539 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
4540 /* This bit must be '1' for the force_pause field to be configured. */
4541 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
4543 * This bit must be '1' for the eee_link_speed_mask field to be
4546 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
4548 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
4549 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
4551 /* Port ID of port that is to be configured. */
4552 uint16_t force_link_speed;
4554 * This is the speed that will be used if the force bit is '1'.
4555 * If unsupported speed is selected, an error will be generated.
4557 /* 100Mb link speed */
4558 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4559 /* 1Gb link speed */
4560 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4561 /* 2Gb link speed */
4562 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4563 /* 2.5Gb link speed */
4564 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4565 /* 10Gb link speed */
4566 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4567 /* 20Mb link speed */
4568 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4569 /* 25Gb link speed */
4570 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4571 /* 40Gb link speed */
4572 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4573 /* 50Gb link speed */
4574 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4575 /* 100Gb link speed */
4576 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4577 /* 10Mb link speed */
4578 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4581 * This value is used to identify what autoneg mode is used when
4582 * the link speed is not being forced.
4585 * Disable autoneg or autoneg disabled. No
4586 * speeds are selected.
4588 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
4589 /* Select all possible speeds for autoneg mode. */
4590 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
4592 * Select only the auto_link_speed speed for
4593 * autoneg mode. This mode has been DEPRECATED.
4594 * An HWRM client should not use this mode.
4596 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
4598 * Select the auto_link_speed or any speed below
4599 * that speed for autoneg. This mode has been
4600 * DEPRECATED. An HWRM client should not use
4603 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
4605 * Select the speeds based on the corresponding
4606 * link speed mask value that is provided.
4608 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
4609 uint8_t auto_duplex;
4611 * This is the duplex setting that will be used if the
4612 * autoneg_mode is "one_speed" or "one_or_below".
4614 /* Half Duplex will be requested. */
4615 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
4616 /* Full duplex will be requested. */
4617 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
4618 /* Both Half and Full dupex will be requested. */
4619 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
4622 * This value is used to configure the pause that will be used
4623 * for autonegotiation. Add text on the usage of auto_pause and
4627 * When this bit is '1', Generation of tx pause messages has
4628 * been requested. Disabled otherwise.
4630 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
4632 * When this bit is '1', Reception of rx pause messages has been
4633 * requested. Disabled otherwise.
4635 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
4637 * When set to 1, the advertisement of pause is enabled. # When
4638 * the auto_mode is not set to none and this flag is set to 1,
4639 * then the auto_pause bits on this port are being advertised
4640 * and autoneg pause results are being interpreted. # When the
4641 * auto_mode is not set to none and this flag is set to 0, the
4642 * pause is forced as indicated in force_pause, and also
4643 * advertised as auto_pause bits, but the autoneg results are
4644 * not interpreted since the pause configuration is being
4645 * forced. # When the auto_mode is set to none and this flag is
4646 * set to 1, auto_pause bits should be ignored and should be set
4649 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
4651 uint16_t auto_link_speed;
4653 * This is the speed that will be used if the autoneg_mode is
4654 * "one_speed" or "one_or_below". If an unsupported speed is
4655 * selected, an error will be generated.
4657 /* 100Mb link speed */
4658 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
4659 /* 1Gb link speed */
4660 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
4661 /* 2Gb link speed */
4662 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
4663 /* 2.5Gb link speed */
4664 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
4665 /* 10Gb link speed */
4666 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
4667 /* 20Mb link speed */
4668 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
4669 /* 25Gb link speed */
4670 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
4671 /* 40Gb link speed */
4672 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
4673 /* 50Gb link speed */
4674 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
4675 /* 100Gb link speed */
4676 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
4677 /* 10Mb link speed */
4678 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
4679 uint16_t auto_link_speed_mask;
4681 * This is a mask of link speeds that will be used if
4682 * autoneg_mode is "mask". If unsupported speed is enabled an
4683 * error will be generated.
4685 /* 100Mb link speed (Half-duplex) */
4686 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
4688 /* 100Mb link speed (Full-duplex) */
4689 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
4691 /* 1Gb link speed (Half-duplex) */
4692 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
4694 /* 1Gb link speed (Full-duplex) */
4695 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
4697 /* 2Gb link speed */
4698 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
4700 /* 2.5Gb link speed */
4701 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
4703 /* 10Gb link speed */
4704 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4705 /* 20Gb link speed */
4706 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
4707 /* 25Gb link speed */
4708 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
4710 /* 40Gb link speed */
4711 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
4713 /* 50Gb link speed */
4714 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
4716 /* 100Gb link speed */
4717 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
4719 /* 10Mb link speed (Half-duplex) */
4720 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
4722 /* 10Mb link speed (Full-duplex) */
4723 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
4726 /* This value controls the wirespeed feature. */
4727 /* Wirespeed feature is disabled. */
4728 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
4729 /* Wirespeed feature is enabled. */
4730 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
4732 /* This value controls the loopback setting for the PHY. */
4733 /* No loopback is selected. Normal operation. */
4734 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
4736 * The HW will be configured with local loopback
4737 * such that host data is sent back to the host
4738 * without modification.
4740 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
4742 * The HW will be configured with remote
4743 * loopback such that port logic will send
4744 * packets back out the transmitter that are
4747 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
4748 uint8_t force_pause;
4750 * This value is used to configure the pause that will be used
4754 * When this bit is '1', Generation of tx pause messages is
4755 * supported. Disabled otherwise.
4757 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
4759 * When this bit is '1', Reception of rx pause messages is
4760 * supported. Disabled otherwise.
4762 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
4764 uint32_t preemphasis;
4766 * This value controls the pre-emphasis to be used for the link.
4767 * Driver should not set this value (use enable.preemphasis = 0)
4768 * unless driver is sure of setting. Normally HWRM FW will
4769 * determine proper pre-emphasis.
4771 uint16_t eee_link_speed_mask;
4773 * Setting for link speed mask that is used to advertise speeds
4774 * during autonegotiation when EEE is enabled. This field is
4775 * valid only when EEE is enabled. The speeds specified in this
4776 * field shall be a subset of speeds specified in
4777 * auto_link_speed_mask. If EEE is enabled,then at least one
4778 * speed shall be provided in this mask.
4781 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
4782 /* 100Mb link speed (Full-duplex) */
4783 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
4785 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
4786 /* 1Gb link speed (Full-duplex) */
4787 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
4789 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
4791 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
4792 /* 10Gb link speed */
4793 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4796 uint32_t tx_lpi_timer;
4799 * Reuested setting of TX LPI timer in microseconds. This field
4800 * is valid only when EEE is enabled and TX LPI is enabled.
4802 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
4803 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
4804 } __attribute__((packed));
4806 /* Output (16 bytes) */
4807 struct hwrm_port_phy_cfg_output {
4808 uint16_t error_code;
4810 * Pass/Fail or error type Note: receiver to verify the in
4811 * parameters, and fail the call with an error when appropriate
4814 /* This field returns the type of original request. */
4816 /* This field provides original sequence number of the command. */
4819 * This field is the length of the response in bytes. The last
4820 * byte of the response is a valid flag that will read as '1'
4821 * when the command has been completely written to memory.
4829 * This field is used in Output records to indicate that the
4830 * output is completely written to RAM. This field should be
4831 * read as '1' to indicate that the output has been completely
4832 * written. When writing a command completion or response to an
4833 * internal processor, the order of writes has to be such that
4834 * this field is written last.
4836 } __attribute__((packed));
4838 /* hwrm_port_phy_qcfg */
4839 /* Description: This command queries the PHY configuration for the port. */
4840 /* Input (24 bytes) */
4841 struct hwrm_port_phy_qcfg_input {
4844 * This value indicates what type of request this is. The format
4845 * for the rest of the command is determined by this field.
4849 * This value indicates the what completion ring the request
4850 * will be optionally completed on. If the value is -1, then no
4851 * CR completion will be generated. Any other value must be a
4852 * valid CR ring_id value for this function.
4855 /* This value indicates the command sequence number. */
4858 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4859 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4864 * This is the host address where the response will be written
4865 * when the request is complete. This area must be 16B aligned
4866 * and must be cleared to zero before the request is made.
4869 /* Port ID of port that is to be queried. */
4870 uint16_t unused_0[3];
4871 } __attribute__((packed));
4873 /* Output (96 bytes) */
4874 struct hwrm_port_phy_qcfg_output {
4875 uint16_t error_code;
4877 * Pass/Fail or error type Note: receiver to verify the in
4878 * parameters, and fail the call with an error when appropriate
4881 /* This field returns the type of original request. */
4883 /* This field provides original sequence number of the command. */
4886 * This field is the length of the response in bytes. The last
4887 * byte of the response is a valid flag that will read as '1'
4888 * when the command has been completely written to memory.
4891 /* This value indicates the current link status. */
4892 /* There is no link or cable detected. */
4893 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
4894 /* There is no link, but a cable has been detected. */
4895 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
4896 /* There is a link. */
4897 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
4899 uint16_t link_speed;
4900 /* This value indicates the current link speed of the connection. */
4901 /* 100Mb link speed */
4902 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
4903 /* 1Gb link speed */
4904 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
4905 /* 2Gb link speed */
4906 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
4907 /* 2.5Gb link speed */
4908 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
4909 /* 10Gb link speed */
4910 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
4911 /* 20Mb link speed */
4912 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
4913 /* 25Gb link speed */
4914 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
4915 /* 40Gb link speed */
4916 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
4917 /* 50Gb link speed */
4918 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
4919 /* 100Gb link speed */
4920 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
4921 /* 10Mb link speed */
4922 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
4924 /* This value is indicates the duplex of the current connection. */
4925 /* Half Duplex connection. */
4926 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_HALF UINT32_C(0x0)
4927 /* Full duplex connection. */
4928 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_FULL UINT32_C(0x1)
4931 * This value is used to indicate the current pause
4932 * configuration. When autoneg is enabled, this value represents
4933 * the autoneg results of pause configuration.
4936 * When this bit is '1', Generation of tx pause messages is
4937 * supported. Disabled otherwise.
4939 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
4941 * When this bit is '1', Reception of rx pause messages is
4942 * supported. Disabled otherwise.
4944 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
4945 uint16_t support_speeds;
4947 * The supported speeds for the port. This is a bit mask. For
4948 * each speed that is supported, the corrresponding bit will be
4951 /* 100Mb link speed (Half-duplex) */
4952 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
4953 /* 100Mb link speed (Full-duplex) */
4954 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
4955 /* 1Gb link speed (Half-duplex) */
4956 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
4957 /* 1Gb link speed (Full-duplex) */
4958 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
4959 /* 2Gb link speed */
4960 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
4961 /* 2.5Gb link speed */
4962 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
4963 /* 10Gb link speed */
4964 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
4965 /* 20Gb link speed */
4966 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
4967 /* 25Gb link speed */
4968 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
4969 /* 40Gb link speed */
4970 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
4971 /* 50Gb link speed */
4972 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
4973 /* 100Gb link speed */
4974 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
4975 /* 10Mb link speed (Half-duplex) */
4976 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
4977 /* 10Mb link speed (Full-duplex) */
4978 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
4979 uint16_t force_link_speed;
4981 * Current setting of forced link speed. When the link speed is
4982 * not being forced, this value shall be set to 0.
4984 /* 100Mb link speed */
4985 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4986 /* 1Gb link speed */
4987 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4988 /* 2Gb link speed */
4989 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4990 /* 2.5Gb link speed */
4991 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4992 /* 10Gb link speed */
4993 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4994 /* 20Mb link speed */
4995 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4996 /* 25Gb link speed */
4997 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4998 /* 40Gb link speed */
4999 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
5000 /* 50Gb link speed */
5001 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
5002 /* 100Gb link speed */
5003 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
5004 /* 10Mb link speed */
5005 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
5007 /* Current setting of auto negotiation mode. */
5009 * Disable autoneg or autoneg disabled. No
5010 * speeds are selected.
5012 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
5013 /* Select all possible speeds for autoneg mode. */
5014 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
5016 * Select only the auto_link_speed speed for
5017 * autoneg mode. This mode has been DEPRECATED.
5018 * An HWRM client should not use this mode.
5020 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
5022 * Select the auto_link_speed or any speed below
5023 * that speed for autoneg. This mode has been
5024 * DEPRECATED. An HWRM client should not use
5027 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
5029 * Select the speeds based on the corresponding
5030 * link speed mask value that is provided.
5032 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
5035 * Current setting of pause autonegotiation. Move autoneg_pause
5039 * When this bit is '1', Generation of tx pause messages has
5040 * been requested. Disabled otherwise.
5042 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
5044 * When this bit is '1', Reception of rx pause messages has been
5045 * requested. Disabled otherwise.
5047 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
5049 * When set to 1, the advertisement of pause is enabled. # When
5050 * the auto_mode is not set to none and this flag is set to 1,
5051 * then the auto_pause bits on this port are being advertised
5052 * and autoneg pause results are being interpreted. # When the
5053 * auto_mode is not set to none and this flag is set to 0, the
5054 * pause is forced as indicated in force_pause, and also
5055 * advertised as auto_pause bits, but the autoneg results are
5056 * not interpreted since the pause configuration is being
5057 * forced. # When the auto_mode is set to none and this flag is
5058 * set to 1, auto_pause bits should be ignored and should be set
5061 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
5062 uint16_t auto_link_speed;
5064 * Current setting for auto_link_speed. This field is only valid
5065 * when auto_mode is set to "one_speed" or "one_or_below".
5067 /* 100Mb link speed */
5068 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
5069 /* 1Gb link speed */
5070 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
5071 /* 2Gb link speed */
5072 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
5073 /* 2.5Gb link speed */
5074 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
5075 /* 10Gb link speed */
5076 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
5077 /* 20Mb link speed */
5078 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
5079 /* 25Gb link speed */
5080 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
5081 /* 40Gb link speed */
5082 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
5083 /* 50Gb link speed */
5084 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
5085 /* 100Gb link speed */
5086 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
5087 /* 10Mb link speed */
5088 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
5089 uint16_t auto_link_speed_mask;
5091 * Current setting for auto_link_speed_mask that is used to
5092 * advertise speeds during autonegotiation. This field is only
5093 * valid when auto_mode is set to "mask". The speeds specified
5094 * in this field shall be a subset of supported speeds on this
5097 /* 100Mb link speed (Half-duplex) */
5098 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
5100 /* 100Mb link speed (Full-duplex) */
5101 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
5103 /* 1Gb link speed (Half-duplex) */
5104 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
5106 /* 1Gb link speed (Full-duplex) */
5107 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
5108 /* 2Gb link speed */
5109 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
5111 /* 2.5Gb link speed */
5112 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
5114 /* 10Gb link speed */
5115 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
5117 /* 20Gb link speed */
5118 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
5120 /* 25Gb link speed */
5121 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
5123 /* 40Gb link speed */
5124 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
5126 /* 50Gb link speed */
5127 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
5129 /* 100Gb link speed */
5130 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
5132 /* 10Mb link speed (Half-duplex) */
5133 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
5135 /* 10Mb link speed (Full-duplex) */
5136 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
5139 /* Current setting for wirespeed. */
5140 /* Wirespeed feature is disabled. */
5141 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
5142 /* Wirespeed feature is enabled. */
5143 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
5145 /* Current setting for loopback. */
5146 /* No loopback is selected. Normal operation. */
5147 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
5149 * The HW will be configured with local loopback
5150 * such that host data is sent back to the host
5151 * without modification.
5153 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
5155 * The HW will be configured with remote
5156 * loopback such that port logic will send
5157 * packets back out the transmitter that are
5160 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
5161 uint8_t force_pause;
5163 * Current setting of forced pause. When the pause configuration
5164 * is not being forced, then this value shall be set to 0.
5167 * When this bit is '1', Generation of tx pause messages is
5168 * supported. Disabled otherwise.
5170 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
5172 * When this bit is '1', Reception of rx pause messages is
5173 * supported. Disabled otherwise.
5175 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
5176 uint8_t module_status;
5178 * This value indicates the current status of the optics module
5181 /* Module is inserted and accepted */
5182 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
5183 /* Module is rejected and transmit side Laser is disabled. */
5184 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
5185 /* Module mismatch warning. */
5186 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
5187 /* Module is rejected and powered down. */
5188 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
5189 /* Module is not inserted. */
5190 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
5192 /* Module status is not applicable. */
5193 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
5195 uint32_t preemphasis;
5196 /* Current setting for preemphasis. */
5198 /* This field represents the major version of the PHY. */
5200 /* This field represents the minor version of the PHY. */
5202 /* This field represents the build version of the PHY. */
5204 /* This value represents a PHY type. */
5206 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
5208 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
5209 /* BASE-KR4 (Deprecated) */
5210 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
5212 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
5214 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
5215 /* BASE-KR2 (Deprecated) */
5216 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
5218 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
5220 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
5222 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
5223 /* EEE capable BASE-T */
5224 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
5225 /* SGMII connected external PHY */
5226 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
5227 /* 25G_BASECR_CA_L */
5228 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
5229 /* 25G_BASECR_CA_S */
5230 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
5231 /* 25G_BASECR_CA_N */
5232 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
5234 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
5236 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
5238 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
5240 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
5242 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
5244 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
5246 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
5248 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
5250 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
5252 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
5253 /* 40G_ACTIVE_CABLE */
5254 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
5257 /* This value represents a media type. */
5259 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
5261 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
5262 /* Direct Attached Copper */
5263 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
5265 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
5266 uint8_t xcvr_pkg_type;
5267 /* This value represents a transceiver type. */
5268 /* PHY and MAC are in the same package */
5269 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
5271 /* PHY and MAC are in different packages */
5272 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
5274 uint8_t eee_config_phy_addr;
5276 * This field represents flags related to EEE configuration.
5277 * These EEE configuration flags are valid only when the
5278 * auto_mode is not set to none (in other words autonegotiation
5281 /* This field represents PHY address. */
5282 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
5283 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
5285 * When set to 1, Energy Efficient Ethernet (EEE) mode is
5286 * enabled. Speeds for autoneg with EEE mode enabled are based
5287 * on eee_link_speed_mask.
5289 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
5291 * This flag is valid only when eee_enabled is set to 1. # If
5292 * eee_enabled is set to 0, then EEE mode is disabled and this
5293 * flag shall be ignored. # If eee_enabled is set to 1 and this
5294 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5295 * is enabled and in use. # If eee_enabled is set to 1 and this
5296 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
5297 * is enabled but is currently not in use.
5299 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
5301 * This flag is valid only when eee_enabled is set to 1. # If
5302 * eee_enabled is set to 0, then EEE mode is disabled and this
5303 * flag shall be ignored. # If eee_enabled is set to 1 and this
5304 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5305 * is enabled and TX LPI is enabled. # If eee_enabled is set to
5306 * 1 and this flag is set to 0, then Energy Efficient Ethernet
5307 * (EEE) mode is enabled but TX LPI is disabled.
5309 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
5311 * This field represents flags related to EEE configuration.
5312 * These EEE configuration flags are valid only when the
5313 * auto_mode is not set to none (in other words autonegotiation
5316 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
5317 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
5318 uint8_t parallel_detect;
5319 /* Reserved field, set to 0 */
5321 * When set to 1, the parallel detection is used to determine
5322 * the speed of the link partner. Parallel detection is used
5323 * when a autonegotiation capable device is connected to a link
5324 * parter that is not capable of autonegotiation.
5326 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
5327 /* Reserved field, set to 0 */
5328 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
5329 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
5330 uint16_t link_partner_adv_speeds;
5332 * The advertised speeds for the port by the link partner. Each
5333 * advertised speed will be set to '1'.
5335 /* 100Mb link speed (Half-duplex) */
5336 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
5338 /* 100Mb link speed (Full-duplex) */
5339 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
5341 /* 1Gb link speed (Half-duplex) */
5342 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
5344 /* 1Gb link speed (Full-duplex) */
5345 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
5347 /* 2Gb link speed */
5348 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
5350 /* 2.5Gb link speed */
5351 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
5353 /* 10Gb link speed */
5354 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
5356 /* 20Gb link speed */
5357 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
5359 /* 25Gb link speed */
5360 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
5362 /* 40Gb link speed */
5363 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
5365 /* 50Gb link speed */
5366 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
5368 /* 100Gb link speed */
5369 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
5371 /* 10Mb link speed (Half-duplex) */
5372 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
5374 /* 10Mb link speed (Full-duplex) */
5375 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
5377 uint8_t link_partner_adv_auto_mode;
5379 * The advertised autoneg for the port by the link partner. This
5380 * field is deprecated and should be set to 0.
5383 * Disable autoneg or autoneg disabled. No
5384 * speeds are selected.
5386 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
5388 /* Select all possible speeds for autoneg mode. */
5390 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
5393 * Select only the auto_link_speed speed for
5394 * autoneg mode. This mode has been DEPRECATED.
5395 * An HWRM client should not use this mode.
5398 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
5401 * Select the auto_link_speed or any speed below
5402 * that speed for autoneg. This mode has been
5403 * DEPRECATED. An HWRM client should not use
5407 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
5410 * Select the speeds based on the corresponding
5411 * link speed mask value that is provided.
5414 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
5416 uint8_t link_partner_adv_pause;
5417 /* The advertised pause settings on the port by the link partner. */
5419 * When this bit is '1', Generation of tx pause messages is
5420 * supported. Disabled otherwise.
5422 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
5425 * When this bit is '1', Reception of rx pause messages is
5426 * supported. Disabled otherwise.
5428 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
5430 uint16_t adv_eee_link_speed_mask;
5432 * Current setting for link speed mask that is used to advertise
5433 * speeds during autonegotiation when EEE is enabled. This field
5434 * is valid only when eee_enabled flags is set to 1. The speeds
5435 * specified in this field shall be a subset of speeds specified
5436 * in auto_link_speed_mask.
5439 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5441 /* 100Mb link speed (Full-duplex) */
5442 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
5445 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5447 /* 1Gb link speed (Full-duplex) */
5448 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
5451 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5454 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5456 /* 10Gb link speed */
5457 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
5459 uint16_t link_partner_adv_eee_link_speed_mask;
5461 * Current setting for link speed mask that is advertised by the
5462 * link partner when EEE is enabled. This field is valid only
5463 * when eee_enabled flags is set to 1.
5467 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5469 /* 100Mb link speed (Full-duplex) */
5471 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
5475 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5477 /* 1Gb link speed (Full-duplex) */
5479 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
5483 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5487 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5489 /* 10Gb link speed */
5491 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
5493 uint32_t xcvr_identifier_type_tx_lpi_timer;
5494 /* This value represents transceiver identifier type. */
5496 * Current setting of TX LPI timer in microseconds. This field
5497 * is valid only when_eee_enabled flag is set to 1 and
5498 * tx_lpi_enabled is set to 1.
5500 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
5501 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
5502 /* This value represents transceiver identifier type. */
5503 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
5504 UINT32_C(0xff000000)
5505 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
5507 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
5508 (UINT32_C(0x0) << 24)
5509 /* SFP/SFP+/SFP28 */
5510 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
5511 (UINT32_C(0x3) << 24)
5513 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
5514 (UINT32_C(0xc) << 24)
5516 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
5517 (UINT32_C(0xd) << 24)
5519 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
5520 (UINT32_C(0x11) << 24)
5523 * This value represents the current configuration of Forward
5524 * Error Correction (FEC) on the port.
5527 * When set to 1, then FEC is not supported on this port. If
5528 * this flag is set to 1, then all other FEC configuration flags
5529 * shall be ignored. When set to 0, then FEC is supported as
5530 * indicated by other configuration flags. If no cable is
5531 * attached and the HWRM does not yet know the FEC capability,
5532 * then the HWRM shall set this flag to 1 when reporting FEC
5535 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
5538 * When set to 1, then FEC autonegotiation is supported on this
5539 * port. When set to 0, then FEC autonegotiation is not
5540 * supported on this port.
5542 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
5545 * When set to 1, then FEC autonegotiation is enabled on this
5546 * port. When set to 0, then FEC autonegotiation is disabled if
5547 * supported. This flag should be ignored if FEC autonegotiation
5548 * is not supported on this port.
5550 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
5553 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
5554 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5555 * not supported on this port.
5557 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
5560 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
5561 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5562 * disabled if supported. This flag should be ignored if FEC
5563 * CLAUSE 74 is not supported on this port.
5565 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
5568 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
5569 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5570 * Solomon) is not supported on this port.
5572 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
5575 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
5576 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5577 * Solomon) is disabled if supported. This flag should be
5578 * ignored if FEC CLAUSE 91 is not supported on this port.
5580 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
5584 char phy_vendor_name[16];
5586 * Up to 16 bytes of null padded ASCII string representing PHY
5587 * vendor. If the string is set to null, then the vendor name is
5590 char phy_vendor_partnumber[16];
5592 * Up to 16 bytes of null padded ASCII string that identifies
5593 * vendor specific part number of the PHY. If the string is set
5594 * to null, then the vendor specific part number is not
5603 * This field is used in Output records to indicate that the
5604 * output is completely written to RAM. This field should be
5605 * read as '1' to indicate that the output has been completely
5606 * written. When writing a command completion or response to an
5607 * internal processor, the order of writes has to be such that
5608 * this field is written last.
5610 } __attribute__((packed));
5612 /* hwrm_port_qstats */
5613 /* Description: This function returns per port Ethernet statistics. */
5614 /* Input (40 bytes) */
5615 struct hwrm_port_qstats_input {
5618 * This value indicates what type of request this is. The format
5619 * for the rest of the command is determined by this field.
5623 * This value indicates the what completion ring the request
5624 * will be optionally completed on. If the value is -1, then no
5625 * CR completion will be generated. Any other value must be a
5626 * valid CR ring_id value for this function.
5629 /* This value indicates the command sequence number. */
5632 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5633 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5638 * This is the host address where the response will be written
5639 * when the request is complete. This area must be 16B aligned
5640 * and must be cleared to zero before the request is made.
5643 /* Port ID of port that is being queried. */
5646 uint8_t unused_2[3];
5648 uint64_t tx_stat_host_addr;
5649 /* This is the host address where Tx port statistics will be stored */
5650 uint64_t rx_stat_host_addr;
5651 /* This is the host address where Rx port statistics will be stored */
5652 } __attribute__((packed));
5654 /* Output (16 bytes) */
5655 struct hwrm_port_qstats_output {
5656 uint16_t error_code;
5658 * Pass/Fail or error type Note: receiver to verify the in
5659 * parameters, and fail the call with an error when appropriate
5662 /* This field returns the type of original request. */
5664 /* This field provides original sequence number of the command. */
5667 * This field is the length of the response in bytes. The last
5668 * byte of the response is a valid flag that will read as '1'
5669 * when the command has been completely written to memory.
5671 uint16_t tx_stat_size;
5672 /* The size of TX port statistics block in bytes. */
5673 uint16_t rx_stat_size;
5674 /* The size of RX port statistics block in bytes. */
5680 * This field is used in Output records to indicate that the
5681 * output is completely written to RAM. This field should be
5682 * read as '1' to indicate that the output has been completely
5683 * written. When writing a command completion or response to an
5684 * internal processor, the order of writes has to be such that
5685 * this field is written last.
5687 } __attribute__((packed));
5689 /* hwrm_port_clr_stats */
5691 * Description: This function clears per port statistics. The HWRM shall not
5692 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
5693 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
5694 * PF driver to clear port statistics in the non-partitioning mode.
5696 /* Input (24 bytes) */
5697 struct hwrm_port_clr_stats_input {
5700 * This value indicates what type of request this is. The format
5701 * for the rest of the command is determined by this field.
5705 * This value indicates the what completion ring the request
5706 * will be optionally completed on. If the value is -1, then no
5707 * CR completion will be generated. Any other value must be a
5708 * valid CR ring_id value for this function.
5711 /* This value indicates the command sequence number. */
5714 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5715 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5720 * This is the host address where the response will be written
5721 * when the request is complete. This area must be 16B aligned
5722 * and must be cleared to zero before the request is made.
5725 /* Port ID of port that is being queried. */
5726 uint16_t unused_0[3];
5727 } __attribute__((packed));
5729 /* Output (16 bytes) */
5730 struct hwrm_port_clr_stats_output {
5731 uint16_t error_code;
5733 * Pass/Fail or error type Note: receiver to verify the in
5734 * parameters, and fail the call with an error when appropriate
5737 /* This field returns the type of original request. */
5739 /* This field provides original sequence number of the command. */
5742 * This field is the length of the response in bytes. The last
5743 * byte of the response is a valid flag that will read as '1'
5744 * when the command has been completely written to memory.
5752 * This field is used in Output records to indicate that the
5753 * output is completely written to RAM. This field should be
5754 * read as '1' to indicate that the output has been completely
5755 * written. When writing a command completion or response to an
5756 * internal processor, the order of writes has to be such that
5757 * this field is written last.
5759 } __attribute__((packed));
5761 /* hwrm_port_led_cfg */
5763 * Description: This function is used to configure LEDs on a given port. Each
5764 * port has individual set of LEDs associated with it. These LEDs are used for
5765 * speed/link configuration as well as activity indicator configuration. Up to
5766 * three LEDs can be configured, one for activity and two for speeds.
5768 /* Input (64 bytes) */
5769 struct hwrm_port_led_cfg_input {
5772 * This value indicates what type of request this is. The format
5773 * for the rest of the command is determined by this field.
5777 * This value indicates the what completion ring the request
5778 * will be optionally completed on. If the value is -1, then no
5779 * CR completion will be generated. Any other value must be a
5780 * valid CR ring_id value for this function.
5783 /* This value indicates the command sequence number. */
5786 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5787 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5792 * This is the host address where the response will be written
5793 * when the request is complete. This area must be 16B aligned
5794 * and must be cleared to zero before the request is made.
5797 /* This bit must be '1' for the led0_id field to be configured. */
5798 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID UINT32_C(0x1)
5799 /* This bit must be '1' for the led0_state field to be configured. */
5800 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE UINT32_C(0x2)
5801 /* This bit must be '1' for the led0_color field to be configured. */
5802 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_COLOR UINT32_C(0x4)
5804 * This bit must be '1' for the led0_blink_on field to be
5807 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON UINT32_C(0x8)
5809 * This bit must be '1' for the led0_blink_off field to be
5812 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF UINT32_C(0x10)
5814 * This bit must be '1' for the led0_group_id field to be
5817 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID UINT32_C(0x20)
5818 /* This bit must be '1' for the led1_id field to be configured. */
5819 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_ID UINT32_C(0x40)
5820 /* This bit must be '1' for the led1_state field to be configured. */
5821 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_STATE UINT32_C(0x80)
5822 /* This bit must be '1' for the led1_color field to be configured. */
5823 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_COLOR UINT32_C(0x100)
5825 * This bit must be '1' for the led1_blink_on field to be
5828 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_ON UINT32_C(0x200)
5830 * This bit must be '1' for the led1_blink_off field to be
5833 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_OFF UINT32_C(0x400)
5835 * This bit must be '1' for the led1_group_id field to be
5838 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_GROUP_ID UINT32_C(0x800)
5839 /* This bit must be '1' for the led2_id field to be configured. */
5840 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_ID UINT32_C(0x1000)
5841 /* This bit must be '1' for the led2_state field to be configured. */
5842 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_STATE UINT32_C(0x2000)
5843 /* This bit must be '1' for the led2_color field to be configured. */
5844 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_COLOR UINT32_C(0x4000)
5846 * This bit must be '1' for the led2_blink_on field to be
5849 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_ON UINT32_C(0x8000)
5851 * This bit must be '1' for the led2_blink_off field to be
5854 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_OFF UINT32_C(0x10000)
5856 * This bit must be '1' for the led2_group_id field to be
5859 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_GROUP_ID UINT32_C(0x20000)
5860 /* This bit must be '1' for the led3_id field to be configured. */
5861 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_ID UINT32_C(0x40000)
5862 /* This bit must be '1' for the led3_state field to be configured. */
5863 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_STATE UINT32_C(0x80000)
5864 /* This bit must be '1' for the led3_color field to be configured. */
5865 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_COLOR UINT32_C(0x100000)
5867 * This bit must be '1' for the led3_blink_on field to be
5870 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_ON UINT32_C(0x200000)
5872 * This bit must be '1' for the led3_blink_off field to be
5875 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_OFF \
5878 * This bit must be '1' for the led3_group_id field to be
5881 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_GROUP_ID UINT32_C(0x800000)
5883 /* Port ID of port whose LEDs are configured. */
5886 * The number of LEDs that are being configured. Up to 4 LEDs
5887 * can be configured with this command.
5890 /* Reserved field. */
5892 /* An identifier for the LED #0. */
5894 /* The requested state of the LED #0. */
5895 /* Default state of the LED */
5896 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
5898 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_OFF UINT32_C(0x1)
5900 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_ON UINT32_C(0x2)
5902 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINK UINT32_C(0x3)
5903 /* Blink Alternately */
5904 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
5906 /* The requested color of LED #0. */
5908 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
5910 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_AMBER UINT32_C(0x1)
5912 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREEN UINT32_C(0x2)
5913 /* Green or Amber */
5914 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
5916 uint16_t led0_blink_on;
5918 * If the LED #0 state is "blink" or "blinkalt", then this field
5919 * represents the requested time in milliseconds to keep LED on
5922 uint16_t led0_blink_off;
5924 * If the LED #0 state is "blink" or "blinkalt", then this field
5925 * represents the requested time in milliseconds to keep LED off
5928 uint8_t led0_group_id;
5930 * An identifier for the group of LEDs that LED #0 belongs to.
5931 * If set to 0, then the LED #0 shall not be grouped and shall
5932 * be treated as an individual resource. For all other non-zero
5933 * values of this field, LED #0 shall be grouped together with
5934 * the LEDs with the same group ID value.
5937 /* Reserved field. */
5939 /* An identifier for the LED #1. */
5941 /* The requested state of the LED #1. */
5942 /* Default state of the LED */
5943 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
5945 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_OFF UINT32_C(0x1)
5947 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_ON UINT32_C(0x2)
5949 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINK UINT32_C(0x3)
5950 /* Blink Alternately */
5951 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
5953 /* The requested color of LED #1. */
5955 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
5957 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_AMBER UINT32_C(0x1)
5959 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREEN UINT32_C(0x2)
5960 /* Green or Amber */
5961 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
5963 uint16_t led1_blink_on;
5965 * If the LED #1 state is "blink" or "blinkalt", then this field
5966 * represents the requested time in milliseconds to keep LED on
5969 uint16_t led1_blink_off;
5971 * If the LED #1 state is "blink" or "blinkalt", then this field
5972 * represents the requested time in milliseconds to keep LED off
5975 uint8_t led1_group_id;
5977 * An identifier for the group of LEDs that LED #1 belongs to.
5978 * If set to 0, then the LED #1 shall not be grouped and shall
5979 * be treated as an individual resource. For all other non-zero
5980 * values of this field, LED #1 shall be grouped together with
5981 * the LEDs with the same group ID value.
5984 /* Reserved field. */
5986 /* An identifier for the LED #2. */
5988 /* The requested state of the LED #2. */
5989 /* Default state of the LED */
5990 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
5992 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_OFF UINT32_C(0x1)
5994 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_ON UINT32_C(0x2)
5996 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINK UINT32_C(0x3)
5997 /* Blink Alternately */
5998 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6000 /* The requested color of LED #2. */
6002 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6004 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6006 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6007 /* Green or Amber */
6008 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6010 uint16_t led2_blink_on;
6012 * If the LED #2 state is "blink" or "blinkalt", then this field
6013 * represents the requested time in milliseconds to keep LED on
6016 uint16_t led2_blink_off;
6018 * If the LED #2 state is "blink" or "blinkalt", then this field
6019 * represents the requested time in milliseconds to keep LED off
6022 uint8_t led2_group_id;
6024 * An identifier for the group of LEDs that LED #2 belongs to.
6025 * If set to 0, then the LED #2 shall not be grouped and shall
6026 * be treated as an individual resource. For all other non-zero
6027 * values of this field, LED #2 shall be grouped together with
6028 * the LEDs with the same group ID value.
6031 /* Reserved field. */
6033 /* An identifier for the LED #3. */
6035 /* The requested state of the LED #3. */
6036 /* Default state of the LED */
6037 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6039 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_OFF UINT32_C(0x1)
6041 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_ON UINT32_C(0x2)
6043 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINK UINT32_C(0x3)
6044 /* Blink Alternately */
6045 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6047 /* The requested color of LED #3. */
6049 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6051 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6053 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6054 /* Green or Amber */
6055 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6057 uint16_t led3_blink_on;
6059 * If the LED #3 state is "blink" or "blinkalt", then this field
6060 * represents the requested time in milliseconds to keep LED on
6063 uint16_t led3_blink_off;
6065 * If the LED #3 state is "blink" or "blinkalt", then this field
6066 * represents the requested time in milliseconds to keep LED off
6069 uint8_t led3_group_id;
6071 * An identifier for the group of LEDs that LED #3 belongs to.
6072 * If set to 0, then the LED #3 shall not be grouped and shall
6073 * be treated as an individual resource. For all other non-zero
6074 * values of this field, LED #3 shall be grouped together with
6075 * the LEDs with the same group ID value.
6078 /* Reserved field. */
6079 } __attribute__((packed));
6081 /* Output (16 bytes) */
6082 struct hwrm_port_led_cfg_output {
6083 uint16_t error_code;
6085 * Pass/Fail or error type Note: receiver to verify the in
6086 * parameters, and fail the call with an error when appropriate
6089 /* This field returns the type of original request. */
6091 /* This field provides original sequence number of the command. */
6094 * This field is the length of the response in bytes. The last
6095 * byte of the response is a valid flag that will read as '1'
6096 * when the command has been completely written to memory.
6104 * This field is used in Output records to indicate that the
6105 * output is completely written to RAM. This field should be
6106 * read as '1' to indicate that the output has been completely
6107 * written. When writing a command completion or response to an
6108 * internal processor, the order of writes has to be such that
6109 * this field is written last.
6111 } __attribute__((packed));
6113 /* hwrm_port_led_qcfg */
6115 * Description: This function is used to query configuration of LEDs on a given
6116 * port. Each port has individual set of LEDs associated with it. These LEDs are
6117 * used for speed/link configuration as well as activity indicator
6118 * configuration. Up to three LEDs can be configured, one for activity and two
6121 /* Input (24 bytes) */
6122 struct hwrm_port_led_qcfg_input {
6125 * This value indicates what type of request this is. The format
6126 * for the rest of the command is determined by this field.
6130 * This value indicates the what completion ring the request
6131 * will be optionally completed on. If the value is -1, then no
6132 * CR completion will be generated. Any other value must be a
6133 * valid CR ring_id value for this function.
6136 /* This value indicates the command sequence number. */
6139 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6140 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6145 * This is the host address where the response will be written
6146 * when the request is complete. This area must be 16B aligned
6147 * and must be cleared to zero before the request is made.
6150 /* Port ID of port whose LED configuration is being queried. */
6151 uint16_t unused_0[3];
6152 } __attribute__((packed));
6154 /* Output (56 bytes) */
6155 struct hwrm_port_led_qcfg_output {
6156 uint16_t error_code;
6158 * Pass/Fail or error type Note: receiver to verify the in
6159 * parameters, and fail the call with an error when appropriate
6162 /* This field returns the type of original request. */
6164 /* This field provides original sequence number of the command. */
6167 * This field is the length of the response in bytes. The last
6168 * byte of the response is a valid flag that will read as '1'
6169 * when the command has been completely written to memory.
6173 * The number of LEDs that are configured on this port. Up to 4
6174 * LEDs can be returned in the response.
6177 /* An identifier for the LED #0. */
6179 /* The type of LED #0. */
6181 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6183 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6185 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6187 /* The current state of the LED #0. */
6188 /* Default state of the LED */
6189 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
6191 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_OFF UINT32_C(0x1)
6193 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_ON UINT32_C(0x2)
6195 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINK UINT32_C(0x3)
6196 /* Blink Alternately */
6197 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
6199 /* The color of LED #0. */
6201 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
6203 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_AMBER UINT32_C(0x1)
6205 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREEN UINT32_C(0x2)
6206 /* Green or Amber */
6207 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
6209 uint16_t led0_blink_on;
6211 * If the LED #0 state is "blink" or "blinkalt", then this field
6212 * represents the requested time in milliseconds to keep LED on
6215 uint16_t led0_blink_off;
6217 * If the LED #0 state is "blink" or "blinkalt", then this field
6218 * represents the requested time in milliseconds to keep LED off
6221 uint8_t led0_group_id;
6223 * An identifier for the group of LEDs that LED #0 belongs to.
6224 * If set to 0, then the LED #0 is not grouped. For all other
6225 * non-zero values of this field, LED #0 is grouped together
6226 * with the LEDs with the same group ID value.
6229 /* An identifier for the LED #1. */
6231 /* The type of LED #1. */
6233 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6235 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6237 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6239 /* The current state of the LED #1. */
6240 /* Default state of the LED */
6241 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
6243 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_OFF UINT32_C(0x1)
6245 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_ON UINT32_C(0x2)
6247 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINK UINT32_C(0x3)
6248 /* Blink Alternately */
6249 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
6251 /* The color of LED #1. */
6253 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
6255 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_AMBER UINT32_C(0x1)
6257 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6258 /* Green or Amber */
6259 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6261 uint16_t led1_blink_on;
6263 * If the LED #1 state is "blink" or "blinkalt", then this field
6264 * represents the requested time in milliseconds to keep LED on
6267 uint16_t led1_blink_off;
6269 * If the LED #1 state is "blink" or "blinkalt", then this field
6270 * represents the requested time in milliseconds to keep LED off
6273 uint8_t led1_group_id;
6275 * An identifier for the group of LEDs that LED #1 belongs to.
6276 * If set to 0, then the LED #1 is not grouped. For all other
6277 * non-zero values of this field, LED #1 is grouped together
6278 * with the LEDs with the same group ID value.
6281 /* An identifier for the LED #2. */
6283 /* The type of LED #2. */
6285 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6287 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6289 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6291 /* The current state of the LED #2. */
6292 /* Default state of the LED */
6293 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6295 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_OFF UINT32_C(0x1)
6297 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_ON UINT32_C(0x2)
6299 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINK UINT32_C(0x3)
6300 /* Blink Alternately */
6301 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6303 /* The color of LED #2. */
6305 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6307 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6309 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6310 /* Green or Amber */
6311 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6313 uint16_t led2_blink_on;
6315 * If the LED #2 state is "blink" or "blinkalt", then this field
6316 * represents the requested time in milliseconds to keep LED on
6319 uint16_t led2_blink_off;
6321 * If the LED #2 state is "blink" or "blinkalt", then this field
6322 * represents the requested time in milliseconds to keep LED off
6325 uint8_t led2_group_id;
6327 * An identifier for the group of LEDs that LED #2 belongs to.
6328 * If set to 0, then the LED #2 is not grouped. For all other
6329 * non-zero values of this field, LED #2 is grouped together
6330 * with the LEDs with the same group ID value.
6333 /* An identifier for the LED #3. */
6335 /* The type of LED #3. */
6337 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6339 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6341 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6343 /* The current state of the LED #3. */
6344 /* Default state of the LED */
6345 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6347 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_OFF UINT32_C(0x1)
6349 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_ON UINT32_C(0x2)
6351 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINK UINT32_C(0x3)
6352 /* Blink Alternately */
6353 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6355 /* The color of LED #3. */
6357 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6359 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6361 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6362 /* Green or Amber */
6363 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6365 uint16_t led3_blink_on;
6367 * If the LED #3 state is "blink" or "blinkalt", then this field
6368 * represents the requested time in milliseconds to keep LED on
6371 uint16_t led3_blink_off;
6373 * If the LED #3 state is "blink" or "blinkalt", then this field
6374 * represents the requested time in milliseconds to keep LED off
6377 uint8_t led3_group_id;
6379 * An identifier for the group of LEDs that LED #3 belongs to.
6380 * If set to 0, then the LED #3 is not grouped. For all other
6381 * non-zero values of this field, LED #3 is grouped together
6382 * with the LEDs with the same group ID value.
6391 * This field is used in Output records to indicate that the
6392 * output is completely written to RAM. This field should be
6393 * read as '1' to indicate that the output has been completely
6394 * written. When writing a command completion or response to an
6395 * internal processor, the order of writes has to be such that
6396 * this field is written last.
6398 } __attribute__((packed));
6400 /* hwrm_port_led_qcaps */
6402 * Description: This function is used to query capabilities of LEDs on a given
6403 * port. Each port has individual set of LEDs associated with it. These LEDs are
6404 * used for speed/link configuration as well as activity indicator
6407 /* Input (24 bytes) */
6408 struct hwrm_port_led_qcaps_input {
6411 * This value indicates what type of request this is. The format
6412 * for the rest of the command is determined by this field.
6416 * This value indicates the what completion ring the request
6417 * will be optionally completed on. If the value is -1, then no
6418 * CR completion will be generated. Any other value must be a
6419 * valid CR ring_id value for this function.
6422 /* This value indicates the command sequence number. */
6425 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6426 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6431 * This is the host address where the response will be written
6432 * when the request is complete. This area must be 16B aligned
6433 * and must be cleared to zero before the request is made.
6436 /* Port ID of port whose LED configuration is being queried. */
6437 uint16_t unused_0[3];
6438 } __attribute__((packed));
6440 /* Output (48 bytes) */
6441 struct hwrm_port_led_qcaps_output {
6442 uint16_t error_code;
6444 * Pass/Fail or error type Note: receiver to verify the in
6445 * parameters, and fail the call with an error when appropriate
6448 /* This field returns the type of original request. */
6450 /* This field provides original sequence number of the command. */
6453 * This field is the length of the response in bytes. The last
6454 * byte of the response is a valid flag that will read as '1'
6455 * when the command has been completely written to memory.
6459 * The number of LEDs that are configured on this port. Up to 4
6460 * LEDs can be returned in the response.
6462 uint8_t unused_0[3];
6463 /* Reserved for future use. */
6465 /* An identifier for the LED #0. */
6467 /* The type of LED #0. */
6469 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6471 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6473 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6474 uint8_t led0_group_id;
6476 * An identifier for the group of LEDs that LED #0 belongs to.
6477 * If set to 0, then the LED #0 cannot be grouped. For all other
6478 * non-zero values of this field, LED #0 is grouped together
6479 * with the LEDs with the same group ID value.
6482 uint16_t led0_state_caps;
6483 /* The states supported by LED #0. */
6485 * If set to 1, this LED is enabled. If set to 0, this LED is
6488 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ENABLED UINT32_C(0x1)
6490 * If set to 1, off state is supported on this LED. If set to 0,
6491 * off state is not supported on this LED.
6493 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_OFF_SUPPORTED \
6496 * If set to 1, on state is supported on this LED. If set to 0,
6497 * on state is not supported on this LED.
6499 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ON_SUPPORTED \
6502 * If set to 1, blink state is supported on this LED. If set to
6503 * 0, blink state is not supported on this LED.
6505 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_SUPPORTED \
6508 * If set to 1, blink_alt state is supported on this LED. If set
6509 * to 0, blink_alt state is not supported on this LED.
6511 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED \
6513 uint16_t led0_color_caps;
6514 /* The colors supported by LED #0. */
6516 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_RSVD UINT32_C(0x1)
6518 * If set to 1, Amber color is supported on this LED. If set to
6519 * 0, Amber color is not supported on this LED.
6521 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_AMBER_SUPPORTED \
6524 * If set to 1, Green color is supported on this LED. If set to
6525 * 0, Green color is not supported on this LED.
6527 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_GREEN_SUPPORTED \
6530 /* An identifier for the LED #1. */
6532 /* The type of LED #1. */
6534 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6536 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6538 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6539 uint8_t led1_group_id;
6541 * An identifier for the group of LEDs that LED #1 belongs to.
6542 * If set to 0, then the LED #0 cannot be grouped. For all other
6543 * non-zero values of this field, LED #0 is grouped together
6544 * with the LEDs with the same group ID value.
6547 uint16_t led1_state_caps;
6548 /* The states supported by LED #1. */
6550 * If set to 1, this LED is enabled. If set to 0, this LED is
6553 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ENABLED UINT32_C(0x1)
6555 * If set to 1, off state is supported on this LED. If set to 0,
6556 * off state is not supported on this LED.
6558 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_OFF_SUPPORTED \
6561 * If set to 1, on state is supported on this LED. If set to 0,
6562 * on state is not supported on this LED.
6564 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ON_SUPPORTED \
6567 * If set to 1, blink state is supported on this LED. If set to
6568 * 0, blink state is not supported on this LED.
6570 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_SUPPORTED \
6573 * If set to 1, blink_alt state is supported on this LED. If set
6574 * to 0, blink_alt state is not supported on this LED.
6576 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED \
6578 uint16_t led1_color_caps;
6579 /* The colors supported by LED #1. */
6581 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_RSVD UINT32_C(0x1)
6583 * If set to 1, Amber color is supported on this LED. If set to
6584 * 0, Amber color is not supported on this LED.
6586 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_AMBER_SUPPORTED \
6589 * If set to 1, Green color is supported on this LED. If set to
6590 * 0, Green color is not supported on this LED.
6592 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_GREEN_SUPPORTED \
6595 /* An identifier for the LED #2. */
6597 /* The type of LED #2. */
6599 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6601 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6603 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6604 uint8_t led2_group_id;
6606 * An identifier for the group of LEDs that LED #0 belongs to.
6607 * If set to 0, then the LED #0 cannot be grouped. For all other
6608 * non-zero values of this field, LED #0 is grouped together
6609 * with the LEDs with the same group ID value.
6612 uint16_t led2_state_caps;
6613 /* The states supported by LED #2. */
6615 * If set to 1, this LED is enabled. If set to 0, this LED is
6618 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ENABLED UINT32_C(0x1)
6620 * If set to 1, off state is supported on this LED. If set to 0,
6621 * off state is not supported on this LED.
6623 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_OFF_SUPPORTED \
6626 * If set to 1, on state is supported on this LED. If set to 0,
6627 * on state is not supported on this LED.
6629 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ON_SUPPORTED \
6632 * If set to 1, blink state is supported on this LED. If set to
6633 * 0, blink state is not supported on this LED.
6635 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_SUPPORTED \
6638 * If set to 1, blink_alt state is supported on this LED. If set
6639 * to 0, blink_alt state is not supported on this LED.
6641 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED \
6643 uint16_t led2_color_caps;
6644 /* The colors supported by LED #2. */
6646 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_RSVD UINT32_C(0x1)
6648 * If set to 1, Amber color is supported on this LED. If set to
6649 * 0, Amber color is not supported on this LED.
6651 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_AMBER_SUPPORTED \
6654 * If set to 1, Green color is supported on this LED. If set to
6655 * 0, Green color is not supported on this LED.
6657 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_GREEN_SUPPORTED \
6660 /* An identifier for the LED #3. */
6662 /* The type of LED #3. */
6664 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6666 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6668 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6669 uint8_t led3_group_id;
6671 * An identifier for the group of LEDs that LED #3 belongs to.
6672 * If set to 0, then the LED #0 cannot be grouped. For all other
6673 * non-zero values of this field, LED #0 is grouped together
6674 * with the LEDs with the same group ID value.
6677 uint16_t led3_state_caps;
6678 /* The states supported by LED #3. */
6680 * If set to 1, this LED is enabled. If set to 0, this LED is
6683 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ENABLED UINT32_C(0x1)
6685 * If set to 1, off state is supported on this LED. If set to 0,
6686 * off state is not supported on this LED.
6688 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_OFF_SUPPORTED \
6691 * If set to 1, on state is supported on this LED. If set to 0,
6692 * on state is not supported on this LED.
6694 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ON_SUPPORTED \
6697 * If set to 1, blink state is supported on this LED. If set to
6698 * 0, blink state is not supported on this LED.
6700 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_SUPPORTED \
6703 * If set to 1, blink_alt state is supported on this LED. If set
6704 * to 0, blink_alt state is not supported on this LED.
6706 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED \
6708 uint16_t led3_color_caps;
6709 /* The colors supported by LED #3. */
6711 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_RSVD UINT32_C(0x1)
6713 * If set to 1, Amber color is supported on this LED. If set to
6714 * 0, Amber color is not supported on this LED.
6716 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_AMBER_SUPPORTED \
6719 * If set to 1, Green color is supported on this LED. If set to
6720 * 0, Green color is not supported on this LED.
6722 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_GREEN_SUPPORTED \
6729 * This field is used in Output records to indicate that the
6730 * output is completely written to RAM. This field should be
6731 * read as '1' to indicate that the output has been completely
6732 * written. When writing a command completion or response to an
6733 * internal processor, the order of writes has to be such that
6734 * this field is written last.
6736 } __attribute__((packed));
6738 /* hwrm_queue_qportcfg */
6740 * Description: This function is called by a driver to query queue configuration
6741 * of a port. # The HWRM shall at least advertise one queue with lossy service
6742 * profile. # The driver shall use this command to query queue ids before
6743 * configuring or using any queues. # If a service profile is not set for a
6744 * queue, then the driver shall not use that queue without configuring a service
6745 * profile for it. # If the driver is not allowed to configure service profiles,
6746 * then the driver shall only use queues for which service profiles are pre-
6749 /* Input (24 bytes) */
6750 struct hwrm_queue_qportcfg_input {
6753 * This value indicates what type of request this is. The format
6754 * for the rest of the command is determined by this field.
6758 * This value indicates the what completion ring the request
6759 * will be optionally completed on. If the value is -1, then no
6760 * CR completion will be generated. Any other value must be a
6761 * valid CR ring_id value for this function.
6764 /* This value indicates the command sequence number. */
6767 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6768 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6773 * This is the host address where the response will be written
6774 * when the request is complete. This area must be 16B aligned
6775 * and must be cleared to zero before the request is made.
6779 * Enumeration denoting the RX, TX type of the resource. This
6780 * enumeration is used for resources that are similar for both
6781 * TX and RX paths of the chip.
6783 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
6785 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
6787 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
6788 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
6789 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
6792 * Port ID of port for which the queue configuration is being
6793 * queried. This field is only required when sent by IPC.
6796 } __attribute__((packed));
6798 /* Output (32 bytes) */
6799 struct hwrm_queue_qportcfg_output {
6800 uint16_t error_code;
6802 * Pass/Fail or error type Note: receiver to verify the in
6803 * parameters, and fail the call with an error when appropriate
6806 /* This field returns the type of original request. */
6808 /* This field provides original sequence number of the command. */
6811 * This field is the length of the response in bytes. The last
6812 * byte of the response is a valid flag that will read as '1'
6813 * when the command has been completely written to memory.
6815 uint8_t max_configurable_queues;
6817 * The maximum number of queues that can be configured on this
6818 * port. Valid values range from 1 through 8.
6820 uint8_t max_configurable_lossless_queues;
6822 * The maximum number of lossless queues that can be configured
6823 * on this port. Valid values range from 0 through 8.
6825 uint8_t queue_cfg_allowed;
6827 * Bitmask indicating which queues can be configured by the
6828 * hwrm_queue_cfg command. Each bit represents a specific queue
6829 * where bit 0 represents queue 0 and bit 7 represents queue 7.
6830 * # A value of 0 indicates that the queue is not configurable
6831 * by the hwrm_queue_cfg command. # A value of 1 indicates that
6832 * the queue is configurable. # A hwrm_queue_cfg command shall
6833 * return error when trying to configure a queue not
6836 uint8_t queue_cfg_info;
6837 /* Information about queue configuration. */
6839 * If this flag is set to '1', then the queues are configured
6840 * asymmetrically on TX and RX sides. If this flag is set to
6841 * '0', then the queues are configured symmetrically on TX and
6842 * RX sides. For symmetric configuration, the queue
6843 * configuration including queue ids and service profiles on the
6844 * TX side is the same as the corresponding queue configuration
6847 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
6848 uint8_t queue_pfcenable_cfg_allowed;
6850 * Bitmask indicating which queues can be configured by the
6851 * hwrm_queue_pfcenable_cfg command. Each bit represents a
6852 * specific priority where bit 0 represents priority 0 and bit 7
6853 * represents priority 7. # A value of 0 indicates that the
6854 * priority is not configurable by the hwrm_queue_pfcenable_cfg
6855 * command. # A value of 1 indicates that the priority is
6856 * configurable. # A hwrm_queue_pfcenable_cfg command shall
6857 * return error when trying to configure a priority that is not
6860 uint8_t queue_pri2cos_cfg_allowed;
6862 * Bitmask indicating which queues can be configured by the
6863 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6864 * specific queue where bit 0 represents queue 0 and bit 7
6865 * represents queue 7. # A value of 0 indicates that the queue
6866 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6867 * A value of 1 indicates that the queue is configurable. # A
6868 * hwrm_queue_pri2cos_cfg command shall return error when trying
6869 * to configure a queue that is not configurable.
6871 uint8_t queue_cos2bw_cfg_allowed;
6873 * Bitmask indicating which queues can be configured by the
6874 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6875 * specific queue where bit 0 represents queue 0 and bit 7
6876 * represents queue 7. # A value of 0 indicates that the queue
6877 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6878 * A value of 1 indicates that the queue is configurable. # A
6879 * hwrm_queue_pri2cos_cfg command shall return error when trying
6880 * to configure a queue not configurable.
6884 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
6885 * any subsequent call to an hwrm command that takes a queue id.
6886 * # IDs must always be queried by this command before any use
6887 * by the driver or software. # Any driver or software should
6888 * not make any assumptions about queue IDs. # A value of 0xff
6889 * indicates that the queue is not available. # Available queues
6890 * may not be in sequential order.
6892 uint8_t queue_id0_service_profile;
6893 /* This value is applicable to CoS queues only. */
6894 /* Lossy (best-effort) */
6895 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
6898 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
6901 * Set to 0xFF... (All Fs) if there is no
6902 * service profile specified
6904 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
6908 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
6909 * any subsequent call to an hwrm command that takes a queue id.
6910 * # IDs must always be queried by this command before any use
6911 * by the driver or software. # Any driver or software should
6912 * not make any assumptions about queue IDs. # A value of 0xff
6913 * indicates that the queue is not available. # Available queues
6914 * may not be in sequential order.
6916 uint8_t queue_id1_service_profile;
6917 /* This value is applicable to CoS queues only. */
6918 /* Lossy (best-effort) */
6919 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
6922 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
6925 * Set to 0xFF... (All Fs) if there is no
6926 * service profile specified
6928 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
6932 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
6933 * any subsequent call to an hwrm command that takes a queue id.
6934 * # IDs must always be queried by this command before any use
6935 * by the driver or software. # Any driver or software should
6936 * not make any assumptions about queue IDs. # A value of 0xff
6937 * indicates that the queue is not available. # Available queues
6938 * may not be in sequential order.
6940 uint8_t queue_id2_service_profile;
6941 /* This value is applicable to CoS queues only. */
6942 /* Lossy (best-effort) */
6943 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
6946 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
6949 * Set to 0xFF... (All Fs) if there is no
6950 * service profile specified
6952 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
6956 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
6957 * any subsequent call to an hwrm command that takes a queue id.
6958 * # IDs must always be queried by this command before any use
6959 * by the driver or software. # Any driver or software should
6960 * not make any assumptions about queue IDs. # A value of 0xff
6961 * indicates that the queue is not available. # Available queues
6962 * may not be in sequential order.
6964 uint8_t queue_id3_service_profile;
6965 /* This value is applicable to CoS queues only. */
6966 /* Lossy (best-effort) */
6967 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
6970 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
6973 * Set to 0xFF... (All Fs) if there is no
6974 * service profile specified
6976 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
6980 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
6981 * any subsequent call to an hwrm command that takes a queue id.
6982 * # IDs must always be queried by this command before any use
6983 * by the driver or software. # Any driver or software should
6984 * not make any assumptions about queue IDs. # A value of 0xff
6985 * indicates that the queue is not available. # Available queues
6986 * may not be in sequential order.
6988 uint8_t queue_id4_service_profile;
6989 /* This value is applicable to CoS queues only. */
6990 /* Lossy (best-effort) */
6991 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
6994 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
6997 * Set to 0xFF... (All Fs) if there is no
6998 * service profile specified
7000 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
7004 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
7005 * any subsequent call to an hwrm command that takes a queue id.
7006 * # IDs must always be queried by this command before any use
7007 * by the driver or software. # Any driver or software should
7008 * not make any assumptions about queue IDs. # A value of 0xff
7009 * indicates that the queue is not available. # Available queues
7010 * may not be in sequential order.
7012 uint8_t queue_id5_service_profile;
7013 /* This value is applicable to CoS queues only. */
7014 /* Lossy (best-effort) */
7015 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
7018 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
7021 * Set to 0xFF... (All Fs) if there is no
7022 * service profile specified
7024 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
7028 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
7029 * any subsequent call to an hwrm command that takes a queue id.
7030 * # IDs must always be queried by this command before any use
7031 * by the driver or software. # Any driver or software should
7032 * not make any assumptions about queue IDs. # A value of 0xff
7033 * indicates that the queue is not available. # Available queues
7034 * may not be in sequential order.
7036 uint8_t queue_id6_service_profile;
7037 /* This value is applicable to CoS queues only. */
7038 /* Lossy (best-effort) */
7039 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
7042 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
7045 * Set to 0xFF... (All Fs) if there is no
7046 * service profile specified
7048 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
7052 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
7053 * any subsequent call to an hwrm command that takes a queue id.
7054 * # IDs must always be queried by this command before any use
7055 * by the driver or software. # Any driver or software should
7056 * not make any assumptions about queue IDs. # A value of 0xff
7057 * indicates that the queue is not available. # Available queues
7058 * may not be in sequential order.
7060 uint8_t queue_id7_service_profile;
7061 /* This value is applicable to CoS queues only. */
7062 /* Lossy (best-effort) */
7063 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
7066 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
7069 * Set to 0xFF... (All Fs) if there is no
7070 * service profile specified
7072 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
7076 * This field is used in Output records to indicate that the
7077 * output is completely written to RAM. This field should be
7078 * read as '1' to indicate that the output has been completely
7079 * written. When writing a command completion or response to an
7080 * internal processor, the order of writes has to be such that
7081 * this field is written last.
7083 } __attribute__((packed));
7085 /* hwrm_vnic_alloc */
7087 * Description: This VNIC is a resource in the RX side of the chip that is used
7088 * to represent a virtual host "interface". # At the time of VNIC allocation or
7089 * configuration, the function can specify whether it wants the requested VNIC
7090 * to be the default VNIC for the function or not. # If a function requests
7091 * allocation of a VNIC for the first time and a VNIC is successfully allocated
7092 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
7093 * for that function. # The default VNIC shall be used for the default action
7094 * for a partition or function. # For each VNIC allocated on a function, a
7095 * mapping on the RX side to map the allocated VNIC to source virtual interface
7096 * shall be performed by the HWRM. This should be hidden to the function driver
7097 * requesting the VNIC allocation. This enables broadcast/multicast replication
7098 * with source knockout. # If multicast replication with source knockout is
7099 * enabled, then the internal VNIC to SVIF mapping data structures shall be
7100 * programmed at the time of VNIC allocation.
7102 /* Input (24 bytes) */
7103 struct hwrm_vnic_alloc_input {
7106 * This value indicates what type of request this is. The format
7107 * for the rest of the command is determined by this field.
7111 * This value indicates the what completion ring the request
7112 * will be optionally completed on. If the value is -1, then no
7113 * CR completion will be generated. Any other value must be a
7114 * valid CR ring_id value for this function.
7117 /* This value indicates the command sequence number. */
7120 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7121 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7126 * This is the host address where the response will be written
7127 * when the request is complete. This area must be 16B aligned
7128 * and must be cleared to zero before the request is made.
7132 * When this bit is '1', this VNIC is requested to be the
7133 * default VNIC for this function.
7135 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7137 } __attribute__((packed));
7139 /* Output (16 bytes) */
7140 struct hwrm_vnic_alloc_output {
7141 uint16_t error_code;
7143 * Pass/Fail or error type Note: receiver to verify the in
7144 * parameters, and fail the call with an error when appropriate
7147 /* This field returns the type of original request. */
7149 /* This field provides original sequence number of the command. */
7152 * This field is the length of the response in bytes. The last
7153 * byte of the response is a valid flag that will read as '1'
7154 * when the command has been completely written to memory.
7157 /* Logical vnic ID */
7163 * This field is used in Output records to indicate that the
7164 * output is completely written to RAM. This field should be
7165 * read as '1' to indicate that the output has been completely
7166 * written. When writing a command completion or response to an
7167 * internal processor, the order of writes has to be such that
7168 * this field is written last.
7170 } __attribute__((packed));
7172 /* hwrm_vnic_free */
7174 * Description: Free a VNIC resource. Idle any resources associated with the
7175 * VNIC as well as the VNIC. Reset and release all resources associated with the
7178 /* Input (24 bytes) */
7179 struct hwrm_vnic_free_input {
7182 * This value indicates what type of request this is. The format
7183 * for the rest of the command is determined by this field.
7187 * This value indicates the what completion ring the request
7188 * will be optionally completed on. If the value is -1, then no
7189 * CR completion will be generated. Any other value must be a
7190 * valid CR ring_id value for this function.
7193 /* This value indicates the command sequence number. */
7196 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7197 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7202 * This is the host address where the response will be written
7203 * when the request is complete. This area must be 16B aligned
7204 * and must be cleared to zero before the request is made.
7207 /* Logical vnic ID */
7209 } __attribute__((packed));
7211 /* Output (16 bytes) */
7212 struct hwrm_vnic_free_output {
7213 uint16_t error_code;
7215 * Pass/Fail or error type Note: receiver to verify the in
7216 * parameters, and fail the call with an error when appropriate
7219 /* This field returns the type of original request. */
7221 /* This field provides original sequence number of the command. */
7224 * This field is the length of the response in bytes. The last
7225 * byte of the response is a valid flag that will read as '1'
7226 * when the command has been completely written to memory.
7234 * This field is used in Output records to indicate that the
7235 * output is completely written to RAM. This field should be
7236 * read as '1' to indicate that the output has been completely
7237 * written. When writing a command completion or response to an
7238 * internal processor, the order of writes has to be such that
7239 * this field is written last.
7241 } __attribute__((packed));
7244 /* Description: Configure the RX VNIC structure. */
7245 /* Input (40 bytes) */
7246 struct hwrm_vnic_cfg_input {
7249 * This value indicates what type of request this is. The format
7250 * for the rest of the command is determined by this field.
7254 * This value indicates the what completion ring the request
7255 * will be optionally completed on. If the value is -1, then no
7256 * CR completion will be generated. Any other value must be a
7257 * valid CR ring_id value for this function.
7260 /* This value indicates the command sequence number. */
7263 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7264 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7269 * This is the host address where the response will be written
7270 * when the request is complete. This area must be 16B aligned
7271 * and must be cleared to zero before the request is made.
7275 * When this bit is '1', the VNIC is requested to be the default
7276 * VNIC for the function.
7278 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7280 * When this bit is '1', the VNIC is being configured to strip
7281 * VLAN in the RX path. If set to '0', then VLAN stripping is
7282 * disabled on this VNIC.
7284 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7286 * When this bit is '1', the VNIC is being configured to buffer
7287 * receive packets in the hardware until the host posts new
7288 * receive buffers. If set to '0', then bd_stall is being
7289 * configured to be disabled on this VNIC.
7291 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7293 * When this bit is '1', the VNIC is being configured to receive
7294 * both RoCE and non-RoCE traffic. If set to '0', then this VNIC
7295 * is not configured to be operating in dual VNIC mode.
7297 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7299 * When this flag is set to '1', the VNIC is requested to be
7300 * configured to receive only RoCE traffic. If this flag is set
7301 * to '0', then this flag shall be ignored by the HWRM. If
7302 * roce_dual_vnic_mode flag is set to '1', then the HWRM client
7303 * shall not set this flag to '1'.
7305 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7307 * When a VNIC uses one destination ring group for certain
7308 * application (e.g. Receive Flow Steering) where exact match is
7309 * used to direct packets to a VNIC with one destination ring
7310 * group only, there is no need to configure RSS indirection
7311 * table for that VNIC as only one destination ring group is
7312 * used. This flag is used to enable a mode where RSS is enabled
7313 * in the VNIC using a RSS context for computing RSS hash but
7314 * the RSS indirection table is not configured using
7315 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver
7316 * should not program RSS indirection table for the RSS context
7317 * that is used for computing RSS hash only.
7319 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7322 * This bit must be '1' for the dflt_ring_grp field to be
7325 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
7326 /* This bit must be '1' for the rss_rule field to be configured. */
7327 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
7328 /* This bit must be '1' for the cos_rule field to be configured. */
7329 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
7330 /* This bit must be '1' for the lb_rule field to be configured. */
7331 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
7332 /* This bit must be '1' for the mru field to be configured. */
7333 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
7335 /* Logical vnic ID */
7336 uint16_t dflt_ring_grp;
7338 * Default Completion ring for the VNIC. This ring will be
7339 * chosen if packet does not match any RSS rules and if there is
7344 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7345 * there is no RSS rule.
7349 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7350 * there is no COS rule.
7354 * RSS ID for load balancing rule/table structure. 0xFF... (All
7355 * Fs) if there is no LB rule.
7359 * The maximum receive unit of the vnic. Each vnic is associated
7360 * with a function. The vnic mru value overwrites the mru
7361 * setting of the associated function. The HWRM shall make sure
7362 * that vnic mru does not exceed the mru of the port the
7363 * function is associated with.
7366 } __attribute__((packed));
7368 /* Output (16 bytes) */
7369 struct hwrm_vnic_cfg_output {
7370 uint16_t error_code;
7372 * Pass/Fail or error type Note: receiver to verify the in
7373 * parameters, and fail the call with an error when appropriate
7376 /* This field returns the type of original request. */
7378 /* This field provides original sequence number of the command. */
7381 * This field is the length of the response in bytes. The last
7382 * byte of the response is a valid flag that will read as '1'
7383 * when the command has been completely written to memory.
7391 * This field is used in Output records to indicate that the
7392 * output is completely written to RAM. This field should be
7393 * read as '1' to indicate that the output has been completely
7394 * written. When writing a command completion or response to an
7395 * internal processor, the order of writes has to be such that
7396 * this field is written last.
7398 } __attribute__((packed));
7400 /* hwrm_vnic_qcfg */
7402 * Description: Query the RX VNIC structure. This function can be used by a PF
7403 * driver to query its own VNIC resource or VNIC resource of its child VF. This
7404 * function can also be used by a VF driver to query its own VNIC resource.
7406 /* Input (32 bytes) */
7407 struct hwrm_vnic_qcfg_input {
7410 * This value indicates what type of request this is. The format
7411 * for the rest of the command is determined by this field.
7415 * This value indicates the what completion ring the request
7416 * will be optionally completed on. If the value is -1, then no
7417 * CR completion will be generated. Any other value must be a
7418 * valid CR ring_id value for this function.
7421 /* This value indicates the command sequence number. */
7424 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7425 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7430 * This is the host address where the response will be written
7431 * when the request is complete. This area must be 16B aligned
7432 * and must be cleared to zero before the request is made.
7435 /* This bit must be '1' for the vf_id_valid field to be configured. */
7436 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
7438 /* Logical vnic ID */
7440 /* ID of Virtual Function whose VNIC resource is being queried. */
7441 uint16_t unused_0[3];
7442 } __attribute__((packed));
7444 /* Output (32 bytes) */
7445 struct hwrm_vnic_qcfg_output {
7446 uint16_t error_code;
7448 * Pass/Fail or error type Note: receiver to verify the in
7449 * parameters, and fail the call with an error when appropriate
7452 /* This field returns the type of original request. */
7454 /* This field provides original sequence number of the command. */
7457 * This field is the length of the response in bytes. The last
7458 * byte of the response is a valid flag that will read as '1'
7459 * when the command has been completely written to memory.
7461 uint16_t dflt_ring_grp;
7462 /* Default Completion ring for the VNIC. */
7465 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7466 * there is no RSS rule.
7470 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7471 * there is no COS rule.
7475 * RSS ID for load balancing rule/table structure. 0xFF... (All
7476 * Fs) if there is no LB rule.
7479 /* The maximum receive unit of the vnic. */
7484 * When this bit is '1', the VNIC is the default VNIC for the
7487 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
7489 * When this bit is '1', the VNIC is configured to strip VLAN in
7490 * the RX path. If set to '0', then VLAN stripping is disabled
7493 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7495 * When this bit is '1', the VNIC is configured to buffer
7496 * receive packets in the hardware until the host posts new
7497 * receive buffers. If set to '0', then bd_stall is disabled on
7500 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7502 * When this bit is '1', the VNIC is configured to receive both
7503 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
7504 * not configured to operate in dual VNIC mode.
7506 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7508 * When this flag is set to '1', the VNIC is configured to
7509 * receive only RoCE traffic. When this flag is set to '0', the
7510 * VNIC is not configured to receive only RoCE traffic. If
7511 * roce_dual_vnic_mode flag and this flag both are set to '1',
7512 * then it is an invalid configuration of the VNIC. The HWRM
7513 * should not allow that type of mis-configuration by HWRM
7516 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7518 * When a VNIC uses one destination ring group for certain
7519 * application (e.g. Receive Flow Steering) where exact match is
7520 * used to direct packets to a VNIC with one destination ring
7521 * group only, there is no need to configure RSS indirection
7522 * table for that VNIC as only one destination ring group is
7523 * used. When this bit is set to '1', then the VNIC is enabled
7524 * in a mode where RSS is enabled in the VNIC using a RSS
7525 * context for computing RSS hash but the RSS indirection table
7526 * is not configured.
7528 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7535 * This field is used in Output records to indicate that the
7536 * output is completely written to RAM. This field should be
7537 * read as '1' to indicate that the output has been completely
7538 * written. When writing a command completion or response to an
7539 * internal processor, the order of writes has to be such that
7540 * this field is written last.
7542 } __attribute__((packed));
7544 /* hwrm_vnic_rss_cfg */
7545 /* Description: This function is used to enable RSS configuration. */
7546 /* Input (48 bytes) */
7547 struct hwrm_vnic_rss_cfg_input {
7550 * This value indicates what type of request this is. The format
7551 * for the rest of the command is determined by this field.
7555 * This value indicates the what completion ring the request
7556 * will be optionally completed on. If the value is -1, then no
7557 * CR completion will be generated. Any other value must be a
7558 * valid CR ring_id value for this function.
7561 /* This value indicates the command sequence number. */
7564 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7565 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7570 * This is the host address where the response will be written
7571 * when the request is complete. This area must be 16B aligned
7572 * and must be cleared to zero before the request is made.
7576 * When this bit is '1', the RSS hash shall be computed over
7577 * source and destination IPv4 addresses of IPv4 packets.
7579 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
7581 * When this bit is '1', the RSS hash shall be computed over
7582 * source/destination IPv4 addresses and source/destination
7583 * ports of TCP/IPv4 packets.
7585 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
7587 * When this bit is '1', the RSS hash shall be computed over
7588 * source/destination IPv4 addresses and source/destination
7589 * ports of UDP/IPv4 packets.
7591 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
7593 * When this bit is '1', the RSS hash shall be computed over
7594 * source and destination IPv4 addresses of IPv6 packets.
7596 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
7598 * When this bit is '1', the RSS hash shall be computed over
7599 * source/destination IPv6 addresses and source/destination
7600 * ports of TCP/IPv6 packets.
7602 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
7604 * When this bit is '1', the RSS hash shall be computed over
7605 * source/destination IPv6 addresses and source/destination
7606 * ports of UDP/IPv6 packets.
7608 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
7610 uint64_t ring_grp_tbl_addr;
7611 /* This is the address for rss ring group table */
7612 uint64_t hash_key_tbl_addr;
7613 /* This is the address for rss hash key table */
7614 uint16_t rss_ctx_idx;
7615 /* Index to the rss indirection table. */
7616 uint16_t unused_1[3];
7617 } __attribute__((packed));
7619 /* Output (16 bytes) */
7620 struct hwrm_vnic_rss_cfg_output {
7621 uint16_t error_code;
7623 * Pass/Fail or error type Note: receiver to verify the in
7624 * parameters, and fail the call with an error when appropriate
7627 /* This field returns the type of original request. */
7629 /* This field provides original sequence number of the command. */
7632 * This field is the length of the response in bytes. The last
7633 * byte of the response is a valid flag that will read as '1'
7634 * when the command has been completely written to memory.
7642 * This field is used in Output records to indicate that the
7643 * output is completely written to RAM. This field should be
7644 * read as '1' to indicate that the output has been completely
7645 * written. When writing a command completion or response to an
7646 * internal processor, the order of writes has to be such that
7647 * this field is written last.
7649 } __attribute__((packed));
7651 /* hwrm_vnic_plcmodes_cfg */
7653 * Description: This function can be used to set placement mode configuration of
7656 /* Input (40 bytes) */
7658 struct hwrm_vnic_plcmodes_cfg_input {
7661 * This value indicates what type of request this is. The format for the
7662 * rest of the command is determined by this field.
7666 * This value indicates the what completion ring the request will be
7667 * optionally completed on. If the value is -1, then no CR completion
7668 * will be generated. Any other value must be a valid CR ring_id value
7669 * for this function.
7672 /* This value indicates the command sequence number. */
7675 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7676 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7680 * This is the host address where the response will be written when the
7681 * request is complete. This area must be 16B aligned and must be
7682 * cleared to zero before the request is made.
7686 * When this bit is '1', the VNIC shall be configured to use regular
7687 * placement algorithm. By default, the regular placement algorithm
7688 * shall be enabled on the VNIC.
7690 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
7693 * When this bit is '1', the VNIC shall be configured use the jumbo
7694 * placement algorithm.
7696 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
7699 * When this bit is '1', the VNIC shall be configured to enable Header-
7700 * Data split for IPv4 packets according to the following rules: # If
7701 * the packet is identified as TCP/IPv4, then the packet is split at the
7702 * beginning of the TCP payload. # If the packet is identified as
7703 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
7704 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
7705 * the packet is split at the beginning of the upper layer protocol
7706 * header carried in the IPv4 packet.
7708 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
7710 * When this bit is '1', the VNIC shall be configured to enable Header-
7711 * Data split for IPv6 packets according to the following rules: # If
7712 * the packet is identified as TCP/IPv6, then the packet is split at the
7713 * beginning of the TCP payload. # If the packet is identified as
7714 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
7715 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
7716 * the packet is split at the beginning of the upper layer protocol
7717 * header carried in the IPv6 packet.
7719 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
7721 * When this bit is '1', the VNIC shall be configured to enable Header-
7722 * Data split for FCoE packets at the beginning of FC payload.
7724 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
7726 * When this bit is '1', the VNIC shall be configured to enable Header-
7727 * Data split for RoCE packets at the beginning of RoCE payload (after
7730 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
7733 * This bit must be '1' for the jumbo_thresh_valid field to be
7736 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
7739 * This bit must be '1' for the hds_offset_valid field to be configured.
7741 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
7744 * This bit must be '1' for the hds_threshold_valid field to be
7747 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
7750 /* Logical vnic ID */
7751 uint16_t jumbo_thresh;
7753 * When jumbo placement algorithm is enabled, this value is used to
7754 * determine the threshold for jumbo placement. Packets with length
7755 * larger than this value will be placed according to the jumbo
7756 * placement algorithm.
7758 uint16_t hds_offset;
7760 * This value is used to determine the offset into packet buffer where
7761 * the split data (payload) will be placed according to one of of HDS
7762 * placement algorithm. The lengths of packet buffers provided for split
7763 * data shall be larger than this value.
7765 uint16_t hds_threshold;
7767 * When one of the HDS placement algorithm is enabled, this value is
7768 * used to determine the threshold for HDS placement. Packets with
7769 * length larger than this value will be placed according to the HDS
7770 * placement algorithm. This value shall be in multiple of 4 bytes.
7772 uint16_t unused_0[3];
7773 } __attribute__((packed));
7775 /* Output (16 bytes) */
7777 struct hwrm_vnic_plcmodes_cfg_output {
7778 uint16_t error_code;
7780 * Pass/Fail or error type Note: receiver to verify the in parameters,
7781 * and fail the call with an error when appropriate
7784 /* This field returns the type of original request. */
7786 /* This field provides original sequence number of the command. */
7789 * This field is the length of the response in bytes. The last byte of
7790 * the response is a valid flag that will read as '1' when the command
7791 * has been completely written to memory.
7799 * This field is used in Output records to indicate that the output is
7800 * completely written to RAM. This field should be read as '1' to
7801 * indicate that the output has been completely written. When writing a
7802 * command completion or response to an internal processor, the order of
7803 * writes has to be such that this field is written last.
7805 } __attribute__((packed));
7807 /* hwrm_vnic_plcmodes_qcfg */
7809 * Description: This function can be used to query placement mode configuration
7812 /* Input (24 bytes) */
7814 struct hwrm_vnic_plcmodes_qcfg_input {
7817 * This value indicates what type of request this is. The format for the
7818 * rest of the command is determined by this field.
7822 * This value indicates the what completion ring the request will be
7823 * optionally completed on. If the value is -1, then no CR completion
7824 * will be generated. Any other value must be a valid CR ring_id value
7825 * for this function.
7828 /* This value indicates the command sequence number. */
7831 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
7832 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
7836 * This is the host address where the response will be written when the
7837 * request is complete. This area must be 16B aligned and must be
7838 * cleared to zero before the request is made.
7841 /* Logical vnic ID */
7843 } __attribute__((packed));
7845 /* Output (24 bytes) */
7847 struct hwrm_vnic_plcmodes_qcfg_output {
7848 uint16_t error_code;
7850 * Pass/Fail or error type Note: receiver to verify the in parameters,
7851 * and fail the call with an error when appropriate
7854 /* This field returns the type of original request. */
7856 /* This field provides original sequence number of the command. */
7859 * This field is the length of the response in bytes. The last byte of
7860 * the response is a valid flag that will read as '1' when the command
7861 * has been completely written to memory.
7865 * When this bit is '1', the VNIC is configured to use regular placement
7868 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
7871 * When this bit is '1', the VNIC is configured to use the jumbo
7872 * placement algorithm.
7874 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
7877 * When this bit is '1', the VNIC is configured to enable Header-Data
7878 * split for IPv4 packets.
7880 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
7882 * When this bit is '1', the VNIC is configured to enable Header-Data
7883 * split for IPv6 packets.
7885 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
7887 * When this bit is '1', the VNIC is configured to enable Header-Data
7888 * split for FCoE packets.
7890 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
7892 * When this bit is '1', the VNIC is configured to enable Header-Data
7893 * split for RoCE packets.
7895 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
7897 * When this bit is '1', the VNIC is configured to be the default VNIC
7898 * of the requesting function.
7900 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
7901 uint16_t jumbo_thresh;
7903 * When jumbo placement algorithm is enabled, this value is used to
7904 * determine the threshold for jumbo placement. Packets with length
7905 * larger than this value will be placed according to the jumbo
7906 * placement algorithm.
7908 uint16_t hds_offset;
7910 * This value is used to determine the offset into packet buffer where
7911 * the split data (payload) will be placed according to one of of HDS
7912 * placement algorithm. The lengths of packet buffers provided for split
7913 * data shall be larger than this value.
7915 uint16_t hds_threshold;
7917 * When one of the HDS placement algorithm is enabled, this value is
7918 * used to determine the threshold for HDS placement. Packets with
7919 * length larger than this value will be placed according to the HDS
7920 * placement algorithm. This value shall be in multiple of 4 bytes.
7929 * This field is used in Output records to indicate that the output is
7930 * completely written to RAM. This field should be read as '1' to
7931 * indicate that the output has been completely written. When writing a
7932 * command completion or response to an internal processor, the order of
7933 * writes has to be such that this field is written last.
7935 } __attribute__((packed));
7937 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
7938 /* Description: This function is used to allocate COS/Load Balance context. */
7939 /* Input (16 bytes) */
7940 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
7943 * This value indicates what type of request this is. The format
7944 * for the rest of the command is determined by this field.
7948 * This value indicates the what completion ring the request
7949 * will be optionally completed on. If the value is -1, then no
7950 * CR completion will be generated. Any other value must be a
7951 * valid CR ring_id value for this function.
7954 /* This value indicates the command sequence number. */
7957 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7958 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7963 * This is the host address where the response will be written
7964 * when the request is complete. This area must be 16B aligned
7965 * and must be cleared to zero before the request is made.
7967 } __attribute__((packed));
7969 /* Output (16 bytes) */
7970 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
7971 uint16_t error_code;
7973 * Pass/Fail or error type Note: receiver to verify the in
7974 * parameters, and fail the call with an error when appropriate
7977 /* This field returns the type of original request. */
7979 /* This field provides original sequence number of the command. */
7982 * This field is the length of the response in bytes. The last
7983 * byte of the response is a valid flag that will read as '1'
7984 * when the command has been completely written to memory.
7986 uint16_t rss_cos_lb_ctx_id;
7987 /* rss_cos_lb_ctx_id is 16 b */
7995 * This field is used in Output records to indicate that the
7996 * output is completely written to RAM. This field should be
7997 * read as '1' to indicate that the output has been completely
7998 * written. When writing a command completion or response to an
7999 * internal processor, the order of writes has to be such that
8000 * this field is written last.
8002 } __attribute__((packed));
8004 /* hwrm_vnic_rss_cos_lb_ctx_free */
8005 /* Description: This function can be used to free COS/Load Balance context. */
8006 /* Input (24 bytes) */
8007 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
8010 * This value indicates what type of request this is. The format
8011 * for the rest of the command is determined by this field.
8015 * This value indicates the what completion ring the request
8016 * will be optionally completed on. If the value is -1, then no
8017 * CR completion will be generated. Any other value must be a
8018 * valid CR ring_id value for this function.
8021 /* This value indicates the command sequence number. */
8024 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8025 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8030 * This is the host address where the response will be written
8031 * when the request is complete. This area must be 16B aligned
8032 * and must be cleared to zero before the request is made.
8034 uint16_t rss_cos_lb_ctx_id;
8035 /* rss_cos_lb_ctx_id is 16 b */
8036 uint16_t unused_0[3];
8037 } __attribute__((packed));
8039 /* Output (16 bytes) */
8040 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
8041 uint16_t error_code;
8043 * Pass/Fail or error type Note: receiver to verify the in
8044 * parameters, and fail the call with an error when appropriate
8047 /* This field returns the type of original request. */
8049 /* This field provides original sequence number of the command. */
8052 * This field is the length of the response in bytes. The last
8053 * byte of the response is a valid flag that will read as '1'
8054 * when the command has been completely written to memory.
8062 * This field is used in Output records to indicate that the
8063 * output is completely written to RAM. This field should be
8064 * read as '1' to indicate that the output has been completely
8065 * written. When writing a command completion or response to an
8066 * internal processor, the order of writes has to be such that
8067 * this field is written last.
8069 } __attribute__((packed));
8071 /* hwrm_vnic_tpa_cfg */
8072 /* Description: This function is used to enable/configure TPA on the VNIC. */
8073 /* Input (40 bytes) */
8074 struct hwrm_vnic_tpa_cfg_input {
8077 * This value indicates what type of request this is. The format
8078 * for the rest of the command is determined by this field.
8082 * This value indicates the what completion ring the request
8083 * will be optionally completed on. If the value is -1, then no
8084 * CR completion will be generated. Any other value must be a
8085 * valid CR ring_id value for this function.
8088 /* This value indicates the command sequence number. */
8091 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8092 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8097 * This is the host address where the response will be written
8098 * when the request is complete. This area must be 16B aligned
8099 * and must be cleared to zero before the request is made.
8103 * When this bit is '1', the VNIC shall be configured to perform
8104 * transparent packet aggregation (TPA) of non-tunneled TCP
8107 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
8109 * When this bit is '1', the VNIC shall be configured to perform
8110 * transparent packet aggregation (TPA) of tunneled TCP packets.
8112 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
8114 * When this bit is '1', the VNIC shall be configured to perform
8115 * transparent packet aggregation (TPA) according to Windows
8116 * Receive Segment Coalescing (RSC) rules.
8118 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
8120 * When this bit is '1', the VNIC shall be configured to perform
8121 * transparent packet aggregation (TPA) according to Linux
8122 * Generic Receive Offload (GRO) rules.
8124 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
8126 * When this bit is '1', the VNIC shall be configured to perform
8127 * transparent packet aggregation (TPA) for TCP packets with IP
8128 * ECN set to non-zero.
8130 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
8132 * When this bit is '1', the VNIC shall be configured to perform
8133 * transparent packet aggregation (TPA) for GRE tunneled TCP
8134 * packets only if all packets have the same GRE sequence.
8136 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ \
8139 * When this bit is '1' and the GRO mode is enabled, the VNIC
8140 * shall be configured to perform transparent packet aggregation
8141 * (TPA) for TCP/IPv4 packets with consecutively increasing
8142 * IPIDs. In other words, the last packet that is being
8143 * aggregated to an already existing aggregation context shall
8144 * have IPID 1 more than the IPID of the last packet that was
8145 * aggregated in that aggregation context.
8147 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
8149 * When this bit is '1' and the GRO mode is enabled, the VNIC
8150 * shall be configured to perform transparent packet aggregation
8151 * (TPA) for TCP packets with the same TTL (IPv4) or Hop limit
8154 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
8156 /* This bit must be '1' for the max_agg_segs field to be configured. */
8157 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
8158 /* This bit must be '1' for the max_aggs field to be configured. */
8159 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
8161 * This bit must be '1' for the max_agg_timer field to be
8164 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
8165 /* This bit must be '1' for the min_agg_len field to be configured. */
8166 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
8168 /* Logical vnic ID */
8169 uint16_t max_agg_segs;
8171 * This is the maximum number of TCP segments that can be
8172 * aggregated (unit is Log2). Max value is 31.
8175 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
8177 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
8179 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
8181 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
8182 /* Any segment size larger than this is not valid */
8183 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
8186 * This is the maximum number of aggregations this VNIC is
8187 * allowed (unit is Log2). Max value is 7
8190 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
8191 /* 2 aggregations */
8192 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
8193 /* 4 aggregations */
8194 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
8195 /* 8 aggregations */
8196 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
8197 /* 16 aggregations */
8198 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
8199 /* Any aggregation size larger than this is not valid */
8200 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
8203 uint32_t max_agg_timer;
8205 * This is the maximum amount of time allowed for an aggregation
8206 * context to complete after it was initiated.
8208 uint32_t min_agg_len;
8210 * This is the minimum amount of payload length required to
8211 * start an aggregation context.
8213 } __attribute__((packed));
8215 /* Output (16 bytes) */
8216 struct hwrm_vnic_tpa_cfg_output {
8217 uint16_t error_code;
8219 * Pass/Fail or error type Note: receiver to verify the in
8220 * parameters, and fail the call with an error when appropriate
8223 /* This field returns the type of original request. */
8225 /* This field provides original sequence number of the command. */
8228 * This field is the length of the response in bytes. The last
8229 * byte of the response is a valid flag that will read as '1'
8230 * when the command has been completely written to memory.
8238 * This field is used in Output records to indicate that the
8239 * output is completely written to RAM. This field should be
8240 * read as '1' to indicate that the output has been completely
8241 * written. When writing a command completion or response to an
8242 * internal processor, the order of writes has to be such that
8243 * this field is written last.
8245 } __attribute__((packed));
8247 /* hwrm_ring_alloc */
8249 * Description: This command allocates and does basic preparation for a ring.
8251 /* Input (80 bytes) */
8252 struct hwrm_ring_alloc_input {
8255 * This value indicates what type of request this is. The format
8256 * for the rest of the command is determined by this field.
8260 * This value indicates the what completion ring the request
8261 * will be optionally completed on. If the value is -1, then no
8262 * CR completion will be generated. Any other value must be a
8263 * valid CR ring_id value for this function.
8266 /* This value indicates the command sequence number. */
8269 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8270 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8275 * This is the host address where the response will be written
8276 * when the request is complete. This area must be 16B aligned
8277 * and must be cleared to zero before the request is made.
8280 /* This bit must be '1' for the Reserved1 field to be configured. */
8281 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
8282 /* This bit must be '1' for the ring_arb_cfg field to be configured. */
8283 #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2)
8284 /* This bit must be '1' for the Reserved3 field to be configured. */
8285 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
8287 * This bit must be '1' for the stat_ctx_id_valid field to be
8290 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
8291 /* This bit must be '1' for the Reserved4 field to be configured. */
8292 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
8293 /* This bit must be '1' for the max_bw_valid field to be configured. */
8294 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
8297 /* L2 Completion Ring (CR) */
8298 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8300 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
8302 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
8303 /* RoCE Notification Completion Ring (ROCE_CR) */
8304 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8307 uint64_t page_tbl_addr;
8308 /* This value is a pointer to the page table for the Ring. */
8310 /* First Byte Offset of the first entry in the first page. */
8313 * Actual page size in 2^page_size. The supported range is
8314 * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B
8315 * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB
8316 * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2
8317 * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1
8318 * GB Page size is 1 GB.
8320 uint8_t page_tbl_depth;
8322 * This value indicates the depth of page table. For this
8323 * version of the specification, value other than 0 or 1 shall
8324 * be considered as an invalid value. When the page_tbl_depth =
8325 * 0, then it is treated as a special case with the following.
8326 * 1. FBO and page size fields are not valid. 2. page_tbl_addr
8327 * is the physical address of the first element of the ring.
8333 * Number of 16B units in the ring. Minimum size for a ring is
8336 uint16_t logical_id;
8338 * Logical ring number for the ring to be allocated. This value
8339 * determines the position in the doorbell area where the update
8340 * to the ring will be made. For completion rings, this value is
8341 * also the MSI-X vector number for the function the completion
8342 * ring is associated with.
8344 uint16_t cmpl_ring_id;
8346 * This field is used only when ring_type is a TX ring. This
8347 * value indicates what completion ring the TX ring is
8352 * This field is used only when ring_type is a TX ring. This
8353 * value indicates what CoS queue the TX ring is associated
8359 /* This field is reserved for the future use. It shall be set to 0. */
8360 uint16_t ring_arb_cfg;
8362 * This field is used only when ring_type is a TX ring. This
8363 * field is used to configure arbitration related parameters for
8366 /* Arbitration policy used for the ring. */
8367 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
8368 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
8370 * Use strict priority for the TX ring. Priority
8371 * value is specified in arb_policy_param
8373 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
8374 (UINT32_C(0x1) << 0)
8376 * Use weighted fair queue arbitration for the
8377 * TX ring. Weight is specified in
8380 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
8381 (UINT32_C(0x2) << 0)
8382 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
8383 RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
8384 /* Reserved field. */
8385 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
8386 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
8388 * Arbitration policy specific parameter. # For strict priority
8389 * arbitration policy, this field represents a priority value.
8390 * If set to 0, then the priority is not specified and the HWRM
8391 * is allowed to select any priority for this TX ring. # For
8392 * weighted fair queue arbitration policy, this field represents
8393 * a weight value. If set to 0, then the weight is not specified
8394 * and the HWRM is allowed to select any weight for this TX
8397 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
8399 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
8403 /* This field is reserved for the future use. It shall be set to 0. */
8404 uint32_t stat_ctx_id;
8406 * This field is used only when ring_type is a TX ring. This
8407 * input indicates what statistics context this ring should be
8411 /* This field is reserved for the future use. It shall be set to 0. */
8414 * This field is used only when ring_type is a TX ring to
8415 * specify maximum BW allocated to the TX ring. The HWRM will
8416 * translate this value into byte counter and time interval used
8417 * for this ring inside the device.
8419 /* The bandwidth value. */
8420 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
8421 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
8422 /* The granularity of the value (bits or bytes). */
8423 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
8424 /* Value is in bits. */
8425 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
8426 /* Value is in bytes. */
8427 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
8428 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
8429 RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
8430 /* bw_value_unit is 3 b */
8431 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
8432 UINT32_C(0xe0000000)
8433 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
8434 /* Value is in Mb or MB (base 10). */
8435 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
8436 (UINT32_C(0x0) << 29)
8437 /* Value is in Kb or KB (base 10). */
8438 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
8439 (UINT32_C(0x2) << 29)
8440 /* Value is in bits or bytes. */
8441 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
8442 (UINT32_C(0x4) << 29)
8443 /* Value is in Gb or GB (base 10). */
8444 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
8445 (UINT32_C(0x6) << 29)
8446 /* Value is in 1/100th of a percentage of total bandwidth. */
8447 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
8448 (UINT32_C(0x1) << 29)
8450 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
8451 (UINT32_C(0x7) << 29)
8452 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
8453 RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
8456 * This field is used only when ring_type is a Completion ring.
8457 * This value indicates what interrupt mode should be used on
8458 * this completion ring. Note: In the legacy interrupt mode, no
8459 * more than 16 completion rings are allowed.
8462 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
8464 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
8466 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
8467 /* No Interrupt - Polled mode */
8468 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
8469 uint8_t unused_8[3];
8470 } __attribute__((packed));
8472 /* Output (16 bytes) */
8473 struct hwrm_ring_alloc_output {
8474 uint16_t error_code;
8476 * Pass/Fail or error type Note: receiver to verify the in
8477 * parameters, and fail the call with an error when appropriate
8480 /* This field returns the type of original request. */
8482 /* This field provides original sequence number of the command. */
8485 * This field is the length of the response in bytes. The last
8486 * byte of the response is a valid flag that will read as '1'
8487 * when the command has been completely written to memory.
8491 * Physical number of ring allocated. This value shall be unique
8494 uint16_t logical_ring_id;
8495 /* Logical number of ring allocated. */
8501 * This field is used in Output records to indicate that the
8502 * output is completely written to RAM. This field should be
8503 * read as '1' to indicate that the output has been completely
8504 * written. When writing a command completion or response to an
8505 * internal processor, the order of writes has to be such that
8506 * this field is written last.
8508 } __attribute__((packed));
8510 /* hwrm_ring_free */
8512 * Description: This command is used to free a ring and associated resources.
8513 * With QoS and DCBx agents, it is possible the traffic classes will be moved
8514 * from one CoS queue to another. When this occurs, the driver shall call
8515 * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
8516 * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
8517 * shall be called on a ring only after it has been idle for 500ms or more and
8518 * no frames have been posted to the ring during this time. All frames queued
8519 * for transmission shall be completed and at least 500ms time elapsed from the
8520 * last completion before calling this command.
8522 /* Input (24 bytes) */
8523 struct hwrm_ring_free_input {
8526 * This value indicates what type of request this is. The format
8527 * for the rest of the command is determined by this field.
8531 * This value indicates the what completion ring the request
8532 * will be optionally completed on. If the value is -1, then no
8533 * CR completion will be generated. Any other value must be a
8534 * valid CR ring_id value for this function.
8537 /* This value indicates the command sequence number. */
8540 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8541 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8546 * This is the host address where the response will be written
8547 * when the request is complete. This area must be 16B aligned
8548 * and must be cleared to zero before the request is made.
8552 /* L2 Completion Ring (CR) */
8553 #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8555 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
8557 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
8558 /* RoCE Notification Completion Ring (ROCE_CR) */
8559 #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8562 /* Physical number of ring allocated. */
8564 } __attribute__((packed));
8566 /* Output (16 bytes) */
8567 struct hwrm_ring_free_output {
8568 uint16_t error_code;
8570 * Pass/Fail or error type Note: receiver to verify the in
8571 * parameters, and fail the call with an error when appropriate
8574 /* This field returns the type of original request. */
8576 /* This field provides original sequence number of the command. */
8579 * This field is the length of the response in bytes. The last
8580 * byte of the response is a valid flag that will read as '1'
8581 * when the command has been completely written to memory.
8589 * This field is used in Output records to indicate that the
8590 * output is completely written to RAM. This field should be
8591 * read as '1' to indicate that the output has been completely
8592 * written. When writing a command completion or response to an
8593 * internal processor, the order of writes has to be such that
8594 * this field is written last.
8596 } __attribute__((packed));
8598 /* hwrm_ring_grp_alloc */
8600 * Description: This API allocates and does basic preparation for a ring group.
8602 /* Input (24 bytes) */
8603 struct hwrm_ring_grp_alloc_input {
8606 * This value indicates what type of request this is. The format
8607 * for the rest of the command is determined by this field.
8611 * This value indicates the what completion ring the request
8612 * will be optionally completed on. If the value is -1, then no
8613 * CR completion will be generated. Any other value must be a
8614 * valid CR ring_id value for this function.
8617 /* This value indicates the command sequence number. */
8620 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8621 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8626 * This is the host address where the response will be written
8627 * when the request is complete. This area must be 16B aligned
8628 * and must be cleared to zero before the request is made.
8631 /* This value identifies the CR associated with the ring group. */
8633 /* This value identifies the main RR associated with the ring group. */
8636 * This value identifies the aggregation RR associated with the
8637 * ring group. If this value is 0xFF... (All Fs), then no
8638 * Aggregation ring will be set.
8642 * This value identifies the statistics context associated with
8645 } __attribute__((packed));
8647 /* Output (16 bytes) */
8648 struct hwrm_ring_grp_alloc_output {
8649 uint16_t error_code;
8651 * Pass/Fail or error type Note: receiver to verify the in
8652 * parameters, and fail the call with an error when appropriate
8655 /* This field returns the type of original request. */
8657 /* This field provides original sequence number of the command. */
8660 * This field is the length of the response in bytes. The last
8661 * byte of the response is a valid flag that will read as '1'
8662 * when the command has been completely written to memory.
8664 uint32_t ring_group_id;
8666 * This is the ring group ID value. Use this value to program
8667 * the default ring group for the VNIC or as table entries in an
8675 * This field is used in Output records to indicate that the
8676 * output is completely written to RAM. This field should be
8677 * read as '1' to indicate that the output has been completely
8678 * written. When writing a command completion or response to an
8679 * internal processor, the order of writes has to be such that
8680 * this field is written last.
8682 } __attribute__((packed));
8684 /* hwrm_ring_grp_free */
8686 * Description: This API frees a ring group and associated resources. # If a
8687 * ring in the ring group is reset or free, then the associated rings in the
8688 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
8689 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
8690 * a part of executing this command, the HWRM shall reset all associated ring
8693 /* Input (24 bytes) */
8694 struct hwrm_ring_grp_free_input {
8697 * This value indicates what type of request this is. The format
8698 * for the rest of the command is determined by this field.
8702 * This value indicates the what completion ring the request
8703 * will be optionally completed on. If the value is -1, then no
8704 * CR completion will be generated. Any other value must be a
8705 * valid CR ring_id value for this function.
8708 /* This value indicates the command sequence number. */
8711 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8712 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8717 * This is the host address where the response will be written
8718 * when the request is complete. This area must be 16B aligned
8719 * and must be cleared to zero before the request is made.
8721 uint32_t ring_group_id;
8722 /* This is the ring group ID value. */
8724 } __attribute__((packed));
8726 /* Output (16 bytes) */
8727 struct hwrm_ring_grp_free_output {
8728 uint16_t error_code;
8730 * Pass/Fail or error type Note: receiver to verify the in
8731 * parameters, and fail the call with an error when appropriate
8734 /* This field returns the type of original request. */
8736 /* This field provides original sequence number of the command. */
8739 * This field is the length of the response in bytes. The last
8740 * byte of the response is a valid flag that will read as '1'
8741 * when the command has been completely written to memory.
8749 * This field is used in Output records to indicate that the
8750 * output is completely written to RAM. This field should be
8751 * read as '1' to indicate that the output has been completely
8752 * written. When writing a command completion or response to an
8753 * internal processor, the order of writes has to be such that
8754 * this field is written last.
8756 } __attribute__((packed));
8758 /* hwrm_cfa_l2_filter_alloc */
8760 * Description: An L2 filter is a filter resource that is used to identify a
8761 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
8762 * encapsulated packets include both outer L2 header and/or inner l2 header of
8763 * encapsulated packet. The L2 filter resource covers the following OS specific
8764 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
8765 * of individual multicast filters # All multicast enable/disable filter #
8766 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
8767 * physical function) # All multicast enable/disable (per function) # Unicast
8768 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
8769 * enable/disable (per physical function) # List of individual multicast filters
8770 * (Driver needs to advertise the maximum number of filters supported) # All
8771 * multicast enable/disable per physical function # Unicast filters per vnic #
8772 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
8773 * command: # By default, these filters belong to default vnic for the function.
8774 * # Once these filters are set up, only destination VNIC can be modified. # If
8775 * the destination VNIC is not specified in this command, then the HWRM shall
8776 * only create an l2 context id. HWRM Implementation notes for multicast
8777 * filters: # The hwrm_filter_alloc command can be used to set up multicast
8778 * filters (perfect match or partial match). Each individual function driver can
8779 * set up multicast filters independently. # The HWRM needs to keep track of
8780 * multicast filters set up by function drivers and maintain multicast group
8781 * replication records to enable a subset of functions to receive traffic for a
8782 * specific multicast address. # When a specific multicast filter cannot be set,
8783 * the HWRM shall return an error. In this error case, the driver should fall
8784 * back to using one general filter (rather than specific) for all multicast
8785 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
8786 * source knockout per multicast group record. Examples of setting unicast
8787 * filters: For a unicast MAC based filter, one can use a combination of the
8788 * fields and masks provided in this command to set up the filter. Below are
8789 * some examples: # MAC + no VLAN filter: This filter is used to identify
8790 * traffic that does not contain any VLAN tags and matches destination (or
8791 * source) MAC address. This filter can be set up by setting only l2_addr field
8792 * to be a valid field. All other fields are not valid. The following value is
8793 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
8794 * to identify traffic that carries single VLAN tag and matches (destination or
8795 * source) MAC address. This filter can be set up by setting only l2_addr and
8796 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
8797 * following values are set for those two valid fields. l2_addr = MAC,
8798 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
8799 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
8800 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
8801 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
8802 * All other fields are not valid. The following value are set for l2_addr and
8803 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
8804 * filter is used to identify traffic that contains zero or 1 VLAN tag and
8805 * matches destination (or source) MAC address. This filter can be set up by
8806 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
8807 * other fields are not valid. The following value are set for l2_addr,
8808 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
8809 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
8810 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
8811 * fields are not valid. The following values are set for those three valid
8812 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
8814 /* Input (96 bytes) */
8815 struct hwrm_cfa_l2_filter_alloc_input {
8818 * This value indicates what type of request this is. The format
8819 * for the rest of the command is determined by this field.
8823 * This value indicates the what completion ring the request
8824 * will be optionally completed on. If the value is -1, then no
8825 * CR completion will be generated. Any other value must be a
8826 * valid CR ring_id value for this function.
8829 /* This value indicates the command sequence number. */
8832 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8833 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8838 * This is the host address where the response will be written
8839 * when the request is complete. This area must be 16B aligned
8840 * and must be cleared to zero before the request is made.
8844 * Enumeration denoting the RX, TX type of the resource. This
8845 * enumeration is used for resources that are similar for both
8846 * TX and RX paths of the chip.
8848 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
8850 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
8851 (UINT32_C(0x0) << 0)
8853 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
8854 (UINT32_C(0x1) << 0)
8855 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
8856 CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
8858 * Setting of this flag indicates the applicability to the
8861 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
8863 * Setting of this flag indicates drop action. If this flag is
8864 * not set, then it should be considered accept action.
8866 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
8868 * If this flag is set, all t_l2_* fields are invalid and they
8869 * should not be specified. If this flag is set, then l2_*
8870 * fields refer to fields of outermost L2 header.
8872 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
8874 /* This bit must be '1' for the l2_addr field to be configured. */
8875 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
8876 /* This bit must be '1' for the l2_addr_mask field to be configured. */
8877 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
8879 /* This bit must be '1' for the l2_ovlan field to be configured. */
8880 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
8882 * This bit must be '1' for the l2_ovlan_mask field to be
8885 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
8887 /* This bit must be '1' for the l2_ivlan field to be configured. */
8888 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
8890 * This bit must be '1' for the l2_ivlan_mask field to be
8893 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
8895 /* This bit must be '1' for the t_l2_addr field to be configured. */
8896 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
8898 * This bit must be '1' for the t_l2_addr_mask field to be
8901 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
8903 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
8904 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
8907 * This bit must be '1' for the t_l2_ovlan_mask field to be
8910 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
8912 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
8913 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
8916 * This bit must be '1' for the t_l2_ivlan_mask field to be
8919 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
8921 /* This bit must be '1' for the src_type field to be configured. */
8922 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
8923 /* This bit must be '1' for the src_id field to be configured. */
8924 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
8925 /* This bit must be '1' for the tunnel_type field to be configured. */
8926 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
8928 /* This bit must be '1' for the dst_id field to be configured. */
8929 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
8931 * This bit must be '1' for the mirror_vnic_id field to be
8934 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
8938 * This value sets the match value for the L2 MAC address.
8939 * Destination MAC address for RX path. Source MAC address for
8944 uint8_t l2_addr_mask[6];
8946 * This value sets the mask value for the L2 address. A value of
8947 * 0 will mask the corresponding bit from compare.
8950 /* This value sets VLAN ID value for outer VLAN. */
8951 uint16_t l2_ovlan_mask;
8953 * This value sets the mask value for the ovlan id. A value of 0
8954 * will mask the corresponding bit from compare.
8957 /* This value sets VLAN ID value for inner VLAN. */
8958 uint16_t l2_ivlan_mask;
8960 * This value sets the mask value for the ivlan id. A value of 0
8961 * will mask the corresponding bit from compare.
8965 uint8_t t_l2_addr[6];
8967 * This value sets the match value for the tunnel L2 MAC
8968 * address. Destination MAC address for RX path. Source MAC
8969 * address for TX path.
8973 uint8_t t_l2_addr_mask[6];
8975 * This value sets the mask value for the tunnel L2 address. A
8976 * value of 0 will mask the corresponding bit from compare.
8978 uint16_t t_l2_ovlan;
8979 /* This value sets VLAN ID value for tunnel outer VLAN. */
8980 uint16_t t_l2_ovlan_mask;
8982 * This value sets the mask value for the tunnel ovlan id. A
8983 * value of 0 will mask the corresponding bit from compare.
8985 uint16_t t_l2_ivlan;
8986 /* This value sets VLAN ID value for tunnel inner VLAN. */
8987 uint16_t t_l2_ivlan_mask;
8989 * This value sets the mask value for the tunnel ivlan id. A
8990 * value of 0 will mask the corresponding bit from compare.
8993 /* This value identifies the type of source of the packet. */
8995 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
8996 /* Physical function */
8997 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
8998 /* Virtual function */
8999 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
9000 /* Virtual NIC of a function */
9001 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
9002 /* Embedded processor for CFA management */
9003 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
9004 /* Embedded processor for OOB management */
9005 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
9006 /* Embedded processor for RoCE */
9007 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
9008 /* Embedded processor for network proxy functions */
9009 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
9013 * This value is the id of the source. For a network port, it
9014 * represents port_id. For a physical function, it represents
9015 * fid. For a virtual function, it represents vf_id. For a vnic,
9016 * it represents vnic_id. For embedded processors, this id is
9017 * not valid. Notes: 1. The function ID is implied if it src_id
9018 * is not provided for a src_type that is either
9020 uint8_t tunnel_type;
9023 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9025 /* Virtual eXtensible Local Area Network (VXLAN) */
9026 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9029 * Network Virtualization Generic Routing
9030 * Encapsulation (NVGRE)
9032 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9035 * Generic Routing Encapsulation (GRE) inside
9038 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
9040 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
9041 /* Generic Network Virtualization Encapsulation (Geneve) */
9042 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9043 /* Multi-Protocol Lable Switching (MPLS) */
9044 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
9045 /* Stateless Transport Tunnel (STT) */
9046 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9048 * Generic Routing Encapsulation (GRE) inside IP
9051 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
9052 /* Any tunneled traffic */
9053 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9058 * If set, this value shall represent the Logical VNIC ID of the
9059 * destination VNIC for the RX path and network port id of the
9060 * destination port for the TX path.
9062 uint16_t mirror_vnic_id;
9063 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9066 * This hint is provided to help in placing the filter in the
9070 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9072 /* Above the given filter */
9073 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
9075 /* Below the given filter */
9076 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
9078 /* As high as possible */
9079 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
9080 /* As low as possible */
9081 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
9084 uint64_t l2_filter_id_hint;
9086 * This is the ID of the filter that goes along with the
9087 * pri_hint. This field is valid only for the following values.
9088 * 1 - Above the given filter 2 - Below the given filter
9090 } __attribute__((packed));
9092 /* Output (24 bytes) */
9093 struct hwrm_cfa_l2_filter_alloc_output {
9094 uint16_t error_code;
9096 * Pass/Fail or error type Note: receiver to verify the in
9097 * parameters, and fail the call with an error when appropriate
9100 /* This field returns the type of original request. */
9102 /* This field provides original sequence number of the command. */
9105 * This field is the length of the response in bytes. The last
9106 * byte of the response is a valid flag that will read as '1'
9107 * when the command has been completely written to memory.
9109 uint64_t l2_filter_id;
9111 * This value identifies a set of CFA data structures used for
9116 * This is the ID of the flow associated with this filter. This
9117 * value shall be used to match and associate the flow
9118 * identifier returned in completion records. A value of
9119 * 0xFFFFFFFF shall indicate no flow id.
9126 * This field is used in Output records to indicate that the
9127 * output is completely written to RAM. This field should be
9128 * read as '1' to indicate that the output has been completely
9129 * written. When writing a command completion or response to an
9130 * internal processor, the order of writes has to be such that
9131 * this field is written last.
9133 } __attribute__((packed));
9135 /* hwrm_cfa_l2_filter_free */
9137 * Description: Free a L2 filter. The HWRM shall free all associated filter
9138 * resources with the L2 filter.
9140 /* Input (24 bytes) */
9141 struct hwrm_cfa_l2_filter_free_input {
9144 * This value indicates what type of request this is. The format
9145 * for the rest of the command is determined by this field.
9149 * This value indicates the what completion ring the request
9150 * will be optionally completed on. If the value is -1, then no
9151 * CR completion will be generated. Any other value must be a
9152 * valid CR ring_id value for this function.
9155 /* This value indicates the command sequence number. */
9158 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9159 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9164 * This is the host address where the response will be written
9165 * when the request is complete. This area must be 16B aligned
9166 * and must be cleared to zero before the request is made.
9168 uint64_t l2_filter_id;
9170 * This value identifies a set of CFA data structures used for
9173 } __attribute__((packed));
9175 /* Output (16 bytes) */
9176 struct hwrm_cfa_l2_filter_free_output {
9177 uint16_t error_code;
9179 * Pass/Fail or error type Note: receiver to verify the in
9180 * parameters, and fail the call with an error when appropriate
9183 /* This field returns the type of original request. */
9185 /* This field provides original sequence number of the command. */
9188 * This field is the length of the response in bytes. The last
9189 * byte of the response is a valid flag that will read as '1'
9190 * when the command has been completely written to memory.
9198 * This field is used in Output records to indicate that the
9199 * output is completely written to RAM. This field should be
9200 * read as '1' to indicate that the output has been completely
9201 * written. When writing a command completion or response to an
9202 * internal processor, the order of writes has to be such that
9203 * this field is written last.
9205 } __attribute__((packed));
9207 /* hwrm_cfa_l2_filter_cfg */
9208 /* Description: Change the configuration of an existing L2 filter */
9209 /* Input (40 bytes) */
9210 struct hwrm_cfa_l2_filter_cfg_input {
9213 * This value indicates what type of request this is. The format
9214 * for the rest of the command is determined by this field.
9218 * This value indicates the what completion ring the request
9219 * will be optionally completed on. If the value is -1, then no
9220 * CR completion will be generated. Any other value must be a
9221 * valid CR ring_id value for this function.
9224 /* This value indicates the command sequence number. */
9227 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9228 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9233 * This is the host address where the response will be written
9234 * when the request is complete. This area must be 16B aligned
9235 * and must be cleared to zero before the request is made.
9239 * Enumeration denoting the RX, TX type of the resource. This
9240 * enumeration is used for resources that are similar for both
9241 * TX and RX paths of the chip.
9243 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9245 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX \
9246 (UINT32_C(0x0) << 0)
9248 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX \
9249 (UINT32_C(0x1) << 0)
9250 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
9251 CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
9253 * Setting of this flag indicates drop action. If this flag is
9254 * not set, then it should be considered accept action.
9256 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
9258 /* This bit must be '1' for the dst_id field to be configured. */
9259 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
9261 * This bit must be '1' for the new_mirror_vnic_id field to be
9264 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9266 uint64_t l2_filter_id;
9268 * This value identifies a set of CFA data structures used for
9273 * If set, this value shall represent the Logical VNIC ID of the
9274 * destination VNIC for the RX path and network port id of the
9275 * destination port for the TX path.
9277 uint32_t new_mirror_vnic_id;
9278 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9279 } __attribute__((packed));
9281 /* Output (16 bytes) */
9282 struct hwrm_cfa_l2_filter_cfg_output {
9283 uint16_t error_code;
9285 * Pass/Fail or error type Note: receiver to verify the in
9286 * parameters, and fail the call with an error when appropriate
9289 /* This field returns the type of original request. */
9291 /* This field provides original sequence number of the command. */
9294 * This field is the length of the response in bytes. The last
9295 * byte of the response is a valid flag that will read as '1'
9296 * when the command has been completely written to memory.
9304 * This field is used in Output records to indicate that the
9305 * output is completely written to RAM. This field should be
9306 * read as '1' to indicate that the output has been completely
9307 * written. When writing a command completion or response to an
9308 * internal processor, the order of writes has to be such that
9309 * this field is written last.
9311 } __attribute__((packed));
9313 /* hwrm_cfa_l2_set_rx_mask */
9314 /* Description: This command will set rx mask of the function. */
9315 /* Input (56 bytes) */
9316 struct hwrm_cfa_l2_set_rx_mask_input {
9319 * This value indicates what type of request this is. The format
9320 * for the rest of the command is determined by this field.
9324 * This value indicates the what completion ring the request
9325 * will be optionally completed on. If the value is -1, then no
9326 * CR completion will be generated. Any other value must be a
9327 * valid CR ring_id value for this function.
9330 /* This value indicates the command sequence number. */
9333 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9334 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9339 * This is the host address where the response will be written
9340 * when the request is complete. This area must be 16B aligned
9341 * and must be cleared to zero before the request is made.
9346 /* Reserved for future use. */
9347 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
9349 * When this bit is '1', the function is requested to accept
9350 * multi-cast packets specified by the multicast addr table.
9352 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
9354 * When this bit is '1', the function is requested to accept all
9355 * multi-cast packets.
9357 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
9359 * When this bit is '1', the function is requested to accept
9360 * broadcast packets.
9362 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
9364 * When this bit is '1', the function is requested to be put in
9365 * the promiscuous mode. The HWRM should accept any function to
9366 * set up promiscuous mode. The HWRM shall follow the semantics
9367 * below for the promiscuous mode support. # When partitioning
9368 * is not enabled on a port (i.e. single PF on the port), then
9369 * the PF shall be allowed to be in the promiscuous mode. When
9370 * the PF is in the promiscuous mode, then it shall receive all
9371 * host bound traffic on that port. # When partitioning is
9372 * enabled on a port (i.e. multiple PFs per port) and a PF on
9373 * that port is in the promiscuous mode, then the PF receives
9374 * all traffic within that partition as identified by a unique
9375 * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
9376 * for the PF is specified, then the setting of promiscuous mode
9377 * on that PF shall result in the PF receiving all host bound
9378 * traffic with matching outer VLAN. # A VF shall can be set in
9379 * the promiscuous mode. In the promiscuous mode, the VF does
9380 * not receive any traffic unless a unique outer VLAN for the VF
9381 * is specified. If a unique outer VLAN for the VF is specified,
9382 * then the setting of promiscuous mode on that VF shall result
9383 * in the VF receiving all host bound traffic with the matching
9384 * outer VLAN. # The HWRM shall allow the setting of promiscuous
9385 * mode on a function independently from the promiscuous mode
9386 * settings on other functions.
9388 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
9390 * If this flag is set, the corresponding RX filters shall be
9391 * set up to cover multicast/broadcast filters for the outermost
9392 * Layer 2 destination MAC address field.
9394 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
9396 * If this flag is set, the corresponding RX filters shall be
9397 * set up to cover multicast/broadcast filters for the VLAN-
9398 * tagged packets that match the TPID and VID fields of VLAN
9399 * tags in the VLAN tag table specified in this command.
9401 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
9403 * If this flag is set, the corresponding RX filters shall be
9404 * set up to cover multicast/broadcast filters for non-VLAN
9405 * tagged packets and VLAN-tagged packets that match the TPID
9406 * and VID fields of VLAN tags in the VLAN tag table specified
9409 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
9411 * If this flag is set, the corresponding RX filters shall be
9412 * set up to cover multicast/broadcast filters for non-VLAN
9413 * tagged packets and VLAN-tagged packets matching any VLAN tag.
9414 * If this flag is set, then the HWRM shall ignore VLAN tags
9415 * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan,
9416 * and anyvlan_nonvlan flags is set, then the HWRM shall ignore
9417 * VLAN tags specified in vlan_tag_tbl. The HWRM client shall
9418 * set at most one flag out of vlanonly, vlan_nonvlan, and
9421 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
9423 uint64_t mc_tbl_addr;
9424 /* This is the address for mcast address tbl. */
9425 uint32_t num_mc_entries;
9427 * This value indicates how many entries in mc_tbl are valid.
9428 * Each entry is 6 bytes.
9431 uint64_t vlan_tag_tbl_addr;
9433 * This is the address for VLAN tag table. Each VLAN entry in
9434 * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI,
9435 * and VID fields in network byte order.
9437 uint32_t num_vlan_tags;
9439 * This value indicates how many entries in vlan_tag_tbl are
9440 * valid. Each entry is 4 bytes.
9443 } __attribute__((packed));
9445 /* Output (16 bytes) */
9446 struct hwrm_cfa_l2_set_rx_mask_output {
9447 uint16_t error_code;
9449 * Pass/Fail or error type Note: receiver to verify the in
9450 * parameters, and fail the call with an error when appropriate
9453 /* This field returns the type of original request. */
9455 /* This field provides original sequence number of the command. */
9458 * This field is the length of the response in bytes. The last
9459 * byte of the response is a valid flag that will read as '1'
9460 * when the command has been completely written to memory.
9468 * This field is used in Output records to indicate that the
9469 * output is completely written to RAM. This field should be
9470 * read as '1' to indicate that the output has been completely
9471 * written. When writing a command completion or response to an
9472 * internal processor, the order of writes has to be such that
9473 * this field is written last.
9475 } __attribute__((packed));
9477 /* hwrm_cfa_ntuple_filter_alloc */
9479 * Description: This is a ntuple filter that uses fields from L4/L3 header and
9480 * optionally fields from L2. The ntuple filters apply to receive traffic only.
9481 * All L2/L3/L4 header fields are specified in network byte order. These filters
9482 * can be used for Receive Flow Steering (RFS). # For ethertype value, only
9483 * 0x0800 (IPv4) and 0x86dd (IPv6) shall be supported for ntuple filters. # If a
9484 * field specified in this command is not enabled as a valid field, then that
9485 * field shall not be used in matching packet header fields against this filter.
9487 /* Input (128 bytes) */
9488 struct hwrm_cfa_ntuple_filter_alloc_input {
9491 * This value indicates what type of request this is. The format
9492 * for the rest of the command is determined by this field.
9496 * This value indicates the what completion ring the request
9497 * will be optionally completed on. If the value is -1, then no
9498 * CR completion will be generated. Any other value must be a
9499 * valid CR ring_id value for this function.
9502 /* This value indicates the command sequence number. */
9505 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9506 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9511 * This is the host address where the response will be written
9512 * when the request is complete. This area must be 16B aligned
9513 * and must be cleared to zero before the request is made.
9517 * Setting of this flag indicates the applicability to the
9520 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
9523 * Setting of this flag indicates drop action. If this flag is
9524 * not set, then it should be considered accept action.
9526 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x2)
9528 * Setting of this flag indicates that a meter is expected to be
9529 * attached to this flow. This hint can be used when choosing
9530 * the action record format required for the flow.
9532 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_METER UINT32_C(0x4)
9534 /* This bit must be '1' for the l2_filter_id field to be configured. */
9535 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID \
9537 /* This bit must be '1' for the ethertype field to be configured. */
9538 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE \
9540 /* This bit must be '1' for the tunnel_type field to be configured. */
9541 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9543 /* This bit must be '1' for the src_macaddr field to be configured. */
9544 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR \
9546 /* This bit must be '1' for the ipaddr_type field to be configured. */
9547 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IPADDR_TYPE \
9549 /* This bit must be '1' for the src_ipaddr field to be configured. */
9550 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR \
9553 * This bit must be '1' for the src_ipaddr_mask field to be
9556 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK \
9558 /* This bit must be '1' for the dst_ipaddr field to be configured. */
9559 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR \
9562 * This bit must be '1' for the dst_ipaddr_mask field to be
9565 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK \
9567 /* This bit must be '1' for the ip_protocol field to be configured. */
9568 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL \
9570 /* This bit must be '1' for the src_port field to be configured. */
9571 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT \
9574 * This bit must be '1' for the src_port_mask field to be
9577 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK \
9579 /* This bit must be '1' for the dst_port field to be configured. */
9580 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT \
9583 * This bit must be '1' for the dst_port_mask field to be
9586 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK \
9588 /* This bit must be '1' for the pri_hint field to be configured. */
9589 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_PRI_HINT \
9592 * This bit must be '1' for the ntuple_filter_id field to be
9595 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_NTUPLE_FILTER_ID \
9597 /* This bit must be '1' for the dst_id field to be configured. */
9598 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
9601 * This bit must be '1' for the mirror_vnic_id field to be
9604 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9606 /* This bit must be '1' for the dst_macaddr field to be configured. */
9607 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \
9609 uint64_t l2_filter_id;
9611 * This value identifies a set of CFA data structures used for
9614 uint8_t src_macaddr[6];
9616 * This value indicates the source MAC address in the Ethernet
9620 /* This value indicates the ethertype in the Ethernet header. */
9621 uint8_t ip_addr_type;
9623 * This value indicates the type of IP address. 4 - IPv4 6 -
9624 * IPv6 All others are invalid.
9627 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN \
9630 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \
9633 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
9635 uint8_t ip_protocol;
9637 * The value of protocol filed in IP header. Applies to UDP and
9638 * TCP traffic. 6 - UDP 17 - TCP
9641 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \
9644 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP \
9647 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP \
9651 * If set, this value shall represent the Logical VNIC ID of the
9652 * destination VNIC for the RX path and network port id of the
9653 * destination port for the TX path.
9655 uint16_t mirror_vnic_id;
9656 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9657 uint8_t tunnel_type;
9659 * This value indicates the tunnel type for this filter. If this
9660 * field is not specified, then the filter shall apply to both
9661 * non-tunneled and tunneled packets. If this field conflicts
9662 * with the tunnel_type specified in the l2_filter_id, then the
9663 * HWRM shall return an error for this command.
9666 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9668 /* Virtual eXtensible Local Area Network (VXLAN) */
9669 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9672 * Network Virtualization Generic Routing
9673 * Encapsulation (NVGRE)
9675 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9678 * Generic Routing Encapsulation (GRE) inside
9681 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
9684 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
9686 /* Generic Network Virtualization Encapsulation (Geneve) */
9687 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
9689 /* Multi-Protocol Lable Switching (MPLS) */
9690 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
9692 /* Stateless Transport Tunnel (STT) */
9693 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9695 * Generic Routing Encapsulation (GRE) inside IP
9698 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
9700 /* Any tunneled traffic */
9701 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9705 * This hint is provided to help in placing the filter in the
9709 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9711 /* Above the given filter */
9712 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE UINT32_C(0x1)
9713 /* Below the given filter */
9714 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_BELOW UINT32_C(0x2)
9715 /* As high as possible */
9716 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_HIGHEST \
9718 /* As low as possible */
9719 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_LOWEST UINT32_C(0x4)
9720 uint32_t src_ipaddr[4];
9722 * The value of source IP address to be used in filtering. For
9723 * IPv4, first four bytes represent the IP address.
9725 uint32_t src_ipaddr_mask[4];
9727 * The value of source IP address mask to be used in filtering.
9728 * For IPv4, first four bytes represent the IP address mask.
9730 uint32_t dst_ipaddr[4];
9732 * The value of destination IP address to be used in filtering.
9733 * For IPv4, first four bytes represent the IP address.
9735 uint32_t dst_ipaddr_mask[4];
9737 * The value of destination IP address mask to be used in
9738 * filtering. For IPv4, first four bytes represent the IP
9743 * The value of source port to be used in filtering. Applies to
9744 * UDP and TCP traffic.
9746 uint16_t src_port_mask;
9748 * The value of source port mask to be used in filtering.
9749 * Applies to UDP and TCP traffic.
9753 * The value of destination port to be used in filtering.
9754 * Applies to UDP and TCP traffic.
9756 uint16_t dst_port_mask;
9758 * The value of destination port mask to be used in filtering.
9759 * Applies to UDP and TCP traffic.
9761 uint64_t ntuple_filter_id_hint;
9762 /* This is the ID of the filter that goes along with the pri_hint. */
9763 } __attribute__((packed));
9765 /* Output (24 bytes) */
9766 struct hwrm_cfa_ntuple_filter_alloc_output {
9767 uint16_t error_code;
9769 * Pass/Fail or error type Note: receiver to verify the in
9770 * parameters, and fail the call with an error when appropriate
9773 /* This field returns the type of original request. */
9775 /* This field provides original sequence number of the command. */
9778 * This field is the length of the response in bytes. The last
9779 * byte of the response is a valid flag that will read as '1'
9780 * when the command has been completely written to memory.
9782 uint64_t ntuple_filter_id;
9783 /* This value is an opaque id into CFA data structures. */
9786 * This is the ID of the flow associated with this filter. This
9787 * value shall be used to match and associate the flow
9788 * identifier returned in completion records. A value of
9789 * 0xFFFFFFFF shall indicate no flow id.
9796 * This field is used in Output records to indicate that the
9797 * output is completely written to RAM. This field should be
9798 * read as '1' to indicate that the output has been completely
9799 * written. When writing a command completion or response to an
9800 * internal processor, the order of writes has to be such that
9801 * this field is written last.
9803 } __attribute__((packed));
9805 /* hwrm_cfa_ntuple_filter_free */
9806 /* Description: Free an ntuple filter */
9807 /* Input (24 bytes) */
9808 struct hwrm_cfa_ntuple_filter_free_input {
9811 * This value indicates what type of request this is. The format
9812 * for the rest of the command is determined by this field.
9816 * This value indicates the what completion ring the request
9817 * will be optionally completed on. If the value is -1, then no
9818 * CR completion will be generated. Any other value must be a
9819 * valid CR ring_id value for this function.
9822 /* This value indicates the command sequence number. */
9825 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9826 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9831 * This is the host address where the response will be written
9832 * when the request is complete. This area must be 16B aligned
9833 * and must be cleared to zero before the request is made.
9835 uint64_t ntuple_filter_id;
9836 /* This value is an opaque id into CFA data structures. */
9837 } __attribute__((packed));
9839 /* Output (16 bytes) */
9840 struct hwrm_cfa_ntuple_filter_free_output {
9841 uint16_t error_code;
9843 * Pass/Fail or error type Note: receiver to verify the in
9844 * parameters, and fail the call with an error when appropriate
9847 /* This field returns the type of original request. */
9849 /* This field provides original sequence number of the command. */
9852 * This field is the length of the response in bytes. The last
9853 * byte of the response is a valid flag that will read as '1'
9854 * when the command has been completely written to memory.
9862 * This field is used in Output records to indicate that the
9863 * output is completely written to RAM. This field should be
9864 * read as '1' to indicate that the output has been completely
9865 * written. When writing a command completion or response to an
9866 * internal processor, the order of writes has to be such that
9867 * this field is written last.
9869 } __attribute__((packed));
9871 /* hwrm_cfa_ntuple_filter_cfg */
9873 * Description: Configure an ntuple filter with a new destination VNIC and/or
9876 /* Input (48 bytes) */
9877 struct hwrm_cfa_ntuple_filter_cfg_input {
9880 * This value indicates what type of request this is. The format
9881 * for the rest of the command is determined by this field.
9885 * This value indicates the what completion ring the request
9886 * will be optionally completed on. If the value is -1, then no
9887 * CR completion will be generated. Any other value must be a
9888 * valid CR ring_id value for this function.
9891 /* This value indicates the command sequence number. */
9894 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9895 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9900 * This is the host address where the response will be written
9901 * when the request is complete. This area must be 16B aligned
9902 * and must be cleared to zero before the request is made.
9905 /* This bit must be '1' for the new_dst_id field to be configured. */
9906 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_DST_ID \
9909 * This bit must be '1' for the new_mirror_vnic_id field to be
9912 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9915 * This bit must be '1' for the new_meter_instance_id field to
9918 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
9921 uint64_t ntuple_filter_id;
9922 /* This value is an opaque id into CFA data structures. */
9923 uint32_t new_dst_id;
9925 * If set, this value shall represent the new Logical VNIC ID of
9926 * the destination VNIC for the RX path and new network port id
9927 * of the destination port for the TX path.
9929 uint32_t new_mirror_vnic_id;
9930 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9931 uint16_t new_meter_instance_id;
9933 * New meter to attach to the flow. Specifying the invalid
9934 * instance ID is used to remove any existing meter from the
9938 * A value of 0xfff is considered invalid and
9939 * implies the instance is not configured.
9941 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
9943 uint16_t unused_1[3];
9944 } __attribute__((packed));
9946 /* Output (16 bytes) */
9947 struct hwrm_cfa_ntuple_filter_cfg_output {
9948 uint16_t error_code;
9950 * Pass/Fail or error type Note: receiver to verify the in
9951 * parameters, and fail the call with an error when appropriate
9954 /* This field returns the type of original request. */
9956 /* This field provides original sequence number of the command. */
9959 * This field is the length of the response in bytes. The last
9960 * byte of the response is a valid flag that will read as '1'
9961 * when the command has been completely written to memory.
9969 * This field is used in Output records to indicate that the
9970 * output is completely written to RAM. This field should be
9971 * read as '1' to indicate that the output has been completely
9972 * written. When writing a command completion or response to an
9973 * internal processor, the order of writes has to be such that
9974 * this field is written last.
9976 } __attribute__((packed));
9978 /* hwrm_cfa_em_flow_alloc */
9980 * Description: This is a generic Exact Match (EM) flow that uses fields from
9981 * L4/L3/L2 headers. The EM flows apply to transmit and receive traffic. All
9982 * L2/L3/L4 header fields are specified in network byte order. For each EM flow,
9983 * there is an associated set of actions specified. For tunneled packets, all
9984 * L2/L3/L4 fields specified are fields of inner headers unless otherwise
9985 * specified. # If a field specified in this command is not enabled as a valid
9986 * field, then that field shall not be used in matching packet header fields
9987 * against this EM flow entry.
9989 /* Input (112 bytes) */
9990 struct hwrm_cfa_em_flow_alloc_input {
9993 * This value indicates what type of request this is. The format
9994 * for the rest of the command is determined by this field.
9998 * This value indicates the what completion ring the request
9999 * will be optionally completed on. If the value is -1, then no
10000 * CR completion will be generated. Any other value must be a
10001 * valid CR ring_id value for this function.
10004 /* This value indicates the command sequence number. */
10005 uint16_t target_id;
10007 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10008 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10011 uint64_t resp_addr;
10013 * This is the host address where the response will be written
10014 * when the request is complete. This area must be 16B aligned
10015 * and must be cleared to zero before the request is made.
10019 * Enumeration denoting the RX, TX type of the resource. This
10020 * enumeration is used for resources that are similar for both
10021 * TX and RX paths of the chip.
10023 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
10025 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_TX \
10026 (UINT32_C(0x0) << 0)
10028 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX \
10029 (UINT32_C(0x1) << 0)
10030 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_LAST \
10031 CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX
10033 * Setting of this flag indicates enabling of a byte counter for
10036 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_BYTE_CTR UINT32_C(0x2)
10038 * Setting of this flag indicates enabling of a packet counter
10039 * for a given flow.
10041 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PKT_CTR UINT32_C(0x4)
10043 * Setting of this flag indicates de-capsulation action for the
10046 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DECAP UINT32_C(0x8)
10048 * Setting of this flag indicates encapsulation action for the
10051 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_ENCAP UINT32_C(0x10)
10053 * Setting of this flag indicates drop action. If this flag is
10054 * not set, then it should be considered accept action.
10056 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x20)
10058 * Setting of this flag indicates that a meter is expected to be
10059 * attached to this flow. This hint can be used when choosing
10060 * the action record format required for the flow.
10062 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_METER UINT32_C(0x40)
10064 /* This bit must be '1' for the l2_filter_id field to be configured. */
10065 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
10066 /* This bit must be '1' for the tunnel_type field to be configured. */
10067 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x2)
10068 /* This bit must be '1' for the tunnel_id field to be configured. */
10069 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_ID UINT32_C(0x4)
10070 /* This bit must be '1' for the src_macaddr field to be configured. */
10071 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
10072 /* This bit must be '1' for the dst_macaddr field to be configured. */
10073 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x10)
10074 /* This bit must be '1' for the ovlan_vid field to be configured. */
10075 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID UINT32_C(0x20)
10076 /* This bit must be '1' for the ivlan_vid field to be configured. */
10077 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IVLAN_VID UINT32_C(0x40)
10078 /* This bit must be '1' for the ethertype field to be configured. */
10079 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x80)
10080 /* This bit must be '1' for the src_ipaddr field to be configured. */
10081 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x100)
10082 /* This bit must be '1' for the dst_ipaddr field to be configured. */
10083 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x200)
10084 /* This bit must be '1' for the ipaddr_type field to be configured. */
10085 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x400)
10086 /* This bit must be '1' for the ip_protocol field to be configured. */
10087 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x800)
10088 /* This bit must be '1' for the src_port field to be configured. */
10089 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x1000)
10090 /* This bit must be '1' for the dst_port field to be configured. */
10091 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x2000)
10092 /* This bit must be '1' for the dst_id field to be configured. */
10093 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x4000)
10095 * This bit must be '1' for the mirror_vnic_id field to be
10098 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
10101 * This bit must be '1' for the encap_record_id field to be
10104 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ENCAP_RECORD_ID \
10107 * This bit must be '1' for the meter_instance_id field to be
10110 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_METER_INSTANCE_ID \
10112 uint64_t l2_filter_id;
10114 * This value identifies a set of CFA data structures used for
10117 uint8_t tunnel_type;
10120 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10122 /* Virtual eXtensible Local Area Network (VXLAN) */
10123 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10125 * Network Virtualization Generic Routing
10126 * Encapsulation (NVGRE)
10128 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
10130 * Generic Routing Encapsulation (GRE) inside
10133 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
10135 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
10136 /* Generic Network Virtualization Encapsulation (Geneve) */
10137 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10138 /* Multi-Protocol Lable Switching (MPLS) */
10139 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
10140 /* Stateless Transport Tunnel (STT) */
10141 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10143 * Generic Routing Encapsulation (GRE) inside IP
10146 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
10147 /* Any tunneled traffic */
10148 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10152 uint32_t tunnel_id;
10154 * Tunnel identifier. Virtual Network Identifier (VNI). Only
10155 * valid with tunnel_types VXLAN, NVGRE, and Geneve. Only lower
10156 * 24-bits of VNI field are used in setting up the filter.
10158 uint8_t src_macaddr[6];
10160 * This value indicates the source MAC address in the Ethernet
10163 uint16_t meter_instance_id;
10164 /* The meter instance to attach to the flow. */
10166 * A value of 0xfff is considered invalid and
10167 * implies the instance is not configured.
10169 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_METER_INSTANCE_ID_INVALID \
10171 uint8_t dst_macaddr[6];
10173 * This value indicates the destination MAC address in the
10176 uint16_t ovlan_vid;
10178 * This value indicates the VLAN ID of the outer VLAN tag in the
10181 uint16_t ivlan_vid;
10183 * This value indicates the VLAN ID of the inner VLAN tag in the
10186 uint16_t ethertype;
10187 /* This value indicates the ethertype in the Ethernet header. */
10188 uint8_t ip_addr_type;
10190 * This value indicates the type of IP address. 4 - IPv4 6 -
10191 * IPv6 All others are invalid.
10194 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
10196 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
10198 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
10199 uint8_t ip_protocol;
10201 * The value of protocol filed in IP header. Applies to UDP and
10202 * TCP traffic. 6 - UDP 17 - TCP
10205 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
10207 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x6)
10209 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x11)
10212 uint32_t src_ipaddr[4];
10214 * The value of source IP address to be used in filtering. For
10215 * IPv4, first four bytes represent the IP address.
10217 uint32_t dst_ipaddr[4];
10219 * big_endian = True The value of destination IP address to be
10220 * used in filtering. For IPv4, first four bytes represent the
10225 * The value of source port to be used in filtering. Applies to
10226 * UDP and TCP traffic.
10230 * The value of destination port to be used in filtering.
10231 * Applies to UDP and TCP traffic.
10235 * If set, this value shall represent the Logical VNIC ID of the
10236 * destination VNIC for the RX path and network port id of the
10237 * destination port for the TX path.
10239 uint16_t mirror_vnic_id;
10240 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10241 uint32_t encap_record_id;
10242 /* Logical ID of the encapsulation record. */
10244 } __attribute__((packed));
10246 /* Output (24 bytes) */
10247 struct hwrm_cfa_em_flow_alloc_output {
10248 uint16_t error_code;
10250 * Pass/Fail or error type Note: receiver to verify the in
10251 * parameters, and fail the call with an error when appropriate
10254 /* This field returns the type of original request. */
10256 /* This field provides original sequence number of the command. */
10259 * This field is the length of the response in bytes. The last
10260 * byte of the response is a valid flag that will read as '1'
10261 * when the command has been completely written to memory.
10263 uint64_t em_filter_id;
10264 /* This value is an opaque id into CFA data structures. */
10267 * This is the ID of the flow associated with this filter. This
10268 * value shall be used to match and associate the flow
10269 * identifier returned in completion records. A value of
10270 * 0xFFFFFFFF shall indicate no flow id.
10277 * This field is used in Output records to indicate that the
10278 * output is completely written to RAM. This field should be
10279 * read as '1' to indicate that the output has been completely
10280 * written. When writing a command completion or response to an
10281 * internal processor, the order of writes has to be such that
10282 * this field is written last.
10284 } __attribute__((packed));
10286 /* hwrm_cfa_em_flow_free */
10287 /* Description: Free an EM flow table entry */
10288 /* Input (24 bytes) */
10289 struct hwrm_cfa_em_flow_free_input {
10292 * This value indicates what type of request this is. The format
10293 * for the rest of the command is determined by this field.
10295 uint16_t cmpl_ring;
10297 * This value indicates the what completion ring the request
10298 * will be optionally completed on. If the value is -1, then no
10299 * CR completion will be generated. Any other value must be a
10300 * valid CR ring_id value for this function.
10303 /* This value indicates the command sequence number. */
10304 uint16_t target_id;
10306 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10307 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10310 uint64_t resp_addr;
10312 * This is the host address where the response will be written
10313 * when the request is complete. This area must be 16B aligned
10314 * and must be cleared to zero before the request is made.
10316 uint64_t em_filter_id;
10317 /* This value is an opaque id into CFA data structures. */
10318 } __attribute__((packed));
10320 /* Output (16 bytes) */
10321 struct hwrm_cfa_em_flow_free_output {
10322 uint16_t error_code;
10324 * Pass/Fail or error type Note: receiver to verify the in
10325 * parameters, and fail the call with an error when appropriate
10328 /* This field returns the type of original request. */
10330 /* This field provides original sequence number of the command. */
10333 * This field is the length of the response in bytes. The last
10334 * byte of the response is a valid flag that will read as '1'
10335 * when the command has been completely written to memory.
10343 * This field is used in Output records to indicate that the
10344 * output is completely written to RAM. This field should be
10345 * read as '1' to indicate that the output has been completely
10346 * written. When writing a command completion or response to an
10347 * internal processor, the order of writes has to be such that
10348 * this field is written last.
10350 } __attribute__((packed));
10352 /* hwrm_cfa_em_flow_cfg */
10354 * Description: Configure an EM flow with a new destination VNIC and/or meter.
10356 /* Input (48 bytes) */
10357 struct hwrm_cfa_em_flow_cfg_input {
10360 * This value indicates what type of request this is. The format
10361 * for the rest of the command is determined by this field.
10363 uint16_t cmpl_ring;
10365 * This value indicates the what completion ring the request
10366 * will be optionally completed on. If the value is -1, then no
10367 * CR completion will be generated. Any other value must be a
10368 * valid CR ring_id value for this function.
10371 /* This value indicates the command sequence number. */
10372 uint16_t target_id;
10374 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10375 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10378 uint64_t resp_addr;
10380 * This is the host address where the response will be written
10381 * when the request is complete. This area must be 16B aligned
10382 * and must be cleared to zero before the request is made.
10385 /* This bit must be '1' for the new_dst_id field to be configured. */
10386 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
10388 * This bit must be '1' for the new_mirror_vnic_id field to be
10391 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10394 * This bit must be '1' for the new_meter_instance_id field to
10397 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10400 uint64_t em_filter_id;
10401 /* This value is an opaque id into CFA data structures. */
10402 uint32_t new_dst_id;
10404 * If set, this value shall represent the new Logical VNIC ID of
10405 * the destination VNIC for the RX path and network port id of
10406 * the destination port for the TX path.
10408 uint32_t new_mirror_vnic_id;
10409 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10410 uint16_t new_meter_instance_id;
10412 * New meter to attach to the flow. Specifying the invalid
10413 * instance ID is used to remove any existing meter from the
10417 * A value of 0xfff is considered invalid and
10418 * implies the instance is not configured.
10420 #define HWRM_CFA_EM_FLOW_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10422 uint16_t unused_1[3];
10423 } __attribute__((packed));
10425 /* Output (16 bytes) */
10426 struct hwrm_cfa_em_flow_cfg_output {
10427 uint16_t error_code;
10429 * Pass/Fail or error type Note: receiver to verify the in
10430 * parameters, and fail the call with an error when appropriate
10433 /* This field returns the type of original request. */
10435 /* This field provides original sequence number of the command. */
10438 * This field is the length of the response in bytes. The last
10439 * byte of the response is a valid flag that will read as '1'
10440 * when the command has been completely written to memory.
10448 * This field is used in Output records to indicate that the
10449 * output is completely written to RAM. This field should be
10450 * read as '1' to indicate that the output has been completely
10451 * written. When writing a command completion or response to an
10452 * internal processor, the order of writes has to be such that
10453 * this field is written last.
10455 } __attribute__((packed));
10458 /* hwrm_cfa_vlan_antispoof_cfg */
10459 /* Description: Configures vlan anti-spoof filters for VF. */
10460 /* Input (32 bytes) */
10461 struct hwrm_cfa_vlan_antispoof_cfg_input {
10464 * This value indicates what type of request this is. The format for the
10465 * rest of the command is determined by this field.
10467 uint16_t cmpl_ring;
10469 * This value indicates the what completion ring the request will be
10470 * optionally completed on. If the value is -1, then no CR completion
10471 * will be generated. Any other value must be a valid CR ring_id value
10472 * for this function.
10475 /* This value indicates the command sequence number. */
10476 uint16_t target_id;
10478 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
10479 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
10481 uint64_t resp_addr;
10483 * This is the host address where the response will be written when the
10484 * request is complete. This area must be 16B aligned and must be
10485 * cleared to zero before the request is made.
10489 * Function ID of the function that is being configured. Only valid for
10490 * a VF FID configured by the PF.
10494 uint32_t num_vlan_entries;
10495 /* Number of VLAN entries in the vlan_tag_mask_tbl. */
10496 uint64_t vlan_tag_mask_tbl_addr;
10498 * The vlan_tag_mask_tbl_addr is the DMA address of the VLAN antispoof
10499 * table. Each table entry contains the 16-bit TPID (0x8100 or 0x88a8
10500 * only), 16-bit VLAN ID, and a 16-bit mask, all in network order to
10501 * match hwrm_cfa_l2_set_rx_mask. For an individual VLAN entry, the mask
10502 * value should be 0xfff for the 12-bit VLAN ID.
10506 /* Output (16 bytes) */
10507 struct hwrm_cfa_vlan_antispoof_cfg_output {
10508 uint16_t error_code;
10510 * Pass/Fail or error type Note: receiver to verify the in parameters,
10511 * and fail the call with an error when appropriate
10514 /* This field returns the type of original request. */
10516 /* This field provides original sequence number of the command. */
10519 * This field is the length of the response in bytes. The last byte of
10520 * the response is a valid flag that will read as '1' when the command
10521 * has been completely written to memory.
10529 * This field is used in Output records to indicate that the output is
10530 * completely written to RAM. This field should be read as '1' to
10531 * indicate that the output has been completely written. When writing a
10532 * command completion or response to an internal processor, the order of
10533 * writes has to be such that this field is written last.
10537 /* hwrm_tunnel_dst_port_query */
10539 * Description: This function is called by a driver to query tunnel type
10540 * specific destination port configuration.
10542 /* Input (24 bytes) */
10543 struct hwrm_tunnel_dst_port_query_input {
10546 * This value indicates what type of request this is. The format
10547 * for the rest of the command is determined by this field.
10549 uint16_t cmpl_ring;
10551 * This value indicates the what completion ring the request
10552 * will be optionally completed on. If the value is -1, then no
10553 * CR completion will be generated. Any other value must be a
10554 * valid CR ring_id value for this function.
10557 /* This value indicates the command sequence number. */
10558 uint16_t target_id;
10560 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10561 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10564 uint64_t resp_addr;
10566 * This is the host address where the response will be written
10567 * when the request is complete. This area must be 16B aligned
10568 * and must be cleared to zero before the request is made.
10570 uint8_t tunnel_type;
10572 /* Virtual eXtensible Local Area Network (VXLAN) */
10573 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN \
10575 /* Generic Network Virtualization Encapsulation (Geneve) */
10576 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE \
10578 uint8_t unused_0[7];
10579 } __attribute__((packed));
10581 /* Output (16 bytes) */
10582 struct hwrm_tunnel_dst_port_query_output {
10583 uint16_t error_code;
10585 * Pass/Fail or error type Note: receiver to verify the in
10586 * parameters, and fail the call with an error when appropriate
10589 /* This field returns the type of original request. */
10591 /* This field provides original sequence number of the command. */
10594 * This field is the length of the response in bytes. The last
10595 * byte of the response is a valid flag that will read as '1'
10596 * when the command has been completely written to memory.
10598 uint16_t tunnel_dst_port_id;
10600 * This field represents the identifier of L4 destination port
10601 * used for the given tunnel type. This field is valid for
10602 * specific tunnel types that use layer 4 (e.g. UDP) transports
10605 uint16_t tunnel_dst_port_val;
10607 * This field represents the value of L4 destination port
10608 * identified by tunnel_dst_port_id. This field is valid for
10609 * specific tunnel types that use layer 4 (e.g. UDP) transports
10610 * for tunneling. This field is in network byte order. A value
10611 * of 0 means that the destination port is not configured.
10618 * This field is used in Output records to indicate that the
10619 * output is completely written to RAM. This field should be
10620 * read as '1' to indicate that the output has been completely
10621 * written. When writing a command completion or response to an
10622 * internal processor, the order of writes has to be such that
10623 * this field is written last.
10625 } __attribute__((packed));
10627 /* hwrm_tunnel_dst_port_alloc */
10629 * Description: This function is called by a driver to allocate l4 destination
10630 * port for a specific tunnel type. The destination port value is provided in
10631 * the input. If the HWRM supports only one global destination port for a tunnel
10632 * type, then the HWRM shall keep track of its usage as described below. # The
10633 * first caller that allocates a destination port shall always succeed and the
10634 * HWRM shall save the destination port configuration for that tunnel type and
10635 * increment the usage count to 1. # Subsequent callers allocating the same
10636 * destination port for that tunnel type shall succeed and the HWRM shall
10637 * increment the usage count for that port for each subsequent caller that
10638 * succeeds. # Any subsequent caller trying to allocate a different destination
10639 * port for that tunnel type shall fail until the usage count for the original
10640 * destination port goes to zero. # A caller that frees a port will cause the
10641 * usage count for that port to decrement.
10643 /* Input (24 bytes) */
10644 struct hwrm_tunnel_dst_port_alloc_input {
10647 * This value indicates what type of request this is. The format
10648 * for the rest of the command is determined by this field.
10650 uint16_t cmpl_ring;
10652 * This value indicates the what completion ring the request
10653 * will be optionally completed on. If the value is -1, then no
10654 * CR completion will be generated. Any other value must be a
10655 * valid CR ring_id value for this function.
10658 /* This value indicates the command sequence number. */
10659 uint16_t target_id;
10661 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10662 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10665 uint64_t resp_addr;
10667 * This is the host address where the response will be written
10668 * when the request is complete. This area must be 16B aligned
10669 * and must be cleared to zero before the request is made.
10671 uint8_t tunnel_type;
10673 /* Virtual eXtensible Local Area Network (VXLAN) */
10674 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10675 /* Generic Network Virtualization Encapsulation (Geneve) */
10676 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
10679 uint16_t tunnel_dst_port_val;
10681 * This field represents the value of L4 destination port used
10682 * for the given tunnel type. This field is valid for specific
10683 * tunnel types that use layer 4 (e.g. UDP) transports for
10684 * tunneling. This field is in network byte order. A value of 0
10685 * shall fail the command.
10688 } __attribute__((packed));
10690 /* Output (16 bytes) */
10691 struct hwrm_tunnel_dst_port_alloc_output {
10692 uint16_t error_code;
10694 * Pass/Fail or error type Note: receiver to verify the in
10695 * parameters, and fail the call with an error when appropriate
10698 /* This field returns the type of original request. */
10700 /* This field provides original sequence number of the command. */
10703 * This field is the length of the response in bytes. The last
10704 * byte of the response is a valid flag that will read as '1'
10705 * when the command has been completely written to memory.
10707 uint16_t tunnel_dst_port_id;
10709 * Identifier of a tunnel L4 destination port value. Only
10710 * applies to tunnel types that has l4 destination port
10720 * This field is used in Output records to indicate that the
10721 * output is completely written to RAM. This field should be
10722 * read as '1' to indicate that the output has been completely
10723 * written. When writing a command completion or response to an
10724 * internal processor, the order of writes has to be such that
10725 * this field is written last.
10727 } __attribute__((packed));
10729 /* hwrm_tunnel_dst_port_free */
10731 * Description: This function is called by a driver to free l4 destination port
10732 * for a specific tunnel type.
10734 /* Input (24 bytes) */
10735 struct hwrm_tunnel_dst_port_free_input {
10738 * This value indicates what type of request this is. The format
10739 * for the rest of the command is determined by this field.
10741 uint16_t cmpl_ring;
10743 * This value indicates the what completion ring the request
10744 * will be optionally completed on. If the value is -1, then no
10745 * CR completion will be generated. Any other value must be a
10746 * valid CR ring_id value for this function.
10749 /* This value indicates the command sequence number. */
10750 uint16_t target_id;
10752 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10753 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10756 uint64_t resp_addr;
10758 * This is the host address where the response will be written
10759 * when the request is complete. This area must be 16B aligned
10760 * and must be cleared to zero before the request is made.
10762 uint8_t tunnel_type;
10764 /* Virtual eXtensible Local Area Network (VXLAN) */
10765 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10766 /* Generic Network Virtualization Encapsulation (Geneve) */
10767 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10769 uint16_t tunnel_dst_port_id;
10771 * Identifier of a tunnel L4 destination port value. Only
10772 * applies to tunnel types that has l4 destination port
10776 } __attribute__((packed));
10778 /* Output (16 bytes) */
10779 struct hwrm_tunnel_dst_port_free_output {
10780 uint16_t error_code;
10782 * Pass/Fail or error type Note: receiver to verify the in
10783 * parameters, and fail the call with an error when appropriate
10786 /* This field returns the type of original request. */
10788 /* This field provides original sequence number of the command. */
10791 * This field is the length of the response in bytes. The last
10792 * byte of the response is a valid flag that will read as '1'
10793 * when the command has been completely written to memory.
10801 * This field is used in Output records to indicate that the
10802 * output is completely written to RAM. This field should be
10803 * read as '1' to indicate that the output has been completely
10804 * written. When writing a command completion or response to an
10805 * internal processor, the order of writes has to be such that
10806 * this field is written last.
10808 } __attribute__((packed));
10810 /* hwrm_stat_ctx_alloc */
10812 * Description: This command allocates and does basic preparation for a stat
10815 /* Input (32 bytes) */
10816 struct hwrm_stat_ctx_alloc_input {
10819 * This value indicates what type of request this is. The format
10820 * for the rest of the command is determined by this field.
10822 uint16_t cmpl_ring;
10824 * This value indicates the what completion ring the request
10825 * will be optionally completed on. If the value is -1, then no
10826 * CR completion will be generated. Any other value must be a
10827 * valid CR ring_id value for this function.
10830 /* This value indicates the command sequence number. */
10831 uint16_t target_id;
10833 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10834 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10837 uint64_t resp_addr;
10839 * This is the host address where the response will be written
10840 * when the request is complete. This area must be 16B aligned
10841 * and must be cleared to zero before the request is made.
10843 uint64_t stats_dma_addr;
10844 /* This is the address for statistic block. */
10845 uint32_t update_period_ms;
10847 * The statistic block update period in ms. e.g. 250ms, 500ms,
10848 * 750ms, 1000ms. If update_period_ms is 0, then the stats
10849 * update shall be never done and the DMA address shall not be
10850 * used. In this case, the stat block can only be read by
10851 * hwrm_stat_ctx_query command.
10853 uint8_t stat_ctx_flags;
10855 * This field is used to specify statistics context specific
10856 * configuration flags.
10859 * When this bit is set to '1', the statistics context shall be
10860 * allocated for RoCE traffic only. In this case, traffic other
10861 * than offloaded RoCE traffic shall not be included in this
10862 * statistic context. When this bit is set to '0', the
10863 * statistics context shall be used for the network traffic
10864 * other than offloaded RoCE traffic.
10866 #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
10867 uint8_t unused_0[3];
10868 } __attribute__((packed));
10870 /* Output (16 bytes) */
10871 struct hwrm_stat_ctx_alloc_output {
10872 uint16_t error_code;
10874 * Pass/Fail or error type Note: receiver to verify the in
10875 * parameters, and fail the call with an error when appropriate
10878 /* This field returns the type of original request. */
10880 /* This field provides original sequence number of the command. */
10883 * This field is the length of the response in bytes. The last
10884 * byte of the response is a valid flag that will read as '1'
10885 * when the command has been completely written to memory.
10887 uint32_t stat_ctx_id;
10888 /* This is the statistics context ID value. */
10894 * This field is used in Output records to indicate that the
10895 * output is completely written to RAM. This field should be
10896 * read as '1' to indicate that the output has been completely
10897 * written. When writing a command completion or response to an
10898 * internal processor, the order of writes has to be such that
10899 * this field is written last.
10901 } __attribute__((packed));
10903 /* hwrm_stat_ctx_free */
10904 /* Description: This command is used to free a stat context. */
10905 /* Input (24 bytes) */
10906 struct hwrm_stat_ctx_free_input {
10909 * This value indicates what type of request this is. The format
10910 * for the rest of the command is determined by this field.
10912 uint16_t cmpl_ring;
10914 * This value indicates the what completion ring the request
10915 * will be optionally completed on. If the value is -1, then no
10916 * CR completion will be generated. Any other value must be a
10917 * valid CR ring_id value for this function.
10920 /* This value indicates the command sequence number. */
10921 uint16_t target_id;
10923 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10924 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10927 uint64_t resp_addr;
10929 * This is the host address where the response will be written
10930 * when the request is complete. This area must be 16B aligned
10931 * and must be cleared to zero before the request is made.
10933 uint32_t stat_ctx_id;
10934 /* ID of the statistics context that is being queried. */
10936 } __attribute__((packed));
10938 /* Output (16 bytes) */
10939 struct hwrm_stat_ctx_free_output {
10940 uint16_t error_code;
10942 * Pass/Fail or error type Note: receiver to verify the in
10943 * parameters, and fail the call with an error when appropriate
10946 /* This field returns the type of original request. */
10948 /* This field provides original sequence number of the command. */
10951 * This field is the length of the response in bytes. The last
10952 * byte of the response is a valid flag that will read as '1'
10953 * when the command has been completely written to memory.
10955 uint32_t stat_ctx_id;
10956 /* This is the statistics context ID value. */
10962 * This field is used in Output records to indicate that the
10963 * output is completely written to RAM. This field should be
10964 * read as '1' to indicate that the output has been completely
10965 * written. When writing a command completion or response to an
10966 * internal processor, the order of writes has to be such that
10967 * this field is written last.
10969 } __attribute__((packed));
10971 /* hwrm_stat_ctx_clr_stats */
10972 /* Description: This command clears statistics of a context. */
10973 /* Input (24 bytes) */
10974 struct hwrm_stat_ctx_clr_stats_input {
10977 * This value indicates what type of request this is. The format
10978 * for the rest of the command is determined by this field.
10980 uint16_t cmpl_ring;
10982 * This value indicates the what completion ring the request
10983 * will be optionally completed on. If the value is -1, then no
10984 * CR completion will be generated. Any other value must be a
10985 * valid CR ring_id value for this function.
10988 /* This value indicates the command sequence number. */
10989 uint16_t target_id;
10991 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10992 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10995 uint64_t resp_addr;
10997 * This is the host address where the response will be written
10998 * when the request is complete. This area must be 16B aligned
10999 * and must be cleared to zero before the request is made.
11001 uint32_t stat_ctx_id;
11002 /* ID of the statistics context that is being queried. */
11004 } __attribute__((packed));
11006 /* Output (16 bytes) */
11007 struct hwrm_stat_ctx_clr_stats_output {
11008 uint16_t error_code;
11010 * Pass/Fail or error type Note: receiver to verify the in
11011 * parameters, and fail the call with an error when appropriate
11014 /* This field returns the type of original request. */
11016 /* This field provides original sequence number of the command. */
11019 * This field is the length of the response in bytes. The last
11020 * byte of the response is a valid flag that will read as '1'
11021 * when the command has been completely written to memory.
11029 * This field is used in Output records to indicate that the
11030 * output is completely written to RAM. This field should be
11031 * read as '1' to indicate that the output has been completely
11032 * written. When writing a command completion or response to an
11033 * internal processor, the order of writes has to be such that
11034 * this field is written last.
11036 } __attribute__((packed));
11038 /* hwrm_stat_ctx_query */
11039 /* Description: This command returns statistics of a context. */
11040 /* Input (24 bytes) */
11042 struct hwrm_stat_ctx_query_input {
11045 * This value indicates what type of request this is. The format for the
11046 * rest of the command is determined by this field.
11048 uint16_t cmpl_ring;
11050 * This value indicates the what completion ring the request will be
11051 * optionally completed on. If the value is -1, then no CR completion
11052 * will be generated. Any other value must be a valid CR ring_id value
11053 * for this function.
11056 /* This value indicates the command sequence number. */
11057 uint16_t target_id;
11059 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11060 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11062 uint64_t resp_addr;
11064 * This is the host address where the response will be written when the
11065 * request is complete. This area must be 16B aligned and must be
11066 * cleared to zero before the request is made.
11068 uint32_t stat_ctx_id;
11069 /* ID of the statistics context that is being queried. */
11071 } __attribute__((packed));
11073 /* Output (176 bytes) */
11075 struct hwrm_stat_ctx_query_output {
11076 uint16_t error_code;
11078 * Pass/Fail or error type Note: receiver to verify the in parameters,
11079 * and fail the call with an error when appropriate
11082 /* This field returns the type of original request. */
11084 /* This field provides original sequence number of the command. */
11087 * This field is the length of the response in bytes. The last byte of
11088 * the response is a valid flag that will read as '1' when the command
11089 * has been completely written to memory.
11091 uint64_t tx_ucast_pkts;
11092 /* Number of transmitted unicast packets */
11093 uint64_t tx_mcast_pkts;
11094 /* Number of transmitted multicast packets */
11095 uint64_t tx_bcast_pkts;
11096 /* Number of transmitted broadcast packets */
11097 uint64_t tx_err_pkts;
11098 /* Number of transmitted packets with error */
11099 uint64_t tx_drop_pkts;
11100 /* Number of dropped packets on transmit path */
11101 uint64_t tx_ucast_bytes;
11102 /* Number of transmitted bytes for unicast traffic */
11103 uint64_t tx_mcast_bytes;
11104 /* Number of transmitted bytes for multicast traffic */
11105 uint64_t tx_bcast_bytes;
11106 /* Number of transmitted bytes for broadcast traffic */
11107 uint64_t rx_ucast_pkts;
11108 /* Number of received unicast packets */
11109 uint64_t rx_mcast_pkts;
11110 /* Number of received multicast packets */
11111 uint64_t rx_bcast_pkts;
11112 /* Number of received broadcast packets */
11113 uint64_t rx_err_pkts;
11114 /* Number of received packets with error */
11115 uint64_t rx_drop_pkts;
11116 /* Number of dropped packets on received path */
11117 uint64_t rx_ucast_bytes;
11118 /* Number of received bytes for unicast traffic */
11119 uint64_t rx_mcast_bytes;
11120 /* Number of received bytes for multicast traffic */
11121 uint64_t rx_bcast_bytes;
11122 /* Number of received bytes for broadcast traffic */
11123 uint64_t rx_agg_pkts;
11124 /* Number of aggregated unicast packets */
11125 uint64_t rx_agg_bytes;
11126 /* Number of aggregated unicast bytes */
11127 uint64_t rx_agg_events;
11128 /* Number of aggregation events */
11129 uint64_t rx_agg_aborts;
11130 /* Number of aborted aggregations */
11137 * This field is used in Output records to indicate that the output is
11138 * completely written to RAM. This field should be read as '1' to
11139 * indicate that the output has been completely written. When writing a
11140 * command completion or response to an internal processor, the order of
11141 * writes has to be such that this field is written last.
11143 } __attribute__((packed));
11145 /* hwrm_exec_fwd_resp */
11147 * Description: This command is used to send an encapsulated request to the
11148 * HWRM. This command instructs the HWRM to execute the request and forward the
11149 * response of the encapsulated request to the location specified in the
11150 * original request that is encapsulated. The target id of this command shall be
11151 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11152 * acknowledge the receipt of the encapsulated request and forwarding of the
11155 /* Input (128 bytes) */
11156 struct hwrm_exec_fwd_resp_input {
11159 * This value indicates what type of request this is. The format
11160 * for the rest of the command is determined by this field.
11162 uint16_t cmpl_ring;
11164 * This value indicates the what completion ring the request
11165 * will be optionally completed on. If the value is -1, then no
11166 * CR completion will be generated. Any other value must be a
11167 * valid CR ring_id value for this function.
11170 /* This value indicates the command sequence number. */
11171 uint16_t target_id;
11173 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11174 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11177 uint64_t resp_addr;
11179 * This is the host address where the response will be written
11180 * when the request is complete. This area must be 16B aligned
11181 * and must be cleared to zero before the request is made.
11183 uint32_t encap_request[26];
11185 * This is an encapsulated request. This request should be
11186 * executed by the HWRM and the response should be provided in
11187 * the response buffer inside the encapsulated request.
11189 uint16_t encap_resp_target_id;
11191 * This value indicates the target id of the response to the
11192 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11193 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11196 uint16_t unused_0[3];
11197 } __attribute__((packed));
11199 /* Output (16 bytes) */
11200 struct hwrm_exec_fwd_resp_output {
11201 uint16_t error_code;
11203 * Pass/Fail or error type Note: receiver to verify the in
11204 * parameters, and fail the call with an error when appropriate
11207 /* This field returns the type of original request. */
11209 /* This field provides original sequence number of the command. */
11212 * This field is the length of the response in bytes. The last
11213 * byte of the response is a valid flag that will read as '1'
11214 * when the command has been completely written to memory.
11222 * This field is used in Output records to indicate that the
11223 * output is completely written to RAM. This field should be
11224 * read as '1' to indicate that the output has been completely
11225 * written. When writing a command completion or response to an
11226 * internal processor, the order of writes has to be such that
11227 * this field is written last.
11229 } __attribute__((packed));
11231 /* hwrm_reject_fwd_resp */
11233 * Description: This command is used to send an encapsulated request to the
11234 * HWRM. This command instructs the HWRM to reject the request and forward the
11235 * error response of the encapsulated request to the location specified in the
11236 * original request that is encapsulated. The target id of this command shall be
11237 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11238 * acknowledge the receipt of the encapsulated request and forwarding of the
11241 /* Input (128 bytes) */
11242 struct hwrm_reject_fwd_resp_input {
11245 * This value indicates what type of request this is. The format
11246 * for the rest of the command is determined by this field.
11248 uint16_t cmpl_ring;
11250 * This value indicates the what completion ring the request
11251 * will be optionally completed on. If the value is -1, then no
11252 * CR completion will be generated. Any other value must be a
11253 * valid CR ring_id value for this function.
11256 /* This value indicates the command sequence number. */
11257 uint16_t target_id;
11259 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11260 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11263 uint64_t resp_addr;
11265 * This is the host address where the response will be written
11266 * when the request is complete. This area must be 16B aligned
11267 * and must be cleared to zero before the request is made.
11269 uint32_t encap_request[26];
11271 * This is an encapsulated request. This request should be
11272 * rejected by the HWRM and the error response should be
11273 * provided in the response buffer inside the encapsulated
11276 uint16_t encap_resp_target_id;
11278 * This value indicates the target id of the response to the
11279 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11280 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11283 uint16_t unused_0[3];
11284 } __attribute__((packed));
11286 /* Output (16 bytes) */
11287 struct hwrm_reject_fwd_resp_output {
11288 uint16_t error_code;
11290 * Pass/Fail or error type Note: receiver to verify the in
11291 * parameters, and fail the call with an error when appropriate
11294 /* This field returns the type of original request. */
11296 /* This field provides original sequence number of the command. */
11299 * This field is the length of the response in bytes. The last
11300 * byte of the response is a valid flag that will read as '1'
11301 * when the command has been completely written to memory.
11309 * This field is used in Output records to indicate that the
11310 * output is completely written to RAM. This field should be
11311 * read as '1' to indicate that the output has been completely
11312 * written. When writing a command completion or response to an
11313 * internal processor, the order of writes has to be such that
11314 * this field is written last.
11316 } __attribute__((packed));
11318 /* hwrm_nvm_get_dir_entries */
11319 /* Input (24 bytes) */
11320 struct hwrm_nvm_get_dir_entries_input {
11322 uint16_t cmpl_ring;
11324 uint16_t target_id;
11325 uint64_t resp_addr;
11326 uint64_t host_dest_addr;
11327 } __attribute__((packed));
11329 /* Output (16 bytes) */
11330 struct hwrm_nvm_get_dir_entries_output {
11331 uint16_t error_code;
11340 } __attribute__((packed));
11343 /* hwrm_nvm_erase_dir_entry */
11344 /* Input (24 bytes) */
11345 struct hwrm_nvm_erase_dir_entry_input {
11347 uint16_t cmpl_ring;
11349 uint16_t target_id;
11350 uint64_t resp_addr;
11352 uint16_t unused_0[3];
11355 /* Output (16 bytes) */
11356 struct hwrm_nvm_erase_dir_entry_output {
11357 uint16_t error_code;
11368 /* hwrm_nvm_get_dir_info */
11369 /* Input (16 bytes) */
11370 struct hwrm_nvm_get_dir_info_input {
11372 uint16_t cmpl_ring;
11374 uint16_t target_id;
11375 uint64_t resp_addr;
11376 } __attribute__((packed));
11378 /* Output (24 bytes) */
11379 struct hwrm_nvm_get_dir_info_output {
11380 uint16_t error_code;
11385 uint32_t entry_length;
11391 } __attribute__((packed));
11394 /* hwrm_nvm_write */
11395 /* Input (48 bytes) */
11396 struct hwrm_nvm_write_input {
11398 uint16_t cmpl_ring;
11400 uint16_t target_id;
11401 uint64_t resp_addr;
11402 uint64_t host_src_addr;
11404 uint16_t dir_ordinal;
11407 uint32_t dir_data_length;
11410 #define NVM_WRITE_REQ_FLAGS_KEEP_ORIG_ACTIVE_IMG 0x1UL
11411 uint32_t dir_item_length;
11415 /* Output (16 bytes) */
11416 struct hwrm_nvm_write_output {
11417 uint16_t error_code;
11421 uint32_t dir_item_length;
11426 /* hwrm_nvm_read */
11427 /* Input (40 bytes) */
11428 struct hwrm_nvm_read_input {
11430 uint16_t cmpl_ring;
11432 uint16_t target_id;
11433 uint64_t resp_addr;
11434 uint64_t host_dest_addr;
11441 } __attribute__((packed));
11443 /* Output (16 bytes) */
11444 struct hwrm_nvm_read_output {
11445 uint16_t error_code;
11454 } __attribute__((packed));
11456 /* Hardware Resource Manager Specification */
11457 /* Description: This structure is used to specify port description. */
11459 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
11460 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
11461 * processors inside the chip. This firmware service is vital part of the chip.
11462 * The chip can not be used by a driver or HWRM client without the HWRM.
11464 /* Input (16 bytes) */
11468 * This value indicates what type of request this is. The format
11469 * for the rest of the command is determined by this field.
11471 uint16_t cmpl_ring;
11473 * This value indicates the what completion ring the request
11474 * will be optionally completed on. If the value is -1, then no
11475 * CR completion will be generated. Any other value must be a
11476 * valid CR ring_id value for this function.
11479 /* This value indicates the command sequence number. */
11480 uint16_t target_id;
11482 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11483 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11486 uint64_t resp_addr;
11488 * This is the host address where the response will be written
11489 * when the request is complete. This area must be 16B aligned
11490 * and must be cleared to zero before the request is made.
11492 } __attribute__((packed));
11494 /* Output (8 bytes) */
11496 uint16_t error_code;
11498 * Pass/Fail or error type Note: receiver to verify the in
11499 * parameters, and fail the call with an error when appropriate
11502 /* This field returns the type of original request. */
11504 /* This field provides original sequence number of the command. */
11507 * This field is the length of the response in bytes. The last
11508 * byte of the response is a valid flag that will read as '1'
11509 * when the command has been completely written to memory.
11511 } __attribute__((packed));
11513 /* Short Command Structure (16 bytes) */
11514 struct hwrm_short_input {
11516 uint16_t signature;
11517 #define HWRM_SHORT_REQ_SIGNATURE_SHORT_CMD (UINT32_C(0x4321))
11521 } __attribute__((packed));
11523 #define HWRM_GET_HWRM_ERROR_CODE(arg) \
11525 typeof(arg) x = (arg); \
11526 ((x) == 0xf ? "HWRM_ERROR" : \
11527 ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
11528 ((x) == 0xfffe ? "UNKNOWN_ERR" : \
11529 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
11530 ((x) == 0x5 ? "INVALID_FLAGS" : \
11531 ((x) == 0x6 ? "INVALID_ENABLES" : \
11532 ((x) == 0x0 ? "SUCCESS" : \
11533 ((x) == 0x1 ? "FAIL" : \
11534 ((x) == 0x2 ? "INVALID_PARAMS" : \
11535 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
11536 "Unknown error_code")))))))))) \
11539 /* Return Codes (8 bytes) */
11541 uint16_t error_code;
11542 /* These are numbers assigned to return/error codes. */
11543 /* Request was successfully executed by the HWRM. */
11544 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
11545 /* THe HWRM failed to execute the request. */
11546 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
11548 * The request contains invalid argument(s) or
11549 * input parameters.
11551 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
11553 * The requester is not allowed to access the
11554 * requested resource. This error code shall be
11555 * provided in a response to a request to query
11556 * or modify an existing resource that is not
11557 * accessible by the requester.
11559 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
11561 * The HWRM is unable to allocate the requested
11562 * resource. This code only applies to requests
11563 * for HWRM resource allocations.
11565 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
11566 /* Invalid combination of flags is specified in the request. */
11567 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
11569 * Invalid combination of enables fields is
11570 * specified in the request.
11572 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
11574 * Generic HWRM execution error that represents
11575 * an internal error.
11577 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
11578 /* Unknown error */
11579 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
11580 /* Unsupported or invalid command */
11581 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
11582 uint16_t unused_0[3];
11583 } __attribute__((packed));
11585 /* Output (16 bytes) */
11586 struct hwrm_err_output {
11587 uint16_t error_code;
11589 * Pass/Fail or error type Note: receiver to verify the in
11590 * parameters, and fail the call with an error when appropriate
11593 /* This field returns the type of original request. */
11595 /* This field provides original sequence number of the command. */
11598 * This field is the length of the response in bytes. The last
11599 * byte of the response is a valid flag that will read as '1'
11600 * when the command has been completely written to memory.
11603 /* debug info for this error response. */
11605 /* debug info for this error response. */
11608 * In the case of an error response, command specific error code
11609 * is returned in this field.
11613 * This field is used in Output records to indicate that the
11614 * output is completely written to RAM. This field should be
11615 * read as '1' to indicate that the output has been completely
11616 * written. When writing a command completion or response to an
11617 * internal processor, the order of writes has to be such that
11618 * this field is written last.
11620 } __attribute__((packed));
11622 /* Port Tx Statistics Formats (408 bytes) */
11623 struct tx_port_stats {
11624 uint64_t tx_64b_frames;
11625 /* Total Number of 64 Bytes frames transmitted */
11626 uint64_t tx_65b_127b_frames;
11627 /* Total Number of 65-127 Bytes frames transmitted */
11628 uint64_t tx_128b_255b_frames;
11629 /* Total Number of 128-255 Bytes frames transmitted */
11630 uint64_t tx_256b_511b_frames;
11631 /* Total Number of 256-511 Bytes frames transmitted */
11632 uint64_t tx_512b_1023b_frames;
11633 /* Total Number of 512-1023 Bytes frames transmitted */
11634 uint64_t tx_1024b_1518_frames;
11635 /* Total Number of 1024-1518 Bytes frames transmitted */
11636 uint64_t tx_good_vlan_frames;
11638 * Total Number of each good VLAN (exludes FCS errors) frame
11639 * transmitted which is 1519 to 1522 bytes in length inclusive
11640 * (excluding framing bits but including FCS bytes).
11642 uint64_t tx_1519b_2047_frames;
11643 /* Total Number of 1519-2047 Bytes frames transmitted */
11644 uint64_t tx_2048b_4095b_frames;
11645 /* Total Number of 2048-4095 Bytes frames transmitted */
11646 uint64_t tx_4096b_9216b_frames;
11647 /* Total Number of 4096-9216 Bytes frames transmitted */
11648 uint64_t tx_9217b_16383b_frames;
11649 /* Total Number of 9217-16383 Bytes frames transmitted */
11650 uint64_t tx_good_frames;
11651 /* Total Number of good frames transmitted */
11652 uint64_t tx_total_frames;
11653 /* Total Number of frames transmitted */
11654 uint64_t tx_ucast_frames;
11655 /* Total number of unicast frames transmitted */
11656 uint64_t tx_mcast_frames;
11657 /* Total number of multicast frames transmitted */
11658 uint64_t tx_bcast_frames;
11659 /* Total number of broadcast frames transmitted */
11660 uint64_t tx_pause_frames;
11661 /* Total number of PAUSE control frames transmitted */
11662 uint64_t tx_pfc_frames;
11663 /* Total number of PFC/per-priority PAUSE control frames transmitted */
11664 uint64_t tx_jabber_frames;
11665 /* Total number of jabber frames transmitted */
11666 uint64_t tx_fcs_err_frames;
11667 /* Total number of frames transmitted with FCS error */
11668 uint64_t tx_control_frames;
11669 /* Total number of control frames transmitted */
11670 uint64_t tx_oversz_frames;
11671 /* Total number of over-sized frames transmitted */
11672 uint64_t tx_single_dfrl_frames;
11673 /* Total number of frames with single deferral */
11674 uint64_t tx_multi_dfrl_frames;
11675 /* Total number of frames with multiple deferrals */
11676 uint64_t tx_single_coll_frames;
11677 /* Total number of frames with single collision */
11678 uint64_t tx_multi_coll_frames;
11679 /* Total number of frames with multiple collisions */
11680 uint64_t tx_late_coll_frames;
11681 /* Total number of frames with late collisions */
11682 uint64_t tx_excessive_coll_frames;
11683 /* Total number of frames with excessive collisions */
11684 uint64_t tx_frag_frames;
11685 /* Total number of fragmented frames transmitted */
11687 /* Total number of transmit errors */
11688 uint64_t tx_tagged_frames;
11689 /* Total number of single VLAN tagged frames transmitted */
11690 uint64_t tx_dbl_tagged_frames;
11691 /* Total number of double VLAN tagged frames transmitted */
11692 uint64_t tx_runt_frames;
11693 /* Total number of runt frames transmitted */
11694 uint64_t tx_fifo_underruns;
11695 /* Total number of TX FIFO under runs */
11696 uint64_t tx_pfc_ena_frames_pri0;
11698 * Total number of PFC frames with PFC enabled bit for Pri 0
11701 uint64_t tx_pfc_ena_frames_pri1;
11703 * Total number of PFC frames with PFC enabled bit for Pri 1
11706 uint64_t tx_pfc_ena_frames_pri2;
11708 * Total number of PFC frames with PFC enabled bit for Pri 2
11711 uint64_t tx_pfc_ena_frames_pri3;
11713 * Total number of PFC frames with PFC enabled bit for Pri 3
11716 uint64_t tx_pfc_ena_frames_pri4;
11718 * Total number of PFC frames with PFC enabled bit for Pri 4
11721 uint64_t tx_pfc_ena_frames_pri5;
11723 * Total number of PFC frames with PFC enabled bit for Pri 5
11726 uint64_t tx_pfc_ena_frames_pri6;
11728 * Total number of PFC frames with PFC enabled bit for Pri 6
11731 uint64_t tx_pfc_ena_frames_pri7;
11733 * Total number of PFC frames with PFC enabled bit for Pri 7
11736 uint64_t tx_eee_lpi_events;
11737 /* Total number of EEE LPI Events on TX */
11738 uint64_t tx_eee_lpi_duration;
11739 /* EEE LPI Duration Counter on TX */
11740 uint64_t tx_llfc_logical_msgs;
11742 * Total number of Link Level Flow Control (LLFC) messages
11745 uint64_t tx_hcfc_msgs;
11746 /* Total number of HCFC messages transmitted */
11747 uint64_t tx_total_collisions;
11748 /* Total number of TX collisions */
11750 /* Total number of transmitted bytes */
11751 uint64_t tx_xthol_frames;
11752 /* Total number of end-to-end HOL frames */
11753 uint64_t tx_stat_discard;
11754 /* Total Tx Drops per Port reported by STATS block */
11755 uint64_t tx_stat_error;
11756 /* Total Tx Error Drops per Port reported by STATS block */
11757 } __attribute__((packed));
11759 /* Port Rx Statistics Formats (528 bytes) */
11760 struct rx_port_stats {
11761 uint64_t rx_64b_frames;
11762 /* Total Number of 64 Bytes frames received */
11763 uint64_t rx_65b_127b_frames;
11764 /* Total Number of 65-127 Bytes frames received */
11765 uint64_t rx_128b_255b_frames;
11766 /* Total Number of 128-255 Bytes frames received */
11767 uint64_t rx_256b_511b_frames;
11768 /* Total Number of 256-511 Bytes frames received */
11769 uint64_t rx_512b_1023b_frames;
11770 /* Total Number of 512-1023 Bytes frames received */
11771 uint64_t rx_1024b_1518_frames;
11772 /* Total Number of 1024-1518 Bytes frames received */
11773 uint64_t rx_good_vlan_frames;
11775 * Total Number of each good VLAN (exludes FCS errors) frame
11776 * received which is 1519 to 1522 bytes in length inclusive
11777 * (excluding framing bits but including FCS bytes).
11779 uint64_t rx_1519b_2047b_frames;
11780 /* Total Number of 1519-2047 Bytes frames received */
11781 uint64_t rx_2048b_4095b_frames;
11782 /* Total Number of 2048-4095 Bytes frames received */
11783 uint64_t rx_4096b_9216b_frames;
11784 /* Total Number of 4096-9216 Bytes frames received */
11785 uint64_t rx_9217b_16383b_frames;
11786 /* Total Number of 9217-16383 Bytes frames received */
11787 uint64_t rx_total_frames;
11788 /* Total number of frames received */
11789 uint64_t rx_ucast_frames;
11790 /* Total number of unicast frames received */
11791 uint64_t rx_mcast_frames;
11792 /* Total number of multicast frames received */
11793 uint64_t rx_bcast_frames;
11794 /* Total number of broadcast frames received */
11795 uint64_t rx_fcs_err_frames;
11796 /* Total number of received frames with FCS error */
11797 uint64_t rx_ctrl_frames;
11798 /* Total number of control frames received */
11799 uint64_t rx_pause_frames;
11800 /* Total number of PAUSE frames received */
11801 uint64_t rx_pfc_frames;
11802 /* Total number of PFC frames received */
11803 uint64_t rx_unsupported_opcode_frames;
11804 /* Total number of frames received with an unsupported opcode */
11805 uint64_t rx_unsupported_da_pausepfc_frames;
11807 * Total number of frames received with an unsupported DA for
11810 uint64_t rx_wrong_sa_frames;
11811 /* Total number of frames received with an unsupported SA */
11812 uint64_t rx_align_err_frames;
11813 /* Total number of received packets with alignment error */
11814 uint64_t rx_oor_len_frames;
11815 /* Total number of received frames with out-of-range length */
11816 uint64_t rx_code_err_frames;
11817 /* Total number of received frames with error termination */
11818 uint64_t rx_false_carrier_frames;
11820 * Total number of received frames with a false carrier is
11821 * detected during idle, as defined by RX_ER samples active and
11822 * RXD is 0xE. The event is reported along with the statistics
11823 * generated on the next received frame. Only one false carrier
11824 * condition can be detected and logged between frames. Carrier
11825 * event, valid for 10M/100M speed modes only.
11827 uint64_t rx_ovrsz_frames;
11828 /* Total number of over-sized frames received */
11829 uint64_t rx_jbr_frames;
11830 /* Total number of jabber packets received */
11831 uint64_t rx_mtu_err_frames;
11832 /* Total number of received frames with MTU error */
11833 uint64_t rx_match_crc_frames;
11834 /* Total number of received frames with CRC match */
11835 uint64_t rx_promiscuous_frames;
11836 /* Total number of frames received promiscuously */
11837 uint64_t rx_tagged_frames;
11838 /* Total number of received frames with one or two VLAN tags */
11839 uint64_t rx_double_tagged_frames;
11840 /* Total number of received frames with two VLAN tags */
11841 uint64_t rx_trunc_frames;
11842 /* Total number of truncated frames received */
11843 uint64_t rx_good_frames;
11844 /* Total number of good frames (without errors) received */
11845 uint64_t rx_pfc_xon2xoff_frames_pri0;
11847 * Total number of received PFC frames with transition from XON
11850 uint64_t rx_pfc_xon2xoff_frames_pri1;
11852 * Total number of received PFC frames with transition from XON
11855 uint64_t rx_pfc_xon2xoff_frames_pri2;
11857 * Total number of received PFC frames with transition from XON
11860 uint64_t rx_pfc_xon2xoff_frames_pri3;
11862 * Total number of received PFC frames with transition from XON
11865 uint64_t rx_pfc_xon2xoff_frames_pri4;
11867 * Total number of received PFC frames with transition from XON
11870 uint64_t rx_pfc_xon2xoff_frames_pri5;
11872 * Total number of received PFC frames with transition from XON
11875 uint64_t rx_pfc_xon2xoff_frames_pri6;
11877 * Total number of received PFC frames with transition from XON
11880 uint64_t rx_pfc_xon2xoff_frames_pri7;
11882 * Total number of received PFC frames with transition from XON
11885 uint64_t rx_pfc_ena_frames_pri0;
11887 * Total number of received PFC frames with PFC enabled bit for
11890 uint64_t rx_pfc_ena_frames_pri1;
11892 * Total number of received PFC frames with PFC enabled bit for
11895 uint64_t rx_pfc_ena_frames_pri2;
11897 * Total number of received PFC frames with PFC enabled bit for
11900 uint64_t rx_pfc_ena_frames_pri3;
11902 * Total number of received PFC frames with PFC enabled bit for
11905 uint64_t rx_pfc_ena_frames_pri4;
11907 * Total number of received PFC frames with PFC enabled bit for
11910 uint64_t rx_pfc_ena_frames_pri5;
11912 * Total number of received PFC frames with PFC enabled bit for
11915 uint64_t rx_pfc_ena_frames_pri6;
11917 * Total number of received PFC frames with PFC enabled bit for
11920 uint64_t rx_pfc_ena_frames_pri7;
11922 * Total number of received PFC frames with PFC enabled bit for
11925 uint64_t rx_sch_crc_err_frames;
11926 /* Total Number of frames received with SCH CRC error */
11927 uint64_t rx_undrsz_frames;
11928 /* Total Number of under-sized frames received */
11929 uint64_t rx_frag_frames;
11930 /* Total Number of fragmented frames received */
11931 uint64_t rx_eee_lpi_events;
11932 /* Total number of RX EEE LPI Events */
11933 uint64_t rx_eee_lpi_duration;
11934 /* EEE LPI Duration Counter on RX */
11935 uint64_t rx_llfc_physical_msgs;
11937 * Total number of physical type Link Level Flow Control (LLFC)
11938 * messages received
11940 uint64_t rx_llfc_logical_msgs;
11942 * Total number of logical type Link Level Flow Control (LLFC)
11943 * messages received
11945 uint64_t rx_llfc_msgs_with_crc_err;
11947 * Total number of logical type Link Level Flow Control (LLFC)
11948 * messages received with CRC error
11950 uint64_t rx_hcfc_msgs;
11951 /* Total number of HCFC messages received */
11952 uint64_t rx_hcfc_msgs_with_crc_err;
11953 /* Total number of HCFC messages received with CRC error */
11955 /* Total number of received bytes */
11956 uint64_t rx_runt_bytes;
11957 /* Total number of bytes received in runt frames */
11958 uint64_t rx_runt_frames;
11959 /* Total number of runt frames received */
11960 uint64_t rx_stat_discard;
11961 /* Total Rx Discards per Port reported by STATS block */
11962 uint64_t rx_stat_err;
11963 /* Total Rx Error Drops per Port reported by STATS block */
11964 } __attribute__((packed));
11966 /* Periodic Statistics Context DMA to host (160 bytes) */
11968 * per-context HW statistics -- chip view
11971 struct ctx_hw_stats64 {
11972 uint64_t rx_ucast_pkts;
11973 uint64_t rx_mcast_pkts;
11974 uint64_t rx_bcast_pkts;
11975 uint64_t rx_drop_pkts;
11976 uint64_t rx_discard_pkts;
11977 uint64_t rx_ucast_bytes;
11978 uint64_t rx_mcast_bytes;
11979 uint64_t rx_bcast_bytes;
11981 uint64_t tx_ucast_pkts;
11982 uint64_t tx_mcast_pkts;
11983 uint64_t tx_bcast_pkts;
11984 uint64_t tx_drop_pkts;
11985 uint64_t tx_discard_pkts;
11986 uint64_t tx_ucast_bytes;
11987 uint64_t tx_mcast_bytes;
11988 uint64_t tx_bcast_bytes;
11991 uint64_t tpa_bytes;
11992 uint64_t tpa_events;
11993 uint64_t tpa_aborts;
11994 } __attribute__((packed));
11996 #endif /* _HSI_STRUCT_DEF_DPDK_ */