1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001-2018 Broadcom
6 #ifndef _HSI_STRUCT_DEF_DPDK_
7 #define _HSI_STRUCT_DEF_DPDK_
8 /* HSI and HWRM Specification 1.8.2 */
9 #define HWRM_VERSION_MAJOR 1
10 #define HWRM_VERSION_MINOR 8
11 #define HWRM_VERSION_UPDATE 2
13 #define HWRM_VERSION_RSVD 0 /* non-zero means beta version */
15 #define HWRM_VERSION_STR "1.8.2.0"
17 * Following is the signature for HWRM message field that indicates not
18 * applicable (All F's). Need to cast it the size of the field if needed.
20 #define HWRM_NA_SIGNATURE ((uint32_t)(-1))
21 #define HWRM_MAX_REQ_LEN (128) /* hwrm_func_buf_rgtr */
22 #define HWRM_MAX_RESP_LEN (280) /* hwrm_selftest_qlist */
23 #define HW_HASH_INDEX_SIZE 0x80 /* 7 bit indirection table index. */
24 #define HW_HASH_KEY_SIZE 40
25 #define HWRM_RESP_VALID_KEY 1 /* valid key for HWRM response */
26 #define HWRM_ROCE_SP_HSI_VERSION_MAJOR 1
27 #define HWRM_ROCE_SP_HSI_VERSION_MINOR 8
28 #define HWRM_ROCE_SP_HSI_VERSION_UPDATE 2
33 #define HWRM_VER_GET (UINT32_C(0x0))
34 #define HWRM_FUNC_BUF_UNRGTR (UINT32_C(0xe))
35 #define HWRM_FUNC_VF_CFG (UINT32_C(0xf))
36 /* Reserved for future use */
37 #define RESERVED1 (UINT32_C(0x10))
38 #define HWRM_FUNC_RESET (UINT32_C(0x11))
39 #define HWRM_FUNC_GETFID (UINT32_C(0x12))
40 #define HWRM_FUNC_VF_ALLOC (UINT32_C(0x13))
41 #define HWRM_FUNC_VF_FREE (UINT32_C(0x14))
42 #define HWRM_FUNC_QCAPS (UINT32_C(0x15))
43 #define HWRM_FUNC_QCFG (UINT32_C(0x16))
44 #define HWRM_FUNC_CFG (UINT32_C(0x17))
45 #define HWRM_FUNC_QSTATS (UINT32_C(0x18))
46 #define HWRM_FUNC_CLR_STATS (UINT32_C(0x19))
47 #define HWRM_FUNC_DRV_UNRGTR (UINT32_C(0x1a))
48 #define HWRM_FUNC_VF_RESC_FREE (UINT32_C(0x1b))
49 #define HWRM_FUNC_VF_VNIC_IDS_QUERY (UINT32_C(0x1c))
50 #define HWRM_FUNC_DRV_RGTR (UINT32_C(0x1d))
51 #define HWRM_FUNC_DRV_QVER (UINT32_C(0x1e))
52 #define HWRM_FUNC_BUF_RGTR (UINT32_C(0x1f))
53 #define HWRM_PORT_PHY_CFG (UINT32_C(0x20))
54 #define HWRM_PORT_MAC_CFG (UINT32_C(0x21))
55 #define HWRM_PORT_QSTATS (UINT32_C(0x23))
56 #define HWRM_PORT_LPBK_QSTATS (UINT32_C(0x24))
57 #define HWRM_PORT_CLR_STATS (UINT32_C(0x25))
58 #define HWRM_PORT_PHY_QCFG (UINT32_C(0x27))
59 #define HWRM_PORT_MAC_QCFG (UINT32_C(0x28))
60 #define HWRM_PORT_MAC_PTP_QCFG (UINT32_C(0x29))
61 #define HWRM_PORT_PHY_QCAPS (UINT32_C(0x2a))
62 #define HWRM_PORT_LED_CFG (UINT32_C(0x2d))
63 #define HWRM_PORT_LED_QCFG (UINT32_C(0x2e))
64 #define HWRM_PORT_LED_QCAPS (UINT32_C(0x2f))
65 #define HWRM_QUEUE_QPORTCFG (UINT32_C(0x30))
66 #define HWRM_QUEUE_QCFG (UINT32_C(0x31))
67 #define HWRM_QUEUE_CFG (UINT32_C(0x32))
68 #define HWRM_FUNC_VLAN_CFG (UINT32_C(0x33))
69 #define HWRM_FUNC_VLAN_QCFG (UINT32_C(0x34))
70 #define HWRM_QUEUE_PFCENABLE_QCFG (UINT32_C(0x35))
71 #define HWRM_QUEUE_PFCENABLE_CFG (UINT32_C(0x36))
72 #define HWRM_QUEUE_PRI2COS_QCFG (UINT32_C(0x37))
73 #define HWRM_QUEUE_PRI2COS_CFG (UINT32_C(0x38))
74 #define HWRM_QUEUE_COS2BW_QCFG (UINT32_C(0x39))
75 #define HWRM_QUEUE_COS2BW_CFG (UINT32_C(0x3a))
76 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
77 #define HWRM_VNIC_ALLOC (UINT32_C(0x40))
78 #define HWRM_VNIC_FREE (UINT32_C(0x41))
79 #define HWRM_VNIC_CFG (UINT32_C(0x42))
80 #define HWRM_VNIC_QCFG (UINT32_C(0x43))
81 #define HWRM_VNIC_TPA_CFG (UINT32_C(0x44))
82 #define HWRM_VNIC_RSS_CFG (UINT32_C(0x46))
83 #define HWRM_VNIC_RSS_QCFG (UINT32_C(0x47))
84 #define HWRM_VNIC_PLCMODES_CFG (UINT32_C(0x48))
85 #define HWRM_VNIC_PLCMODES_QCFG (UINT32_C(0x49))
86 #define HWRM_VNIC_QCAPS (UINT32_C(0x4a))
87 #define HWRM_RING_ALLOC (UINT32_C(0x50))
88 #define HWRM_RING_FREE (UINT32_C(0x51))
89 #define HWRM_RING_CMPL_RING_QAGGINT_PARAMS (UINT32_C(0x52))
90 #define HWRM_RING_CMPL_RING_CFG_AGGINT_PARAMS (UINT32_C(0x53))
91 #define HWRM_RING_RESET (UINT32_C(0x5e))
92 #define HWRM_RING_GRP_ALLOC (UINT32_C(0x60))
93 #define HWRM_RING_GRP_FREE (UINT32_C(0x61))
94 #define HWRM_VNIC_RSS_COS_LB_CTX_ALLOC (UINT32_C(0x70))
95 #define HWRM_VNIC_RSS_COS_LB_CTX_FREE (UINT32_C(0x71))
96 #define HWRM_CFA_L2_FILTER_ALLOC (UINT32_C(0x90))
97 #define HWRM_CFA_L2_FILTER_FREE (UINT32_C(0x91))
98 #define HWRM_CFA_L2_FILTER_CFG (UINT32_C(0x92))
99 #define HWRM_CFA_L2_SET_RX_MASK (UINT32_C(0x93))
100 /* Reserved for future use */
101 #define HWRM_CFA_VLAN_ANTISPOOF_CFG (UINT32_C(0x94))
102 #define HWRM_CFA_TUNNEL_FILTER_ALLOC (UINT32_C(0x95))
103 #define HWRM_CFA_TUNNEL_FILTER_FREE (UINT32_C(0x96))
104 #define HWRM_CFA_NTUPLE_FILTER_ALLOC (UINT32_C(0x99))
105 #define HWRM_CFA_NTUPLE_FILTER_FREE (UINT32_C(0x9a))
106 #define HWRM_CFA_NTUPLE_FILTER_CFG (UINT32_C(0x9b))
107 #define HWRM_CFA_EM_FLOW_ALLOC (UINT32_C(0x9c))
108 #define HWRM_CFA_EM_FLOW_FREE (UINT32_C(0x9d))
109 #define HWRM_CFA_EM_FLOW_CFG (UINT32_C(0x9e))
110 #define HWRM_TUNNEL_DST_PORT_QUERY (UINT32_C(0xa0))
111 #define HWRM_TUNNEL_DST_PORT_ALLOC (UINT32_C(0xa1))
112 #define HWRM_TUNNEL_DST_PORT_FREE (UINT32_C(0xa2))
113 #define HWRM_STAT_CTX_ALLOC (UINT32_C(0xb0))
114 #define HWRM_STAT_CTX_FREE (UINT32_C(0xb1))
115 #define HWRM_STAT_CTX_QUERY (UINT32_C(0xb2))
116 #define HWRM_STAT_CTX_CLR_STATS (UINT32_C(0xb3))
117 #define HWRM_FW_RESET (UINT32_C(0xc0))
118 #define HWRM_FW_QSTATUS (UINT32_C(0xc1))
119 #define HWRM_EXEC_FWD_RESP (UINT32_C(0xd0))
120 #define HWRM_REJECT_FWD_RESP (UINT32_C(0xd1))
121 #define HWRM_FWD_RESP (UINT32_C(0xd2))
122 #define HWRM_FWD_ASYNC_EVENT_CMPL (UINT32_C(0xd3))
123 #define HWRM_TEMP_MONITOR_QUERY (UINT32_C(0xe0))
124 #define HWRM_WOL_FILTER_ALLOC (UINT32_C(0xf0))
125 #define HWRM_WOL_FILTER_FREE (UINT32_C(0xf1))
126 #define HWRM_WOL_FILTER_QCFG (UINT32_C(0xf2))
127 #define HWRM_WOL_REASON_QCFG (UINT32_C(0xf3))
128 #define HWRM_DBG_DUMP (UINT32_C(0xff14))
129 #define HWRM_NVM_VALIDATE_OPTION (UINT32_C(0xffef))
130 #define HWRM_NVM_FLUSH (UINT32_C(0xfff0))
131 #define HWRM_NVM_GET_VARIABLE (UINT32_C(0xfff1))
132 #define HWRM_NVM_SET_VARIABLE (UINT32_C(0xfff2))
133 #define HWRM_NVM_INSTALL_UPDATE (UINT32_C(0xfff3))
134 #define HWRM_NVM_MODIFY (UINT32_C(0xfff4))
135 #define HWRM_NVM_VERIFY_UPDATE (UINT32_C(0xfff5))
136 #define HWRM_NVM_GET_DEV_INFO (UINT32_C(0xfff6))
137 #define HWRM_NVM_ERASE_DIR_ENTRY (UINT32_C(0xfff7))
138 #define HWRM_NVM_MOD_DIR_ENTRY (UINT32_C(0xfff8))
139 #define HWRM_NVM_FIND_DIR_ENTRY (UINT32_C(0xfff9))
140 #define HWRM_NVM_GET_DIR_ENTRIES (UINT32_C(0xfffa))
141 #define HWRM_NVM_GET_DIR_INFO (UINT32_C(0xfffb))
142 #define HWRM_NVM_RAW_DUMP (UINT32_C(0xfffc))
143 #define HWRM_NVM_READ (UINT32_C(0xfffd))
144 #define HWRM_NVM_WRITE (UINT32_C(0xfffe))
145 #define HWRM_NVM_RAW_WRITE_BLK (UINT32_C(0xffff))
148 * Note: The Host Software Interface (HSI) and Hardware Resource Manager (HWRM)
149 * specification describes the data structures used in Ethernet packet or RDMA
150 * message data transfers as well as an abstract interface for managing Ethernet
151 * NIC hardware resources.
153 /* Ethernet Data path Host Structures */
155 * Description: The following three sections document the host structures used
156 * between device and software drivers for communicating Ethernet packets.
158 /* BD Ring Structures */
160 * Description: This structure is used to inform the NIC of a location for and
161 * an aggregation buffer that will be used for packet data that is received. An
162 * aggregation buffer creates a different kind of completion operation for a
163 * packet where a variable number of BDs may be used to place the packet in the
164 * host. RX Rings that have aggregation buffers are known as aggregation rings
165 * and must contain only aggregation buffers.
167 /* Short TX BD (16 bytes) */
171 * All bits in this field must be valid on the first BD of a
172 * packet. Only the packet_end bit must be valid for the
173 * remaining BDs of a packet.
175 /* This value identifies the type of buffer descriptor. */
176 #define TX_BD_SHORT_TYPE_MASK UINT32_C(0x3f)
177 #define TX_BD_SHORT_TYPE_SFT 0
179 * Indicates that this BD is 16B long and is
180 * used for normal L2 packet transmission.
182 #define TX_BD_SHORT_TYPE_TX_BD_SHORT UINT32_C(0x0)
184 * If set to 1, the packet ends with the data in the buffer
185 * pointed to by this descriptor. This flag must be valid on
188 #define TX_BD_SHORT_FLAGS_PACKET_END UINT32_C(0x40)
190 * If set to 1, the device will not generate a completion for
191 * this transmit packet unless there is an error in it's
192 * processing. If this bit is set to 0, then the packet will be
193 * completed normally. This bit must be valid only on the first
196 #define TX_BD_SHORT_FLAGS_NO_CMPL UINT32_C(0x80)
198 * This value indicates how many 16B BD locations are consumed
199 * in the ring by this packet. A value of 1 indicates that this
200 * BD is the only BD (and that the it is a short BD). A value of
201 * 3 indicates either 3 short BDs or 1 long BD and one short BD
202 * in the packet. A value of 0 indicates that there are 32 BD
203 * locations in the packet (the maximum). This field is valid
204 * only on the first BD of a packet.
206 #define TX_BD_SHORT_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
207 #define TX_BD_SHORT_FLAGS_BD_CNT_SFT 8
209 * This value is a hint for the length of the entire packet. It
210 * is used by the chip to optimize internal processing. The
211 * packet will be dropped if the hint is too short. This field
212 * is valid only on the first BD of a packet.
214 #define TX_BD_SHORT_FLAGS_LHINT_MASK UINT32_C(0x6000)
215 #define TX_BD_SHORT_FLAGS_LHINT_SFT 13
216 /* indicates packet length < 512B */
217 #define TX_BD_SHORT_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
218 /* indicates 512 <= packet length < 1KB */
219 #define TX_BD_SHORT_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
220 /* indicates 1KB <= packet length < 2KB */
221 #define TX_BD_SHORT_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
222 /* indicates packet length >= 2KB */
223 #define TX_BD_SHORT_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
224 #define TX_BD_SHORT_FLAGS_LHINT_LAST \
225 TX_BD_SHORT_FLAGS_LHINT_GTE2K
227 * If set to 1, the device immediately updates the Send Consumer
228 * Index after the buffer associated with this descriptor has
229 * been transferred via DMA to NIC memory from host memory. An
230 * interrupt may or may not be generated according to the state
231 * of the interrupt avoidance mechanisms. If this bit is set to
232 * 0, then the Consumer Index is only updated as soon as one of
233 * the host interrupt coalescing conditions has been met. This
234 * bit must be valid on the first BD of a packet.
236 #define TX_BD_SHORT_FLAGS_COAL_NOW UINT32_C(0x8000)
238 * All bits in this field must be valid on the first BD of a
239 * packet. Only the packet_end bit must be valid for the
240 * remaining BDs of a packet.
242 #define TX_BD_SHORT_FLAGS_MASK UINT32_C(0xffc0)
243 #define TX_BD_SHORT_FLAGS_SFT 6
246 * This is the length of the host physical buffer this BD
247 * describes in bytes. This field must be valid on all BDs of a
252 * The opaque data field is pass through to the completion and
253 * can be used for any data that the driver wants to associate
254 * with the transmit BD. This field must be valid on the first
259 * This is the host physical address for the portion of the
260 * packet described by this TX BD. This value must be valid on
261 * all BDs of a packet.
263 } __attribute__((packed));
265 /* Long TX BD (32 bytes split to 2 16-byte struct) */
269 * All bits in this field must be valid on the first BD of a
270 * packet. Only the packet_end bit must be valid for the
271 * remaining BDs of a packet.
273 /* This value identifies the type of buffer descriptor. */
274 #define TX_BD_LONG_TYPE_MASK UINT32_C(0x3f)
275 #define TX_BD_LONG_TYPE_SFT 0
277 * Indicates that this BD is 32B long and is
278 * used for normal L2 packet transmission.
280 #define TX_BD_LONG_TYPE_TX_BD_LONG UINT32_C(0x10)
282 * If set to 1, the packet ends with the data in the buffer
283 * pointed to by this descriptor. This flag must be valid on
286 #define TX_BD_LONG_FLAGS_PACKET_END UINT32_C(0x40)
288 * If set to 1, the device will not generate a completion for
289 * this transmit packet unless there is an error in it's
290 * processing. If this bit is set to 0, then the packet will be
291 * completed normally. This bit must be valid only on the first
294 #define TX_BD_LONG_FLAGS_NO_CMPL UINT32_C(0x80)
296 * This value indicates how many 16B BD locations are consumed
297 * in the ring by this packet. A value of 1 indicates that this
298 * BD is the only BD (and that the it is a short BD). A value of
299 * 3 indicates either 3 short BDs or 1 long BD and one short BD
300 * in the packet. A value of 0 indicates that there are 32 BD
301 * locations in the packet (the maximum). This field is valid
302 * only on the first BD of a packet.
304 #define TX_BD_LONG_FLAGS_BD_CNT_MASK UINT32_C(0x1f00)
305 #define TX_BD_LONG_FLAGS_BD_CNT_SFT 8
307 * This value is a hint for the length of the entire packet. It
308 * is used by the chip to optimize internal processing. The
309 * packet will be dropped if the hint is too short. This field
310 * is valid only on the first BD of a packet.
312 #define TX_BD_LONG_FLAGS_LHINT_MASK UINT32_C(0x6000)
313 #define TX_BD_LONG_FLAGS_LHINT_SFT 13
314 /* indicates packet length < 512B */
315 #define TX_BD_LONG_FLAGS_LHINT_LT512 (UINT32_C(0x0) << 13)
316 /* indicates 512 <= packet length < 1KB */
317 #define TX_BD_LONG_FLAGS_LHINT_LT1K (UINT32_C(0x1) << 13)
318 /* indicates 1KB <= packet length < 2KB */
319 #define TX_BD_LONG_FLAGS_LHINT_LT2K (UINT32_C(0x2) << 13)
320 /* indicates packet length >= 2KB */
321 #define TX_BD_LONG_FLAGS_LHINT_GTE2K (UINT32_C(0x3) << 13)
322 #define TX_BD_LONG_FLAGS_LHINT_LAST \
323 TX_BD_LONG_FLAGS_LHINT_GTE2K
325 * If set to 1, the device immediately updates the Send Consumer
326 * Index after the buffer associated with this descriptor has
327 * been transferred via DMA to NIC memory from host memory. An
328 * interrupt may or may not be generated according to the state
329 * of the interrupt avoidance mechanisms. If this bit is set to
330 * 0, then the Consumer Index is only updated as soon as one of
331 * the host interrupt coalescing conditions has been met. This
332 * bit must be valid on the first BD of a packet.
334 #define TX_BD_LONG_FLAGS_COAL_NOW UINT32_C(0x8000)
336 * All bits in this field must be valid on the first BD of a
337 * packet. Only the packet_end bit must be valid for the
338 * remaining BDs of a packet.
340 #define TX_BD_LONG_FLAGS_MASK UINT32_C(0xffc0)
341 #define TX_BD_LONG_FLAGS_SFT 6
344 * This is the length of the host physical buffer this BD
345 * describes in bytes. This field must be valid on all BDs of a
350 * The opaque data field is pass through to the completion and
351 * can be used for any data that the driver wants to associate
352 * with the transmit BD. This field must be valid on the first
357 * This is the host physical address for the portion of the
358 * packet described by this TX BD. This value must be valid on
359 * all BDs of a packet.
361 } __attribute__((packed));
363 /* last 16 bytes of Long TX BD */
364 struct tx_bd_long_hi {
367 * All bits in this field must be valid on the first BD of a
368 * packet. Their value on other BDs of the packet will be
372 * If set to 1, the controller replaces the TCP/UPD checksum
373 * fields of normal TCP/UPD checksum, or the inner TCP/UDP
374 * checksum field of the encapsulated TCP/UDP packets with the
375 * hardware calculated TCP/UDP checksum for the packet
376 * associated with this descriptor. The flag is ignored if the
377 * LSO flag is set. This bit must be valid on the first BD of a
380 #define TX_BD_LONG_LFLAGS_TCP_UDP_CHKSUM UINT32_C(0x1)
382 * If set to 1, the controller replaces the IP checksum of the
383 * normal packets, or the inner IP checksum of the encapsulated
384 * packets with the hardware calculated IP checksum for the
385 * packet associated with this descriptor. This bit must be
386 * valid on the first BD of a packet.
388 #define TX_BD_LONG_LFLAGS_IP_CHKSUM UINT32_C(0x2)
390 * If set to 1, the controller will not append an Ethernet CRC
391 * to the end of the frame. This bit must be valid on the first
392 * BD of a packet. Packet must be 64B or longer when this flag
393 * is set. It is not useful to use this bit with any form of TX
394 * offload such as CSO or LSO. The intent is that the packet
395 * from the host already has a valid Ethernet CRC on the packet.
397 #define TX_BD_LONG_LFLAGS_NOCRC UINT32_C(0x4)
399 * If set to 1, the device will record the time at which the
400 * packet was actually transmitted at the TX MAC. This bit must
401 * be valid on the first BD of a packet.
403 #define TX_BD_LONG_LFLAGS_STAMP UINT32_C(0x8)
405 * If set to 1, The controller replaces the tunnel IP checksum
406 * field with hardware calculated IP checksum for the IP header
407 * of the packet associated with this descriptor. For outer UDP
408 * checksum, global outer UDP checksum TE_NIC register needs to
409 * be enabled. If the global outer UDP checksum TE_NIC register
410 * bit is set, outer UDP checksum will be calculated for the
411 * following cases: 1. Packets with tcp_udp_chksum flag set to
412 * offload checksum for inner packet AND the inner packet is
413 * TCP/UDP. If the inner packet is ICMP for example (non-
414 * TCP/UDP), even if the tcp_udp_chksum is set, the outer UDP
415 * checksum will not be calculated. 2. Packets with lso flag set
416 * which implies inner TCP checksum calculation as part of LSO
419 #define TX_BD_LONG_LFLAGS_T_IP_CHKSUM UINT32_C(0x10)
421 * If set to 1, the device will treat this packet with LSO(Large
422 * Send Offload) processing for both normal or encapsulated
423 * packets, which is a form of TCP segmentation. When this bit
424 * is 1, the hdr_size and mss fields must be valid. The driver
425 * doesn't need to set t_ip_chksum, ip_chksum, and
426 * tcp_udp_chksum flags since the controller will replace the
427 * appropriate checksum fields for segmented packets. When this
428 * bit is 1, the hdr_size and mss fields must be valid.
430 #define TX_BD_LONG_LFLAGS_LSO UINT32_C(0x20)
432 * If set to zero when LSO is '1', then the IPID will be treated
433 * as a 16b number and will be wrapped if it exceeds a value of
434 * 0xffff. If set to one when LSO is '1', then the IPID will be
435 * treated as a 15b number and will be wrapped if it exceeds a
438 #define TX_BD_LONG_LFLAGS_IPID_FMT UINT32_C(0x40)
440 * If set to zero when LSO is '1', then the IPID of the tunnel
441 * IP header will not be modified during LSO operations. If set
442 * to one when LSO is '1', then the IPID of the tunnel IP header
443 * will be incremented for each subsequent segment of an LSO
444 * operation. The flag is ignored if the LSO packet is a normal
445 * (non-tunneled) TCP packet.
447 #define TX_BD_LONG_LFLAGS_T_IPID UINT32_C(0x80)
449 * If set to '1', then the RoCE ICRC will be appended to the
450 * packet. Packet must be a valid RoCE format packet.
452 #define TX_BD_LONG_LFLAGS_ROCE_CRC UINT32_C(0x100)
454 * If set to '1', then the FCoE CRC will be appended to the
455 * packet. Packet must be a valid FCoE format packet.
457 #define TX_BD_LONG_LFLAGS_FCOE_CRC UINT32_C(0x200)
460 * When LSO is '1', this field must contain the offset of the
461 * TCP payload from the beginning of the packet in as 16b words.
462 * In case of encapsulated/tunneling packet, this field contains
463 * the offset of the inner TCP payload from beginning of the
464 * packet as 16-bit words. This value must be valid on the first
467 #define TX_BD_LONG_HDR_SIZE_MASK UINT32_C(0x1ff)
468 #define TX_BD_LONG_HDR_SIZE_SFT 0
471 * This is the MSS value that will be used to do the LSO
472 * processing. The value is the length in bytes of the TCP
473 * payload for each segment generated by the LSO operation. This
474 * value must be valid on the first BD of a packet.
476 #define TX_BD_LONG_MSS_MASK UINT32_C(0x7fff)
477 #define TX_BD_LONG_MSS_SFT 0
481 * This value selects a CFA action to perform on the packet. Set
482 * this value to zero if no CFA action is desired. This value
483 * must be valid on the first BD of a packet.
487 * This value is action meta-data that defines CFA edit
488 * operations that are done in addition to any action editing.
490 /* When key=1, This is the VLAN tag VID value. */
491 #define TX_BD_LONG_CFA_META_VLAN_VID_MASK UINT32_C(0xfff)
492 #define TX_BD_LONG_CFA_META_VLAN_VID_SFT 0
493 /* When key=1, This is the VLAN tag DE value. */
494 #define TX_BD_LONG_CFA_META_VLAN_DE UINT32_C(0x1000)
495 /* When key=1, This is the VLAN tag PRI value. */
496 #define TX_BD_LONG_CFA_META_VLAN_PRI_MASK UINT32_C(0xe000)
497 #define TX_BD_LONG_CFA_META_VLAN_PRI_SFT 13
498 /* When key=1, This is the VLAN tag TPID select value. */
499 #define TX_BD_LONG_CFA_META_VLAN_TPID_MASK UINT32_C(0x70000)
500 #define TX_BD_LONG_CFA_META_VLAN_TPID_SFT 16
502 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID88A8 (UINT32_C(0x0) << 16)
504 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID8100 (UINT32_C(0x1) << 16)
506 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9100 (UINT32_C(0x2) << 16)
508 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9200 (UINT32_C(0x3) << 16)
510 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPID9300 (UINT32_C(0x4) << 16)
511 /* Value programmed in CFA VLANTPID register. */
512 #define TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG (UINT32_C(0x5) << 16)
513 #define TX_BD_LONG_CFA_META_VLAN_TPID_LAST \
514 TX_BD_LONG_CFA_META_VLAN_TPID_TPIDCFG
515 /* When key=1, This is the VLAN tag TPID select value. */
516 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_MASK UINT32_C(0xff80000)
517 #define TX_BD_LONG_CFA_META_VLAN_RESERVED_SFT 19
519 * This field identifies the type of edit to be performed on the
520 * packet. This value must be valid on the first BD of a packet.
522 #define TX_BD_LONG_CFA_META_KEY_MASK UINT32_C(0xf0000000)
523 #define TX_BD_LONG_CFA_META_KEY_SFT 28
525 #define TX_BD_LONG_CFA_META_KEY_NONE (UINT32_C(0x0) << 28)
527 * - meta[17:16] - TPID select value (0 =
528 * 0x8100). - meta[15:12] - PRI/DE value. -
529 * meta[11:0] - VID value.
531 #define TX_BD_LONG_CFA_META_KEY_VLAN_TAG (UINT32_C(0x1) << 28)
532 #define TX_BD_LONG_CFA_META_KEY_LAST \
533 TX_BD_LONG_CFA_META_KEY_VLAN_TAG
534 } __attribute__((packed));
536 /* RX Producer Packet BD (16 bytes) */
537 struct rx_prod_pkt_bd {
539 /* This value identifies the type of buffer descriptor. */
540 #define RX_PROD_PKT_BD_TYPE_MASK UINT32_C(0x3f)
541 #define RX_PROD_PKT_BD_TYPE_SFT 0
543 * Indicates that this BD is 16B long and is an
544 * RX Producer (ie. empty) buffer descriptor.
546 #define RX_PROD_PKT_BD_TYPE_RX_PROD_PKT UINT32_C(0x4)
548 * If set to 1, the packet will be placed at the address plus
549 * 2B. The 2 Bytes of padding will be written as zero.
552 * This is intended to be used when the host buffer is cache-
553 * line aligned to produce packets that are easy to parse in
554 * host memory while still allowing writes to be cache line
557 #define RX_PROD_PKT_BD_FLAGS_SOP_PAD UINT32_C(0x40)
559 * If set to 1, the packet write will be padded out to the
560 * nearest cache-line with zero value padding.
563 * If receive buffers start/end on cache-line boundaries, this
564 * feature will ensure that all data writes on the PCI bus
565 * start/end on cache line boundaries.
567 #define RX_PROD_PKT_BD_FLAGS_EOP_PAD UINT32_C(0x80)
569 * This value is the number of additional buffers in the ring
570 * that describe the buffer space to be consumed for the this
571 * packet. If the value is zero, then the packet must fit within
572 * the space described by this BD. If this value is 1 or more,
573 * it indicates how many additional "buffer" BDs are in the ring
574 * immediately following this BD to be used for the same network
575 * packet. Even if the packet to be placed does not need all the
576 * additional buffers, they will be consumed anyway.
578 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_MASK UINT32_C(0x300)
579 #define RX_PROD_PKT_BD_FLAGS_BUFFERS_SFT 8
580 #define RX_PROD_PKT_BD_FLAGS_MASK UINT32_C(0xffc0)
581 #define RX_PROD_PKT_BD_FLAGS_SFT 6
584 * This is the length in Bytes of the host physical buffer where
585 * data for the packet may be placed in host memory.
588 * While this is a Byte resolution value, it is often
589 * advantageous to ensure that the buffers provided end on a
594 * The opaque data field is pass through to the completion and
595 * can be used for any data that the driver wants to associate
596 * with this receive buffer set.
600 * This is the host physical address where data for the packet
601 * may by placed in host memory.
604 * While this is a Byte resolution value, it is often
605 * advantageous to ensure that the buffers provide start on a
608 } __attribute__((packed));
610 /* Completion Ring Structures */
611 /* Note: This structure is used by the HWRM to communicate HWRM Error. */
612 /* Base Completion Record (16 bytes) */
617 * This field indicates the exact type of the completion. By
618 * convention, the LSB identifies the length of the record in
619 * 16B units. Even values indicate 16B records. Odd values
620 * indicate 32B records.
622 #define CMPL_BASE_TYPE_MASK UINT32_C(0x3f)
623 #define CMPL_BASE_TYPE_SFT 0
624 /* TX L2 completion: Completion of TX packet. Length = 16B */
625 #define CMPL_BASE_TYPE_TX_L2 UINT32_C(0x0)
627 * RX L2 completion: Completion of and L2 RX
628 * packet. Length = 32B
630 #define CMPL_BASE_TYPE_RX_L2 UINT32_C(0x11)
632 * RX Aggregation Buffer completion : Completion
633 * of an L2 aggregation buffer in support of
634 * TPA, HDS, or Jumbo packet completion. Length
637 #define CMPL_BASE_TYPE_RX_AGG UINT32_C(0x12)
639 * RX L2 TPA Start Completion: Completion at the
640 * beginning of a TPA operation. Length = 32B
642 #define CMPL_BASE_TYPE_RX_TPA_START UINT32_C(0x13)
644 * RX L2 TPA End Completion: Completion at the
645 * end of a TPA operation. Length = 32B
647 #define CMPL_BASE_TYPE_RX_TPA_END UINT32_C(0x15)
649 * Statistics Ejection Completion: Completion of
650 * statistics data ejection buffer. Length = 16B
652 #define CMPL_BASE_TYPE_STAT_EJECT UINT32_C(0x1a)
653 /* HWRM Command Completion: Completion of an HWRM command. */
654 #define CMPL_BASE_TYPE_HWRM_DONE UINT32_C(0x20)
655 /* Forwarded HWRM Request */
656 #define CMPL_BASE_TYPE_HWRM_FWD_REQ UINT32_C(0x22)
657 /* Forwarded HWRM Response */
658 #define CMPL_BASE_TYPE_HWRM_FWD_RESP UINT32_C(0x24)
659 /* HWRM Asynchronous Event Information */
660 #define CMPL_BASE_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
661 /* CQ Notification */
662 #define CMPL_BASE_TYPE_CQ_NOTIFICATION UINT32_C(0x30)
663 /* SRQ Threshold Event */
664 #define CMPL_BASE_TYPE_SRQ_EVENT UINT32_C(0x32)
665 /* DBQ Threshold Event */
666 #define CMPL_BASE_TYPE_DBQ_EVENT UINT32_C(0x34)
667 /* QP Async Notification */
668 #define CMPL_BASE_TYPE_QP_EVENT UINT32_C(0x38)
669 /* Function Async Notification */
670 #define CMPL_BASE_TYPE_FUNC_EVENT UINT32_C(0x3a)
679 * This value is written by the NIC such that it will be
680 * different for each pass through the completion queue. The
681 * even passes will write 1. The odd passes will write 0.
683 #define CMPL_BASE_V UINT32_C(0x1)
685 #define CMPL_BASE_INFO3_MASK UINT32_C(0xfffffffe)
686 #define CMPL_BASE_INFO3_SFT 1
689 } __attribute__((packed));
691 /* TX Completion Record (16 bytes) */
695 * This field indicates the exact type of the completion. By
696 * convention, the LSB identifies the length of the record in
697 * 16B units. Even values indicate 16B records. Odd values
698 * indicate 32B records.
700 #define TX_CMPL_TYPE_MASK UINT32_C(0x3f)
701 #define TX_CMPL_TYPE_SFT 0
702 /* TX L2 completion: Completion of TX packet. Length = 16B */
703 #define TX_CMPL_TYPE_TX_L2 UINT32_C(0x0)
705 * When this bit is '1', it indicates a packet that has an error
706 * of some type. Type of error is indicated in error_flags.
708 #define TX_CMPL_FLAGS_ERROR UINT32_C(0x40)
710 * When this bit is '1', it indicates that the packet completed
711 * was transmitted using the push acceleration data provided by
712 * the driver. When this bit is '0', it indicates that the
713 * packet had not push acceleration data written or was executed
714 * as a normal packet even though push data was provided.
716 #define TX_CMPL_FLAGS_PUSH UINT32_C(0x80)
717 #define TX_CMPL_FLAGS_MASK UINT32_C(0xffc0)
718 #define TX_CMPL_FLAGS_SFT 6
720 /* unused1 is 16 b */
723 * This is a copy of the opaque field from the first TX BD of
724 * this transmitted packet.
728 * This value is written by the NIC such that it will be
729 * different for each pass through the completion queue. The
730 * even passes will write 1. The odd passes will write 0.
732 #define TX_CMPL_V UINT32_C(0x1)
734 * This error indicates that there was some sort of problem with
735 * the BDs for the packet.
737 #define TX_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
738 #define TX_CMPL_ERRORS_BUFFER_ERROR_SFT 1
740 #define TX_CMPL_ERRORS_BUFFER_ERROR_NO_ERROR (UINT32_C(0x0) << 1)
741 /* Bad Format: BDs were not formatted correctly. */
742 #define TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT (UINT32_C(0x2) << 1)
743 #define TX_CMPL_ERRORS_BUFFER_ERROR_LAST \
744 TX_CMPL_ERRORS_BUFFER_ERROR_BAD_FMT
746 * When this bit is '1', it indicates that the length of the
747 * packet was zero. No packet was transmitted.
749 #define TX_CMPL_ERRORS_ZERO_LENGTH_PKT UINT32_C(0x10)
751 * When this bit is '1', it indicates that the packet was longer
752 * than the programmed limit in TDI. No packet was transmitted.
754 #define TX_CMPL_ERRORS_EXCESSIVE_BD_LENGTH UINT32_C(0x20)
756 * When this bit is '1', it indicates that one or more of the
757 * BDs associated with this packet generated a PCI error. This
758 * probably means the address was not valid.
760 #define TX_CMPL_ERRORS_DMA_ERROR UINT32_C(0x40)
762 * When this bit is '1', it indicates that the packet was longer
763 * than indicated by the hint. No packet was transmitted.
765 #define TX_CMPL_ERRORS_HINT_TOO_SHORT UINT32_C(0x80)
767 * When this bit is '1', it indicates that the packet was
768 * dropped due to Poison TLP error on one or more of the TLPs in
769 * the PXP completion.
771 #define TX_CMPL_ERRORS_POISON_TLP_ERROR UINT32_C(0x100)
772 #define TX_CMPL_ERRORS_MASK UINT32_C(0xfffe)
773 #define TX_CMPL_ERRORS_SFT 1
775 /* unused2 is 16 b */
777 /* unused3 is 32 b */
778 } __attribute__((packed));
780 /* RX Packet Completion Record (32 bytes split to 2 16-byte struct) */
784 * This field indicates the exact type of the completion. By
785 * convention, the LSB identifies the length of the record in
786 * 16B units. Even values indicate 16B records. Odd values
787 * indicate 32B records.
789 #define RX_PKT_CMPL_TYPE_MASK UINT32_C(0x3f)
790 #define RX_PKT_CMPL_TYPE_SFT 0
792 * RX L2 completion: Completion of and L2 RX
793 * packet. Length = 32B
795 #define RX_PKT_CMPL_TYPE_RX_L2 UINT32_C(0x11)
797 * When this bit is '1', it indicates a packet that has an error
798 * of some type. Type of error is indicated in error_flags.
800 #define RX_PKT_CMPL_FLAGS_ERROR UINT32_C(0x40)
801 /* This field indicates how the packet was placed in the buffer. */
802 #define RX_PKT_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
803 #define RX_PKT_CMPL_FLAGS_PLACEMENT_SFT 7
804 /* Normal: Packet was placed using normal algorithm. */
805 #define RX_PKT_CMPL_FLAGS_PLACEMENT_NORMAL (UINT32_C(0x0) << 7)
806 /* Jumbo: Packet was placed using jumbo algorithm. */
807 #define RX_PKT_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
809 * Header/Data Separation: Packet was placed
810 * using Header/Data separation algorithm. The
811 * separation location is indicated by the itype
814 #define RX_PKT_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
815 #define RX_PKT_CMPL_FLAGS_PLACEMENT_LAST \
816 RX_PKT_CMPL_FLAGS_PLACEMENT_HDS
817 /* This bit is '1' if the RSS field in this completion is valid. */
818 #define RX_PKT_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
820 #define RX_PKT_CMPL_FLAGS_UNUSED UINT32_C(0x800)
822 * This value indicates what the inner packet determined for the
825 #define RX_PKT_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
826 #define RX_PKT_CMPL_FLAGS_ITYPE_SFT 12
827 /* Not Known: Indicates that the packet type was not known. */
828 #define RX_PKT_CMPL_FLAGS_ITYPE_NOT_KNOWN (UINT32_C(0x0) << 12)
830 * IP Packet: Indicates that the packet was an
831 * IP packet, but further classification was not
834 #define RX_PKT_CMPL_FLAGS_ITYPE_IP (UINT32_C(0x1) << 12)
836 * TCP Packet: Indicates that the packet was IP
837 * and TCP. This indicates that the
838 * payload_offset field is valid.
840 #define RX_PKT_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
842 * UDP Packet: Indicates that the packet was IP
843 * and UDP. This indicates that the
844 * payload_offset field is valid.
846 #define RX_PKT_CMPL_FLAGS_ITYPE_UDP (UINT32_C(0x3) << 12)
848 * FCoE Packet: Indicates that the packet was
849 * recognized as a FCoE. This also indicates
850 * that the payload_offset field is valid.
852 #define RX_PKT_CMPL_FLAGS_ITYPE_FCOE (UINT32_C(0x4) << 12)
854 * RoCE Packet: Indicates that the packet was
855 * recognized as a RoCE. This also indicates
856 * that the payload_offset field is valid.
858 #define RX_PKT_CMPL_FLAGS_ITYPE_ROCE (UINT32_C(0x5) << 12)
860 * ICMP Packet: Indicates that the packet was
861 * recognized as ICMP. This indicates that the
862 * payload_offset field is valid.
864 #define RX_PKT_CMPL_FLAGS_ITYPE_ICMP (UINT32_C(0x7) << 12)
866 * PtP packet wo/timestamp: Indicates that the
867 * packet was recognized as a PtP packet.
869 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_WO_TIMESTAMP (UINT32_C(0x8) << 12)
871 * PtP packet w/timestamp: Indicates that the
872 * packet was recognized as a PtP packet and
873 * that a timestamp was taken for the packet.
875 #define RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP (UINT32_C(0x9) << 12)
876 #define RX_PKT_CMPL_FLAGS_ITYPE_LAST \
877 RX_PKT_CMPL_FLAGS_ITYPE_PTP_W_TIMESTAMP
878 #define RX_PKT_CMPL_FLAGS_MASK UINT32_C(0xffc0)
879 #define RX_PKT_CMPL_FLAGS_SFT 6
882 * This is the length of the data for the packet stored in the
883 * buffer(s) identified by the opaque value. This includes the
884 * packet BD and any associated buffer BDs. This does not
885 * include the length of any data places in aggregation BDs.
889 * This is a copy of the opaque field from the RX BD this
890 * completion corresponds to.
895 * This value is written by the NIC such that it will be
896 * different for each pass through the completion queue. The
897 * even passes will write 1. The odd passes will write 0.
899 #define RX_PKT_CMPL_V1 UINT32_C(0x1)
901 * This value is the number of aggregation buffers that follow
902 * this entry in the completion ring that are a part of this
903 * packet. If the value is zero, then the packet is completely
904 * contained in the buffer space provided for the packet in the
907 #define RX_PKT_CMPL_AGG_BUFS_MASK UINT32_C(0x3e)
908 #define RX_PKT_CMPL_AGG_BUFS_SFT 1
910 uint8_t rss_hash_type;
912 * This is the RSS hash type for the packet. The value is packed
913 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
914 * . The value of tuple_extrac_op provides the information about
915 * what fields the hash was computed on. * 0: The RSS hash was
916 * computed over source IP address, destination IP address,
917 * source port, and destination port of inner IP and TCP or UDP
918 * headers. Note: For non-tunneled packets, the packet headers
919 * are considered inner packet headers for the RSS hash
920 * computation purpose. * 1: The RSS hash was computed over
921 * source IP address and destination IP address of inner IP
922 * header. Note: For non-tunneled packets, the packet headers
923 * are considered inner packet headers for the RSS hash
924 * computation purpose. * 2: The RSS hash was computed over
925 * source IP address, destination IP address, source port, and
926 * destination port of IP and TCP or UDP headers of outer tunnel
927 * headers. Note: For non-tunneled packets, this value is not
928 * applicable. * 3: The RSS hash was computed over source IP
929 * address and destination IP address of IP header of outer
930 * tunnel headers. Note: For non-tunneled packets, this value is
931 * not applicable. Note that 4-tuples values listed above are
932 * applicable for layer 4 protocols supported and enabled for
933 * RSS in the hardware, HWRM firmware, and drivers. For example,
934 * if RSS hash is supported and enabled for TCP traffic only,
935 * then the values of tuple_extract_op corresponding to 4-tuples
936 * are only valid for TCP traffic.
938 uint8_t payload_offset;
940 * This value indicates the offset in bytes from the beginning
941 * of the packet where the inner payload starts. This value is
942 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
943 * indicates that header is 256B into the packet.
949 * This value is the RSS hash value calculated for the packet
950 * based on the mode bits and key value in the VNIC.
952 } __attribute__((packed));
954 /* last 16 bytes of RX Packet Completion Record */
955 struct rx_pkt_cmpl_hi {
958 * This indicates that the ip checksum was calculated for the
959 * inner packet and that the ip_cs_error field indicates if
960 * there was an error.
962 #define RX_PKT_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
964 * This indicates that the TCP, UDP or ICMP checksum was
965 * calculated for the inner packet and that the l4_cs_error
966 * field indicates if there was an error.
968 #define RX_PKT_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
970 * This indicates that the ip checksum was calculated for the
971 * tunnel header and that the t_ip_cs_error field indicates if
972 * there was an error.
974 #define RX_PKT_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
976 * This indicates that the UDP checksum was calculated for the
977 * tunnel packet and that the t_l4_cs_error field indicates if
978 * there was an error.
980 #define RX_PKT_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
981 /* This value indicates what format the metadata field is. */
982 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
983 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_SFT 4
984 /* No metadata informtaion. Value is zero. */
985 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
987 * The metadata field contains the VLAN tag and
988 * TPID value. - metadata[11:0] contains the
989 * vlan VID value. - metadata[12] contains the
990 * vlan DE value. - metadata[15:13] contains the
991 * vlan PRI value. - metadata[31:16] contains
992 * the vlan TPID value.
994 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
995 #define RX_PKT_CMPL_FLAGS2_META_FORMAT_LAST \
996 RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
998 * This field indicates the IP type for the inner-most IP
999 * header. A value of '0' indicates IPv4. A value of '1'
1000 * indicates IPv6. This value is only valid if itype indicates a
1001 * packet with an IP header.
1003 #define RX_PKT_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1006 * This is data from the CFA block as indicated by the
1007 * meta_format field.
1009 /* When meta_format=1, this value is the VLAN VID. */
1010 #define RX_PKT_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1011 #define RX_PKT_CMPL_METADATA_VID_SFT 0
1012 /* When meta_format=1, this value is the VLAN DE. */
1013 #define RX_PKT_CMPL_METADATA_DE UINT32_C(0x1000)
1014 /* When meta_format=1, this value is the VLAN PRI. */
1015 #define RX_PKT_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1016 #define RX_PKT_CMPL_METADATA_PRI_SFT 13
1017 /* When meta_format=1, this value is the VLAN TPID. */
1018 #define RX_PKT_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1019 #define RX_PKT_CMPL_METADATA_TPID_SFT 16
1022 * This value is written by the NIC such that it will be
1023 * different for each pass through the completion queue. The
1024 * even passes will write 1. The odd passes will write 0.
1026 #define RX_PKT_CMPL_V2 UINT32_C(0x1)
1028 * This error indicates that there was some sort of problem with
1029 * the BDs for the packet that was found after part of the
1030 * packet was already placed. The packet should be treated as
1033 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1034 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1035 /* No buffer error */
1036 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NO_BUFFER (UINT32_C(0x0) << 1)
1038 * Did Not Fit: Packet did not fit into packet
1039 * buffer provided. For regular placement, this
1040 * means the packet did not fit in the buffer
1041 * provided. For HDS and jumbo placement, this
1042 * means that the packet could not be placed
1043 * into 7 physical buffers or less.
1045 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_DID_NOT_FIT \
1046 (UINT32_C(0x1) << 1)
1048 * Not On Chip: All BDs needed for the packet
1049 * were not on-chip when the packet arrived.
1051 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1052 (UINT32_C(0x2) << 1)
1053 /* Bad Format: BDs were not formatted correctly. */
1054 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT \
1055 (UINT32_C(0x3) << 1)
1056 #define RX_PKT_CMPL_ERRORS_BUFFER_ERROR_LAST \
1057 RX_PKT_CMPL_ERRORS_BUFFER_ERROR_BAD_FORMAT
1058 /* This indicates that there was an error in the IP header checksum. */
1059 #define RX_PKT_CMPL_ERRORS_IP_CS_ERROR UINT32_C(0x10)
1061 * This indicates that there was an error in the TCP, UDP or
1064 #define RX_PKT_CMPL_ERRORS_L4_CS_ERROR UINT32_C(0x20)
1066 * This indicates that there was an error in the tunnel IP
1069 #define RX_PKT_CMPL_ERRORS_T_IP_CS_ERROR UINT32_C(0x40)
1071 * This indicates that there was an error in the tunnel UDP
1074 #define RX_PKT_CMPL_ERRORS_T_L4_CS_ERROR UINT32_C(0x80)
1076 * This indicates that there was a CRC error on either an FCoE
1077 * or RoCE packet. The itype indicates the packet type.
1079 #define RX_PKT_CMPL_ERRORS_CRC_ERROR UINT32_C(0x100)
1081 * This indicates that there was an error in the tunnel portion
1082 * of the packet when this field is non-zero.
1084 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_MASK UINT32_C(0xe00)
1085 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_SFT 9
1087 * No additional error occurred on the tunnel
1088 * portion of the packet of the packet does not
1091 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 9)
1093 * Indicates that IP header version does not
1094 * match expectation from L2 Ethertype for IPv4
1095 * and IPv6 in the tunnel header.
1097 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_VERSION \
1098 (UINT32_C(0x1) << 9)
1100 * Indicates that header length is out of range
1101 * in the tunnel header. Valid for IPv4.
1103 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_HDR_LEN \
1104 (UINT32_C(0x2) << 9)
1106 * Indicates that the physical packet is shorter
1107 * than that claimed by the PPPoE header length
1108 * for a tunnel PPPoE packet.
1110 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_TUNNEL_TOTAL_ERROR \
1111 (UINT32_C(0x3) << 9)
1113 * Indicates that physical packet is shorter
1114 * than that claimed by the tunnel l3 header
1115 * length. Valid for IPv4, or IPv6 tunnel packet
1118 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_IP_TOTAL_ERROR \
1119 (UINT32_C(0x4) << 9)
1121 * Indicates that the physical packet is shorter
1122 * than that claimed by the tunnel UDP header
1123 * length for a tunnel UDP packet that is not
1126 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_UDP_TOTAL_ERROR \
1127 (UINT32_C(0x5) << 9)
1129 * indicates that the IPv4 TTL or IPv6 hop limit
1130 * check have failed (e.g. TTL = 0) in the
1131 * tunnel header. Valid for IPv4, and IPv6.
1133 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL \
1134 (UINT32_C(0x6) << 9)
1135 #define RX_PKT_CMPL_ERRORS_T_PKT_ERROR_LAST \
1136 RX_PKT_CMPL_ERRORS_T_PKT_ERROR_T_L3_BAD_TTL
1138 * This indicates that there was an error in the inner portion
1139 * of the packet when this field is non-zero.
1141 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_MASK UINT32_C(0xf000)
1142 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_SFT 12
1144 * No additional error occurred on the tunnel
1145 * portion of the packet of the packet does not
1148 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_NO_ERROR (UINT32_C(0x0) << 12)
1150 * Indicates that IP header version does not
1151 * match expectation from L2 Ethertype for IPv4
1152 * and IPv6 or that option other than VFT was
1153 * parsed on FCoE packet.
1155 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_VERSION \
1156 (UINT32_C(0x1) << 12)
1158 * indicates that header length is out of range.
1159 * Valid for IPv4 and RoCE
1161 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_HDR_LEN \
1162 (UINT32_C(0x2) << 12)
1164 * indicates that the IPv4 TTL or IPv6 hop limit
1165 * check have failed (e.g. TTL = 0). Valid for
1168 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L3_BAD_TTL (UINT32_C(0x3) << 12)
1170 * Indicates that physical packet is shorter
1171 * than that claimed by the l3 header length.
1172 * Valid for IPv4, IPv6 packet or RoCE packets.
1174 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_IP_TOTAL_ERROR \
1175 (UINT32_C(0x4) << 12)
1177 * Indicates that the physical packet is shorter
1178 * than that claimed by the UDP header length
1179 * for a UDP packet that is not fragmented.
1181 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_UDP_TOTAL_ERROR \
1182 (UINT32_C(0x5) << 12)
1184 * Indicates that TCP header length > IP
1185 * payload. Valid for TCP packets only.
1187 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN \
1188 (UINT32_C(0x6) << 12)
1189 /* Indicates that TCP header length < 5. Valid for TCP. */
1190 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_HDR_LEN_TOO_SMALL \
1191 (UINT32_C(0x7) << 12)
1193 * Indicates that TCP option headers result in a
1194 * TCP header size that does not match data
1195 * offset in TCP header. Valid for TCP.
1197 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN \
1198 (UINT32_C(0x8) << 12)
1199 #define RX_PKT_CMPL_ERRORS_PKT_ERROR_LAST \
1200 RX_PKT_CMPL_ERRORS_PKT_ERROR_L4_BAD_OPT_LEN
1201 #define RX_PKT_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1202 #define RX_PKT_CMPL_ERRORS_SFT 1
1205 * This field identifies the CFA action rule that was used for
1210 * This value holds the reordering sequence number for the
1211 * packet. If the reordering sequence is not valid, then this
1212 * value is zero. The reordering domain for the packet is in the
1213 * bottom 8 to 10b of the rss_hash value. The bottom 20b of this
1214 * value contain the ordering domain value for the packet.
1216 #define RX_PKT_CMPL_REORDER_MASK UINT32_C(0xffffff)
1217 #define RX_PKT_CMPL_REORDER_SFT 0
1218 } __attribute__((packed));
1220 /* RX L2 TPA Start Completion Record (32 bytes split to 2 16-byte struct) */
1221 struct rx_tpa_start_cmpl {
1222 uint16_t flags_type;
1224 * This field indicates the exact type of the completion. By
1225 * convention, the LSB identifies the length of the record in
1226 * 16B units. Even values indicate 16B records. Odd values
1227 * indicate 32B records.
1229 #define RX_TPA_START_CMPL_TYPE_MASK UINT32_C(0x3f)
1230 #define RX_TPA_START_CMPL_TYPE_SFT 0
1232 * RX L2 TPA Start Completion: Completion at the
1233 * beginning of a TPA operation. Length = 32B
1235 #define RX_TPA_START_CMPL_TYPE_RX_TPA_START UINT32_C(0x13)
1236 /* This bit will always be '0' for TPA start completions. */
1237 #define RX_TPA_START_CMPL_FLAGS_ERROR UINT32_C(0x40)
1238 /* This field indicates how the packet was placed in the buffer. */
1239 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1240 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_SFT 7
1242 * Jumbo: TPA Packet was placed using jumbo
1243 * algorithm. This means that the first buffer
1244 * will be filled with data before moving to
1245 * aggregation buffers. Each aggregation buffer
1246 * will be filled before moving to the next
1247 * aggregation buffer.
1249 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1251 * Header/Data Separation: Packet was placed
1252 * using Header/Data separation algorithm. The
1253 * separation location is indicated by the itype
1256 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1258 * GRO/Jumbo: Packet will be placed using
1259 * GRO/Jumbo where the first packet is filled
1260 * with data. Subsequent packets will be placed
1261 * such that any one packet does not span two
1262 * aggregation buffers unless it starts at the
1263 * beginning of an aggregation buffer.
1265 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_JUMBO \
1266 (UINT32_C(0x5) << 7)
1268 * GRO/Header-Data Separation: Packet will be
1269 * placed using GRO/HDS where the header is in
1270 * the first packet. Payload of each packet will
1271 * be placed such that any one packet does not
1272 * span two aggregation buffers unless it starts
1273 * at the beginning of an aggregation buffer.
1275 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1276 #define RX_TPA_START_CMPL_FLAGS_PLACEMENT_LAST \
1277 RX_TPA_START_CMPL_FLAGS_PLACEMENT_GRO_HDS
1278 /* This bit is '1' if the RSS field in this completion is valid. */
1279 #define RX_TPA_START_CMPL_FLAGS_RSS_VALID UINT32_C(0x400)
1281 #define RX_TPA_START_CMPL_FLAGS_UNUSED UINT32_C(0x800)
1283 * This value indicates what the inner packet determined for the
1286 #define RX_TPA_START_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1287 #define RX_TPA_START_CMPL_FLAGS_ITYPE_SFT 12
1288 /* TCP Packet: Indicates that the packet was IP and TCP. */
1289 #define RX_TPA_START_CMPL_FLAGS_ITYPE_TCP (UINT32_C(0x2) << 12)
1290 #define RX_TPA_START_CMPL_FLAGS_ITYPE_LAST \
1291 RX_TPA_START_CMPL_FLAGS_ITYPE_TCP
1292 #define RX_TPA_START_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1293 #define RX_TPA_START_CMPL_FLAGS_SFT 6
1296 * This value indicates the amount of packet data written to the
1297 * buffer the opaque field in this completion corresponds to.
1301 * This is a copy of the opaque field from the RX BD this
1302 * completion corresponds to.
1305 /* unused1 is 7 b */
1307 * This value is written by the NIC such that it will be
1308 * different for each pass through the completion queue. The
1309 * even passes will write 1. The odd passes will write 0.
1311 #define RX_TPA_START_CMPL_V1 UINT32_C(0x1)
1312 /* unused1 is 7 b */
1313 uint8_t rss_hash_type;
1315 * This is the RSS hash type for the packet. The value is packed
1316 * {tuple_extrac_op[1:0],rss_profile_id[4:0],tuple_extrac_op[2]}
1317 * . The value of tuple_extrac_op provides the information about
1318 * what fields the hash was computed on. * 0: The RSS hash was
1319 * computed over source IP address, destination IP address,
1320 * source port, and destination port of inner IP and TCP or UDP
1321 * headers. Note: For non-tunneled packets, the packet headers
1322 * are considered inner packet headers for the RSS hash
1323 * computation purpose. * 1: The RSS hash was computed over
1324 * source IP address and destination IP address of inner IP
1325 * header. Note: For non-tunneled packets, the packet headers
1326 * are considered inner packet headers for the RSS hash
1327 * computation purpose. * 2: The RSS hash was computed over
1328 * source IP address, destination IP address, source port, and
1329 * destination port of IP and TCP or UDP headers of outer tunnel
1330 * headers. Note: For non-tunneled packets, this value is not
1331 * applicable. * 3: The RSS hash was computed over source IP
1332 * address and destination IP address of IP header of outer
1333 * tunnel headers. Note: For non-tunneled packets, this value is
1334 * not applicable. Note that 4-tuples values listed above are
1335 * applicable for layer 4 protocols supported and enabled for
1336 * RSS in the hardware, HWRM firmware, and drivers. For example,
1337 * if RSS hash is supported and enabled for TCP traffic only,
1338 * then the values of tuple_extract_op corresponding to 4-tuples
1339 * are only valid for TCP traffic.
1343 * This is the aggregation ID that the completion is associated
1344 * with. Use this number to correlate the TPA start completion
1345 * with the TPA end completion.
1347 /* unused2 is 9 b */
1349 * This is the aggregation ID that the completion is associated
1350 * with. Use this number to correlate the TPA start completion
1351 * with the TPA end completion.
1353 #define RX_TPA_START_CMPL_AGG_ID_MASK UINT32_C(0xfe00)
1354 #define RX_TPA_START_CMPL_AGG_ID_SFT 9
1357 * This value is the RSS hash value calculated for the packet
1358 * based on the mode bits and key value in the VNIC.
1360 } __attribute__((packed));
1362 /* last 16 bytes of RX L2 TPA Start Completion Record */
1363 struct rx_tpa_start_cmpl_hi {
1366 * This indicates that the ip checksum was calculated for the
1367 * inner packet and that the sum passed for all segments
1368 * included in the aggregation.
1370 #define RX_TPA_START_CMPL_FLAGS2_IP_CS_CALC UINT32_C(0x1)
1372 * This indicates that the TCP, UDP or ICMP checksum was
1373 * calculated for the inner packet and that the sum passed for
1374 * all segments included in the aggregation.
1376 #define RX_TPA_START_CMPL_FLAGS2_L4_CS_CALC UINT32_C(0x2)
1378 * This indicates that the ip checksum was calculated for the
1379 * tunnel header and that the sum passed for all segments
1380 * included in the aggregation.
1382 #define RX_TPA_START_CMPL_FLAGS2_T_IP_CS_CALC UINT32_C(0x4)
1384 * This indicates that the UDP checksum was calculated for the
1385 * tunnel packet and that the sum passed for all segments
1386 * included in the aggregation.
1388 #define RX_TPA_START_CMPL_FLAGS2_T_L4_CS_CALC UINT32_C(0x8)
1389 /* This value indicates what format the metadata field is. */
1390 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_MASK UINT32_C(0xf0)
1391 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_SFT 4
1392 /* No metadata informtaion. Value is zero. */
1393 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_NONE (UINT32_C(0x0) << 4)
1395 * The metadata field contains the VLAN tag and
1396 * TPID value. - metadata[11:0] contains the
1397 * vlan VID value. - metadata[12] contains the
1398 * vlan DE value. - metadata[15:13] contains the
1399 * vlan PRI value. - metadata[31:16] contains
1400 * the vlan TPID value.
1402 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN (UINT32_C(0x1) << 4)
1403 #define RX_TPA_START_CMPL_FLAGS2_META_FORMAT_LAST \
1404 RX_TPA_START_CMPL_FLAGS2_META_FORMAT_VLAN
1406 * This field indicates the IP type for the inner-most IP
1407 * header. A value of '0' indicates IPv4. A value of '1'
1410 #define RX_TPA_START_CMPL_FLAGS2_IP_TYPE UINT32_C(0x100)
1413 * This is data from the CFA block as indicated by the
1414 * meta_format field.
1416 /* When meta_format=1, this value is the VLAN VID. */
1417 #define RX_TPA_START_CMPL_METADATA_VID_MASK UINT32_C(0xfff)
1418 #define RX_TPA_START_CMPL_METADATA_VID_SFT 0
1419 /* When meta_format=1, this value is the VLAN DE. */
1420 #define RX_TPA_START_CMPL_METADATA_DE UINT32_C(0x1000)
1421 /* When meta_format=1, this value is the VLAN PRI. */
1422 #define RX_TPA_START_CMPL_METADATA_PRI_MASK UINT32_C(0xe000)
1423 #define RX_TPA_START_CMPL_METADATA_PRI_SFT 13
1424 /* When meta_format=1, this value is the VLAN TPID. */
1425 #define RX_TPA_START_CMPL_METADATA_TPID_MASK UINT32_C(0xffff0000)
1426 #define RX_TPA_START_CMPL_METADATA_TPID_SFT 16
1428 /* unused4 is 15 b */
1430 * This value is written by the NIC such that it will be
1431 * different for each pass through the completion queue. The
1432 * even passes will write 1. The odd passes will write 0.
1434 #define RX_TPA_START_CMPL_V2 UINT32_C(0x1)
1435 /* unused4 is 15 b */
1438 * This field identifies the CFA action rule that was used for
1441 uint32_t inner_l4_size_inner_l3_offset_inner_l2_offset_outer_l3_offset;
1443 * This is the size in bytes of the inner most L4 header. This
1444 * can be subtracted from the payload_offset to determine the
1445 * start of the inner most L4 header.
1448 * This is the offset from the beginning of the packet in bytes
1449 * for the outer L3 header. If there is no outer L3 header, then
1450 * this value is zero.
1452 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_MASK UINT32_C(0x1ff)
1453 #define RX_TPA_START_CMPL_OUTER_L3_OFFSET_SFT 0
1455 * This is the offset from the beginning of the packet in bytes
1456 * for the inner most L2 header.
1458 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_MASK UINT32_C(0x3fe00)
1459 #define RX_TPA_START_CMPL_INNER_L2_OFFSET_SFT 9
1461 * This is the offset from the beginning of the packet in bytes
1462 * for the inner most L3 header.
1464 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_MASK UINT32_C(0x7fc0000)
1465 #define RX_TPA_START_CMPL_INNER_L3_OFFSET_SFT 18
1467 * This is the size in bytes of the inner most L4 header. This
1468 * can be subtracted from the payload_offset to determine the
1469 * start of the inner most L4 header.
1471 #define RX_TPA_START_CMPL_INNER_L4_SIZE_MASK UINT32_C(0xf8000000)
1472 #define RX_TPA_START_CMPL_INNER_L4_SIZE_SFT 27
1473 } __attribute__((packed));
1475 /* RX TPA End Completion Record (32 bytes split to 2 16-byte struct) */
1476 struct rx_tpa_end_cmpl {
1477 uint16_t flags_type;
1479 * This field indicates the exact type of the completion. By
1480 * convention, the LSB identifies the length of the record in
1481 * 16B units. Even values indicate 16B records. Odd values
1482 * indicate 32B records.
1484 #define RX_TPA_END_CMPL_TYPE_MASK UINT32_C(0x3f)
1485 #define RX_TPA_END_CMPL_TYPE_SFT 0
1487 * RX L2 TPA End Completion: Completion at the
1488 * end of a TPA operation. Length = 32B
1490 #define RX_TPA_END_CMPL_TYPE_RX_TPA_END UINT32_C(0x15)
1492 * When this bit is '1', it indicates a packet that has an error
1493 * of some type. Type of error is indicated in error_flags.
1495 #define RX_TPA_END_CMPL_FLAGS_ERROR UINT32_C(0x40)
1496 /* This field indicates how the packet was placed in the buffer. */
1497 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_MASK UINT32_C(0x380)
1498 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_SFT 7
1500 * Jumbo: TPA Packet was placed using jumbo
1501 * algorithm. This means that the first buffer
1502 * will be filled with data before moving to
1503 * aggregation buffers. Each aggregation buffer
1504 * will be filled before moving to the next
1505 * aggregation buffer.
1507 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_JUMBO (UINT32_C(0x1) << 7)
1509 * Header/Data Separation: Packet was placed
1510 * using Header/Data separation algorithm. The
1511 * separation location is indicated by the itype
1514 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_HDS (UINT32_C(0x2) << 7)
1516 * GRO/Jumbo: Packet will be placed using
1517 * GRO/Jumbo where the first packet is filled
1518 * with data. Subsequent packets will be placed
1519 * such that any one packet does not span two
1520 * aggregation buffers unless it starts at the
1521 * beginning of an aggregation buffer.
1523 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_JUMBO (UINT32_C(0x5) << 7)
1525 * GRO/Header-Data Separation: Packet will be
1526 * placed using GRO/HDS where the header is in
1527 * the first packet. Payload of each packet will
1528 * be placed such that any one packet does not
1529 * span two aggregation buffers unless it starts
1530 * at the beginning of an aggregation buffer.
1532 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS (UINT32_C(0x6) << 7)
1533 #define RX_TPA_END_CMPL_FLAGS_PLACEMENT_LAST \
1534 RX_TPA_END_CMPL_FLAGS_PLACEMENT_GRO_HDS
1536 #define RX_TPA_END_CMPL_FLAGS_UNUSED_MASK UINT32_C(0xc00)
1537 #define RX_TPA_END_CMPL_FLAGS_UNUSED_SFT 10
1539 * This value indicates what the inner packet determined for the
1540 * packet was. - 2 TCP Packet Indicates that the packet was IP
1541 * and TCP. This indicates that the ip_cs field is valid and
1542 * that the tcp_udp_cs field is valid and contains the TCP
1543 * checksum. This also indicates that the payload_offset field
1546 #define RX_TPA_END_CMPL_FLAGS_ITYPE_MASK UINT32_C(0xf000)
1547 #define RX_TPA_END_CMPL_FLAGS_ITYPE_SFT 12
1548 #define RX_TPA_END_CMPL_FLAGS_MASK UINT32_C(0xffc0)
1549 #define RX_TPA_END_CMPL_FLAGS_SFT 6
1552 * This value is zero for TPA End completions. There is no data
1553 * in the buffer that corresponds to the opaque value in this
1558 * This is a copy of the opaque field from the RX BD this
1559 * completion corresponds to.
1561 uint8_t agg_bufs_v1;
1562 /* unused1 is 1 b */
1564 * This value is written by the NIC such that it will be
1565 * different for each pass through the completion queue. The
1566 * even passes will write 1. The odd passes will write 0.
1568 #define RX_TPA_END_CMPL_V1 UINT32_C(0x1)
1570 * This value is the number of aggregation buffers that follow
1571 * this entry in the completion ring that are a part of this
1572 * aggregation packet. If the value is zero, then the packet is
1573 * completely contained in the buffer space provided in the
1574 * aggregation start completion.
1576 #define RX_TPA_END_CMPL_AGG_BUFS_MASK UINT32_C(0x7e)
1577 #define RX_TPA_END_CMPL_AGG_BUFS_SFT 1
1578 /* unused1 is 1 b */
1580 /* This value is the number of segments in the TPA operation. */
1581 uint8_t payload_offset;
1583 * This value indicates the offset in bytes from the beginning
1584 * of the packet where the inner payload starts. This value is
1585 * valid for TCP, UDP, FCoE, and RoCE packets. A value of zero
1586 * indicates an offset of 256 bytes.
1590 * This is the aggregation ID that the completion is associated
1591 * with. Use this number to correlate the TPA start completion
1592 * with the TPA end completion.
1594 /* unused2 is 1 b */
1596 * This is the aggregation ID that the completion is associated
1597 * with. Use this number to correlate the TPA start completion
1598 * with the TPA end completion.
1600 #define RX_TPA_END_CMPL_AGG_ID_MASK UINT32_C(0xfe)
1601 #define RX_TPA_END_CMPL_AGG_ID_SFT 1
1604 * For non-GRO packets, this value is the timestamp delta
1605 * between earliest and latest timestamp values for TPA packet.
1606 * If packets were not time stamped, then delta will be zero.
1607 * For GRO packets, this field is zero except for the following
1608 * sub-fields. - tsdelta[31] Timestamp present indication. When
1609 * '0', no Timestamp option is in the packet. When '1', then a
1610 * Timestamp option is present in the packet.
1612 } __attribute__((packed));
1614 /* last 16 bytes of RX TPA End Completion Record */
1615 struct rx_tpa_end_cmpl_hi {
1616 uint32_t tpa_dup_acks;
1617 /* unused3 is 28 b */
1619 * This value is the number of duplicate ACKs that have been
1620 * received as part of the TPA operation.
1622 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_MASK UINT32_C(0xf)
1623 #define RX_TPA_END_CMPL_TPA_DUP_ACKS_SFT 0
1624 /* unused3 is 28 b */
1625 uint16_t tpa_seg_len;
1627 * This value is the valid when TPA completion is active. It
1628 * indicates the length of the longest segment of the TPA
1629 * operation for LRO mode and the length of the first segment in
1630 * GRO mode. This value may be used by GRO software to re-
1631 * construct the original packet stream from the TPA packet.
1632 * This is the length of all but the last segment for GRO. In
1633 * LRO mode this value may be used to indicate MSS size to the
1637 /* unused4 is 16 b */
1640 * This value is written by the NIC such that it will be
1641 * different for each pass through the completion queue. The
1642 * even passes will write 1. The odd passes will write 0.
1644 #define RX_TPA_END_CMPL_V2 UINT32_C(0x1)
1646 * This error indicates that there was some sort of problem with
1647 * the BDs for the packet that was found after part of the
1648 * packet was already placed. The packet should be treated as
1651 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_MASK UINT32_C(0xe)
1652 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_SFT 1
1654 * This error occurs when there is a fatal HW
1655 * problem in the chip only. It indicates that
1656 * there were not BDs on chip but that there was
1657 * adequate reservation. provided by the TPA
1660 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_NOT_ON_CHIP \
1661 (UINT32_C(0x2) << 1)
1663 * This error occurs when TPA block was not
1664 * configured to reserve adequate BDs for TPA
1665 * operations on this RX ring. All data for the
1666 * TPA operation was not placed. This error can
1667 * also be generated when the number of segments
1668 * is not programmed correctly in TPA and the 33
1669 * total aggregation buffers allowed for the TPA
1670 * operation has been exceeded.
1672 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR \
1673 (UINT32_C(0x4) << 1)
1674 #define RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_LAST \
1675 RX_TPA_END_CMPL_ERRORS_BUFFER_ERROR_RSV_ERROR
1676 #define RX_TPA_END_CMPL_ERRORS_MASK UINT32_C(0xfffe)
1677 #define RX_TPA_END_CMPL_ERRORS_SFT 1
1679 /* unused5 is 16 b */
1680 uint32_t start_opaque;
1682 * This is the opaque value that was completed for the TPA start
1683 * completion that corresponds to this TPA end completion.
1685 } __attribute__((packed));
1687 /* HWRM Forwarded Request (16 bytes) */
1688 struct hwrm_fwd_req_cmpl {
1689 uint16_t req_len_type;
1690 /* Length of forwarded request in bytes. */
1692 * This field indicates the exact type of the completion. By
1693 * convention, the LSB identifies the length of the record in
1694 * 16B units. Even values indicate 16B records. Odd values
1695 * indicate 32B records.
1697 #define HWRM_FWD_INPUT_CMPL_TYPE_MASK UINT32_C(0x3f)
1698 #define HWRM_FWD_INPUT_CMPL_TYPE_SFT 0
1699 /* Forwarded HWRM Request */
1700 #define HWRM_FWD_INPUT_CMPL_TYPE_HWRM_FWD_INPUT UINT32_C(0x22)
1701 /* Length of forwarded request in bytes. */
1702 #define HWRM_FWD_REQ_CMPL_REQ_LEN_MASK UINT32_C(0xffc0)
1703 #define HWRM_FWD_REQ_CMPL_REQ_LEN_SFT 6
1706 * Source ID of this request. Typically used in forwarding
1707 * requests and responses. 0x0 - 0xFFF8 - Used for function ids
1708 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
1712 /* unused1 is 32 b */
1713 uint32_t req_buf_addr_v[2];
1714 /* Address of forwarded request. */
1716 * This value is written by the NIC such that it will be
1717 * different for each pass through the completion queue. The
1718 * even passes will write 1. The odd passes will write 0.
1720 #define HWRM_FWD_INPUT_CMPL_V UINT32_C(0x1)
1721 /* Address of forwarded request. */
1722 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_MASK UINT32_C(0xfffffffe)
1723 #define HWRM_FWD_REQ_CMPL_REQ_BUF_ADDR_SFT 1
1724 } __attribute__((packed));
1726 /* HWRM Asynchronous Event Completion Record (16 bytes) */
1727 struct hwrm_async_event_cmpl {
1729 /* unused1 is 10 b */
1731 * This field indicates the exact type of the completion. By
1732 * convention, the LSB identifies the length of the record in
1733 * 16B units. Even values indicate 16B records. Odd values
1734 * indicate 32B records.
1736 #define HWRM_ASYNC_EVENT_CMPL_TYPE_MASK UINT32_C(0x3f)
1737 #define HWRM_ASYNC_EVENT_CMPL_TYPE_SFT 0
1738 /* HWRM Asynchronous Event Information */
1739 #define HWRM_ASYNC_EVENT_CMPL_TYPE_HWRM_ASYNC_EVENT UINT32_C(0x2e)
1740 /* unused1 is 10 b */
1742 /* Identifiers of events. */
1743 /* Link status changed */
1744 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE UINT32_C(0x0)
1745 /* Link MTU changed */
1746 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE UINT32_C(0x1)
1747 /* Link speed changed */
1748 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE UINT32_C(0x2)
1749 /* DCB Configuration changed */
1750 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE UINT32_C(0x3)
1751 /* Port connection not allowed */
1752 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED UINT32_C(0x4)
1753 /* Link speed configuration was not allowed */
1754 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED \
1756 /* Link speed configuration change */
1757 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE UINT32_C(0x6)
1758 /* Port PHY configuration change */
1759 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE UINT32_C(0x7)
1760 /* Function driver unloaded */
1761 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD UINT32_C(0x10)
1762 /* Function driver loaded */
1763 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD UINT32_C(0x11)
1764 /* Function FLR related processing has completed */
1765 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_FLR_PROC_CMPLT UINT32_C(0x12)
1766 /* PF driver unloaded */
1767 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD UINT32_C(0x20)
1768 /* PF driver loaded */
1769 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD UINT32_C(0x21)
1770 /* VF Function Level Reset (FLR) */
1771 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR UINT32_C(0x30)
1772 /* VF MAC Address Change */
1773 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE UINT32_C(0x31)
1774 /* PF-VF communication channel status change. */
1775 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE \
1777 /* VF Configuration Change */
1778 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE UINT32_C(0x33)
1779 /* LLFC/PFC Configuration Change */
1780 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LLFC_PFC_CHANGE UINT32_C(0x34)
1782 #define HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR UINT32_C(0xff)
1783 uint32_t event_data2;
1784 /* Event specific data */
1788 * This value is written by the NIC such that it will be
1789 * different for each pass through the completion queue. The
1790 * even passes will write 1. The odd passes will write 0.
1792 #define HWRM_ASYNC_EVENT_CMPL_V UINT32_C(0x1)
1794 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_MASK UINT32_C(0xfe)
1795 #define HWRM_ASYNC_EVENT_CMPL_OPAQUE_SFT 1
1796 uint8_t timestamp_lo;
1797 /* 8-lsb timestamp from POR (100-msec resolution) */
1798 uint16_t timestamp_hi;
1799 /* 16-lsb timestamp from POR (100-msec resolution) */
1800 uint32_t event_data1;
1801 /* Event specific data */
1802 } __attribute__((packed));
1806 * Description: This function is called by a driver to determine the HWRM
1807 * interface version supported by the HWRM firmware, the version of HWRM
1808 * firmware implementation, the name of HWRM firmware, the versions of other
1809 * embedded firmwares, and the names of other embedded firmwares, etc. Any
1810 * interface or firmware version with major = 0, minor = 0, and update = 0 shall
1811 * be considered an invalid version.
1813 /* Input (24 bytes) */
1814 struct hwrm_ver_get_input {
1817 * This value indicates what type of request this is. The format
1818 * for the rest of the command is determined by this field.
1822 * This value indicates the what completion ring the request
1823 * will be optionally completed on. If the value is -1, then no
1824 * CR completion will be generated. Any other value must be a
1825 * valid CR ring_id value for this function.
1828 /* This value indicates the command sequence number. */
1831 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
1832 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
1837 * This is the host address where the response will be written
1838 * when the request is complete. This area must be 16B aligned
1839 * and must be cleared to zero before the request is made.
1841 uint8_t hwrm_intf_maj;
1843 * This field represents the major version of HWRM interface
1844 * specification supported by the driver HWRM implementation.
1845 * The interface major version is intended to change only when
1846 * non backward compatible changes are made to the HWRM
1847 * interface specification.
1849 uint8_t hwrm_intf_min;
1851 * This field represents the minor version of HWRM interface
1852 * specification supported by the driver HWRM implementation. A
1853 * change in interface minor version is used to reflect
1854 * significant backward compatible modification to HWRM
1855 * interface specification. This can be due to addition or
1856 * removal of functionality. HWRM interface specifications with
1857 * the same major version but different minor versions are
1860 uint8_t hwrm_intf_upd;
1862 * This field represents the update version of HWRM interface
1863 * specification supported by the driver HWRM implementation.
1864 * The interface update version is used to reflect minor changes
1865 * or bug fixes to a released HWRM interface specification.
1867 uint8_t unused_0[5];
1868 } __attribute__((packed));
1870 /* Output (128 bytes) */
1871 struct hwrm_ver_get_output {
1872 uint16_t error_code;
1874 * Pass/Fail or error type Note: receiver to verify the in
1875 * parameters, and fail the call with an error when appropriate
1878 /* This field returns the type of original request. */
1880 /* This field provides original sequence number of the command. */
1883 * This field is the length of the response in bytes. The last
1884 * byte of the response is a valid flag that will read as '1'
1885 * when the command has been completely written to memory.
1887 uint8_t hwrm_intf_maj;
1889 * This field represents the major version of HWRM interface
1890 * specification supported by the HWRM implementation. The
1891 * interface major version is intended to change only when non
1892 * backward compatible changes are made to the HWRM interface
1893 * specification. A HWRM implementation that is compliant with
1894 * this specification shall provide value of 1 in this field.
1896 uint8_t hwrm_intf_min;
1898 * This field represents the minor version of HWRM interface
1899 * specification supported by the HWRM implementation. A change
1900 * in interface minor version is used to reflect significant
1901 * backward compatible modification to HWRM interface
1902 * specification. This can be due to addition or removal of
1903 * functionality. HWRM interface specifications with the same
1904 * major version but different minor versions are compatible. A
1905 * HWRM implementation that is compliant with this specification
1906 * shall provide value of 2 in this field.
1908 uint8_t hwrm_intf_upd;
1910 * This field represents the update version of HWRM interface
1911 * specification supported by the HWRM implementation. The
1912 * interface update version is used to reflect minor changes or
1913 * bug fixes to a released HWRM interface specification. A HWRM
1914 * implementation that is compliant with this specification
1915 * shall provide value of 2 in this field.
1917 uint8_t hwrm_intf_rsvd;
1918 uint8_t hwrm_fw_maj;
1920 * This field represents the major version of HWRM firmware. A
1921 * change in firmware major version represents a major firmware
1924 uint8_t hwrm_fw_min;
1926 * This field represents the minor version of HWRM firmware. A
1927 * change in firmware minor version represents significant
1928 * firmware functionality changes.
1930 uint8_t hwrm_fw_bld;
1932 * This field represents the build version of HWRM firmware. A
1933 * change in firmware build version represents bug fixes to a
1934 * released firmware.
1936 uint8_t hwrm_fw_rsvd;
1938 * This field is a reserved field. This field can be used to
1939 * represent firmware branches or customer specific releases
1940 * tied to a specific (major,minor,update) version of the HWRM
1943 uint8_t mgmt_fw_maj;
1945 * This field represents the major version of mgmt firmware. A
1946 * change in major version represents a major release.
1948 uint8_t mgmt_fw_min;
1950 * This field represents the minor version of mgmt firmware. A
1951 * change in minor version represents significant functionality
1954 uint8_t mgmt_fw_bld;
1956 * This field represents the build version of mgmt firmware. A
1957 * change in update version represents bug fixes.
1959 uint8_t mgmt_fw_rsvd;
1961 * This field is a reserved field. This field can be used to
1962 * represent firmware branches or customer specific releases
1963 * tied to a specific (major,minor,update) version
1965 uint8_t netctrl_fw_maj;
1967 * This field represents the major version of network control
1968 * firmware. A change in major version represents a major
1971 uint8_t netctrl_fw_min;
1973 * This field represents the minor version of network control
1974 * firmware. A change in minor version represents significant
1975 * functionality changes.
1977 uint8_t netctrl_fw_bld;
1979 * This field represents the build version of network control
1980 * firmware. A change in update version represents bug fixes.
1982 uint8_t netctrl_fw_rsvd;
1984 * This field is a reserved field. This field can be used to
1985 * represent firmware branches or customer specific releases
1986 * tied to a specific (major,minor,update) version
1988 uint32_t dev_caps_cfg;
1990 * This field is used to indicate device's capabilities and
1994 * If set to 1, then secure firmware update behavior is
1995 * supported. If set to 0, then secure firmware update behavior
1998 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SECURE_FW_UPD_SUPPORTED \
2001 * If set to 1, then firmware based DCBX agent is supported. If
2002 * set to 0, then firmware based DCBX agent capability is not
2003 * supported on this device.
2005 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_FW_DCBX_AGENT_SUPPORTED \
2008 * If set to 1, then HWRM short command format is supported. If
2009 * set to 0, then HWRM short command format is not supported.
2011 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_SUPPORTED \
2014 * If set to 1, then HWRM short command format is required. If
2015 * set to 0, then HWRM short command format is not required.
2017 #define HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_INPUTUIRED \
2019 uint8_t roce_fw_maj;
2021 * This field represents the major version of RoCE firmware. A
2022 * change in major version represents a major release.
2024 uint8_t roce_fw_min;
2026 * This field represents the minor version of RoCE firmware. A
2027 * change in minor version represents significant functionality
2030 uint8_t roce_fw_bld;
2032 * This field represents the build version of RoCE firmware. A
2033 * change in update version represents bug fixes.
2035 uint8_t roce_fw_rsvd;
2037 * This field is a reserved field. This field can be used to
2038 * represent firmware branches or customer specific releases
2039 * tied to a specific (major,minor,update) version
2041 char hwrm_fw_name[16];
2043 * This field represents the name of HWRM FW (ASCII chars with
2046 char mgmt_fw_name[16];
2048 * This field represents the name of mgmt FW (ASCII chars with
2051 char netctrl_fw_name[16];
2053 * This field represents the name of network control firmware
2054 * (ASCII chars with NULL at the end).
2056 uint32_t reserved2[4];
2058 * This field is reserved for future use. The responder should
2059 * set it to 0. The requester should ignore this field.
2061 char roce_fw_name[16];
2063 * This field represents the name of RoCE FW (ASCII chars with
2067 /* This field returns the chip number. */
2069 /* This field returns the revision of chip. */
2071 /* This field returns the chip metal number. */
2072 uint8_t chip_bond_id;
2073 /* This field returns the bond id of the chip. */
2074 uint8_t chip_platform_type;
2076 * This value indicates the type of platform used for chip
2080 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_ASIC UINT32_C(0x0)
2081 /* FPGA platform of the chip. */
2082 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_FPGA UINT32_C(0x1)
2083 /* Palladium platform of the chip. */
2084 #define HWRM_VER_GET_OUTPUT_CHIP_PLATFORM_TYPE_PALLADIUM UINT32_C(0x2)
2085 uint16_t max_req_win_len;
2087 * This field returns the maximum value of request window that
2088 * is supported by the HWRM. The request window is mapped into
2089 * device address space using MMIO.
2091 uint16_t max_resp_len;
2092 /* This field returns the maximum value of response buffer in bytes. */
2093 uint16_t def_req_timeout;
2095 * This field returns the default request timeout value in
2098 uint8_t init_pending;
2100 * This field will indicate if any subsystems is not fully
2104 * If set to 1, device is not ready. If set to 0, device is
2105 * ready to accept all HWRM commands.
2107 #define HWRM_VER_GET_OUTPUT_INIT_PENDING_DEV_NOT_RDY UINT32_C(0x1)
2112 * This field is used in Output records to indicate that the
2113 * output is completely written to RAM. This field should be
2114 * read as '1' to indicate that the output has been completely
2115 * written. When writing a command completion or response to an
2116 * internal processor, the order of writes has to be such that
2117 * this field is written last.
2119 } __attribute__((packed));
2121 /* hwrm_func_reset */
2123 * Description: This command resets a hardware function (PCIe function) and
2124 * frees any resources used by the function. This command shall be initiated by
2125 * the driver after an FLR has occurred to prepare the function for re-use. This
2126 * command may also be initiated by a driver prior to doing it's own
2127 * configuration. This command puts the function into the reset state. In the
2128 * reset state, global and port related features of the chip are not available.
2131 * Note: This command will reset a function that has already been disabled or
2132 * idled. The command returns all the resources owned by the function so a new
2133 * driver may allocate and configure resources normally.
2135 /* Input (24 bytes) */
2136 struct hwrm_func_reset_input {
2139 * This value indicates what type of request this is. The format
2140 * for the rest of the command is determined by this field.
2144 * This value indicates the what completion ring the request
2145 * will be optionally completed on. If the value is -1, then no
2146 * CR completion will be generated. Any other value must be a
2147 * valid CR ring_id value for this function.
2150 /* This value indicates the command sequence number. */
2153 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2154 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2159 * This is the host address where the response will be written
2160 * when the request is complete. This area must be 16B aligned
2161 * and must be cleared to zero before the request is made.
2164 /* This bit must be '1' for the vf_id_valid field to be configured. */
2165 #define HWRM_FUNC_RESET_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
2168 * The ID of the VF that this PF is trying to reset. Only the
2169 * parent PF shall be allowed to reset a child VF. A parent PF
2170 * driver shall use this field only when a specific child VF is
2171 * requested to be reset.
2173 uint8_t func_reset_level;
2174 /* This value indicates the level of a function reset. */
2176 * Reset the caller function and its children
2177 * VFs (if any). If no children functions exist,
2178 * then reset the caller function only.
2180 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETALL UINT32_C(0x0)
2181 /* Reset the caller function only */
2182 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETME UINT32_C(0x1)
2184 * Reset all children VFs of the caller function
2185 * driver if the caller is a PF driver. It is an
2186 * error to specify this level by a VF driver.
2187 * It is an error to specify this level by a PF
2188 * driver with no children VFs.
2190 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETCHILDREN \
2193 * Reset a specific VF of the caller function
2194 * driver if the caller is the parent PF driver.
2195 * It is an error to specify this level by a VF
2196 * driver. It is an error to specify this level
2197 * by a PF driver that is not the parent of the
2198 * VF that is being requested to reset.
2200 #define HWRM_FUNC_RESET_INPUT_FUNC_RESET_LEVEL_RESETVF UINT32_C(0x3)
2202 } __attribute__((packed));
2204 /* Output (16 bytes) */
2205 struct hwrm_func_reset_output {
2206 uint16_t error_code;
2208 * Pass/Fail or error type Note: receiver to verify the in
2209 * parameters, and fail the call with an error when appropriate
2212 /* This field returns the type of original request. */
2214 /* This field provides original sequence number of the command. */
2217 * This field is the length of the response in bytes. The last
2218 * byte of the response is a valid flag that will read as '1'
2219 * when the command has been completely written to memory.
2227 * This field is used in Output records to indicate that the
2228 * output is completely written to RAM. This field should be
2229 * read as '1' to indicate that the output has been completely
2230 * written. When writing a command completion or response to an
2231 * internal processor, the order of writes has to be such that
2232 * this field is written last.
2234 } __attribute__((packed));
2236 /* hwrm_func_vf_cfg */
2238 * Description: This command allows configuration of a VF by its driver. If this
2239 * function is called by a PF driver, then the HWRM shall fail this command. If
2240 * guest VLAN and/or MAC address are provided in this command, then the HWRM
2241 * shall set up appropriate MAC/VLAN filters for the VF that is being
2242 * configured. A VF driver should set VF MTU/MRU using this command prior to
2243 * allocating RX VNICs or TX rings for the corresponding VF.
2245 /* Input (32 bytes) */
2246 struct hwrm_func_vf_cfg_input {
2249 * This value indicates what type of request this is. The format for the
2250 * rest of the command is determined by this field.
2254 * This value indicates the what completion ring the request will be
2255 * optionally completed on. If the value is -1, then no CR completion
2256 * will be generated. Any other value must be a valid CR ring_id value
2257 * for this function.
2260 /* This value indicates the command sequence number. */
2263 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
2264 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
2268 * This is the host address where the response will be written when the
2269 * request is complete. This area must be 16B aligned and must be
2270 * cleared to zero before the request is made.
2273 /* This bit must be '1' for the mtu field to be configured. */
2274 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
2275 /* This bit must be '1' for the guest_vlan field to be configured. */
2276 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_GUEST_VLAN UINT32_C(0x2)
2278 * This bit must be '1' for the async_event_cr field to be configured.
2280 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4)
2281 /* This bit must be '1' for the dflt_mac_addr field to be configured. */
2282 #define HWRM_FUNC_VF_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x8)
2285 * The maximum transmission unit requested on the function. The HWRM
2286 * should make sure that the mtu of the function does not exceed the mtu
2287 * of the physical port that this function is associated with. In
2288 * addition to requesting mtu per function, it is possible to configure
2289 * mtu per transmit ring. By default, the mtu of each transmit ring
2290 * associated with a function is equal to the mtu of the function. The
2291 * HWRM should make sure that the mtu of each transmit ring that is
2292 * assigned to a function has a valid mtu.
2294 uint16_t guest_vlan;
2296 * The guest VLAN for the function being configured. This field's format
2297 * is same as 802.1Q Tag's Tag Control Information (TCI) format that
2298 * includes both Priority Code Point (PCP) and VLAN Identifier (VID).
2300 uint16_t async_event_cr;
2302 * ID of the target completion ring for receiving asynchronous event
2303 * completions. If this field is not valid, then the HWRM shall use the
2304 * default completion ring of the function that is being configured as
2305 * the target completion ring for providing any asynchronous event
2306 * completions for that function. If this field is valid, then the HWRM
2307 * shall use the completion ring identified by this ID as the target
2308 * completion ring for providing any asynchronous event completions for
2309 * the function that is being configured.
2311 uint8_t dflt_mac_addr[6];
2313 * This value is the current MAC address requested by the VF driver to
2314 * be configured on this VF. A value of 00-00-00-00-00-00 indicates no
2315 * MAC address configuration is requested by the VF driver. The parent
2316 * PF driver may reject or overwrite this MAC address.
2318 } __attribute__((packed));
2320 /* Output (16 bytes) */
2322 struct hwrm_func_vf_cfg_output {
2323 uint16_t error_code;
2325 * Pass/Fail or error type Note: receiver to verify the in parameters,
2326 * and fail the call with an error when appropriate
2329 /* This field returns the type of original request. */
2331 /* This field provides original sequence number of the command. */
2334 * This field is the length of the response in bytes. The last
2335 * byte of the response is a valid flag that will read as '1'
2336 * when the command has been completely written to memory.
2344 * This field is used in Output records to indicate that the output is
2345 * completely written to RAM. This field should be read as '1' to
2346 * indicate that the output has been completely written. When writing a
2347 * command completion or response to an internal processor, the order of
2348 * writes has to be such that this field is written last.
2350 } __attribute__((packed));
2352 /* hwrm_func_qcaps */
2354 * Description: This command returns capabilities of a function. The input FID
2355 * value is used to indicate what function is being queried. This allows a
2356 * physical function driver to query virtual functions that are children of the
2357 * physical function. The output FID value is needed to configure Rings and
2358 * MSI-X vectors so their DMA operations appear correctly on the PCI bus.
2360 /* Input (24 bytes) */
2361 struct hwrm_func_qcaps_input {
2364 * This value indicates what type of request this is. The format
2365 * for the rest of the command is determined by this field.
2369 * This value indicates the what completion ring the request
2370 * will be optionally completed on. If the value is -1, then no
2371 * CR completion will be generated. Any other value must be a
2372 * valid CR ring_id value for this function.
2375 /* This value indicates the command sequence number. */
2378 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2379 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2384 * This is the host address where the response will be written
2385 * when the request is complete. This area must be 16B aligned
2386 * and must be cleared to zero before the request is made.
2390 * Function ID of the function that is being queried. 0xFF...
2391 * (All Fs) if the query is for the requesting function.
2393 uint16_t unused_0[3];
2394 } __attribute__((packed));
2396 /* Output (80 bytes) */
2397 struct hwrm_func_qcaps_output {
2398 uint16_t error_code;
2400 * Pass/Fail or error type Note: receiver to verify the in
2401 * parameters, and fail the call with an error when appropriate
2404 /* This field returns the type of original request. */
2406 /* This field provides original sequence number of the command. */
2409 * This field is the length of the response in bytes. The last
2410 * byte of the response is a valid flag that will read as '1'
2411 * when the command has been completely written to memory.
2415 * FID value. This value is used to identify operations on the
2416 * PCI bus as belonging to a particular PCI function.
2420 * Port ID of port that this function is associated with. Valid
2421 * only for the PF. 0xFF... (All Fs) if this function is not
2422 * associated with any port. 0xFF... (All Fs) if this function
2423 * is called from a VF.
2426 /* If 1, then Push mode is supported on this function. */
2427 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PUSH_MODE_SUPPORTED UINT32_C(0x1)
2429 * If 1, then the global MSI-X auto-masking is enabled for the
2432 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_GLOBAL_MSIX_AUTOMASKING \
2435 * If 1, then the Precision Time Protocol (PTP) processing is
2436 * supported on this function. The HWRM should enable PTP on
2437 * only a single Physical Function (PF) per port.
2439 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_PTP_SUPPORTED UINT32_C(0x4)
2441 * If 1, then RDMA over Converged Ethernet (RoCE) v1 is
2442 * supported on this function.
2444 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V1_SUPPORTED UINT32_C(0x8)
2446 * If 1, then RDMA over Converged Ethernet (RoCE) v2 is
2447 * supported on this function.
2449 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_ROCE_V2_SUPPORTED UINT32_C(0x10)
2451 * If 1, then control and configuration of WoL magic packet are
2452 * supported on this function.
2454 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_MAGICPKT_SUPPORTED \
2457 * If 1, then control and configuration of bitmap pattern packet
2458 * are supported on this function.
2460 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_WOL_BMP_SUPPORTED UINT32_C(0x40)
2462 * If set to 1, then the control and configuration of rate limit
2463 * of an allocated TX ring on the queried function is supported.
2465 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_RING_RL_SUPPORTED UINT32_C(0x80)
2467 * If 1, then control and configuration of minimum and maximum
2468 * bandwidths are supported on the queried function.
2470 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_TX_BW_CFG_SUPPORTED UINT32_C(0x100)
2472 * If the query is for a VF, then this flag shall be ignored. If
2473 * this query is for a PF and this flag is set to 1, then the PF
2474 * has the capability to set the rate limits on the TX rings of
2475 * its children VFs. If this query is for a PF and this flag is
2476 * set to 0, then the PF does not have the capability to set the
2477 * rate limits on the TX rings of its children VFs.
2479 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_TX_RING_RL_SUPPORTED \
2482 * If the query is for a VF, then this flag shall be ignored. If
2483 * this query is for a PF and this flag is set to 1, then the PF
2484 * has the capability to set the minimum and/or maximum
2485 * bandwidths for its children VFs. If this query is for a PF
2486 * and this flag is set to 0, then the PF does not have the
2487 * capability to set the minimum or maximum bandwidths for its
2490 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_VF_BW_CFG_SUPPORTED UINT32_C(0x400)
2492 * Standard TX Ring mode is used for the allocation of TX ring
2493 * and underlying scheduling resources that allow bandwidth
2494 * reservation and limit settings on the queried function. If
2495 * set to 1, then standard TX ring mode is supported on the
2496 * queried function. If set to 0, then standard TX ring mode is
2497 * not available on the queried function.
2499 #define HWRM_FUNC_QCAPS_OUTPUT_FLAGS_STD_TX_RING_MODE_SUPPORTED \
2501 uint8_t mac_address[6];
2503 * This value is current MAC address configured for this
2504 * function. A value of 00-00-00-00-00-00 indicates no MAC
2505 * address is currently configured.
2507 uint16_t max_rsscos_ctx;
2509 * The maximum number of RSS/COS contexts that can be allocated
2512 uint16_t max_cmpl_rings;
2514 * The maximum number of completion rings that can be allocated
2517 uint16_t max_tx_rings;
2519 * The maximum number of transmit rings that can be allocated to
2522 uint16_t max_rx_rings;
2524 * The maximum number of receive rings that can be allocated to
2527 uint16_t max_l2_ctxs;
2529 * The maximum number of L2 contexts that can be allocated to
2534 * The maximum number of VNICs that can be allocated to the
2537 uint16_t first_vf_id;
2539 * The identifier for the first VF enabled on a PF. This is
2540 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2541 * this command is called on a PF with SR-IOV disabled or on a
2546 * The maximum number of VFs that can be allocated to the
2547 * function. This is valid only on the PF with SR-IOV enabled.
2548 * 0xFF... (All Fs) if this command is called on a PF with SR-
2549 * IOV disabled or on a VF.
2551 uint16_t max_stat_ctx;
2553 * The maximum number of statistic contexts that can be
2554 * allocated to the function.
2556 uint32_t max_encap_records;
2558 * The maximum number of Encapsulation records that can be
2559 * offloaded by this function.
2561 uint32_t max_decap_records;
2563 * The maximum number of decapsulation records that can be
2564 * offloaded by this function.
2566 uint32_t max_tx_em_flows;
2568 * The maximum number of Exact Match (EM) flows that can be
2569 * offloaded by this function on the TX side.
2571 uint32_t max_tx_wm_flows;
2573 * The maximum number of Wildcard Match (WM) flows that can be
2574 * offloaded by this function on the TX side.
2576 uint32_t max_rx_em_flows;
2578 * The maximum number of Exact Match (EM) flows that can be
2579 * offloaded by this function on the RX side.
2581 uint32_t max_rx_wm_flows;
2583 * The maximum number of Wildcard Match (WM) flows that can be
2584 * offloaded by this function on the RX side.
2586 uint32_t max_mcast_filters;
2588 * The maximum number of multicast filters that can be supported
2589 * by this function on the RX side.
2591 uint32_t max_flow_id;
2593 * The maximum value of flow_id that can be supported in
2594 * completion records.
2596 uint32_t max_hw_ring_grps;
2598 * The maximum number of HW ring groups that can be supported on
2601 uint16_t max_sp_tx_rings;
2603 * The maximum number of strict priority transmit rings that can
2604 * be allocated to the function. This number indicates the
2605 * maximum number of TX rings that can be assigned strict
2606 * priorities out of the maximum number of TX rings that can be
2607 * allocated (max_tx_rings) to the function.
2612 * This field is used in Output records to indicate that the
2613 * output is completely written to RAM. This field should be
2614 * read as '1' to indicate that the output has been completely
2615 * written. When writing a command completion or response to an
2616 * internal processor, the order of writes has to be such that
2617 * this field is written last.
2619 } __attribute__((packed));
2621 /* hwrm_func_qcfg */
2623 * Description: This command returns the current configuration of a function.
2624 * The input FID value is used to indicate what function is being queried. This
2625 * allows a physical function driver to query virtual functions that are
2626 * children of the physical function. The output FID value is needed to
2627 * configure Rings and MSI-X vectors so their DMA operations appear correctly on
2628 * the PCI bus. This command should be called by every driver after
2629 * 'hwrm_func_cfg' to get the actual number of resources allocated by the HWRM.
2630 * The values returned by hwrm_func_qcfg are the values the driver shall use.
2631 * These values may be different than what was originally requested in the
2632 * 'hwrm_func_cfg' command.
2634 /* Input (24 bytes) */
2635 struct hwrm_func_qcfg_input {
2638 * This value indicates what type of request this is. The format
2639 * for the rest of the command is determined by this field.
2643 * This value indicates the what completion ring the request
2644 * will be optionally completed on. If the value is -1, then no
2645 * CR completion will be generated. Any other value must be a
2646 * valid CR ring_id value for this function.
2649 /* This value indicates the command sequence number. */
2652 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2653 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
2658 * This is the host address where the response will be written
2659 * when the request is complete. This area must be 16B aligned
2660 * and must be cleared to zero before the request is made.
2664 * Function ID of the function that is being queried. 0xFF...
2665 * (All Fs) if the query is for the requesting function.
2667 uint16_t unused_0[3];
2668 } __attribute__((packed));
2670 /* Output (72 bytes) */
2671 struct hwrm_func_qcfg_output {
2672 uint16_t error_code;
2674 * Pass/Fail or error type Note: receiver to verify the in
2675 * parameters, and fail the call with an error when appropriate
2678 /* This field returns the type of original request. */
2680 /* This field provides original sequence number of the command. */
2683 * This field is the length of the response in bytes. The last
2684 * byte of the response is a valid flag that will read as '1'
2685 * when the command has been completely written to memory.
2689 * FID value. This value is used to identify operations on the
2690 * PCI bus as belonging to a particular PCI function.
2694 * Port ID of port that this function is associated with.
2695 * 0xFF... (All Fs) if this function is not associated with any
2700 * This value is the current VLAN setting for this function. The
2701 * value of 0 for this field indicates no priority tagging or
2702 * VLAN is used. This field's format is same as 802.1Q Tag's Tag
2703 * Control Information (TCI) format that includes both Priority
2704 * Code Point (PCP) and VLAN Identifier (VID).
2708 * If 1, then magic packet based Out-Of-Box WoL is enabled on
2709 * the port associated with this function.
2711 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_MAGICPKT_ENABLED \
2714 * If 1, then bitmap pattern based Out-Of-Box WoL packet is
2715 * enabled on the port associated with this function.
2717 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_OOB_WOL_BMP_ENABLED UINT32_C(0x2)
2719 * If set to 1, then FW based DCBX agent is enabled and running
2720 * on the port associated with this function. If set to 0, then
2721 * DCBX agent is not running in the firmware.
2723 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_DCBX_AGENT_ENABLED \
2726 * Standard TX Ring mode is used for the allocation of TX ring
2727 * and underlying scheduling resources that allow bandwidth
2728 * reservation and limit settings on the queried function. If
2729 * set to 1, then standard TX ring mode is enabled on the
2730 * queried function. If set to 0, then the standard TX ring mode
2731 * is disabled on the queried function. In this extended TX ring
2732 * resource mode, the minimum and maximum bandwidth settings are
2733 * not supported to allow the allocation of TX rings to span
2734 * multiple scheduler nodes.
2736 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_STD_TX_RING_MODE_ENABLED \
2739 * If set to 1 then FW based LLDP agent is enabled and running
2740 * on the port associated with this function. If set to 0 then
2741 * the LLDP agent is not running in the firmware.
2743 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_FW_LLDP_AGENT_ENABLED UINT32_C(0x10)
2745 * If set to 1, then multi-host mode is active for this
2746 * function. If set to 0, then multi-host mode is inactive for
2747 * this function or not applicable for this device.
2749 #define HWRM_FUNC_QCFG_OUTPUT_FLAGS_MULTI_HOST UINT32_C(0x20)
2750 uint8_t mac_address[6];
2752 * This value is current MAC address configured for this
2753 * function. A value of 00-00-00-00-00-00 indicates no MAC
2754 * address is currently configured.
2758 * This value is current PCI ID of this function. If ARI is
2759 * enabled, then it is Bus Number (8b):Function Number(8b).
2760 * Otherwise, it is Bus Number (8b):Device Number (4b):Function
2763 uint16_t alloc_rsscos_ctx;
2765 * The number of RSS/COS contexts currently allocated to the
2768 uint16_t alloc_cmpl_rings;
2770 * The number of completion rings currently allocated to the
2771 * function. This does not include the rings allocated to any
2772 * children functions if any.
2774 uint16_t alloc_tx_rings;
2776 * The number of transmit rings currently allocated to the
2777 * function. This does not include the rings allocated to any
2778 * children functions if any.
2780 uint16_t alloc_rx_rings;
2782 * The number of receive rings currently allocated to the
2783 * function. This does not include the rings allocated to any
2784 * children functions if any.
2786 uint16_t alloc_l2_ctx;
2787 /* The allocated number of L2 contexts to the function. */
2788 uint16_t alloc_vnics;
2789 /* The allocated number of vnics to the function. */
2792 * The maximum transmission unit of the function. For rings
2793 * allocated on this function, this default value is used if
2794 * ring MTU is not specified.
2798 * The maximum receive unit of the function. For vnics allocated
2799 * on this function, this default value is used if vnic MRU is
2802 uint16_t stat_ctx_id;
2803 /* The statistics context assigned to a function. */
2804 uint8_t port_partition_type;
2806 * The HWRM shall return Unknown value for this field when this
2807 * command is used to query VF's configuration.
2809 /* Single physical function */
2810 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_SPF UINT32_C(0x0)
2811 /* Multiple physical functions */
2812 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_MPFS UINT32_C(0x1)
2813 /* Network Partitioning 1.0 */
2814 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_0 UINT32_C(0x2)
2815 /* Network Partitioning 1.5 */
2816 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR1_5 UINT32_C(0x3)
2817 /* Network Partitioning 2.0 */
2818 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_NPAR2_0 UINT32_C(0x4)
2820 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PARTITION_TYPE_UNKNOWN UINT32_C(0xff)
2821 uint8_t port_pf_cnt;
2823 * This field will indicate number of physical functions on this
2824 * port_partition. HWRM shall return unavail (i.e. value of 0)
2825 * for this field when this command is used to query VF's
2826 * configuration or from older firmware that doesn't support
2829 /* number of PFs is not available */
2830 #define HWRM_FUNC_QCFG_OUTPUT_PORT_PF_CNT_UNAVAIL UINT32_C(0x0)
2831 uint16_t dflt_vnic_id;
2832 /* The default VNIC ID assigned to a function that is being queried. */
2833 uint16_t max_mtu_configured;
2835 * This value specifies the MAX MTU that can be configured by
2836 * host drivers. This 'max_mtu_configure' can be HW max MTU or
2837 * OEM applications specified value. Host drivers can't
2838 * configure the MTU greater than this value. Host drivers
2839 * should read this value prior to configuring the MTU. FW will
2840 * fail the host request with MTU greater than
2841 * 'max_mtu_configured'.
2845 * Minimum BW allocated for this function. The HWRM will
2846 * translate this value into byte counter and time interval used
2847 * for the scheduler inside the device. A value of 0 indicates
2848 * the minimum bandwidth is not configured.
2850 /* The bandwidth value. */
2851 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2852 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_SFT 0
2853 /* The granularity of the value (bits or bytes). */
2854 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE UINT32_C(0x10000000)
2855 /* Value is in bits. */
2856 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2857 /* Value is in bytes. */
2858 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES \
2859 (UINT32_C(0x1) << 28)
2860 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_SCALE_LAST \
2861 FUNC_QCFG_OUTPUT_MIN_BW_SCALE_BYTES
2862 /* bw_value_unit is 3 b */
2863 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MASK \
2864 UINT32_C(0xe0000000)
2865 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
2866 /* Value is in Mb or MB (base 10). */
2867 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
2868 (UINT32_C(0x0) << 29)
2869 /* Value is in Kb or KB (base 10). */
2870 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_KILO \
2871 (UINT32_C(0x2) << 29)
2872 /* Value is in bits or bytes. */
2873 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_BASE \
2874 (UINT32_C(0x4) << 29)
2875 /* Value is in Gb or GB (base 10). */
2876 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
2877 (UINT32_C(0x6) << 29)
2878 /* Value is in 1/100th of a percentage of total bandwidth. */
2879 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
2880 (UINT32_C(0x1) << 29)
2882 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
2883 (UINT32_C(0x7) << 29)
2884 #define HWRM_FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_LAST \
2885 FUNC_QCFG_OUTPUT_MIN_BW_BW_VALUE_UNIT_INVALID
2888 * Maximum BW allocated for this function. The HWRM will
2889 * translate this value into byte counter and time interval used
2890 * for the scheduler inside the device. A value of 0 indicates
2891 * that the maximum bandwidth is not configured.
2893 /* The bandwidth value. */
2894 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
2895 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_SFT 0
2896 /* The granularity of the value (bits or bytes). */
2897 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE UINT32_C(0x10000000)
2898 /* Value is in bits. */
2899 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
2900 /* Value is in bytes. */
2901 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES \
2902 (UINT32_C(0x1) << 28)
2903 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_SCALE_LAST \
2904 FUNC_QCFG_OUTPUT_MAX_BW_SCALE_BYTES
2905 /* bw_value_unit is 3 b */
2906 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MASK \
2907 UINT32_C(0xe0000000)
2908 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
2909 /* Value is in Mb or MB (base 10). */
2910 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
2911 (UINT32_C(0x0) << 29)
2912 /* Value is in Kb or KB (base 10). */
2913 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_KILO \
2914 (UINT32_C(0x2) << 29)
2915 /* Value is in bits or bytes. */
2916 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_BASE \
2917 (UINT32_C(0x4) << 29)
2918 /* Value is in Gb or GB (base 10). */
2919 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
2920 (UINT32_C(0x6) << 29)
2921 /* Value is in 1/100th of a percentage of total bandwidth. */
2922 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
2923 (UINT32_C(0x1) << 29)
2925 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
2926 (UINT32_C(0x7) << 29)
2927 #define HWRM_FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_LAST \
2928 FUNC_QCFG_OUTPUT_MAX_BW_BW_VALUE_UNIT_INVALID
2931 * This value indicates the Edge virtual bridge mode for the
2932 * domain that this function belongs to.
2934 /* No Edge Virtual Bridging (EVB) */
2935 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
2936 /* Virtual Ethernet Bridge (VEB) */
2937 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEB UINT32_C(0x1)
2938 /* Virtual Ethernet Port Aggregator (VEPA) */
2939 #define HWRM_FUNC_QCFG_OUTPUT_EVB_MODE_VEPA UINT32_C(0x2)
2943 * The number of VFs that are allocated to the function. This is
2944 * valid only on the PF with SR-IOV enabled. 0xFF... (All Fs) if
2945 * this command is called on a PF with SR-IOV disabled or on a
2948 uint32_t alloc_mcast_filters;
2950 * The number of allocated multicast filters for this function
2953 uint32_t alloc_hw_ring_grps;
2954 /* The number of allocated HW ring groups for this function. */
2955 uint16_t alloc_sp_tx_rings;
2957 * The number of strict priority transmit rings out of currently
2958 * allocated TX rings to the function (alloc_tx_rings).
2963 * This field is used in Output records to indicate that the
2964 * output is completely written to RAM. This field should be
2965 * read as '1' to indicate that the output has been completely
2966 * written. When writing a command completion or response to an
2967 * internal processor, the order of writes has to be such that
2968 * this field is written last.
2970 } __attribute__((packed));
2972 /* hwrm_func_vlan_qcfg */
2974 * Description: This command should be called by PF driver to get the current
2975 * C-TAG, S-TAG and correcponsing PCP and TPID values configured for the
2978 /* Input (24 bytes) */
2979 struct hwrm_func_vlan_qcfg_input {
2982 * This value indicates what type of request this is. The format
2983 * for the rest of the command is determined by this field.
2987 * This value indicates the what completion ring the request
2988 * will be optionally completed on. If the value is -1, then no
2989 * CR completion will be generated. Any other value must be a
2990 * valid CR ring_id value for this function.
2993 /* This value indicates the command sequence number. */
2996 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
2997 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3002 * This is the host address where the response will be written
3003 * when the request is complete. This area must be 16B aligned
3004 * and must be cleared to zero before the request is made.
3008 * Function ID of the function that is being configured. If set
3009 * to 0xFF... (All Fs), then the configuration is for the
3010 * requesting function.
3012 uint16_t unused_0[3];
3015 /* Output (40 bytes) */
3016 struct hwrm_func_vlan_qcfg_output {
3017 uint16_t error_code;
3019 * Pass/Fail or error type Note: receiver to verify the in
3020 * parameters, and fail the call with an error when appropriate
3023 /* This field returns the type of original request. */
3025 /* This field provides original sequence number of the command. */
3028 * This field is the length of the response in bytes. The last
3029 * byte of the response is a valid flag that will read as '1'
3030 * when the command has been completely written to memory.
3038 * This field is used in Output records to indicate that the
3039 * output is completely written to RAM. This field should be
3040 * read as '1' to indicate that the output has been completely
3041 * written. When writing a command completion or response to an
3042 * internal processor, the order of writes has to be such that
3043 * this field is written last.
3046 /* S-TAG VLAN identifier configured for the function. */
3048 /* S-TAG PCP value configured for the function. */
3052 * S-TAG TPID value configured for the function. This field is
3053 * specified in network byte order.
3056 /* C-TAG VLAN identifier configured for the function. */
3058 /* C-TAG PCP value configured for the function. */
3062 * C-TAG TPID value configured for the function. This field is
3063 * specified in network byte order.
3072 /* hwrm_func_vlan_cfg */
3074 * Description: This command allows PF driver to configure C-TAG, S-TAG and
3075 * corresponding PCP and TPID values for a function.
3077 /* Input (48 bytes) */
3078 struct hwrm_func_vlan_cfg_input {
3081 * This value indicates what type of request this is. The format
3082 * for the rest of the command is determined by this field.
3086 * This value indicates the what completion ring the request
3087 * will be optionally completed on. If the value is -1, then no
3088 * CR completion will be generated. Any other value must be a
3089 * valid CR ring_id value for this function.
3092 /* This value indicates the command sequence number. */
3095 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3096 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3101 * This is the host address where the response will be written
3102 * when the request is complete. This area must be 16B aligned
3103 * and must be cleared to zero before the request is made.
3107 * Function ID of the function that is being configured. If set
3108 * to 0xFF... (All Fs), then the configuration is for the
3109 * requesting function.
3114 /* This bit must be '1' for the stag_vid field to be configured. */
3115 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_VID UINT32_C(0x1)
3116 /* This bit must be '1' for the ctag_vid field to be configured. */
3117 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_VID UINT32_C(0x2)
3118 /* This bit must be '1' for the stag_pcp field to be configured. */
3119 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_PCP UINT32_C(0x4)
3120 /* This bit must be '1' for the ctag_pcp field to be configured. */
3121 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_PCP UINT32_C(0x8)
3122 /* This bit must be '1' for the stag_tpid field to be configured. */
3123 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_STAG_TPID UINT32_C(0x10)
3124 /* This bit must be '1' for the ctag_tpid field to be configured. */
3125 #define HWRM_FUNC_VLAN_CFG_INPUT_ENABLES_CTAG_TPID UINT32_C(0x20)
3127 /* S-TAG VLAN identifier configured for the function. */
3129 /* S-TAG PCP value configured for the function. */
3133 * S-TAG TPID value configured for the function. This field is
3134 * specified in network byte order.
3137 /* C-TAG VLAN identifier configured for the function. */
3139 /* C-TAG PCP value configured for the function. */
3143 * C-TAG TPID value configured for the function. This field is
3144 * specified in network byte order.
3153 /* Output (16 bytes) */
3154 struct hwrm_func_vlan_cfg_output {
3155 uint16_t error_code;
3157 * Pass/Fail or error type Note: receiver to verify the in
3158 * parameters, and fail the call with an error when appropriate
3161 /* This field returns the type of original request. */
3163 /* This field provides original sequence number of the command. */
3166 * This field is the length of the response in bytes. The last
3167 * byte of the response is a valid flag that will read as '1'
3168 * when the command has been completely written to memory.
3176 * This field is used in Output records to indicate that the
3177 * output is completely written to RAM. This field should be
3178 * read as '1' to indicate that the output has been completely
3179 * written. When writing a command completion or response to an
3180 * internal processor, the order of writes has to be such that
3181 * this field is written last.
3187 * Description: This command allows configuration of a PF by the corresponding
3188 * PF driver. This command also allows configuration of a child VF by its parent
3189 * PF driver. The input FID value is used to indicate what function is being
3190 * configured. This allows a PF driver to configure the PF owned by itself or a
3191 * virtual function that is a child of the PF. This command allows to reserve
3192 * resources for a VF by its parent PF. To reverse the process, the command
3193 * should be called with all enables flags cleared for resources. This will free
3194 * allocated resources for the VF and return them to the resource pool. If this
3195 * command is requested by a VF driver to configure or reserve resources, then
3196 * the HWRM shall fail this command. If default MAC address and/or VLAN are
3197 * provided in this command, then the HWRM shall set up appropriate MAC/VLAN
3198 * filters for the function that is being configured. If source properties
3199 * checks are enabled and default MAC address and/or IP address are provided in
3200 * this command, then the HWRM shall set appropriate source property checks
3201 * based on provided MAC and/or IP addresses. The parent PF driver should not
3202 * set MTU/MRU for a VF using this command. This is to allow MTU/MRU setting by
3203 * the VF driver. If the MTU or MRU for a VF is set by the PF driver, then the
3204 * HWRM should ignore it. A function's MTU/MRU should be set prior to allocating
3205 * RX VNICs or TX rings. A PF driver calls hwrm_func_cfg to allocate resources
3206 * for itself or its children VFs. All function drivers shall call hwrm_func_cfg
3207 * to reserve resources. A request to hwrm_func_cfg may not be fully granted;
3208 * that is, a request for resources may be larger than what can be supported by
3209 * the device and the HWRM will allocate the best set of resources available,
3210 * but that may be less than requested. If all the amounts requested could not
3211 * be fulfilled, the HWRM shall allocate what it could and return a status code
3212 * of success. A function driver should call hwrm_func_qcfg immediately after
3213 * hwrm_func_cfg to determine what resources were assigned to the configured
3214 * function. A call by a PF driver to hwrm_func_cfg to allocate resources for
3215 * itself shall only allocate resources for the PF driver to use, not for its
3216 * children VFs. Likewise, a call to hwrm_func_qcfg shall return the resources
3217 * available for the PF driver to use, not what is available to its children
3220 /* Input (88 bytes) */
3221 struct hwrm_func_cfg_input {
3224 * This value indicates what type of request this is. The format
3225 * for the rest of the command is determined by this field.
3229 * This value indicates the what completion ring the request
3230 * will be optionally completed on. If the value is -1, then no
3231 * CR completion will be generated. Any other value must be a
3232 * valid CR ring_id value for this function.
3235 /* This value indicates the command sequence number. */
3238 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3239 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3244 * This is the host address where the response will be written
3245 * when the request is complete. This area must be 16B aligned
3246 * and must be cleared to zero before the request is made.
3250 * Function ID of the function that is being configured. If set
3251 * to 0xFF... (All Fs), then the configuration is for the
3252 * requesting function.
3258 * When this bit is '1', the function is disabled with source
3259 * MAC address check. This is an anti-spoofing check. If this
3260 * flag is set, then the function shall be configured to
3261 * disallow transmission of frames with the source MAC address
3262 * that is configured for this function.
3264 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_DISABLE \
3267 * When this bit is '1', the function is enabled with source MAC
3268 * address check. This is an anti-spoofing check. If this flag
3269 * is set, then the function shall be configured to allow
3270 * transmission of frames with the source MAC address that is
3271 * configured for this function.
3273 #define HWRM_FUNC_CFG_INPUT_FLAGS_SRC_MAC_ADDR_CHECK_ENABLE \
3276 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_MASK UINT32_C(0x1fc)
3277 #define HWRM_FUNC_CFG_INPUT_FLAGS_RSVD_SFT 2
3279 * Standard TX Ring mode is used for the allocation of TX ring
3280 * and underlying scheduling resources that allow bandwidth
3281 * reservation and limit settings on the queried function. If
3282 * set to 1, then standard TX ring mode is requested to be
3283 * enabled on the function being configured.
3285 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_ENABLE \
3288 * Standard TX Ring mode is used for the allocation of TX ring
3289 * and underlying scheduling resources that allow bandwidth
3290 * reservation and limit settings on the queried function. If
3291 * set to 1, then the standard TX ring mode is requested to be
3292 * disabled on the function being configured. In this extended
3293 * TX ring resource mode, the minimum and maximum bandwidth
3294 * settings are not supported to allow the allocation of TX
3295 * rings to span multiple scheduler nodes.
3297 #define HWRM_FUNC_CFG_INPUT_FLAGS_STD_TX_RING_MODE_DISABLE \
3300 * If this bit is set, virtual mac address configured in this
3301 * command will be persistent over warm boot.
3303 #define HWRM_FUNC_CFG_INPUT_FLAGS_VIRT_MAC_PERSIST UINT32_C(0x800)
3305 * This bit only applies to the VF. If this bit is set, the
3306 * statistic context counters will not be cleared when the
3307 * statistic context is freed or a function reset is called on
3308 * VF. This bit will be cleared when the PF is unloaded or a
3309 * function reset is called on the PF.
3311 #define HWRM_FUNC_CFG_INPUT_FLAGS_NO_AUTOCLEAR_STATISTIC \
3314 * This bit requests that the firmware test to see if all the
3315 * assets requested in this command (i.e. number of TX rings)
3316 * are available. The firmware will return an error if the
3317 * requested assets are not available. The firwmare will NOT
3318 * reserve the assets if they are available.
3320 #define HWRM_FUNC_CFG_INPUT_FLAGS_TX_ASSETS_TEST UINT32_C(0x2000)
3322 /* This bit must be '1' for the mtu field to be configured. */
3323 #define HWRM_FUNC_CFG_INPUT_ENABLES_MTU UINT32_C(0x1)
3324 /* This bit must be '1' for the mru field to be configured. */
3325 #define HWRM_FUNC_CFG_INPUT_ENABLES_MRU UINT32_C(0x2)
3327 * This bit must be '1' for the num_rsscos_ctxs field to be
3330 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RSSCOS_CTXS UINT32_C(0x4)
3332 * This bit must be '1' for the num_cmpl_rings field to be
3335 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_CMPL_RINGS UINT32_C(0x8)
3336 /* This bit must be '1' for the num_tx_rings field to be configured. */
3337 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_TX_RINGS UINT32_C(0x10)
3338 /* This bit must be '1' for the num_rx_rings field to be configured. */
3339 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_RX_RINGS UINT32_C(0x20)
3340 /* This bit must be '1' for the num_l2_ctxs field to be configured. */
3341 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_L2_CTXS UINT32_C(0x40)
3342 /* This bit must be '1' for the num_vnics field to be configured. */
3343 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_VNICS UINT32_C(0x80)
3345 * This bit must be '1' for the num_stat_ctxs field to be
3348 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_STAT_CTXS UINT32_C(0x100)
3350 * This bit must be '1' for the dflt_mac_addr field to be
3353 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_MAC_ADDR UINT32_C(0x200)
3354 /* This bit must be '1' for the dflt_vlan field to be configured. */
3355 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_VLAN UINT32_C(0x400)
3356 /* This bit must be '1' for the dflt_ip_addr field to be configured. */
3357 #define HWRM_FUNC_CFG_INPUT_ENABLES_DFLT_IP_ADDR UINT32_C(0x800)
3358 /* This bit must be '1' for the min_bw field to be configured. */
3359 #define HWRM_FUNC_CFG_INPUT_ENABLES_MIN_BW UINT32_C(0x1000)
3360 /* This bit must be '1' for the max_bw field to be configured. */
3361 #define HWRM_FUNC_CFG_INPUT_ENABLES_MAX_BW UINT32_C(0x2000)
3363 * This bit must be '1' for the async_event_cr field to be
3366 #define HWRM_FUNC_CFG_INPUT_ENABLES_ASYNC_EVENT_CR UINT32_C(0x4000)
3368 * This bit must be '1' for the vlan_antispoof_mode field to be
3371 #define HWRM_FUNC_CFG_INPUT_ENABLES_VLAN_ANTISPOOF_MODE UINT32_C(0x8000)
3373 * This bit must be '1' for the allowed_vlan_pris field to be
3376 #define HWRM_FUNC_CFG_INPUT_ENABLES_ALLOWED_VLAN_PRIS UINT32_C(0x10000)
3377 /* This bit must be '1' for the evb_mode field to be configured. */
3378 #define HWRM_FUNC_CFG_INPUT_ENABLES_EVB_MODE UINT32_C(0x20000)
3380 * This bit must be '1' for the num_mcast_filters field to be
3383 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_MCAST_FILTERS UINT32_C(0x40000)
3385 * This bit must be '1' for the num_hw_ring_grps field to be
3388 #define HWRM_FUNC_CFG_INPUT_ENABLES_NUM_HW_RING_GRPS UINT32_C(0x80000)
3391 * The maximum transmission unit of the function. The HWRM
3392 * should make sure that the mtu of the function does not exceed
3393 * the mtu of the physical port that this function is associated
3394 * with. In addition to configuring mtu per function, it is
3395 * possible to configure mtu per transmit ring. By default, the
3396 * mtu of each transmit ring associated with a function is equal
3397 * to the mtu of the function. The HWRM should make sure that
3398 * the mtu of each transmit ring that is assigned to a function
3403 * The maximum receive unit of the function. The HWRM should
3404 * make sure that the mru of the function does not exceed the
3405 * mru of the physical port that this function is associated
3406 * with. In addition to configuring mru per function, it is
3407 * possible to configure mru per vnic. By default, the mru of
3408 * each vnic associated with a function is equal to the mru of
3409 * the function. The HWRM should make sure that the mru of each
3410 * vnic that is assigned to a function has a valid mru.
3412 uint16_t num_rsscos_ctxs;
3413 /* The number of RSS/COS contexts requested for the function. */
3414 uint16_t num_cmpl_rings;
3416 * The number of completion rings requested for the function.
3417 * This does not include the rings allocated to any children
3420 uint16_t num_tx_rings;
3422 * The number of transmit rings requested for the function. This
3423 * does not include the rings allocated to any children
3426 uint16_t num_rx_rings;
3428 * The number of receive rings requested for the function. This
3429 * does not include the rings allocated to any children
3432 uint16_t num_l2_ctxs;
3433 /* The requested number of L2 contexts for the function. */
3435 /* The requested number of vnics for the function. */
3436 uint16_t num_stat_ctxs;
3437 /* The requested number of statistic contexts for the function. */
3438 uint16_t num_hw_ring_grps;
3440 * The number of HW ring groups that should be reserved for this
3443 uint8_t dflt_mac_addr[6];
3444 /* The default MAC address for the function being configured. */
3447 * The default VLAN for the function being configured. This
3448 * field's format is same as 802.1Q Tag's Tag Control
3449 * Information (TCI) format that includes both Priority Code
3450 * Point (PCP) and VLAN Identifier (VID).
3452 uint32_t dflt_ip_addr[4];
3454 * The default IP address for the function being configured.
3455 * This address is only used in enabling source property check.
3459 * Minimum BW allocated for this function. The HWRM will
3460 * translate this value into byte counter and time interval used
3461 * for the scheduler inside the device.
3463 /* The bandwidth value. */
3464 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
3465 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_SFT 0
3466 /* The granularity of the value (bits or bytes). */
3467 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE UINT32_C(0x10000000)
3468 /* Value is in bits. */
3469 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3470 /* Value is in bytes. */
3471 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3472 #define HWRM_FUNC_CFG_INPUT_MIN_BW_SCALE_LAST \
3473 FUNC_CFG_INPUT_MIN_BW_SCALE_BYTES
3474 /* bw_value_unit is 3 b */
3475 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MASK \
3476 UINT32_C(0xe0000000)
3477 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_SFT 29
3478 /* Value is in Mb or MB (base 10). */
3479 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_MEGA \
3480 (UINT32_C(0x0) << 29)
3481 /* Value is in Kb or KB (base 10). */
3482 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_KILO \
3483 (UINT32_C(0x2) << 29)
3484 /* Value is in bits or bytes. */
3485 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_BASE \
3486 (UINT32_C(0x4) << 29)
3487 /* Value is in Gb or GB (base 10). */
3488 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_GIGA \
3489 (UINT32_C(0x6) << 29)
3490 /* Value is in 1/100th of a percentage of total bandwidth. */
3491 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_PERCENT1_100 \
3492 (UINT32_C(0x1) << 29)
3494 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID \
3495 (UINT32_C(0x7) << 29)
3496 #define HWRM_FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_LAST \
3497 FUNC_CFG_INPUT_MIN_BW_BW_VALUE_UNIT_INVALID
3500 * Maximum BW allocated for this function. The HWRM will
3501 * translate this value into byte counter and time interval used
3502 * for the scheduler inside the device.
3504 /* The bandwidth value. */
3505 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_MASK \
3507 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_SFT 0
3508 /* The granularity of the value (bits or bytes). */
3509 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
3510 /* Value is in bits. */
3511 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
3512 /* Value is in bytes. */
3513 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
3514 #define HWRM_FUNC_CFG_INPUT_MAX_BW_SCALE_LAST \
3515 FUNC_CFG_INPUT_MAX_BW_SCALE_BYTES
3516 /* bw_value_unit is 3 b */
3517 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
3518 UINT32_C(0xe0000000)
3519 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
3520 /* Value is in Mb or MB (base 10). */
3521 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
3522 (UINT32_C(0x0) << 29)
3523 /* Value is in Kb or KB (base 10). */
3524 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
3525 (UINT32_C(0x2) << 29)
3526 /* Value is in bits or bytes. */
3527 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
3528 (UINT32_C(0x4) << 29)
3529 /* Value is in Gb or GB (base 10). */
3530 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
3531 (UINT32_C(0x6) << 29)
3532 /* Value is in 1/100th of a percentage of total bandwidth. */
3533 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
3534 (UINT32_C(0x1) << 29)
3536 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
3537 (UINT32_C(0x7) << 29)
3538 #define HWRM_FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
3539 FUNC_CFG_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
3540 uint16_t async_event_cr;
3542 * ID of the target completion ring for receiving asynchronous
3543 * event completions. If this field is not valid, then the HWRM
3544 * shall use the default completion ring of the function that is
3545 * being configured as the target completion ring for providing
3546 * any asynchronous event completions for that function. If this
3547 * field is valid, then the HWRM shall use the completion ring
3548 * identified by this ID as the target completion ring for
3549 * providing any asynchronous event completions for the function
3550 * that is being configured.
3552 uint8_t vlan_antispoof_mode;
3553 /* VLAN Anti-spoofing mode. */
3554 /* No VLAN anti-spoofing checks are enabled */
3555 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_NOCHECK UINT32_C(0x0)
3556 /* Validate VLAN against the configured VLAN(s) */
3557 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_VALIDATE_VLAN \
3559 /* Insert VLAN if it does not exist, otherwise discard */
3560 #define HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_IF_VLANDNE \
3563 * Insert VLAN if it does not exist, override
3567 HWRM_FUNC_CFG_INPUT_VLAN_ANTISPOOF_MODE_INSERT_OR_OVERRIDE_VLAN \
3569 uint8_t allowed_vlan_pris;
3571 * This bit field defines VLAN PRIs that are allowed on this
3572 * function. If nth bit is set, then VLAN PRI n is allowed on
3577 * The HWRM shall allow a PF driver to change EVB mode for the
3578 * partition it belongs to. The HWRM shall not allow a VF driver
3579 * to change the EVB mode. The HWRM shall take into account the
3580 * switching of EVB mode from one to another and reconfigure
3581 * hardware resources as appropriately. The switching from VEB
3582 * to VEPA mode requires the disabling of the loopback traffic.
3583 * Additionally, source knock outs are handled differently in
3584 * VEB and VEPA modes.
3586 /* No Edge Virtual Bridging (EVB) */
3587 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_NO_EVB UINT32_C(0x0)
3588 /* Virtual Ethernet Bridge (VEB) */
3589 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEB UINT32_C(0x1)
3590 /* Virtual Ethernet Port Aggregator (VEPA) */
3591 #define HWRM_FUNC_CFG_INPUT_EVB_MODE_VEPA UINT32_C(0x2)
3593 uint16_t num_mcast_filters;
3595 * The number of multicast filters that should be reserved for
3596 * this function on the RX side.
3598 } __attribute__((packed));
3600 /* Output (16 bytes) */
3601 struct hwrm_func_cfg_output {
3602 uint16_t error_code;
3604 * Pass/Fail or error type Note: receiver to verify the in
3605 * parameters, and fail the call with an error when appropriate
3608 /* This field returns the type of original request. */
3610 /* This field provides original sequence number of the command. */
3613 * This field is the length of the response in bytes. The last
3614 * byte of the response is a valid flag that will read as '1'
3615 * when the command has been completely written to memory.
3623 * This field is used in Output records to indicate that the
3624 * output is completely written to RAM. This field should be
3625 * read as '1' to indicate that the output has been completely
3626 * written. When writing a command completion or response to an
3627 * internal processor, the order of writes has to be such that
3628 * this field is written last.
3630 } __attribute__((packed));
3632 /* hwrm_func_qstats */
3634 * Description: This command returns statistics of a function. The input FID
3635 * value is used to indicate what function is being queried. This allows a
3636 * physical function driver to query virtual functions that are children of the
3637 * physical function. The HWRM shall return any unsupported counter with a value
3638 * of 0xFFFFFFFF for 32-bit counters and 0xFFFFFFFFFFFFFFFF for 64-bit counters.
3640 /* Input (24 bytes) */
3641 struct hwrm_func_qstats_input {
3644 * This value indicates what type of request this is. The format
3645 * for the rest of the command is determined by this field.
3649 * This value indicates the what completion ring the request
3650 * will be optionally completed on. If the value is -1, then no
3651 * CR completion will be generated. Any other value must be a
3652 * valid CR ring_id value for this function.
3655 /* This value indicates the command sequence number. */
3658 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3659 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3664 * This is the host address where the response will be written
3665 * when the request is complete. This area must be 16B aligned
3666 * and must be cleared to zero before the request is made.
3670 * Function ID of the function that is being queried. 0xFF...
3671 * (All Fs) if the query is for the requesting function.
3673 uint16_t unused_0[3];
3674 } __attribute__((packed));
3676 /* Output (176 bytes) */
3677 struct hwrm_func_qstats_output {
3678 uint16_t error_code;
3680 * Pass/Fail or error type Note: receiver to verify the in
3681 * parameters, and fail the call with an error when appropriate
3684 /* This field returns the type of original request. */
3686 /* This field provides original sequence number of the command. */
3689 * This field is the length of the response in bytes. The last
3690 * byte of the response is a valid flag that will read as '1'
3691 * when the command has been completely written to memory.
3693 uint64_t tx_ucast_pkts;
3694 /* Number of transmitted unicast packets on the function. */
3695 uint64_t tx_mcast_pkts;
3696 /* Number of transmitted multicast packets on the function. */
3697 uint64_t tx_bcast_pkts;
3698 /* Number of transmitted broadcast packets on the function. */
3699 uint64_t tx_err_pkts;
3701 * Number of transmitted packets that were discarded due to
3702 * internal NIC resource problems. For transmit, this can only
3703 * happen if TMP is configured to allow dropping in HOL blocking
3704 * conditions, which is not a normal configuration.
3706 uint64_t tx_drop_pkts;
3708 * Number of dropped packets on transmit path on the function.
3709 * These are packets that have been marked for drop by the TE
3710 * CFA block or are packets that exceeded the transmit MTU limit
3713 uint64_t tx_ucast_bytes;
3714 /* Number of transmitted bytes for unicast traffic on the function. */
3715 uint64_t tx_mcast_bytes;
3717 * Number of transmitted bytes for multicast traffic on the
3720 uint64_t tx_bcast_bytes;
3722 * Number of transmitted bytes for broadcast traffic on the
3725 uint64_t rx_ucast_pkts;
3726 /* Number of received unicast packets on the function. */
3727 uint64_t rx_mcast_pkts;
3728 /* Number of received multicast packets on the function. */
3729 uint64_t rx_bcast_pkts;
3730 /* Number of received broadcast packets on the function. */
3731 uint64_t rx_err_pkts;
3733 * Number of received packets that were discarded on the
3734 * function due to resource limitations. This can happen for 3
3735 * reasons. # The BD used for the packet has a bad format. #
3736 * There were no BDs available in the ring for the packet. #
3737 * There were no BDs available on-chip for the packet.
3739 uint64_t rx_drop_pkts;
3741 * Number of dropped packets on received path on the function.
3742 * These are packets that have been marked for drop by the RE
3745 uint64_t rx_ucast_bytes;
3746 /* Number of received bytes for unicast traffic on the function. */
3747 uint64_t rx_mcast_bytes;
3748 /* Number of received bytes for multicast traffic on the function. */
3749 uint64_t rx_bcast_bytes;
3750 /* Number of received bytes for broadcast traffic on the function. */
3751 uint64_t rx_agg_pkts;
3752 /* Number of aggregated unicast packets on the function. */
3753 uint64_t rx_agg_bytes;
3754 /* Number of aggregated unicast bytes on the function. */
3755 uint64_t rx_agg_events;
3756 /* Number of aggregation events on the function. */
3757 uint64_t rx_agg_aborts;
3758 /* Number of aborted aggregations on the function. */
3765 * This field is used in Output records to indicate that the
3766 * output is completely written to RAM. This field should be
3767 * read as '1' to indicate that the output has been completely
3768 * written. When writing a command completion or response to an
3769 * internal processor, the order of writes has to be such that
3770 * this field is written last.
3772 } __attribute__((packed));
3774 /* hwrm_func_clr_stats */
3776 * Description: This command clears statistics of a function. The input FID
3777 * value is used to indicate what function's statistics is being cleared. This
3778 * allows a physical function driver to clear statistics of virtual functions
3779 * that are children of the physical function.
3781 /* Input (24 bytes) */
3782 struct hwrm_func_clr_stats_input {
3785 * This value indicates what type of request this is. The format
3786 * for the rest of the command is determined by this field.
3790 * This value indicates the what completion ring the request
3791 * will be optionally completed on. If the value is -1, then no
3792 * CR completion will be generated. Any other value must be a
3793 * valid CR ring_id value for this function.
3796 /* This value indicates the command sequence number. */
3799 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3800 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3805 * This is the host address where the response will be written
3806 * when the request is complete. This area must be 16B aligned
3807 * and must be cleared to zero before the request is made.
3811 * Function ID of the function. 0xFF... (All Fs) if the query is
3812 * for the requesting function.
3814 uint16_t unused_0[3];
3815 } __attribute__((packed));
3817 /* Output (16 bytes) */
3818 struct hwrm_func_clr_stats_output {
3819 uint16_t error_code;
3821 * Pass/Fail or error type Note: receiver to verify the in
3822 * parameters, and fail the call with an error when appropriate
3825 /* This field returns the type of original request. */
3827 /* This field provides original sequence number of the command. */
3830 * This field is the length of the response in bytes. The last
3831 * byte of the response is a valid flag that will read as '1'
3832 * when the command has been completely written to memory.
3840 * This field is used in Output records to indicate that the
3841 * output is completely written to RAM. This field should be
3842 * read as '1' to indicate that the output has been completely
3843 * written. When writing a command completion or response to an
3844 * internal processor, the order of writes has to be such that
3845 * this field is written last.
3847 } __attribute__((packed));
3849 /* hwrm_func_vf_vnic_ids_query */
3850 /* Description: This command is used to query vf vnic ids. */
3851 /* Input (32 bytes) */
3852 struct hwrm_func_vf_vnic_ids_query_input {
3855 * This value indicates what type of request this is. The format
3856 * for the rest of the command is determined by this field.
3860 * This value indicates the what completion ring the request
3861 * will be optionally completed on. If the value is -1, then no
3862 * CR completion will be generated. Any other value must be a
3863 * valid CR ring_id value for this function.
3866 /* This value indicates the command sequence number. */
3869 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3870 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3875 * This is the host address where the response will be written
3876 * when the request is complete. This area must be 16B aligned
3877 * and must be cleared to zero before the request is made.
3881 * This value is used to identify a Virtual Function (VF). The
3882 * scope of VF ID is local within a PF.
3886 uint32_t max_vnic_id_cnt;
3887 /* Max number of vnic ids in vnic id table */
3888 uint64_t vnic_id_tbl_addr;
3889 /* This is the address for VF VNIC ID table */
3890 } __attribute__((packed));
3892 /* Output (16 bytes) */
3893 struct hwrm_func_vf_vnic_ids_query_output {
3894 uint16_t error_code;
3896 * Pass/Fail or error type Note: receiver to verify the in
3897 * parameters, and fail the call with an error when appropriate
3900 /* This field returns the type of original request. */
3902 /* This field provides original sequence number of the command. */
3905 * This field is the length of the response in bytes. The last
3906 * byte of the response is a valid flag that will read as '1'
3907 * when the command has been completely written to memory.
3909 uint32_t vnic_id_cnt;
3911 * Actual number of vnic ids Each VNIC ID is written as a 32-bit
3919 * This field is used in Output records to indicate that the
3920 * output is completely written to RAM. This field should be
3921 * read as '1' to indicate that the output has been completely
3922 * written. When writing a command completion or response to an
3923 * internal processor, the order of writes has to be such that
3924 * this field is written last.
3926 } __attribute__((packed));
3928 /* hwrm_func_drv_rgtr */
3930 * Description: This command is used by the function driver to register its
3931 * information with the HWRM. A function driver shall implement this command. A
3932 * function driver shall use this command during the driver initialization right
3933 * after the HWRM version discovery and default ring resources allocation.
3935 /* Input (80 bytes) */
3936 struct hwrm_func_drv_rgtr_input {
3939 * This value indicates what type of request this is. The format
3940 * for the rest of the command is determined by this field.
3944 * This value indicates the what completion ring the request
3945 * will be optionally completed on. If the value is -1, then no
3946 * CR completion will be generated. Any other value must be a
3947 * valid CR ring_id value for this function.
3950 /* This value indicates the command sequence number. */
3953 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
3954 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
3959 * This is the host address where the response will be written
3960 * when the request is complete. This area must be 16B aligned
3961 * and must be cleared to zero before the request is made.
3965 * When this bit is '1', the function driver is requesting all
3966 * requests from its children VF drivers to be forwarded to
3967 * itself. This flag can only be set by the PF driver. If a VF
3968 * driver sets this flag, it should be ignored by the HWRM.
3970 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_ALL_MODE UINT32_C(0x1)
3972 * When this bit is '1', the function is requesting none of the
3973 * requests from its children VF drivers to be forwarded to
3974 * itself. This flag can only be set by the PF driver. If a VF
3975 * driver sets this flag, it should be ignored by the HWRM.
3977 #define HWRM_FUNC_DRV_RGTR_INPUT_FLAGS_FWD_NONE_MODE UINT32_C(0x2)
3979 /* This bit must be '1' for the os_type field to be configured. */
3980 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_OS_TYPE UINT32_C(0x1)
3981 /* This bit must be '1' for the ver field to be configured. */
3982 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VER UINT32_C(0x2)
3983 /* This bit must be '1' for the timestamp field to be configured. */
3984 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_TIMESTAMP UINT32_C(0x4)
3985 /* This bit must be '1' for the vf_req_fwd field to be configured. */
3986 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_VF_INPUT_FWD UINT32_C(0x8)
3988 * This bit must be '1' for the async_event_fwd field to be
3991 #define HWRM_FUNC_DRV_RGTR_INPUT_ENABLES_ASYNC_EVENT_FWD UINT32_C(0x10)
3994 * This value indicates the type of OS. The values are based on
3995 * CIM_OperatingSystem.mof file as published by the DMTF.
3998 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_UNKNOWN UINT32_C(0x0)
3999 /* Other OS not listed below. */
4000 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_OTHER UINT32_C(0x1)
4002 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_MSDOS UINT32_C(0xe)
4004 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WINDOWS UINT32_C(0x12)
4006 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_SOLARIS UINT32_C(0x1d)
4008 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_LINUX UINT32_C(0x24)
4010 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_FREEBSD UINT32_C(0x2a)
4011 /* VMware ESXi OS. */
4012 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_ESXI UINT32_C(0x68)
4013 /* Microsoft Windows 8 64-bit OS. */
4014 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN864 UINT32_C(0x73)
4015 /* Microsoft Windows Server 2012 R2 OS. */
4016 #define HWRM_FUNC_DRV_RGTR_INPUT_OS_TYPE_WIN2012R2 UINT32_C(0x74)
4018 /* This is the major version of the driver. */
4020 /* This is the minor version of the driver. */
4022 /* This is the update version of the driver. */
4027 * This is a 32-bit timestamp provided by the driver for keep
4028 * alive. The timestamp is in multiples of 1ms.
4031 uint32_t vf_req_fwd[8];
4033 * This is a 256-bit bit mask provided by the PF driver for
4034 * letting the HWRM know what commands issued by the VF driver
4035 * to the HWRM should be forwarded to the PF driver. Nth bit
4036 * refers to the Nth req_type. Setting Nth bit to 1 indicates
4037 * that requests from the VF driver with req_type equal to N
4038 * shall be forwarded to the parent PF driver. This field is not
4039 * valid for the VF driver.
4041 uint32_t async_event_fwd[8];
4043 * This is a 256-bit bit mask provided by the function driver
4044 * (PF or VF driver) to indicate the list of asynchronous event
4045 * completions to be forwarded. Nth bit refers to the Nth
4046 * event_id. Setting Nth bit to 1 by the function driver shall
4047 * result in the HWRM forwarding asynchronous event completion
4048 * with event_id equal to N. If all bits are set to 0 (value of
4049 * 0), then the HWRM shall not forward any asynchronous event
4050 * completion to this function driver.
4052 } __attribute__((packed));
4054 /* Output (16 bytes) */
4055 struct hwrm_func_drv_rgtr_output {
4056 uint16_t error_code;
4058 * Pass/Fail or error type Note: receiver to verify the in
4059 * parameters, and fail the call with an error when appropriate
4062 /* This field returns the type of original request. */
4064 /* This field provides original sequence number of the command. */
4067 * This field is the length of the response in bytes. The last
4068 * byte of the response is a valid flag that will read as '1'
4069 * when the command has been completely written to memory.
4077 * This field is used in Output records to indicate that the
4078 * output is completely written to RAM. This field should be
4079 * read as '1' to indicate that the output has been completely
4080 * written. When writing a command completion or response to an
4081 * internal processor, the order of writes has to be such that
4082 * this field is written last.
4084 } __attribute__((packed));
4086 /* hwrm_func_drv_unrgtr */
4088 * Description: This command is used by the function driver to un register with
4089 * the HWRM. A function driver shall implement this command. A function driver
4090 * shall use this command during the driver unloading.
4092 /* Input (24 bytes) */
4093 struct hwrm_func_drv_unrgtr_input {
4096 * This value indicates what type of request this is. The format
4097 * for the rest of the command is determined by this field.
4101 * This value indicates the what completion ring the request
4102 * will be optionally completed on. If the value is -1, then no
4103 * CR completion will be generated. Any other value must be a
4104 * valid CR ring_id value for this function.
4107 /* This value indicates the command sequence number. */
4110 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4111 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4116 * This is the host address where the response will be written
4117 * when the request is complete. This area must be 16B aligned
4118 * and must be cleared to zero before the request is made.
4122 * When this bit is '1', the function driver is notifying the
4123 * HWRM to prepare for the shutdown.
4125 #define HWRM_FUNC_DRV_UNRGTR_INPUT_FLAGS_PREPARE_FOR_SHUTDOWN \
4128 } __attribute__((packed));
4130 /* Output (16 bytes) */
4131 struct hwrm_func_drv_unrgtr_output {
4132 uint16_t error_code;
4134 * Pass/Fail or error type Note: receiver to verify the in
4135 * parameters, and fail the call with an error when appropriate
4138 /* This field returns the type of original request. */
4140 /* This field provides original sequence number of the command. */
4143 * This field is the length of the response in bytes. The last
4144 * byte of the response is a valid flag that will read as '1'
4145 * when the command has been completely written to memory.
4153 * This field is used in Output records to indicate that the
4154 * output is completely written to RAM. This field should be
4155 * read as '1' to indicate that the output has been completely
4156 * written. When writing a command completion or response to an
4157 * internal processor, the order of writes has to be such that
4158 * this field is written last.
4160 } __attribute__((packed));
4162 /* hwrm_func_buf_rgtr */
4164 * Description: This command is used by the PF driver to register buffers used
4165 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4166 * register buffers for each PF-VF channel. A parent PF may issue this command
4167 * per child VF. If VF ID is not valid, then this command is used to register
4168 * buffers for all children VFs of the PF.
4170 /* Input (128 bytes) */
4171 struct hwrm_func_buf_rgtr_input {
4174 * This value indicates what type of request this is. The format
4175 * for the rest of the command is determined by this field.
4179 * This value indicates the what completion ring the request
4180 * will be optionally completed on. If the value is -1, then no
4181 * CR completion will be generated. Any other value must be a
4182 * valid CR ring_id value for this function.
4185 /* This value indicates the command sequence number. */
4188 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4189 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4194 * This is the host address where the response will be written
4195 * when the request is complete. This area must be 16B aligned
4196 * and must be cleared to zero before the request is made.
4199 /* This bit must be '1' for the vf_id field to be configured. */
4200 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4201 /* This bit must be '1' for the err_buf_addr field to be configured. */
4202 #define HWRM_FUNC_BUF_RGTR_INPUT_ENABLES_ERR_BUF_ADDR UINT32_C(0x2)
4205 * This value is used to identify a Virtual Function (VF). The
4206 * scope of VF ID is local within a PF.
4208 uint16_t req_buf_num_pages;
4210 * This field represents the number of pages used for request
4213 uint16_t req_buf_page_size;
4214 /* This field represents the page size used for request buffer(s). */
4216 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_16B UINT32_C(0x4)
4218 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4K UINT32_C(0xc)
4220 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_8K UINT32_C(0xd)
4222 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_64K UINT32_C(0x10)
4224 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_2M UINT32_C(0x15)
4226 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_4M UINT32_C(0x16)
4228 #define HWRM_FUNC_BUF_RGTR_INPUT_INPUT_BUF_PAGE_SIZE_1G UINT32_C(0x1e)
4229 uint16_t req_buf_len;
4230 /* The length of the request buffer per VF in bytes. */
4231 uint16_t resp_buf_len;
4232 /* The length of the response buffer in bytes. */
4235 uint64_t req_buf_page_addr[10];
4236 /* This field represents the page address of req buffer. */
4237 uint64_t error_buf_addr;
4239 * This field is used to receive the error reporting from the
4240 * chipset. Only applicable for PFs.
4242 uint64_t resp_buf_addr;
4243 /* This field is used to receive the response forwarded by the HWRM. */
4244 } __attribute__((packed));
4246 /* Output (16 bytes) */
4247 struct hwrm_func_buf_rgtr_output {
4248 uint16_t error_code;
4250 * Pass/Fail or error type Note: receiver to verify the in
4251 * parameters, and fail the call with an error when appropriate
4254 /* This field returns the type of original request. */
4256 /* This field provides original sequence number of the command. */
4259 * This field is the length of the response in bytes. The last
4260 * byte of the response is a valid flag that will read as '1'
4261 * when the command has been completely written to memory.
4269 * This field is used in Output records to indicate that the
4270 * output is completely written to RAM. This field should be
4271 * read as '1' to indicate that the output has been completely
4272 * written. When writing a command completion or response to an
4273 * internal processor, the order of writes has to be such that
4274 * this field is written last.
4276 } __attribute__((packed));
4278 /* hwrm_func_buf_unrgtr */
4280 * Description: This command is used by the PF driver to unregister buffers used
4281 * in the PF-VF communication with the HWRM. The PF driver uses this command to
4282 * unregister buffers for PF-VF communication. A parent PF may issue this
4283 * command to unregister buffers for communication between the PF and a specific
4284 * VF. If the VF ID is not valid, then this command is used to unregister
4285 * buffers used for communications with all children VFs of the PF.
4287 /* Input (24 bytes) */
4288 struct hwrm_func_buf_unrgtr_input {
4291 * This value indicates what type of request this is. The format
4292 * for the rest of the command is determined by this field.
4296 * This value indicates the what completion ring the request
4297 * will be optionally completed on. If the value is -1, then no
4298 * CR completion will be generated. Any other value must be a
4299 * valid CR ring_id value for this function.
4302 /* This value indicates the command sequence number. */
4305 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4306 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4311 * This is the host address where the response will be written
4312 * when the request is complete. This area must be 16B aligned
4313 * and must be cleared to zero before the request is made.
4316 /* This bit must be '1' for the vf_id field to be configured. */
4317 #define HWRM_FUNC_BUF_UNRGTR_INPUT_ENABLES_VF_ID UINT32_C(0x1)
4320 * This value is used to identify a Virtual Function (VF). The
4321 * scope of VF ID is local within a PF.
4324 } __attribute__((packed));
4326 /* Output (16 bytes) */
4327 struct hwrm_func_buf_unrgtr_output {
4328 uint16_t error_code;
4330 * Pass/Fail or error type Note: receiver to verify the in
4331 * parameters, and fail the call with an error when appropriate
4334 /* This field returns the type of original request. */
4336 /* This field provides original sequence number of the command. */
4339 * This field is the length of the response in bytes. The last
4340 * byte of the response is a valid flag that will read as '1'
4341 * when the command has been completely written to memory.
4349 * This field is used in Output records to indicate that the
4350 * output is completely written to RAM. This field should be
4351 * read as '1' to indicate that the output has been completely
4352 * written. When writing a command completion or response to an
4353 * internal processor, the order of writes has to be such that
4354 * this field is written last.
4356 } __attribute__((packed));
4358 /* hwrm_port_phy_cfg */
4360 * Description: This command configures the PHY device for the port. It allows
4361 * setting of the most generic settings for the PHY. The HWRM shall complete
4362 * this command as soon as PHY settings are configured. They may not be applied
4363 * when the command response is provided. A VF driver shall not be allowed to
4364 * configure PHY using this command. In a network partition mode, a PF driver
4365 * shall not be allowed to configure PHY using this command.
4367 /* Input (56 bytes) */
4368 struct hwrm_port_phy_cfg_input {
4371 * This value indicates what type of request this is. The format
4372 * for the rest of the command is determined by this field.
4376 * This value indicates the what completion ring the request
4377 * will be optionally completed on. If the value is -1, then no
4378 * CR completion will be generated. Any other value must be a
4379 * valid CR ring_id value for this function.
4382 /* This value indicates the command sequence number. */
4385 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4386 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4391 * This is the host address where the response will be written
4392 * when the request is complete. This area must be 16B aligned
4393 * and must be cleared to zero before the request is made.
4397 * When this bit is set to '1', the PHY for the port shall be
4398 * reset. # If this bit is set to 1, then the HWRM shall reset
4399 * the PHY after applying PHY configuration changes specified in
4400 * this command. # In order to guarantee that PHY configuration
4401 * changes specified in this command take effect, the HWRM
4402 * client should set this flag to 1. # If this bit is not set to
4403 * 1, then the HWRM may reset the PHY depending on the current
4404 * PHY configuration and settings specified in this command.
4406 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY UINT32_C(0x1)
4407 /* deprecated bit. Do not use!!! */
4408 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_DEPRECATED UINT32_C(0x2)
4410 * When this bit is set to '1', the link shall be forced to the
4411 * force_link_speed value. When this bit is set to '1', the HWRM
4412 * client should not enable any of the auto negotiation related
4413 * fields represented by auto_XXX fields in this command. When
4414 * this bit is set to '1' and the HWRM client has enabled a
4415 * auto_XXX field in this command, then the HWRM shall ignore
4416 * the enabled auto_XXX field. When this bit is set to zero, the
4417 * link shall be allowed to autoneg.
4419 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE UINT32_C(0x4)
4421 * When this bit is set to '1', the auto-negotiation process
4422 * shall be restarted on the link.
4424 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG UINT32_C(0x8)
4426 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4427 * is requested to be enabled on this link. If EEE is not
4428 * supported on this port, then this flag shall be ignored by
4431 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_ENABLE UINT32_C(0x10)
4433 * When this bit is set to '1', Energy Efficient Ethernet (EEE)
4434 * is requested to be disabled on this link. If EEE is not
4435 * supported on this port, then this flag shall be ignored by
4438 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_DISABLE UINT32_C(0x20)
4440 * When this bit is set to '1' and EEE is enabled on this link,
4441 * then TX LPI is requested to be enabled on the link. If EEE is
4442 * not supported on this port, then this flag shall be ignored
4443 * by the HWRM. If EEE is disabled on this port, then this flag
4444 * shall be ignored by the HWRM.
4446 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_ENABLE UINT32_C(0x40)
4448 * When this bit is set to '1' and EEE is enabled on this link,
4449 * then TX LPI is requested to be disabled on the link. If EEE
4450 * is not supported on this port, then this flag shall be
4451 * ignored by the HWRM. If EEE is disabled on this port, then
4452 * this flag shall be ignored by the HWRM.
4454 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_EEE_TX_LPI_DISABLE UINT32_C(0x80)
4456 * When set to 1, then the HWRM shall enable FEC
4457 * autonegotitation on this port if supported. When set to 0,
4458 * then this flag shall be ignored. If FEC autonegotiation is
4459 * not supported, then the HWRM shall ignore this flag.
4461 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_ENABLE UINT32_C(0x100)
4463 * When set to 1, then the HWRM shall disable FEC
4464 * autonegotiation on this port if supported. When set to 0,
4465 * then this flag shall be ignored. If FEC autonegotiation is
4466 * not supported, then the HWRM shall ignore this flag.
4468 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_AUTONEG_DISABLE \
4471 * When set to 1, then the HWRM shall enable FEC CLAUSE 74 (Fire
4472 * Code) on this port if supported. When set to 0, then this
4473 * flag shall be ignored. If FEC CLAUSE 74 is not supported,
4474 * then the HWRM shall ignore this flag.
4476 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_ENABLE \
4479 * When set to 1, then the HWRM shall disable FEC CLAUSE 74
4480 * (Fire Code) on this port if supported. When set to 0, then
4481 * this flag shall be ignored. If FEC CLAUSE 74 is not
4482 * supported, then the HWRM shall ignore this flag.
4484 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE74_DISABLE \
4487 * When set to 1, then the HWRM shall enable FEC CLAUSE 91 (Reed
4488 * Solomon) on this port if supported. When set to 0, then this
4489 * flag shall be ignored. If FEC CLAUSE 91 is not supported,
4490 * then the HWRM shall ignore this flag.
4492 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_ENABLE \
4495 * When set to 1, then the HWRM shall disable FEC CLAUSE 91
4496 * (Reed Solomon) on this port if supported. When set to 0, then
4497 * this flag shall be ignored. If FEC CLAUSE 91 is not
4498 * supported, then the HWRM shall ignore this flag.
4500 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FEC_CLAUSE91_DISABLE \
4503 * When this bit is set to '1', the link shall be forced to be
4504 * taken down. # When this bit is set to '1", all other command
4505 * input settings related to the link speed shall be ignored.
4506 * Once the link state is forced down, it can be explicitly
4507 * cleared from that state by setting this flag to '0'. # If
4508 * this flag is set to '0', then the link shall be cleared from
4509 * forced down state if the link is in forced down state. There
4510 * may be conditions (e.g. out-of-band or sideband configuration
4511 * changes for the link) outside the scope of the HWRM
4512 * implementation that may clear forced down link state.
4514 #define HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE_LINK_DWN UINT32_C(0x4000)
4516 /* This bit must be '1' for the auto_mode field to be configured. */
4517 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE UINT32_C(0x1)
4518 /* This bit must be '1' for the auto_duplex field to be configured. */
4519 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX UINT32_C(0x2)
4520 /* This bit must be '1' for the auto_pause field to be configured. */
4521 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_PAUSE UINT32_C(0x4)
4523 * This bit must be '1' for the auto_link_speed field to be
4526 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED UINT32_C(0x8)
4528 * This bit must be '1' for the auto_link_speed_mask field to be
4531 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK \
4533 /* This bit must be '1' for the wirespeed field to be configured. */
4534 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_WIOUTPUTEED UINT32_C(0x20)
4535 /* This bit must be '1' for the lpbk field to be configured. */
4536 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_LPBK UINT32_C(0x40)
4537 /* This bit must be '1' for the preemphasis field to be configured. */
4538 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_PREEMPHASIS UINT32_C(0x80)
4539 /* This bit must be '1' for the force_pause field to be configured. */
4540 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_FORCE_PAUSE UINT32_C(0x100)
4542 * This bit must be '1' for the eee_link_speed_mask field to be
4545 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_EEE_LINK_SPEED_MASK \
4547 /* This bit must be '1' for the tx_lpi_timer field to be configured. */
4548 #define HWRM_PORT_PHY_CFG_INPUT_ENABLES_TX_LPI_TIMER UINT32_C(0x400)
4550 /* Port ID of port that is to be configured. */
4551 uint16_t force_link_speed;
4553 * This is the speed that will be used if the force bit is '1'.
4554 * If unsupported speed is selected, an error will be generated.
4556 /* 100Mb link speed */
4557 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4558 /* 1Gb link speed */
4559 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4560 /* 2Gb link speed */
4561 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4562 /* 2.5Gb link speed */
4563 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4564 /* 10Gb link speed */
4565 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4566 /* 20Mb link speed */
4567 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4568 /* 25Gb link speed */
4569 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4570 /* 40Gb link speed */
4571 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4572 /* 50Gb link speed */
4573 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
4574 /* 100Gb link speed */
4575 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
4576 /* 10Mb link speed */
4577 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
4580 * This value is used to identify what autoneg mode is used when
4581 * the link speed is not being forced.
4584 * Disable autoneg or autoneg disabled. No
4585 * speeds are selected.
4587 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE UINT32_C(0x0)
4588 /* Select all possible speeds for autoneg mode. */
4589 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
4591 * Select only the auto_link_speed speed for
4592 * autoneg mode. This mode has been DEPRECATED.
4593 * An HWRM client should not use this mode.
4595 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
4597 * Select the auto_link_speed or any speed below
4598 * that speed for autoneg. This mode has been
4599 * DEPRECATED. An HWRM client should not use
4602 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
4604 * Select the speeds based on the corresponding
4605 * link speed mask value that is provided.
4607 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
4608 uint8_t auto_duplex;
4610 * This is the duplex setting that will be used if the
4611 * autoneg_mode is "one_speed" or "one_or_below".
4613 /* Half Duplex will be requested. */
4614 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_HALF UINT32_C(0x0)
4615 /* Full duplex will be requested. */
4616 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_FULL UINT32_C(0x1)
4617 /* Both Half and Full dupex will be requested. */
4618 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_DUPLEX_BOTH UINT32_C(0x2)
4621 * This value is used to configure the pause that will be used
4622 * for autonegotiation. Add text on the usage of auto_pause and
4626 * When this bit is '1', Generation of tx pause messages has
4627 * been requested. Disabled otherwise.
4629 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX UINT32_C(0x1)
4631 * When this bit is '1', Reception of rx pause messages has been
4632 * requested. Disabled otherwise.
4634 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX UINT32_C(0x2)
4636 * When set to 1, the advertisement of pause is enabled. # When
4637 * the auto_mode is not set to none and this flag is set to 1,
4638 * then the auto_pause bits on this port are being advertised
4639 * and autoneg pause results are being interpreted. # When the
4640 * auto_mode is not set to none and this flag is set to 0, the
4641 * pause is forced as indicated in force_pause, and also
4642 * advertised as auto_pause bits, but the autoneg results are
4643 * not interpreted since the pause configuration is being
4644 * forced. # When the auto_mode is set to none and this flag is
4645 * set to 1, auto_pause bits should be ignored and should be set
4648 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
4650 uint16_t auto_link_speed;
4652 * This is the speed that will be used if the autoneg_mode is
4653 * "one_speed" or "one_or_below". If an unsupported speed is
4654 * selected, an error will be generated.
4656 /* 100Mb link speed */
4657 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
4658 /* 1Gb link speed */
4659 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
4660 /* 2Gb link speed */
4661 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
4662 /* 2.5Gb link speed */
4663 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
4664 /* 10Gb link speed */
4665 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
4666 /* 20Mb link speed */
4667 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
4668 /* 25Gb link speed */
4669 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
4670 /* 40Gb link speed */
4671 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
4672 /* 50Gb link speed */
4673 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
4674 /* 100Gb link speed */
4675 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
4676 /* 10Mb link speed */
4677 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
4678 uint16_t auto_link_speed_mask;
4680 * This is a mask of link speeds that will be used if
4681 * autoneg_mode is "mask". If unsupported speed is enabled an
4682 * error will be generated.
4684 /* 100Mb link speed (Half-duplex) */
4685 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MBHD \
4687 /* 100Mb link speed (Full-duplex) */
4688 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100MB \
4690 /* 1Gb link speed (Half-duplex) */
4691 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GBHD \
4693 /* 1Gb link speed (Full-duplex) */
4694 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_1GB \
4696 /* 2Gb link speed */
4697 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2GB \
4699 /* 2.5Gb link speed */
4700 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_2_5GB \
4702 /* 10Gb link speed */
4703 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4704 /* 20Gb link speed */
4705 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_20GB UINT32_C(0x80)
4706 /* 25Gb link speed */
4707 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_25GB \
4709 /* 40Gb link speed */
4710 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_40GB \
4712 /* 50Gb link speed */
4713 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_50GB \
4715 /* 100Gb link speed */
4716 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_100GB \
4718 /* 10Mb link speed (Half-duplex) */
4719 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MBHD \
4721 /* 10Mb link speed (Full-duplex) */
4722 #define HWRM_PORT_PHY_CFG_INPUT_AUTO_LINK_SPEED_MASK_10MB \
4725 /* This value controls the wirespeed feature. */
4726 /* Wirespeed feature is disabled. */
4727 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
4728 /* Wirespeed feature is enabled. */
4729 #define HWRM_PORT_PHY_CFG_INPUT_WIOUTPUTEED_ON UINT32_C(0x1)
4731 /* This value controls the loopback setting for the PHY. */
4732 /* No loopback is selected. Normal operation. */
4733 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_NONE UINT32_C(0x0)
4735 * The HW will be configured with local loopback
4736 * such that host data is sent back to the host
4737 * without modification.
4739 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_LOCAL UINT32_C(0x1)
4741 * The HW will be configured with remote
4742 * loopback such that port logic will send
4743 * packets back out the transmitter that are
4746 #define HWRM_PORT_PHY_CFG_INPUT_LPBK_REMOTE UINT32_C(0x2)
4747 uint8_t force_pause;
4749 * This value is used to configure the pause that will be used
4753 * When this bit is '1', Generation of tx pause messages is
4754 * supported. Disabled otherwise.
4756 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX UINT32_C(0x1)
4758 * When this bit is '1', Reception of rx pause messages is
4759 * supported. Disabled otherwise.
4761 #define HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX UINT32_C(0x2)
4763 uint32_t preemphasis;
4765 * This value controls the pre-emphasis to be used for the link.
4766 * Driver should not set this value (use enable.preemphasis = 0)
4767 * unless driver is sure of setting. Normally HWRM FW will
4768 * determine proper pre-emphasis.
4770 uint16_t eee_link_speed_mask;
4772 * Setting for link speed mask that is used to advertise speeds
4773 * during autonegotiation when EEE is enabled. This field is
4774 * valid only when EEE is enabled. The speeds specified in this
4775 * field shall be a subset of speeds specified in
4776 * auto_link_speed_mask. If EEE is enabled,then at least one
4777 * speed shall be provided in this mask.
4780 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD1 UINT32_C(0x1)
4781 /* 100Mb link speed (Full-duplex) */
4782 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_100MB UINT32_C(0x2)
4784 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD2 UINT32_C(0x4)
4785 /* 1Gb link speed (Full-duplex) */
4786 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_1GB UINT32_C(0x8)
4788 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD3 UINT32_C(0x10)
4790 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_RSVD4 UINT32_C(0x20)
4791 /* 10Gb link speed */
4792 #define HWRM_PORT_PHY_CFG_INPUT_EEE_LINK_SPEED_MASK_10GB UINT32_C(0x40)
4795 uint32_t tx_lpi_timer;
4798 * Reuested setting of TX LPI timer in microseconds. This field
4799 * is valid only when EEE is enabled and TX LPI is enabled.
4801 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
4802 #define HWRM_PORT_PHY_CFG_INPUT_TX_LPI_TIMER_SFT 0
4803 } __attribute__((packed));
4805 /* Output (16 bytes) */
4806 struct hwrm_port_phy_cfg_output {
4807 uint16_t error_code;
4809 * Pass/Fail or error type Note: receiver to verify the in
4810 * parameters, and fail the call with an error when appropriate
4813 /* This field returns the type of original request. */
4815 /* This field provides original sequence number of the command. */
4818 * This field is the length of the response in bytes. The last
4819 * byte of the response is a valid flag that will read as '1'
4820 * when the command has been completely written to memory.
4828 * This field is used in Output records to indicate that the
4829 * output is completely written to RAM. This field should be
4830 * read as '1' to indicate that the output has been completely
4831 * written. When writing a command completion or response to an
4832 * internal processor, the order of writes has to be such that
4833 * this field is written last.
4835 } __attribute__((packed));
4837 /* hwrm_port_phy_qcfg */
4838 /* Description: This command queries the PHY configuration for the port. */
4839 /* Input (24 bytes) */
4840 struct hwrm_port_phy_qcfg_input {
4843 * This value indicates what type of request this is. The format
4844 * for the rest of the command is determined by this field.
4848 * This value indicates the what completion ring the request
4849 * will be optionally completed on. If the value is -1, then no
4850 * CR completion will be generated. Any other value must be a
4851 * valid CR ring_id value for this function.
4854 /* This value indicates the command sequence number. */
4857 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
4858 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
4863 * This is the host address where the response will be written
4864 * when the request is complete. This area must be 16B aligned
4865 * and must be cleared to zero before the request is made.
4868 /* Port ID of port that is to be queried. */
4869 uint16_t unused_0[3];
4870 } __attribute__((packed));
4872 /* Output (96 bytes) */
4873 struct hwrm_port_phy_qcfg_output {
4874 uint16_t error_code;
4876 * Pass/Fail or error type Note: receiver to verify the in
4877 * parameters, and fail the call with an error when appropriate
4880 /* This field returns the type of original request. */
4882 /* This field provides original sequence number of the command. */
4885 * This field is the length of the response in bytes. The last
4886 * byte of the response is a valid flag that will read as '1'
4887 * when the command has been completely written to memory.
4890 /* This value indicates the current link status. */
4891 /* There is no link or cable detected. */
4892 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_NO_LINK UINT32_C(0x0)
4893 /* There is no link, but a cable has been detected. */
4894 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SIGNAL UINT32_C(0x1)
4895 /* There is a link. */
4896 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK UINT32_C(0x2)
4898 uint16_t link_speed;
4899 /* This value indicates the current link speed of the connection. */
4900 /* 100Mb link speed */
4901 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB UINT32_C(0x1)
4902 /* 1Gb link speed */
4903 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB UINT32_C(0xa)
4904 /* 2Gb link speed */
4905 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB UINT32_C(0x14)
4906 /* 2.5Gb link speed */
4907 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB UINT32_C(0x19)
4908 /* 10Gb link speed */
4909 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB UINT32_C(0x64)
4910 /* 20Mb link speed */
4911 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB UINT32_C(0xc8)
4912 /* 25Gb link speed */
4913 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB UINT32_C(0xfa)
4914 /* 40Gb link speed */
4915 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB UINT32_C(0x190)
4916 /* 50Gb link speed */
4917 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB UINT32_C(0x1f4)
4918 /* 100Gb link speed */
4919 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB UINT32_C(0x3e8)
4920 /* 10Mb link speed */
4921 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB UINT32_C(0xffff)
4923 /* This value is indicates the duplex of the current connection. */
4924 /* Half Duplex connection. */
4925 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_HALF UINT32_C(0x0)
4926 /* Full duplex connection. */
4927 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_FULL UINT32_C(0x1)
4930 * This value is used to indicate the current pause
4931 * configuration. When autoneg is enabled, this value represents
4932 * the autoneg results of pause configuration.
4935 * When this bit is '1', Generation of tx pause messages is
4936 * supported. Disabled otherwise.
4938 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX UINT32_C(0x1)
4940 * When this bit is '1', Reception of rx pause messages is
4941 * supported. Disabled otherwise.
4943 #define HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX UINT32_C(0x2)
4944 uint16_t support_speeds;
4946 * The supported speeds for the port. This is a bit mask. For
4947 * each speed that is supported, the corrresponding bit will be
4950 /* 100Mb link speed (Half-duplex) */
4951 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MBHD UINT32_C(0x1)
4952 /* 100Mb link speed (Full-duplex) */
4953 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100MB UINT32_C(0x2)
4954 /* 1Gb link speed (Half-duplex) */
4955 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GBHD UINT32_C(0x4)
4956 /* 1Gb link speed (Full-duplex) */
4957 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_1GB UINT32_C(0x8)
4958 /* 2Gb link speed */
4959 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2GB UINT32_C(0x10)
4960 /* 2.5Gb link speed */
4961 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB UINT32_C(0x20)
4962 /* 10Gb link speed */
4963 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10GB UINT32_C(0x40)
4964 /* 20Gb link speed */
4965 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB UINT32_C(0x80)
4966 /* 25Gb link speed */
4967 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_25GB UINT32_C(0x100)
4968 /* 40Gb link speed */
4969 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_40GB UINT32_C(0x200)
4970 /* 50Gb link speed */
4971 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_50GB UINT32_C(0x400)
4972 /* 100Gb link speed */
4973 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_100GB UINT32_C(0x800)
4974 /* 10Mb link speed (Half-duplex) */
4975 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MBHD UINT32_C(0x1000)
4976 /* 10Mb link speed (Full-duplex) */
4977 #define HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_10MB UINT32_C(0x2000)
4978 uint16_t force_link_speed;
4980 * Current setting of forced link speed. When the link speed is
4981 * not being forced, this value shall be set to 0.
4983 /* 100Mb link speed */
4984 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100MB UINT32_C(0x1)
4985 /* 1Gb link speed */
4986 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_1GB UINT32_C(0xa)
4987 /* 2Gb link speed */
4988 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2GB UINT32_C(0x14)
4989 /* 2.5Gb link speed */
4990 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_2_5GB UINT32_C(0x19)
4991 /* 10Gb link speed */
4992 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10GB UINT32_C(0x64)
4993 /* 20Mb link speed */
4994 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_20GB UINT32_C(0xc8)
4995 /* 25Gb link speed */
4996 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_25GB UINT32_C(0xfa)
4997 /* 40Gb link speed */
4998 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_40GB UINT32_C(0x190)
4999 /* 50Gb link speed */
5000 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_50GB UINT32_C(0x1f4)
5001 /* 100Gb link speed */
5002 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_100GB UINT32_C(0x3e8)
5003 /* 10Mb link speed */
5004 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_LINK_SPEED_10MB UINT32_C(0xffff)
5006 /* Current setting of auto negotiation mode. */
5008 * Disable autoneg or autoneg disabled. No
5009 * speeds are selected.
5011 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE UINT32_C(0x0)
5012 /* Select all possible speeds for autoneg mode. */
5013 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ALL_SPEEDS UINT32_C(0x1)
5015 * Select only the auto_link_speed speed for
5016 * autoneg mode. This mode has been DEPRECATED.
5017 * An HWRM client should not use this mode.
5019 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_SPEED UINT32_C(0x2)
5021 * Select the auto_link_speed or any speed below
5022 * that speed for autoneg. This mode has been
5023 * DEPRECATED. An HWRM client should not use
5026 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_ONE_OR_BELOW UINT32_C(0x3)
5028 * Select the speeds based on the corresponding
5029 * link speed mask value that is provided.
5031 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_SPEED_MASK UINT32_C(0x4)
5034 * Current setting of pause autonegotiation. Move autoneg_pause
5038 * When this bit is '1', Generation of tx pause messages has
5039 * been requested. Disabled otherwise.
5041 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_TX UINT32_C(0x1)
5043 * When this bit is '1', Reception of rx pause messages has been
5044 * requested. Disabled otherwise.
5046 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_RX UINT32_C(0x2)
5048 * When set to 1, the advertisement of pause is enabled. # When
5049 * the auto_mode is not set to none and this flag is set to 1,
5050 * then the auto_pause bits on this port are being advertised
5051 * and autoneg pause results are being interpreted. # When the
5052 * auto_mode is not set to none and this flag is set to 0, the
5053 * pause is forced as indicated in force_pause, and also
5054 * advertised as auto_pause bits, but the autoneg results are
5055 * not interpreted since the pause configuration is being
5056 * forced. # When the auto_mode is set to none and this flag is
5057 * set to 1, auto_pause bits should be ignored and should be set
5060 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_PAUSE_AUTONEG_PAUSE UINT32_C(0x4)
5061 uint16_t auto_link_speed;
5063 * Current setting for auto_link_speed. This field is only valid
5064 * when auto_mode is set to "one_speed" or "one_or_below".
5066 /* 100Mb link speed */
5067 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100MB UINT32_C(0x1)
5068 /* 1Gb link speed */
5069 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_1GB UINT32_C(0xa)
5070 /* 2Gb link speed */
5071 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2GB UINT32_C(0x14)
5072 /* 2.5Gb link speed */
5073 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_2_5GB UINT32_C(0x19)
5074 /* 10Gb link speed */
5075 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10GB UINT32_C(0x64)
5076 /* 20Mb link speed */
5077 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_20GB UINT32_C(0xc8)
5078 /* 25Gb link speed */
5079 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_25GB UINT32_C(0xfa)
5080 /* 40Gb link speed */
5081 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_40GB UINT32_C(0x190)
5082 /* 50Gb link speed */
5083 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_50GB UINT32_C(0x1f4)
5084 /* 100Gb link speed */
5085 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_100GB UINT32_C(0x3e8)
5086 /* 10Mb link speed */
5087 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_10MB UINT32_C(0xffff)
5088 uint16_t auto_link_speed_mask;
5090 * Current setting for auto_link_speed_mask that is used to
5091 * advertise speeds during autonegotiation. This field is only
5092 * valid when auto_mode is set to "mask". The speeds specified
5093 * in this field shall be a subset of supported speeds on this
5096 /* 100Mb link speed (Half-duplex) */
5097 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MBHD \
5099 /* 100Mb link speed (Full-duplex) */
5100 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100MB \
5102 /* 1Gb link speed (Half-duplex) */
5103 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GBHD \
5105 /* 1Gb link speed (Full-duplex) */
5106 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_1GB UINT32_C(0x8)
5107 /* 2Gb link speed */
5108 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2GB \
5110 /* 2.5Gb link speed */
5111 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_2_5GB \
5113 /* 10Gb link speed */
5114 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10GB \
5116 /* 20Gb link speed */
5117 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_20GB \
5119 /* 25Gb link speed */
5120 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_25GB \
5122 /* 40Gb link speed */
5123 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_40GB \
5125 /* 50Gb link speed */
5126 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_50GB \
5128 /* 100Gb link speed */
5129 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_100GB \
5131 /* 10Mb link speed (Half-duplex) */
5132 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MBHD \
5134 /* 10Mb link speed (Full-duplex) */
5135 #define HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_LINK_SPEED_MASK_10MB \
5138 /* Current setting for wirespeed. */
5139 /* Wirespeed feature is disabled. */
5140 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_OFF UINT32_C(0x0)
5141 /* Wirespeed feature is enabled. */
5142 #define HWRM_PORT_PHY_QCFG_OUTPUT_WIOUTPUTEED_ON UINT32_C(0x1)
5144 /* Current setting for loopback. */
5145 /* No loopback is selected. Normal operation. */
5146 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_NONE UINT32_C(0x0)
5148 * The HW will be configured with local loopback
5149 * such that host data is sent back to the host
5150 * without modification.
5152 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_LOCAL UINT32_C(0x1)
5154 * The HW will be configured with remote
5155 * loopback such that port logic will send
5156 * packets back out the transmitter that are
5159 #define HWRM_PORT_PHY_QCFG_OUTPUT_LPBK_REMOTE UINT32_C(0x2)
5160 uint8_t force_pause;
5162 * Current setting of forced pause. When the pause configuration
5163 * is not being forced, then this value shall be set to 0.
5166 * When this bit is '1', Generation of tx pause messages is
5167 * supported. Disabled otherwise.
5169 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_TX UINT32_C(0x1)
5171 * When this bit is '1', Reception of rx pause messages is
5172 * supported. Disabled otherwise.
5174 #define HWRM_PORT_PHY_QCFG_OUTPUT_FORCE_PAUSE_RX UINT32_C(0x2)
5175 uint8_t module_status;
5177 * This value indicates the current status of the optics module
5180 /* Module is inserted and accepted */
5181 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NONE UINT32_C(0x0)
5182 /* Module is rejected and transmit side Laser is disabled. */
5183 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_DISABLETX UINT32_C(0x1)
5184 /* Module mismatch warning. */
5185 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_WARNINGMSG UINT32_C(0x2)
5186 /* Module is rejected and powered down. */
5187 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_PWRDOWN UINT32_C(0x3)
5188 /* Module is not inserted. */
5189 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTINSERTED \
5191 /* Module status is not applicable. */
5192 #define HWRM_PORT_PHY_QCFG_OUTPUT_MODULE_STATUS_NOTAPPLICABLE \
5194 uint32_t preemphasis;
5195 /* Current setting for preemphasis. */
5197 /* This field represents the major version of the PHY. */
5199 /* This field represents the minor version of the PHY. */
5201 /* This field represents the build version of the PHY. */
5203 /* This value represents a PHY type. */
5205 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN UINT32_C(0x0)
5207 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR UINT32_C(0x1)
5208 /* BASE-KR4 (Deprecated) */
5209 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4 UINT32_C(0x2)
5211 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR UINT32_C(0x3)
5213 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR UINT32_C(0x4)
5214 /* BASE-KR2 (Deprecated) */
5215 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2 UINT32_C(0x5)
5217 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX UINT32_C(0x6)
5219 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR UINT32_C(0x7)
5221 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET UINT32_C(0x8)
5222 /* EEE capable BASE-T */
5223 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE UINT32_C(0x9)
5224 /* SGMII connected external PHY */
5225 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY UINT32_C(0xa)
5226 /* 25G_BASECR_CA_L */
5227 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L UINT32_C(0xb)
5228 /* 25G_BASECR_CA_S */
5229 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S UINT32_C(0xc)
5230 /* 25G_BASECR_CA_N */
5231 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N UINT32_C(0xd)
5233 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR UINT32_C(0xe)
5235 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4 UINT32_C(0xf)
5237 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4 UINT32_C(0x10)
5239 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4 UINT32_C(0x11)
5241 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4 UINT32_C(0x12)
5243 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10 UINT32_C(0x13)
5245 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4 UINT32_C(0x14)
5247 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4 UINT32_C(0x15)
5249 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4 UINT32_C(0x16)
5251 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4 UINT32_C(0x17)
5252 /* 40G_ACTIVE_CABLE */
5253 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE \
5255 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASET UINT32_C(0x19)
5257 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASESX UINT32_C(0x1a)
5259 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASECX UINT32_C(0x1b)
5261 /* This value represents a media type. */
5263 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_UNKNOWN UINT32_C(0x0)
5265 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP UINT32_C(0x1)
5266 /* Direct Attached Copper */
5267 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC UINT32_C(0x2)
5269 #define HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE UINT32_C(0x3)
5270 uint8_t xcvr_pkg_type;
5271 /* This value represents a transceiver type. */
5272 /* PHY and MAC are in the same package */
5273 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_INTERNAL \
5275 /* PHY and MAC are in different packages */
5276 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_PKG_TYPE_XCVR_EXTERNAL \
5278 uint8_t eee_config_phy_addr;
5280 * This field represents flags related to EEE configuration.
5281 * These EEE configuration flags are valid only when the
5282 * auto_mode is not set to none (in other words autonegotiation
5285 /* This field represents PHY address. */
5286 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_MASK UINT32_C(0x1f)
5287 #define HWRM_PORT_PHY_QCFG_OUTPUT_PHY_ADDR_SFT 0
5289 * When set to 1, Energy Efficient Ethernet (EEE) mode is
5290 * enabled. Speeds for autoneg with EEE mode enabled are based
5291 * on eee_link_speed_mask.
5293 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ENABLED UINT32_C(0x20)
5295 * This flag is valid only when eee_enabled is set to 1. # If
5296 * eee_enabled is set to 0, then EEE mode is disabled and this
5297 * flag shall be ignored. # If eee_enabled is set to 1 and this
5298 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5299 * is enabled and in use. # If eee_enabled is set to 1 and this
5300 * flag is set to 0, then Energy Efficient Ethernet (EEE) mode
5301 * is enabled but is currently not in use.
5303 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_ACTIVE UINT32_C(0x40)
5305 * This flag is valid only when eee_enabled is set to 1. # If
5306 * eee_enabled is set to 0, then EEE mode is disabled and this
5307 * flag shall be ignored. # If eee_enabled is set to 1 and this
5308 * flag is set to 1, then Energy Efficient Ethernet (EEE) mode
5309 * is enabled and TX LPI is enabled. # If eee_enabled is set to
5310 * 1 and this flag is set to 0, then Energy Efficient Ethernet
5311 * (EEE) mode is enabled but TX LPI is disabled.
5313 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_EEE_TX_LPI UINT32_C(0x80)
5315 * This field represents flags related to EEE configuration.
5316 * These EEE configuration flags are valid only when the
5317 * auto_mode is not set to none (in other words autonegotiation
5320 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_MASK UINT32_C(0xe0)
5321 #define HWRM_PORT_PHY_QCFG_OUTPUT_EEE_CONFIG_SFT 5
5322 uint8_t parallel_detect;
5323 /* Reserved field, set to 0 */
5325 * When set to 1, the parallel detection is used to determine
5326 * the speed of the link partner. Parallel detection is used
5327 * when a autonegotiation capable device is connected to a link
5328 * parter that is not capable of autonegotiation.
5330 #define HWRM_PORT_PHY_QCFG_OUTPUT_PARALLEL_DETECT UINT32_C(0x1)
5331 /* Reserved field, set to 0 */
5332 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_MASK UINT32_C(0xfe)
5333 #define HWRM_PORT_PHY_QCFG_OUTPUT_RESERVED_SFT 1
5334 uint16_t link_partner_adv_speeds;
5336 * The advertised speeds for the port by the link partner. Each
5337 * advertised speed will be set to '1'.
5339 /* 100Mb link speed (Half-duplex) */
5340 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MBHD \
5342 /* 100Mb link speed (Full-duplex) */
5343 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100MB \
5345 /* 1Gb link speed (Half-duplex) */
5346 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GBHD \
5348 /* 1Gb link speed (Full-duplex) */
5349 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_1GB \
5351 /* 2Gb link speed */
5352 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2GB \
5354 /* 2.5Gb link speed */
5355 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_2_5GB \
5357 /* 10Gb link speed */
5358 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10GB \
5360 /* 20Gb link speed */
5361 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_20GB \
5363 /* 25Gb link speed */
5364 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_25GB \
5366 /* 40Gb link speed */
5367 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_40GB \
5369 /* 50Gb link speed */
5370 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_50GB \
5372 /* 100Gb link speed */
5373 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_100GB \
5375 /* 10Mb link speed (Half-duplex) */
5376 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MBHD \
5378 /* 10Mb link speed (Full-duplex) */
5379 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_SPEEDS_10MB \
5381 uint8_t link_partner_adv_auto_mode;
5383 * The advertised autoneg for the port by the link partner. This
5384 * field is deprecated and should be set to 0.
5387 * Disable autoneg or autoneg disabled. No
5388 * speeds are selected.
5390 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_NONE \
5392 /* Select all possible speeds for autoneg mode. */
5394 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ALL_SPEEDS \
5397 * Select only the auto_link_speed speed for
5398 * autoneg mode. This mode has been DEPRECATED.
5399 * An HWRM client should not use this mode.
5402 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_SPEED \
5405 * Select the auto_link_speed or any speed below
5406 * that speed for autoneg. This mode has been
5407 * DEPRECATED. An HWRM client should not use
5411 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_ONE_OR_BELOW \
5414 * Select the speeds based on the corresponding
5415 * link speed mask value that is provided.
5418 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_AUTO_MODE_SPEED_MASK \
5420 uint8_t link_partner_adv_pause;
5421 /* The advertised pause settings on the port by the link partner. */
5423 * When this bit is '1', Generation of tx pause messages is
5424 * supported. Disabled otherwise.
5426 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_TX \
5429 * When this bit is '1', Reception of rx pause messages is
5430 * supported. Disabled otherwise.
5432 #define HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_PAUSE_RX \
5434 uint16_t adv_eee_link_speed_mask;
5436 * Current setting for link speed mask that is used to advertise
5437 * speeds during autonegotiation when EEE is enabled. This field
5438 * is valid only when eee_enabled flags is set to 1. The speeds
5439 * specified in this field shall be a subset of speeds specified
5440 * in auto_link_speed_mask.
5443 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5445 /* 100Mb link speed (Full-duplex) */
5446 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_100MB \
5449 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5451 /* 1Gb link speed (Full-duplex) */
5452 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_1GB \
5455 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5458 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5460 /* 10Gb link speed */
5461 #define HWRM_PORT_PHY_QCFG_OUTPUT_ADV_EEE_LINK_SPEED_MASK_10GB \
5463 uint16_t link_partner_adv_eee_link_speed_mask;
5465 * Current setting for link speed mask that is advertised by the
5466 * link partner when EEE is enabled. This field is valid only
5467 * when eee_enabled flags is set to 1.
5471 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD1 \
5473 /* 100Mb link speed (Full-duplex) */
5475 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_100MB \
5479 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD2 \
5481 /* 1Gb link speed (Full-duplex) */
5483 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_1GB \
5487 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD3 \
5491 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_RSVD4 \
5493 /* 10Gb link speed */
5495 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_PARTNER_ADV_EEE_LINK_SPEED_MASK_10GB \
5497 uint32_t xcvr_identifier_type_tx_lpi_timer;
5498 /* This value represents transceiver identifier type. */
5500 * Current setting of TX LPI timer in microseconds. This field
5501 * is valid only when_eee_enabled flag is set to 1 and
5502 * tx_lpi_enabled is set to 1.
5504 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_MASK UINT32_C(0xffffff)
5505 #define HWRM_PORT_PHY_QCFG_OUTPUT_TX_LPI_TIMER_SFT 0
5506 /* This value represents transceiver identifier type. */
5507 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_MASK \
5508 UINT32_C(0xff000000)
5509 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFT 24
5511 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_UNKNOWN \
5512 (UINT32_C(0x0) << 24)
5513 /* SFP/SFP+/SFP28 */
5514 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_SFP \
5515 (UINT32_C(0x3) << 24)
5517 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP \
5518 (UINT32_C(0xc) << 24)
5520 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFPPLUS \
5521 (UINT32_C(0xd) << 24)
5523 #define HWRM_PORT_PHY_QCFG_OUTPUT_XCVR_IDENTIFIER_TYPE_QSFP28 \
5524 (UINT32_C(0x11) << 24)
5527 * This value represents the current configuration of Forward
5528 * Error Correction (FEC) on the port.
5531 * When set to 1, then FEC is not supported on this port. If
5532 * this flag is set to 1, then all other FEC configuration flags
5533 * shall be ignored. When set to 0, then FEC is supported as
5534 * indicated by other configuration flags. If no cable is
5535 * attached and the HWRM does not yet know the FEC capability,
5536 * then the HWRM shall set this flag to 1 when reporting FEC
5539 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_NONE_SUPPORTED \
5542 * When set to 1, then FEC autonegotiation is supported on this
5543 * port. When set to 0, then FEC autonegotiation is not
5544 * supported on this port.
5546 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_SUPPORTED \
5549 * When set to 1, then FEC autonegotiation is enabled on this
5550 * port. When set to 0, then FEC autonegotiation is disabled if
5551 * supported. This flag should be ignored if FEC autonegotiation
5552 * is not supported on this port.
5554 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_AUTONEG_ENABLED \
5557 * When set to 1, then FEC CLAUSE 74 (Fire Code) is supported on
5558 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5559 * not supported on this port.
5561 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_SUPPORTED \
5564 * When set to 1, then FEC CLAUSE 74 (Fire Code) is enabled on
5565 * this port. When set to 0, then FEC CLAUSE 74 (Fire Code) is
5566 * disabled if supported. This flag should be ignored if FEC
5567 * CLAUSE 74 is not supported on this port.
5569 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE74_ENABLED \
5572 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is supported
5573 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5574 * Solomon) is not supported on this port.
5576 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_SUPPORTED \
5579 * When set to 1, then FEC CLAUSE 91 (Reed Solomon) is enabled
5580 * on this port. When set to 0, then FEC CLAUSE 91 (Reed
5581 * Solomon) is disabled if supported. This flag should be
5582 * ignored if FEC CLAUSE 91 is not supported on this port.
5584 #define HWRM_PORT_PHY_QCFG_OUTPUT_FEC_CFG_FEC_CLAUSE91_ENABLED \
5586 uint8_t duplex_state;
5588 * This value is indicates the duplex of the current connection
5591 /* Half Duplex connection. */
5592 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_HALF UINT32_C(0x0)
5593 /* Full duplex connection. */
5594 #define HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_STATE_FULL UINT32_C(0x1)
5596 char phy_vendor_name[16];
5598 * Up to 16 bytes of null padded ASCII string representing PHY
5599 * vendor. If the string is set to null, then the vendor name is
5602 char phy_vendor_partnumber[16];
5604 * Up to 16 bytes of null padded ASCII string that identifies
5605 * vendor specific part number of the PHY. If the string is set
5606 * to null, then the vendor specific part number is not
5615 * This field is used in Output records to indicate that the
5616 * output is completely written to RAM. This field should be
5617 * read as '1' to indicate that the output has been completely
5618 * written. When writing a command completion or response to an
5619 * internal processor, the order of writes has to be such that
5620 * this field is written last.
5622 } __attribute__((packed));
5624 /* hwrm_port_qstats */
5625 /* Description: This function returns per port Ethernet statistics. */
5626 /* Input (40 bytes) */
5627 struct hwrm_port_qstats_input {
5630 * This value indicates what type of request this is. The format
5631 * for the rest of the command is determined by this field.
5635 * This value indicates the what completion ring the request
5636 * will be optionally completed on. If the value is -1, then no
5637 * CR completion will be generated. Any other value must be a
5638 * valid CR ring_id value for this function.
5641 /* This value indicates the command sequence number. */
5644 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5645 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5650 * This is the host address where the response will be written
5651 * when the request is complete. This area must be 16B aligned
5652 * and must be cleared to zero before the request is made.
5655 /* Port ID of port that is being queried. */
5658 uint8_t unused_2[3];
5660 uint64_t tx_stat_host_addr;
5661 /* This is the host address where Tx port statistics will be stored */
5662 uint64_t rx_stat_host_addr;
5663 /* This is the host address where Rx port statistics will be stored */
5664 } __attribute__((packed));
5666 /* Output (16 bytes) */
5667 struct hwrm_port_qstats_output {
5668 uint16_t error_code;
5670 * Pass/Fail or error type Note: receiver to verify the in
5671 * parameters, and fail the call with an error when appropriate
5674 /* This field returns the type of original request. */
5676 /* This field provides original sequence number of the command. */
5679 * This field is the length of the response in bytes. The last
5680 * byte of the response is a valid flag that will read as '1'
5681 * when the command has been completely written to memory.
5683 uint16_t tx_stat_size;
5684 /* The size of TX port statistics block in bytes. */
5685 uint16_t rx_stat_size;
5686 /* The size of RX port statistics block in bytes. */
5692 * This field is used in Output records to indicate that the
5693 * output is completely written to RAM. This field should be
5694 * read as '1' to indicate that the output has been completely
5695 * written. When writing a command completion or response to an
5696 * internal processor, the order of writes has to be such that
5697 * this field is written last.
5699 } __attribute__((packed));
5701 /* hwrm_port_clr_stats */
5703 * Description: This function clears per port statistics. The HWRM shall not
5704 * allow a VF driver to clear port statistics. The HWRM shall not allow a PF
5705 * driver to clear port statistics in a partitioning mode. The HWRM may allow a
5706 * PF driver to clear port statistics in the non-partitioning mode.
5708 /* Input (24 bytes) */
5709 struct hwrm_port_clr_stats_input {
5712 * This value indicates what type of request this is. The format
5713 * for the rest of the command is determined by this field.
5717 * This value indicates the what completion ring the request
5718 * will be optionally completed on. If the value is -1, then no
5719 * CR completion will be generated. Any other value must be a
5720 * valid CR ring_id value for this function.
5723 /* This value indicates the command sequence number. */
5726 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5727 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5732 * This is the host address where the response will be written
5733 * when the request is complete. This area must be 16B aligned
5734 * and must be cleared to zero before the request is made.
5737 /* Port ID of port that is being queried. */
5738 uint16_t unused_0[3];
5739 } __attribute__((packed));
5741 /* Output (16 bytes) */
5742 struct hwrm_port_clr_stats_output {
5743 uint16_t error_code;
5745 * Pass/Fail or error type Note: receiver to verify the in
5746 * parameters, and fail the call with an error when appropriate
5749 /* This field returns the type of original request. */
5751 /* This field provides original sequence number of the command. */
5754 * This field is the length of the response in bytes. The last
5755 * byte of the response is a valid flag that will read as '1'
5756 * when the command has been completely written to memory.
5764 * This field is used in Output records to indicate that the
5765 * output is completely written to RAM. This field should be
5766 * read as '1' to indicate that the output has been completely
5767 * written. When writing a command completion or response to an
5768 * internal processor, the order of writes has to be such that
5769 * this field is written last.
5771 } __attribute__((packed));
5773 /* hwrm_port_led_cfg */
5775 * Description: This function is used to configure LEDs on a given port. Each
5776 * port has individual set of LEDs associated with it. These LEDs are used for
5777 * speed/link configuration as well as activity indicator configuration. Up to
5778 * three LEDs can be configured, one for activity and two for speeds.
5780 /* Input (64 bytes) */
5781 struct hwrm_port_led_cfg_input {
5784 * This value indicates what type of request this is. The format
5785 * for the rest of the command is determined by this field.
5789 * This value indicates the what completion ring the request
5790 * will be optionally completed on. If the value is -1, then no
5791 * CR completion will be generated. Any other value must be a
5792 * valid CR ring_id value for this function.
5795 /* This value indicates the command sequence number. */
5798 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
5799 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
5804 * This is the host address where the response will be written
5805 * when the request is complete. This area must be 16B aligned
5806 * and must be cleared to zero before the request is made.
5809 /* This bit must be '1' for the led0_id field to be configured. */
5810 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_ID UINT32_C(0x1)
5811 /* This bit must be '1' for the led0_state field to be configured. */
5812 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_STATE UINT32_C(0x2)
5813 /* This bit must be '1' for the led0_color field to be configured. */
5814 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_COLOR UINT32_C(0x4)
5816 * This bit must be '1' for the led0_blink_on field to be
5819 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_ON UINT32_C(0x8)
5821 * This bit must be '1' for the led0_blink_off field to be
5824 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_BLINK_OFF UINT32_C(0x10)
5826 * This bit must be '1' for the led0_group_id field to be
5829 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED0_GROUP_ID UINT32_C(0x20)
5830 /* This bit must be '1' for the led1_id field to be configured. */
5831 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_ID UINT32_C(0x40)
5832 /* This bit must be '1' for the led1_state field to be configured. */
5833 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_STATE UINT32_C(0x80)
5834 /* This bit must be '1' for the led1_color field to be configured. */
5835 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_COLOR UINT32_C(0x100)
5837 * This bit must be '1' for the led1_blink_on field to be
5840 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_ON UINT32_C(0x200)
5842 * This bit must be '1' for the led1_blink_off field to be
5845 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_BLINK_OFF UINT32_C(0x400)
5847 * This bit must be '1' for the led1_group_id field to be
5850 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED1_GROUP_ID UINT32_C(0x800)
5851 /* This bit must be '1' for the led2_id field to be configured. */
5852 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_ID UINT32_C(0x1000)
5853 /* This bit must be '1' for the led2_state field to be configured. */
5854 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_STATE UINT32_C(0x2000)
5855 /* This bit must be '1' for the led2_color field to be configured. */
5856 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_COLOR UINT32_C(0x4000)
5858 * This bit must be '1' for the led2_blink_on field to be
5861 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_ON UINT32_C(0x8000)
5863 * This bit must be '1' for the led2_blink_off field to be
5866 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_BLINK_OFF UINT32_C(0x10000)
5868 * This bit must be '1' for the led2_group_id field to be
5871 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED2_GROUP_ID UINT32_C(0x20000)
5872 /* This bit must be '1' for the led3_id field to be configured. */
5873 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_ID UINT32_C(0x40000)
5874 /* This bit must be '1' for the led3_state field to be configured. */
5875 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_STATE UINT32_C(0x80000)
5876 /* This bit must be '1' for the led3_color field to be configured. */
5877 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_COLOR UINT32_C(0x100000)
5879 * This bit must be '1' for the led3_blink_on field to be
5882 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_ON UINT32_C(0x200000)
5884 * This bit must be '1' for the led3_blink_off field to be
5887 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_BLINK_OFF \
5890 * This bit must be '1' for the led3_group_id field to be
5893 #define HWRM_PORT_LED_CFG_INPUT_ENABLES_LED3_GROUP_ID UINT32_C(0x800000)
5895 /* Port ID of port whose LEDs are configured. */
5898 * The number of LEDs that are being configured. Up to 4 LEDs
5899 * can be configured with this command.
5902 /* Reserved field. */
5904 /* An identifier for the LED #0. */
5906 /* The requested state of the LED #0. */
5907 /* Default state of the LED */
5908 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
5910 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_OFF UINT32_C(0x1)
5912 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_ON UINT32_C(0x2)
5914 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINK UINT32_C(0x3)
5915 /* Blink Alternately */
5916 #define HWRM_PORT_LED_CFG_INPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
5918 /* The requested color of LED #0. */
5920 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
5922 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_AMBER UINT32_C(0x1)
5924 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREEN UINT32_C(0x2)
5925 /* Green or Amber */
5926 #define HWRM_PORT_LED_CFG_INPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
5928 uint16_t led0_blink_on;
5930 * If the LED #0 state is "blink" or "blinkalt", then this field
5931 * represents the requested time in milliseconds to keep LED on
5934 uint16_t led0_blink_off;
5936 * If the LED #0 state is "blink" or "blinkalt", then this field
5937 * represents the requested time in milliseconds to keep LED off
5940 uint8_t led0_group_id;
5942 * An identifier for the group of LEDs that LED #0 belongs to.
5943 * If set to 0, then the LED #0 shall not be grouped and shall
5944 * be treated as an individual resource. For all other non-zero
5945 * values of this field, LED #0 shall be grouped together with
5946 * the LEDs with the same group ID value.
5949 /* Reserved field. */
5951 /* An identifier for the LED #1. */
5953 /* The requested state of the LED #1. */
5954 /* Default state of the LED */
5955 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
5957 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_OFF UINT32_C(0x1)
5959 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_ON UINT32_C(0x2)
5961 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINK UINT32_C(0x3)
5962 /* Blink Alternately */
5963 #define HWRM_PORT_LED_CFG_INPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
5965 /* The requested color of LED #1. */
5967 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
5969 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_AMBER UINT32_C(0x1)
5971 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREEN UINT32_C(0x2)
5972 /* Green or Amber */
5973 #define HWRM_PORT_LED_CFG_INPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
5975 uint16_t led1_blink_on;
5977 * If the LED #1 state is "blink" or "blinkalt", then this field
5978 * represents the requested time in milliseconds to keep LED on
5981 uint16_t led1_blink_off;
5983 * If the LED #1 state is "blink" or "blinkalt", then this field
5984 * represents the requested time in milliseconds to keep LED off
5987 uint8_t led1_group_id;
5989 * An identifier for the group of LEDs that LED #1 belongs to.
5990 * If set to 0, then the LED #1 shall not be grouped and shall
5991 * be treated as an individual resource. For all other non-zero
5992 * values of this field, LED #1 shall be grouped together with
5993 * the LEDs with the same group ID value.
5996 /* Reserved field. */
5998 /* An identifier for the LED #2. */
6000 /* The requested state of the LED #2. */
6001 /* Default state of the LED */
6002 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6004 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_OFF UINT32_C(0x1)
6006 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_ON UINT32_C(0x2)
6008 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINK UINT32_C(0x3)
6009 /* Blink Alternately */
6010 #define HWRM_PORT_LED_CFG_INPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6012 /* The requested color of LED #2. */
6014 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6016 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6018 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6019 /* Green or Amber */
6020 #define HWRM_PORT_LED_CFG_INPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6022 uint16_t led2_blink_on;
6024 * If the LED #2 state is "blink" or "blinkalt", then this field
6025 * represents the requested time in milliseconds to keep LED on
6028 uint16_t led2_blink_off;
6030 * If the LED #2 state is "blink" or "blinkalt", then this field
6031 * represents the requested time in milliseconds to keep LED off
6034 uint8_t led2_group_id;
6036 * An identifier for the group of LEDs that LED #2 belongs to.
6037 * If set to 0, then the LED #2 shall not be grouped and shall
6038 * be treated as an individual resource. For all other non-zero
6039 * values of this field, LED #2 shall be grouped together with
6040 * the LEDs with the same group ID value.
6043 /* Reserved field. */
6045 /* An identifier for the LED #3. */
6047 /* The requested state of the LED #3. */
6048 /* Default state of the LED */
6049 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6051 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_OFF UINT32_C(0x1)
6053 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_ON UINT32_C(0x2)
6055 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINK UINT32_C(0x3)
6056 /* Blink Alternately */
6057 #define HWRM_PORT_LED_CFG_INPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6059 /* The requested color of LED #3. */
6061 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6063 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6065 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6066 /* Green or Amber */
6067 #define HWRM_PORT_LED_CFG_INPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6069 uint16_t led3_blink_on;
6071 * If the LED #3 state is "blink" or "blinkalt", then this field
6072 * represents the requested time in milliseconds to keep LED on
6075 uint16_t led3_blink_off;
6077 * If the LED #3 state is "blink" or "blinkalt", then this field
6078 * represents the requested time in milliseconds to keep LED off
6081 uint8_t led3_group_id;
6083 * An identifier for the group of LEDs that LED #3 belongs to.
6084 * If set to 0, then the LED #3 shall not be grouped and shall
6085 * be treated as an individual resource. For all other non-zero
6086 * values of this field, LED #3 shall be grouped together with
6087 * the LEDs with the same group ID value.
6090 /* Reserved field. */
6091 } __attribute__((packed));
6093 /* Output (16 bytes) */
6094 struct hwrm_port_led_cfg_output {
6095 uint16_t error_code;
6097 * Pass/Fail or error type Note: receiver to verify the in
6098 * parameters, and fail the call with an error when appropriate
6101 /* This field returns the type of original request. */
6103 /* This field provides original sequence number of the command. */
6106 * This field is the length of the response in bytes. The last
6107 * byte of the response is a valid flag that will read as '1'
6108 * when the command has been completely written to memory.
6116 * This field is used in Output records to indicate that the
6117 * output is completely written to RAM. This field should be
6118 * read as '1' to indicate that the output has been completely
6119 * written. When writing a command completion or response to an
6120 * internal processor, the order of writes has to be such that
6121 * this field is written last.
6123 } __attribute__((packed));
6125 /* hwrm_port_led_qcfg */
6127 * Description: This function is used to query configuration of LEDs on a given
6128 * port. Each port has individual set of LEDs associated with it. These LEDs are
6129 * used for speed/link configuration as well as activity indicator
6130 * configuration. Up to three LEDs can be configured, one for activity and two
6133 /* Input (24 bytes) */
6134 struct hwrm_port_led_qcfg_input {
6137 * This value indicates what type of request this is. The format
6138 * for the rest of the command is determined by this field.
6142 * This value indicates the what completion ring the request
6143 * will be optionally completed on. If the value is -1, then no
6144 * CR completion will be generated. Any other value must be a
6145 * valid CR ring_id value for this function.
6148 /* This value indicates the command sequence number. */
6151 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6152 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6157 * This is the host address where the response will be written
6158 * when the request is complete. This area must be 16B aligned
6159 * and must be cleared to zero before the request is made.
6162 /* Port ID of port whose LED configuration is being queried. */
6163 uint16_t unused_0[3];
6164 } __attribute__((packed));
6166 /* Output (56 bytes) */
6167 struct hwrm_port_led_qcfg_output {
6168 uint16_t error_code;
6170 * Pass/Fail or error type Note: receiver to verify the in
6171 * parameters, and fail the call with an error when appropriate
6174 /* This field returns the type of original request. */
6176 /* This field provides original sequence number of the command. */
6179 * This field is the length of the response in bytes. The last
6180 * byte of the response is a valid flag that will read as '1'
6181 * when the command has been completely written to memory.
6185 * The number of LEDs that are configured on this port. Up to 4
6186 * LEDs can be returned in the response.
6189 /* An identifier for the LED #0. */
6191 /* The type of LED #0. */
6193 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6195 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6197 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6199 /* The current state of the LED #0. */
6200 /* Default state of the LED */
6201 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_DEFAULT UINT32_C(0x0)
6203 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_OFF UINT32_C(0x1)
6205 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_ON UINT32_C(0x2)
6207 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINK UINT32_C(0x3)
6208 /* Blink Alternately */
6209 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_STATE_BLINKALT UINT32_C(0x4)
6211 /* The color of LED #0. */
6213 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_DEFAULT UINT32_C(0x0)
6215 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_AMBER UINT32_C(0x1)
6217 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREEN UINT32_C(0x2)
6218 /* Green or Amber */
6219 #define HWRM_PORT_LED_QCFG_OUTPUT_LED0_COLOR_GREENAMBER UINT32_C(0x3)
6221 uint16_t led0_blink_on;
6223 * If the LED #0 state is "blink" or "blinkalt", then this field
6224 * represents the requested time in milliseconds to keep LED on
6227 uint16_t led0_blink_off;
6229 * If the LED #0 state is "blink" or "blinkalt", then this field
6230 * represents the requested time in milliseconds to keep LED off
6233 uint8_t led0_group_id;
6235 * An identifier for the group of LEDs that LED #0 belongs to.
6236 * If set to 0, then the LED #0 is not grouped. For all other
6237 * non-zero values of this field, LED #0 is grouped together
6238 * with the LEDs with the same group ID value.
6241 /* An identifier for the LED #1. */
6243 /* The type of LED #1. */
6245 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6247 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6249 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6251 /* The current state of the LED #1. */
6252 /* Default state of the LED */
6253 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_DEFAULT UINT32_C(0x0)
6255 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_OFF UINT32_C(0x1)
6257 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_ON UINT32_C(0x2)
6259 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINK UINT32_C(0x3)
6260 /* Blink Alternately */
6261 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_STATE_BLINKALT UINT32_C(0x4)
6263 /* The color of LED #1. */
6265 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_DEFAULT UINT32_C(0x0)
6267 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_AMBER UINT32_C(0x1)
6269 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREEN UINT32_C(0x2)
6270 /* Green or Amber */
6271 #define HWRM_PORT_LED_QCFG_OUTPUT_LED1_COLOR_GREENAMBER UINT32_C(0x3)
6273 uint16_t led1_blink_on;
6275 * If the LED #1 state is "blink" or "blinkalt", then this field
6276 * represents the requested time in milliseconds to keep LED on
6279 uint16_t led1_blink_off;
6281 * If the LED #1 state is "blink" or "blinkalt", then this field
6282 * represents the requested time in milliseconds to keep LED off
6285 uint8_t led1_group_id;
6287 * An identifier for the group of LEDs that LED #1 belongs to.
6288 * If set to 0, then the LED #1 is not grouped. For all other
6289 * non-zero values of this field, LED #1 is grouped together
6290 * with the LEDs with the same group ID value.
6293 /* An identifier for the LED #2. */
6295 /* The type of LED #2. */
6297 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6299 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6301 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6303 /* The current state of the LED #2. */
6304 /* Default state of the LED */
6305 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_DEFAULT UINT32_C(0x0)
6307 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_OFF UINT32_C(0x1)
6309 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_ON UINT32_C(0x2)
6311 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINK UINT32_C(0x3)
6312 /* Blink Alternately */
6313 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_STATE_BLINKALT UINT32_C(0x4)
6315 /* The color of LED #2. */
6317 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_DEFAULT UINT32_C(0x0)
6319 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_AMBER UINT32_C(0x1)
6321 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREEN UINT32_C(0x2)
6322 /* Green or Amber */
6323 #define HWRM_PORT_LED_QCFG_OUTPUT_LED2_COLOR_GREENAMBER UINT32_C(0x3)
6325 uint16_t led2_blink_on;
6327 * If the LED #2 state is "blink" or "blinkalt", then this field
6328 * represents the requested time in milliseconds to keep LED on
6331 uint16_t led2_blink_off;
6333 * If the LED #2 state is "blink" or "blinkalt", then this field
6334 * represents the requested time in milliseconds to keep LED off
6337 uint8_t led2_group_id;
6339 * An identifier for the group of LEDs that LED #2 belongs to.
6340 * If set to 0, then the LED #2 is not grouped. For all other
6341 * non-zero values of this field, LED #2 is grouped together
6342 * with the LEDs with the same group ID value.
6345 /* An identifier for the LED #3. */
6347 /* The type of LED #3. */
6349 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6351 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6353 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6355 /* The current state of the LED #3. */
6356 /* Default state of the LED */
6357 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_DEFAULT UINT32_C(0x0)
6359 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_OFF UINT32_C(0x1)
6361 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_ON UINT32_C(0x2)
6363 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINK UINT32_C(0x3)
6364 /* Blink Alternately */
6365 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_STATE_BLINKALT UINT32_C(0x4)
6367 /* The color of LED #3. */
6369 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_DEFAULT UINT32_C(0x0)
6371 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_AMBER UINT32_C(0x1)
6373 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREEN UINT32_C(0x2)
6374 /* Green or Amber */
6375 #define HWRM_PORT_LED_QCFG_OUTPUT_LED3_COLOR_GREENAMBER UINT32_C(0x3)
6377 uint16_t led3_blink_on;
6379 * If the LED #3 state is "blink" or "blinkalt", then this field
6380 * represents the requested time in milliseconds to keep LED on
6383 uint16_t led3_blink_off;
6385 * If the LED #3 state is "blink" or "blinkalt", then this field
6386 * represents the requested time in milliseconds to keep LED off
6389 uint8_t led3_group_id;
6391 * An identifier for the group of LEDs that LED #3 belongs to.
6392 * If set to 0, then the LED #3 is not grouped. For all other
6393 * non-zero values of this field, LED #3 is grouped together
6394 * with the LEDs with the same group ID value.
6403 * This field is used in Output records to indicate that the
6404 * output is completely written to RAM. This field should be
6405 * read as '1' to indicate that the output has been completely
6406 * written. When writing a command completion or response to an
6407 * internal processor, the order of writes has to be such that
6408 * this field is written last.
6410 } __attribute__((packed));
6412 /* hwrm_port_led_qcaps */
6414 * Description: This function is used to query capabilities of LEDs on a given
6415 * port. Each port has individual set of LEDs associated with it. These LEDs are
6416 * used for speed/link configuration as well as activity indicator
6419 /* Input (24 bytes) */
6420 struct hwrm_port_led_qcaps_input {
6423 * This value indicates what type of request this is. The format
6424 * for the rest of the command is determined by this field.
6428 * This value indicates the what completion ring the request
6429 * will be optionally completed on. If the value is -1, then no
6430 * CR completion will be generated. Any other value must be a
6431 * valid CR ring_id value for this function.
6434 /* This value indicates the command sequence number. */
6437 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6438 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6443 * This is the host address where the response will be written
6444 * when the request is complete. This area must be 16B aligned
6445 * and must be cleared to zero before the request is made.
6448 /* Port ID of port whose LED configuration is being queried. */
6449 uint16_t unused_0[3];
6450 } __attribute__((packed));
6452 /* Output (48 bytes) */
6453 struct hwrm_port_led_qcaps_output {
6454 uint16_t error_code;
6456 * Pass/Fail or error type Note: receiver to verify the in
6457 * parameters, and fail the call with an error when appropriate
6460 /* This field returns the type of original request. */
6462 /* This field provides original sequence number of the command. */
6465 * This field is the length of the response in bytes. The last
6466 * byte of the response is a valid flag that will read as '1'
6467 * when the command has been completely written to memory.
6471 * The number of LEDs that are configured on this port. Up to 4
6472 * LEDs can be returned in the response.
6474 uint8_t unused_0[3];
6475 /* Reserved for future use. */
6477 /* An identifier for the LED #0. */
6479 /* The type of LED #0. */
6481 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_SPEED UINT32_C(0x0)
6483 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_ACTIVITY UINT32_C(0x1)
6485 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_TYPE_INVALID UINT32_C(0xff)
6486 uint8_t led0_group_id;
6488 * An identifier for the group of LEDs that LED #0 belongs to.
6489 * If set to 0, then the LED #0 cannot be grouped. For all other
6490 * non-zero values of this field, LED #0 is grouped together
6491 * with the LEDs with the same group ID value.
6494 uint16_t led0_state_caps;
6495 /* The states supported by LED #0. */
6497 * If set to 1, this LED is enabled. If set to 0, this LED is
6500 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ENABLED UINT32_C(0x1)
6502 * If set to 1, off state is supported on this LED. If set to 0,
6503 * off state is not supported on this LED.
6505 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_OFF_SUPPORTED \
6508 * If set to 1, on state is supported on this LED. If set to 0,
6509 * on state is not supported on this LED.
6511 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_ON_SUPPORTED \
6514 * If set to 1, blink state is supported on this LED. If set to
6515 * 0, blink state is not supported on this LED.
6517 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_SUPPORTED \
6520 * If set to 1, blink_alt state is supported on this LED. If set
6521 * to 0, blink_alt state is not supported on this LED.
6523 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_STATE_CAPS_BLINK_ALT_SUPPORTED \
6525 uint16_t led0_color_caps;
6526 /* The colors supported by LED #0. */
6528 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_RSVD UINT32_C(0x1)
6530 * If set to 1, Amber color is supported on this LED. If set to
6531 * 0, Amber color is not supported on this LED.
6533 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_AMBER_SUPPORTED \
6536 * If set to 1, Green color is supported on this LED. If set to
6537 * 0, Green color is not supported on this LED.
6539 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED0_COLOR_CAPS_GREEN_SUPPORTED \
6542 /* An identifier for the LED #1. */
6544 /* The type of LED #1. */
6546 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_SPEED UINT32_C(0x0)
6548 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_ACTIVITY UINT32_C(0x1)
6550 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_TYPE_INVALID UINT32_C(0xff)
6551 uint8_t led1_group_id;
6553 * An identifier for the group of LEDs that LED #1 belongs to.
6554 * If set to 0, then the LED #0 cannot be grouped. For all other
6555 * non-zero values of this field, LED #0 is grouped together
6556 * with the LEDs with the same group ID value.
6559 uint16_t led1_state_caps;
6560 /* The states supported by LED #1. */
6562 * If set to 1, this LED is enabled. If set to 0, this LED is
6565 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ENABLED UINT32_C(0x1)
6567 * If set to 1, off state is supported on this LED. If set to 0,
6568 * off state is not supported on this LED.
6570 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_OFF_SUPPORTED \
6573 * If set to 1, on state is supported on this LED. If set to 0,
6574 * on state is not supported on this LED.
6576 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_ON_SUPPORTED \
6579 * If set to 1, blink state is supported on this LED. If set to
6580 * 0, blink state is not supported on this LED.
6582 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_SUPPORTED \
6585 * If set to 1, blink_alt state is supported on this LED. If set
6586 * to 0, blink_alt state is not supported on this LED.
6588 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_STATE_CAPS_BLINK_ALT_SUPPORTED \
6590 uint16_t led1_color_caps;
6591 /* The colors supported by LED #1. */
6593 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_RSVD UINT32_C(0x1)
6595 * If set to 1, Amber color is supported on this LED. If set to
6596 * 0, Amber color is not supported on this LED.
6598 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_AMBER_SUPPORTED \
6601 * If set to 1, Green color is supported on this LED. If set to
6602 * 0, Green color is not supported on this LED.
6604 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED1_COLOR_CAPS_GREEN_SUPPORTED \
6607 /* An identifier for the LED #2. */
6609 /* The type of LED #2. */
6611 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_SPEED UINT32_C(0x0)
6613 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_ACTIVITY UINT32_C(0x1)
6615 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_TYPE_INVALID UINT32_C(0xff)
6616 uint8_t led2_group_id;
6618 * An identifier for the group of LEDs that LED #0 belongs to.
6619 * If set to 0, then the LED #0 cannot be grouped. For all other
6620 * non-zero values of this field, LED #0 is grouped together
6621 * with the LEDs with the same group ID value.
6624 uint16_t led2_state_caps;
6625 /* The states supported by LED #2. */
6627 * If set to 1, this LED is enabled. If set to 0, this LED is
6630 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ENABLED UINT32_C(0x1)
6632 * If set to 1, off state is supported on this LED. If set to 0,
6633 * off state is not supported on this LED.
6635 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_OFF_SUPPORTED \
6638 * If set to 1, on state is supported on this LED. If set to 0,
6639 * on state is not supported on this LED.
6641 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_ON_SUPPORTED \
6644 * If set to 1, blink state is supported on this LED. If set to
6645 * 0, blink state is not supported on this LED.
6647 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_SUPPORTED \
6650 * If set to 1, blink_alt state is supported on this LED. If set
6651 * to 0, blink_alt state is not supported on this LED.
6653 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_STATE_CAPS_BLINK_ALT_SUPPORTED \
6655 uint16_t led2_color_caps;
6656 /* The colors supported by LED #2. */
6658 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_RSVD UINT32_C(0x1)
6660 * If set to 1, Amber color is supported on this LED. If set to
6661 * 0, Amber color is not supported on this LED.
6663 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_AMBER_SUPPORTED \
6666 * If set to 1, Green color is supported on this LED. If set to
6667 * 0, Green color is not supported on this LED.
6669 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED2_COLOR_CAPS_GREEN_SUPPORTED \
6672 /* An identifier for the LED #3. */
6674 /* The type of LED #3. */
6676 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_SPEED UINT32_C(0x0)
6678 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_ACTIVITY UINT32_C(0x1)
6680 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_TYPE_INVALID UINT32_C(0xff)
6681 uint8_t led3_group_id;
6683 * An identifier for the group of LEDs that LED #3 belongs to.
6684 * If set to 0, then the LED #0 cannot be grouped. For all other
6685 * non-zero values of this field, LED #0 is grouped together
6686 * with the LEDs with the same group ID value.
6689 uint16_t led3_state_caps;
6690 /* The states supported by LED #3. */
6692 * If set to 1, this LED is enabled. If set to 0, this LED is
6695 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ENABLED UINT32_C(0x1)
6697 * If set to 1, off state is supported on this LED. If set to 0,
6698 * off state is not supported on this LED.
6700 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_OFF_SUPPORTED \
6703 * If set to 1, on state is supported on this LED. If set to 0,
6704 * on state is not supported on this LED.
6706 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_ON_SUPPORTED \
6709 * If set to 1, blink state is supported on this LED. If set to
6710 * 0, blink state is not supported on this LED.
6712 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_SUPPORTED \
6715 * If set to 1, blink_alt state is supported on this LED. If set
6716 * to 0, blink_alt state is not supported on this LED.
6718 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_STATE_CAPS_BLINK_ALT_SUPPORTED \
6720 uint16_t led3_color_caps;
6721 /* The colors supported by LED #3. */
6723 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_RSVD UINT32_C(0x1)
6725 * If set to 1, Amber color is supported on this LED. If set to
6726 * 0, Amber color is not supported on this LED.
6728 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_AMBER_SUPPORTED \
6731 * If set to 1, Green color is supported on this LED. If set to
6732 * 0, Green color is not supported on this LED.
6734 #define HWRM_PORT_LED_QCAPS_OUTPUT_LED3_COLOR_CAPS_GREEN_SUPPORTED \
6741 * This field is used in Output records to indicate that the
6742 * output is completely written to RAM. This field should be
6743 * read as '1' to indicate that the output has been completely
6744 * written. When writing a command completion or response to an
6745 * internal processor, the order of writes has to be such that
6746 * this field is written last.
6748 } __attribute__((packed));
6750 /* hwrm_queue_qportcfg */
6752 * Description: This function is called by a driver to query queue configuration
6753 * of a port. # The HWRM shall at least advertise one queue with lossy service
6754 * profile. # The driver shall use this command to query queue ids before
6755 * configuring or using any queues. # If a service profile is not set for a
6756 * queue, then the driver shall not use that queue without configuring a service
6757 * profile for it. # If the driver is not allowed to configure service profiles,
6758 * then the driver shall only use queues for which service profiles are pre-
6761 /* Input (24 bytes) */
6762 struct hwrm_queue_qportcfg_input {
6765 * This value indicates what type of request this is. The format
6766 * for the rest of the command is determined by this field.
6770 * This value indicates the what completion ring the request
6771 * will be optionally completed on. If the value is -1, then no
6772 * CR completion will be generated. Any other value must be a
6773 * valid CR ring_id value for this function.
6776 /* This value indicates the command sequence number. */
6779 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
6780 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
6785 * This is the host address where the response will be written
6786 * when the request is complete. This area must be 16B aligned
6787 * and must be cleared to zero before the request is made.
6791 * Enumeration denoting the RX, TX type of the resource. This
6792 * enumeration is used for resources that are similar for both
6793 * TX and RX paths of the chip.
6795 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH UINT32_C(0x1)
6797 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_TX UINT32_C(0x0)
6799 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX UINT32_C(0x1)
6800 #define HWRM_QUEUE_QPORTCFG_INPUT_FLAGS_PATH_LAST \
6801 QUEUE_QPORTCFG_INPUT_FLAGS_PATH_RX
6804 * Port ID of port for which the queue configuration is being
6805 * queried. This field is only required when sent by IPC.
6808 } __attribute__((packed));
6810 /* Output (32 bytes) */
6811 struct hwrm_queue_qportcfg_output {
6812 uint16_t error_code;
6814 * Pass/Fail or error type Note: receiver to verify the in
6815 * parameters, and fail the call with an error when appropriate
6818 /* This field returns the type of original request. */
6820 /* This field provides original sequence number of the command. */
6823 * This field is the length of the response in bytes. The last
6824 * byte of the response is a valid flag that will read as '1'
6825 * when the command has been completely written to memory.
6827 uint8_t max_configurable_queues;
6829 * The maximum number of queues that can be configured on this
6830 * port. Valid values range from 1 through 8.
6832 uint8_t max_configurable_lossless_queues;
6834 * The maximum number of lossless queues that can be configured
6835 * on this port. Valid values range from 0 through 8.
6837 uint8_t queue_cfg_allowed;
6839 * Bitmask indicating which queues can be configured by the
6840 * hwrm_queue_cfg command. Each bit represents a specific queue
6841 * where bit 0 represents queue 0 and bit 7 represents queue 7.
6842 * # A value of 0 indicates that the queue is not configurable
6843 * by the hwrm_queue_cfg command. # A value of 1 indicates that
6844 * the queue is configurable. # A hwrm_queue_cfg command shall
6845 * return error when trying to configure a queue not
6848 uint8_t queue_cfg_info;
6849 /* Information about queue configuration. */
6851 * If this flag is set to '1', then the queues are configured
6852 * asymmetrically on TX and RX sides. If this flag is set to
6853 * '0', then the queues are configured symmetrically on TX and
6854 * RX sides. For symmetric configuration, the queue
6855 * configuration including queue ids and service profiles on the
6856 * TX side is the same as the corresponding queue configuration
6859 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_CFG_INFO_ASYM_CFG UINT32_C(0x1)
6860 uint8_t queue_pfcenable_cfg_allowed;
6862 * Bitmask indicating which queues can be configured by the
6863 * hwrm_queue_pfcenable_cfg command. Each bit represents a
6864 * specific priority where bit 0 represents priority 0 and bit 7
6865 * represents priority 7. # A value of 0 indicates that the
6866 * priority is not configurable by the hwrm_queue_pfcenable_cfg
6867 * command. # A value of 1 indicates that the priority is
6868 * configurable. # A hwrm_queue_pfcenable_cfg command shall
6869 * return error when trying to configure a priority that is not
6872 uint8_t queue_pri2cos_cfg_allowed;
6874 * Bitmask indicating which queues can be configured by the
6875 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6876 * specific queue where bit 0 represents queue 0 and bit 7
6877 * represents queue 7. # A value of 0 indicates that the queue
6878 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6879 * A value of 1 indicates that the queue is configurable. # A
6880 * hwrm_queue_pri2cos_cfg command shall return error when trying
6881 * to configure a queue that is not configurable.
6883 uint8_t queue_cos2bw_cfg_allowed;
6885 * Bitmask indicating which queues can be configured by the
6886 * hwrm_queue_pri2cos_cfg command. Each bit represents a
6887 * specific queue where bit 0 represents queue 0 and bit 7
6888 * represents queue 7. # A value of 0 indicates that the queue
6889 * is not configurable by the hwrm_queue_pri2cos_cfg command. #
6890 * A value of 1 indicates that the queue is configurable. # A
6891 * hwrm_queue_pri2cos_cfg command shall return error when trying
6892 * to configure a queue not configurable.
6896 * ID of CoS Queue 0. FF - Invalid id # This ID can be used on
6897 * any subsequent call to an hwrm command that takes a queue id.
6898 * # IDs must always be queried by this command before any use
6899 * by the driver or software. # Any driver or software should
6900 * not make any assumptions about queue IDs. # A value of 0xff
6901 * indicates that the queue is not available. # Available queues
6902 * may not be in sequential order.
6904 uint8_t queue_id0_service_profile;
6905 /* This value is applicable to CoS queues only. */
6906 /* Lossy (best-effort) */
6907 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSY \
6910 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_LOSSLESS \
6913 * Set to 0xFF... (All Fs) if there is no
6914 * service profile specified
6916 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID0_SERVICE_PROFILE_UNKNOWN \
6920 * ID of CoS Queue 1. FF - Invalid id # This ID can be used on
6921 * any subsequent call to an hwrm command that takes a queue id.
6922 * # IDs must always be queried by this command before any use
6923 * by the driver or software. # Any driver or software should
6924 * not make any assumptions about queue IDs. # A value of 0xff
6925 * indicates that the queue is not available. # Available queues
6926 * may not be in sequential order.
6928 uint8_t queue_id1_service_profile;
6929 /* This value is applicable to CoS queues only. */
6930 /* Lossy (best-effort) */
6931 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSY \
6934 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_LOSSLESS \
6937 * Set to 0xFF... (All Fs) if there is no
6938 * service profile specified
6940 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID1_SERVICE_PROFILE_UNKNOWN \
6944 * ID of CoS Queue 2. FF - Invalid id # This ID can be used on
6945 * any subsequent call to an hwrm command that takes a queue id.
6946 * # IDs must always be queried by this command before any use
6947 * by the driver or software. # Any driver or software should
6948 * not make any assumptions about queue IDs. # A value of 0xff
6949 * indicates that the queue is not available. # Available queues
6950 * may not be in sequential order.
6952 uint8_t queue_id2_service_profile;
6953 /* This value is applicable to CoS queues only. */
6954 /* Lossy (best-effort) */
6955 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSY \
6958 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_LOSSLESS \
6961 * Set to 0xFF... (All Fs) if there is no
6962 * service profile specified
6964 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID2_SERVICE_PROFILE_UNKNOWN \
6968 * ID of CoS Queue 3. FF - Invalid id # This ID can be used on
6969 * any subsequent call to an hwrm command that takes a queue id.
6970 * # IDs must always be queried by this command before any use
6971 * by the driver or software. # Any driver or software should
6972 * not make any assumptions about queue IDs. # A value of 0xff
6973 * indicates that the queue is not available. # Available queues
6974 * may not be in sequential order.
6976 uint8_t queue_id3_service_profile;
6977 /* This value is applicable to CoS queues only. */
6978 /* Lossy (best-effort) */
6979 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSY \
6982 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_LOSSLESS \
6985 * Set to 0xFF... (All Fs) if there is no
6986 * service profile specified
6988 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID3_SERVICE_PROFILE_UNKNOWN \
6992 * ID of CoS Queue 4. FF - Invalid id # This ID can be used on
6993 * any subsequent call to an hwrm command that takes a queue id.
6994 * # IDs must always be queried by this command before any use
6995 * by the driver or software. # Any driver or software should
6996 * not make any assumptions about queue IDs. # A value of 0xff
6997 * indicates that the queue is not available. # Available queues
6998 * may not be in sequential order.
7000 uint8_t queue_id4_service_profile;
7001 /* This value is applicable to CoS queues only. */
7002 /* Lossy (best-effort) */
7003 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSY \
7006 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_LOSSLESS \
7009 * Set to 0xFF... (All Fs) if there is no
7010 * service profile specified
7012 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID4_SERVICE_PROFILE_UNKNOWN \
7016 * ID of CoS Queue 5. FF - Invalid id # This ID can be used on
7017 * any subsequent call to an hwrm command that takes a queue id.
7018 * # IDs must always be queried by this command before any use
7019 * by the driver or software. # Any driver or software should
7020 * not make any assumptions about queue IDs. # A value of 0xff
7021 * indicates that the queue is not available. # Available queues
7022 * may not be in sequential order.
7024 uint8_t queue_id5_service_profile;
7025 /* This value is applicable to CoS queues only. */
7026 /* Lossy (best-effort) */
7027 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSY \
7030 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_LOSSLESS \
7033 * Set to 0xFF... (All Fs) if there is no
7034 * service profile specified
7036 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID5_SERVICE_PROFILE_UNKNOWN \
7040 * ID of CoS Queue 6. FF - Invalid id # This ID can be used on
7041 * any subsequent call to an hwrm command that takes a queue id.
7042 * # IDs must always be queried by this command before any use
7043 * by the driver or software. # Any driver or software should
7044 * not make any assumptions about queue IDs. # A value of 0xff
7045 * indicates that the queue is not available. # Available queues
7046 * may not be in sequential order.
7048 uint8_t queue_id6_service_profile;
7049 /* This value is applicable to CoS queues only. */
7050 /* Lossy (best-effort) */
7051 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSY \
7054 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_LOSSLESS \
7057 * Set to 0xFF... (All Fs) if there is no
7058 * service profile specified
7060 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID6_SERVICE_PROFILE_UNKNOWN \
7064 * ID of CoS Queue 7. FF - Invalid id # This ID can be used on
7065 * any subsequent call to an hwrm command that takes a queue id.
7066 * # IDs must always be queried by this command before any use
7067 * by the driver or software. # Any driver or software should
7068 * not make any assumptions about queue IDs. # A value of 0xff
7069 * indicates that the queue is not available. # Available queues
7070 * may not be in sequential order.
7072 uint8_t queue_id7_service_profile;
7073 /* This value is applicable to CoS queues only. */
7074 /* Lossy (best-effort) */
7075 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSY \
7078 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_LOSSLESS \
7081 * Set to 0xFF... (All Fs) if there is no
7082 * service profile specified
7084 #define HWRM_QUEUE_QPORTCFG_OUTPUT_QUEUE_ID7_SERVICE_PROFILE_UNKNOWN \
7088 * This field is used in Output records to indicate that the
7089 * output is completely written to RAM. This field should be
7090 * read as '1' to indicate that the output has been completely
7091 * written. When writing a command completion or response to an
7092 * internal processor, the order of writes has to be such that
7093 * this field is written last.
7095 } __attribute__((packed));
7097 /*********************
7098 * hwrm_port_mac_cfg *
7099 *********************/
7102 /* hwrm_port_mac_cfg_input (size:320b/40B) */
7103 struct hwrm_port_mac_cfg_input {
7110 #define PORT_MAC_CFG_REQ_FLAGS_MATCH_LINK 0x1UL
7111 #define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_ENABLE 0x2UL
7112 #define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_ENABLE 0x4UL
7113 #define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_ENABLE 0x8UL
7114 #define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE 0x10UL
7115 #define PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_DISABLE 0x20UL
7116 #define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE 0x40UL
7117 #define PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE 0x80UL
7118 #define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_ENABLE 0x100UL
7119 #define PORT_MAC_CFG_REQ_FLAGS_OOB_WOL_DISABLE 0x200UL
7120 #define PORT_MAC_CFG_REQ_FLAGS_VLAN_PRI2COS_DISABLE 0x400UL
7121 #define PORT_MAC_CFG_REQ_FLAGS_TUNNEL_PRI2COS_DISABLE 0x800UL
7122 #define PORT_MAC_CFG_REQ_FLAGS_IP_DSCP2COS_DISABLE 0x1000UL
7124 #define PORT_MAC_CFG_REQ_ENABLES_IPG 0x1UL
7125 #define PORT_MAC_CFG_REQ_ENABLES_LPBK 0x2UL
7126 #define PORT_MAC_CFG_REQ_ENABLES_VLAN_PRI2COS_MAP_PRI 0x4UL
7127 #define PORT_MAC_CFG_REQ_ENABLES_TUNNEL_PRI2COS_MAP_PRI 0x10UL
7128 #define PORT_MAC_CFG_REQ_ENABLES_DSCP2COS_MAP_PRI 0x20UL
7129 #define PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE 0x40UL
7130 #define PORT_MAC_CFG_REQ_ENABLES_TX_TS_CAPTURE_PTP_MSG_TYPE 0x80UL
7131 #define PORT_MAC_CFG_REQ_ENABLES_COS_FIELD_CFG 0x100UL
7135 #define PORT_MAC_CFG_REQ_LPBK_NONE 0x0UL
7136 #define PORT_MAC_CFG_REQ_LPBK_LOCAL 0x1UL
7137 #define PORT_MAC_CFG_REQ_LPBK_REMOTE 0x2UL
7138 #define PORT_MAC_CFG_REQ_LPBK_LAST PORT_MAC_CFG_REQ_LPBK_REMOTE
7139 uint8_t vlan_pri2cos_map_pri;
7141 uint8_t tunnel_pri2cos_map_pri;
7142 uint8_t dscp2pri_map_pri;
7143 uint16_t rx_ts_capture_ptp_msg_type;
7144 uint16_t tx_ts_capture_ptp_msg_type;
7145 uint8_t cos_field_cfg;
7146 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_RSVD1 0x1UL
7147 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_MASK 0x6UL
7148 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_SFT 1
7149 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_INNERMOST \
7151 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTER \
7153 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_OUTERMOST \
7155 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED \
7157 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_LAST \
7158 PORT_MAC_CFG_REQ_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED
7159 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_MASK 0x18UL
7160 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_SFT 3
7161 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_INNERMOST \
7163 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTER \
7165 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTERMOST \
7167 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED \
7169 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_LAST \
7170 PORT_MAC_CFG_REQ_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED
7171 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_MASK 0xe0UL
7172 #define PORT_MAC_CFG_REQ_COS_FIELD_CFG_DEFAULT_COS_SFT 5
7173 uint8_t unused_0[3];
7177 /* hwrm_port_mac_cfg_output (size:128b/16B) */
7178 struct hwrm_port_mac_cfg_output {
7179 uint16_t error_code;
7187 #define PORT_MAC_CFG_RESP_LPBK_NONE 0x0UL
7188 #define PORT_MAC_CFG_RESP_LPBK_LOCAL 0x1UL
7189 #define PORT_MAC_CFG_RESP_LPBK_REMOTE 0x2UL
7190 #define PORT_MAC_CFG_RESP_LPBK_LAST PORT_MAC_CFG_RESP_LPBK_REMOTE
7196 /**********************
7197 * hwrm_port_mac_qcfg *
7198 **********************/
7201 /* hwrm_port_mac_qcfg_input (size:192b/24B) */
7202 struct hwrm_port_mac_qcfg_input {
7209 uint8_t unused_0[6];
7213 /* hwrm_port_mac_qcfg_output (size:192b/24B) */
7214 struct hwrm_port_mac_qcfg_output {
7215 uint16_t error_code;
7223 #define PORT_MAC_QCFG_RESP_LPBK_NONE 0x0UL
7224 #define PORT_MAC_QCFG_RESP_LPBK_LOCAL 0x1UL
7225 #define PORT_MAC_QCFG_RESP_LPBK_REMOTE 0x2UL
7226 #define PORT_MAC_QCFG_RESP_LPBK_LAST PORT_MAC_QCFG_RESP_LPBK_REMOTE
7227 uint8_t vlan_pri2cos_map_pri;
7229 #define PORT_MAC_QCFG_RESP_FLAGS_VLAN_PRI2COS_ENABLE 0x1UL
7230 #define PORT_MAC_QCFG_RESP_FLAGS_TUNNEL_PRI2COS_ENABLE 0x2UL
7231 #define PORT_MAC_QCFG_RESP_FLAGS_IP_DSCP2COS_ENABLE 0x4UL
7232 #define PORT_MAC_QCFG_RESP_FLAGS_OOB_WOL_ENABLE 0x8UL
7233 #define PORT_MAC_QCFG_RESP_FLAGS_PTP_RX_TS_CAPTURE_ENABLE 0x10UL
7234 #define PORT_MAC_QCFG_RESP_FLAGS_PTP_TX_TS_CAPTURE_ENABLE 0x20UL
7235 uint8_t tunnel_pri2cos_map_pri;
7236 uint8_t dscp2pri_map_pri;
7237 uint16_t rx_ts_capture_ptp_msg_type;
7238 uint16_t tx_ts_capture_ptp_msg_type;
7239 uint8_t cos_field_cfg;
7240 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_RSVD 0x1UL
7241 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_MASK 0x6UL
7242 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_SFT 1
7243 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_INNERMOST \
7245 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_OUTER \
7247 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_OUTERMOST \
7249 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED \
7251 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_LAST \
7252 PORT_MAC_QCFG_RESP_COS_FIELD_CFG_VLAN_PRI_SEL_UNSPECIFIED
7253 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_MASK 0x18UL
7254 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_SFT 3
7255 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_INNERMOST \
7257 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTER \
7259 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_OUTERMOST \
7261 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED \
7263 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_LAST \
7264 PORT_MAC_QCFG_RESP_COS_FIELD_CFG_T_VLAN_PRI_SEL_UNSPECIFIED
7265 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_DEFAULT_COS_MASK 0xe0UL
7266 #define PORT_MAC_QCFG_RESP_COS_FIELD_CFG_DEFAULT_COS_SFT 5
7271 /**************************
7272 * hwrm_port_mac_ptp_qcfg *
7273 **************************/
7276 /* hwrm_port_mac_ptp_qcfg_input (size:192b/24B) */
7277 struct hwrm_port_mac_ptp_qcfg_input {
7284 uint8_t unused_0[6];
7288 /* hwrm_port_mac_ptp_qcfg_output (size:640b/80B) */
7289 struct hwrm_port_mac_ptp_qcfg_output {
7290 uint16_t error_code;
7295 #define PORT_MAC_PTP_QCFG_RESP_FLAGS_DIRECT_ACCESS 0x1UL
7296 #define PORT_MAC_PTP_QCFG_RESP_FLAGS_HWRM_ACCESS 0x2UL
7297 uint8_t unused_0[3];
7298 uint32_t rx_ts_reg_off_lower;
7299 uint32_t rx_ts_reg_off_upper;
7300 uint32_t rx_ts_reg_off_seq_id;
7301 uint32_t rx_ts_reg_off_src_id_0;
7302 uint32_t rx_ts_reg_off_src_id_1;
7303 uint32_t rx_ts_reg_off_src_id_2;
7304 uint32_t rx_ts_reg_off_domain_id;
7305 uint32_t rx_ts_reg_off_fifo;
7306 uint32_t rx_ts_reg_off_fifo_adv;
7307 uint32_t rx_ts_reg_off_granularity;
7308 uint32_t tx_ts_reg_off_lower;
7309 uint32_t tx_ts_reg_off_upper;
7310 uint32_t tx_ts_reg_off_seq_id;
7311 uint32_t tx_ts_reg_off_fifo;
7312 uint32_t tx_ts_reg_off_granularity;
7313 uint8_t unused_1[7];
7318 /* hwrm_vnic_alloc */
7320 * Description: This VNIC is a resource in the RX side of the chip that is used
7321 * to represent a virtual host "interface". # At the time of VNIC allocation or
7322 * configuration, the function can specify whether it wants the requested VNIC
7323 * to be the default VNIC for the function or not. # If a function requests
7324 * allocation of a VNIC for the first time and a VNIC is successfully allocated
7325 * by the HWRM, then the HWRM shall make the allocated VNIC as the default VNIC
7326 * for that function. # The default VNIC shall be used for the default action
7327 * for a partition or function. # For each VNIC allocated on a function, a
7328 * mapping on the RX side to map the allocated VNIC to source virtual interface
7329 * shall be performed by the HWRM. This should be hidden to the function driver
7330 * requesting the VNIC allocation. This enables broadcast/multicast replication
7331 * with source knockout. # If multicast replication with source knockout is
7332 * enabled, then the internal VNIC to SVIF mapping data structures shall be
7333 * programmed at the time of VNIC allocation.
7335 /* Input (24 bytes) */
7336 struct hwrm_vnic_alloc_input {
7339 * This value indicates what type of request this is. The format
7340 * for the rest of the command is determined by this field.
7344 * This value indicates the what completion ring the request
7345 * will be optionally completed on. If the value is -1, then no
7346 * CR completion will be generated. Any other value must be a
7347 * valid CR ring_id value for this function.
7350 /* This value indicates the command sequence number. */
7353 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7354 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7359 * This is the host address where the response will be written
7360 * when the request is complete. This area must be 16B aligned
7361 * and must be cleared to zero before the request is made.
7365 * When this bit is '1', this VNIC is requested to be the
7366 * default VNIC for this function.
7368 #define HWRM_VNIC_ALLOC_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7370 } __attribute__((packed));
7372 /* Output (16 bytes) */
7373 struct hwrm_vnic_alloc_output {
7374 uint16_t error_code;
7376 * Pass/Fail or error type Note: receiver to verify the in
7377 * parameters, and fail the call with an error when appropriate
7380 /* This field returns the type of original request. */
7382 /* This field provides original sequence number of the command. */
7385 * This field is the length of the response in bytes. The last
7386 * byte of the response is a valid flag that will read as '1'
7387 * when the command has been completely written to memory.
7390 /* Logical vnic ID */
7396 * This field is used in Output records to indicate that the
7397 * output is completely written to RAM. This field should be
7398 * read as '1' to indicate that the output has been completely
7399 * written. When writing a command completion or response to an
7400 * internal processor, the order of writes has to be such that
7401 * this field is written last.
7403 } __attribute__((packed));
7405 /* hwrm_vnic_free */
7407 * Description: Free a VNIC resource. Idle any resources associated with the
7408 * VNIC as well as the VNIC. Reset and release all resources associated with the
7411 /* Input (24 bytes) */
7412 struct hwrm_vnic_free_input {
7415 * This value indicates what type of request this is. The format
7416 * for the rest of the command is determined by this field.
7420 * This value indicates the what completion ring the request
7421 * will be optionally completed on. If the value is -1, then no
7422 * CR completion will be generated. Any other value must be a
7423 * valid CR ring_id value for this function.
7426 /* This value indicates the command sequence number. */
7429 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7430 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7435 * This is the host address where the response will be written
7436 * when the request is complete. This area must be 16B aligned
7437 * and must be cleared to zero before the request is made.
7440 /* Logical vnic ID */
7442 } __attribute__((packed));
7444 /* Output (16 bytes) */
7445 struct hwrm_vnic_free_output {
7446 uint16_t error_code;
7448 * Pass/Fail or error type Note: receiver to verify the in
7449 * parameters, and fail the call with an error when appropriate
7452 /* This field returns the type of original request. */
7454 /* This field provides original sequence number of the command. */
7457 * This field is the length of the response in bytes. The last
7458 * byte of the response is a valid flag that will read as '1'
7459 * when the command has been completely written to memory.
7467 * This field is used in Output records to indicate that the
7468 * output is completely written to RAM. This field should be
7469 * read as '1' to indicate that the output has been completely
7470 * written. When writing a command completion or response to an
7471 * internal processor, the order of writes has to be such that
7472 * this field is written last.
7474 } __attribute__((packed));
7477 /* Description: Configure the RX VNIC structure. */
7478 /* Input (40 bytes) */
7479 struct hwrm_vnic_cfg_input {
7482 * This value indicates what type of request this is. The format
7483 * for the rest of the command is determined by this field.
7487 * This value indicates the what completion ring the request
7488 * will be optionally completed on. If the value is -1, then no
7489 * CR completion will be generated. Any other value must be a
7490 * valid CR ring_id value for this function.
7493 /* This value indicates the command sequence number. */
7496 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7497 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7502 * This is the host address where the response will be written
7503 * when the request is complete. This area must be 16B aligned
7504 * and must be cleared to zero before the request is made.
7508 * When this bit is '1', the VNIC is requested to be the default
7509 * VNIC for the function.
7511 #define HWRM_VNIC_CFG_INPUT_FLAGS_DEFAULT UINT32_C(0x1)
7513 * When this bit is '1', the VNIC is being configured to strip
7514 * VLAN in the RX path. If set to '0', then VLAN stripping is
7515 * disabled on this VNIC.
7517 #define HWRM_VNIC_CFG_INPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7519 * When this bit is '1', the VNIC is being configured to buffer
7520 * receive packets in the hardware until the host posts new
7521 * receive buffers. If set to '0', then bd_stall is being
7522 * configured to be disabled on this VNIC.
7524 #define HWRM_VNIC_CFG_INPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7526 * When this bit is '1', the VNIC is being configured to receive
7527 * both RoCE and non-RoCE traffic. If set to '0', then this VNIC
7528 * is not configured to be operating in dual VNIC mode.
7530 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7532 * When this flag is set to '1', the VNIC is requested to be
7533 * configured to receive only RoCE traffic. If this flag is set
7534 * to '0', then this flag shall be ignored by the HWRM. If
7535 * roce_dual_vnic_mode flag is set to '1', then the HWRM client
7536 * shall not set this flag to '1'.
7538 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7540 * When a VNIC uses one destination ring group for certain
7541 * application (e.g. Receive Flow Steering) where exact match is
7542 * used to direct packets to a VNIC with one destination ring
7543 * group only, there is no need to configure RSS indirection
7544 * table for that VNIC as only one destination ring group is
7545 * used. This flag is used to enable a mode where RSS is enabled
7546 * in the VNIC using a RSS context for computing RSS hash but
7547 * the RSS indirection table is not configured using
7548 * hwrm_vnic_rss_cfg. If this mode is enabled, then the driver
7549 * should not program RSS indirection table for the RSS context
7550 * that is used for computing RSS hash only.
7552 #define HWRM_VNIC_CFG_INPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7554 * When this bit is '1', the VNIC is being configured to receive
7555 * both RoCE and non-RoCE traffic, but forward only the RoCE
7556 * traffic further. Also, RoCE traffic can be mirrored to L2
7559 #define HWRM_VNIC_CFG_INPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7563 * This bit must be '1' for the dflt_ring_grp field to be
7566 #define HWRM_VNIC_CFG_INPUT_ENABLES_DFLT_RING_GRP UINT32_C(0x1)
7567 /* This bit must be '1' for the rss_rule field to be configured. */
7568 #define HWRM_VNIC_CFG_INPUT_ENABLES_RSS_RULE UINT32_C(0x2)
7569 /* This bit must be '1' for the cos_rule field to be configured. */
7570 #define HWRM_VNIC_CFG_INPUT_ENABLES_COS_RULE UINT32_C(0x4)
7571 /* This bit must be '1' for the lb_rule field to be configured. */
7572 #define HWRM_VNIC_CFG_INPUT_ENABLES_LB_RULE UINT32_C(0x8)
7573 /* This bit must be '1' for the mru field to be configured. */
7574 #define HWRM_VNIC_CFG_INPUT_ENABLES_MRU UINT32_C(0x10)
7576 /* Logical vnic ID */
7577 uint16_t dflt_ring_grp;
7579 * Default Completion ring for the VNIC. This ring will be
7580 * chosen if packet does not match any RSS rules and if there is
7585 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7586 * there is no RSS rule.
7590 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7591 * there is no COS rule.
7595 * RSS ID for load balancing rule/table structure. 0xFF... (All
7596 * Fs) if there is no LB rule.
7600 * The maximum receive unit of the vnic. Each vnic is associated
7601 * with a function. The vnic mru value overwrites the mru
7602 * setting of the associated function. The HWRM shall make sure
7603 * that vnic mru does not exceed the mru of the port the
7604 * function is associated with.
7607 } __attribute__((packed));
7609 /* Output (16 bytes) */
7610 struct hwrm_vnic_cfg_output {
7611 uint16_t error_code;
7613 * Pass/Fail or error type Note: receiver to verify the in
7614 * parameters, and fail the call with an error when appropriate
7617 /* This field returns the type of original request. */
7619 /* This field provides original sequence number of the command. */
7622 * This field is the length of the response in bytes. The last
7623 * byte of the response is a valid flag that will read as '1'
7624 * when the command has been completely written to memory.
7632 * This field is used in Output records to indicate that the
7633 * output is completely written to RAM. This field should be
7634 * read as '1' to indicate that the output has been completely
7635 * written. When writing a command completion or response to an
7636 * internal processor, the order of writes has to be such that
7637 * this field is written last.
7639 } __attribute__((packed));
7641 /* hwrm_vnic_qcfg */
7643 * Description: Query the RX VNIC structure. This function can be used by a PF
7644 * driver to query its own VNIC resource or VNIC resource of its child VF. This
7645 * function can also be used by a VF driver to query its own VNIC resource.
7647 /* Input (32 bytes) */
7648 struct hwrm_vnic_qcfg_input {
7651 * This value indicates what type of request this is. The format
7652 * for the rest of the command is determined by this field.
7656 * This value indicates the what completion ring the request
7657 * will be optionally completed on. If the value is -1, then no
7658 * CR completion will be generated. Any other value must be a
7659 * valid CR ring_id value for this function.
7662 /* This value indicates the command sequence number. */
7665 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7666 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7671 * This is the host address where the response will be written
7672 * when the request is complete. This area must be 16B aligned
7673 * and must be cleared to zero before the request is made.
7676 /* This bit must be '1' for the vf_id_valid field to be configured. */
7677 #define HWRM_VNIC_QCFG_INPUT_ENABLES_VF_ID_VALID UINT32_C(0x1)
7679 /* Logical vnic ID */
7681 /* ID of Virtual Function whose VNIC resource is being queried. */
7682 uint16_t unused_0[3];
7683 } __attribute__((packed));
7685 /* Output (32 bytes) */
7686 struct hwrm_vnic_qcfg_output {
7687 uint16_t error_code;
7689 * Pass/Fail or error type Note: receiver to verify the in
7690 * parameters, and fail the call with an error when appropriate
7693 /* This field returns the type of original request. */
7695 /* This field provides original sequence number of the command. */
7698 * This field is the length of the response in bytes. The last
7699 * byte of the response is a valid flag that will read as '1'
7700 * when the command has been completely written to memory.
7702 uint16_t dflt_ring_grp;
7703 /* Default Completion ring for the VNIC. */
7706 * RSS ID for RSS rule/table structure. 0xFF... (All Fs) if
7707 * there is no RSS rule.
7711 * RSS ID for COS rule/table structure. 0xFF... (All Fs) if
7712 * there is no COS rule.
7716 * RSS ID for load balancing rule/table structure. 0xFF... (All
7717 * Fs) if there is no LB rule.
7720 /* The maximum receive unit of the vnic. */
7725 * When this bit is '1', the VNIC is the default VNIC for the
7728 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_DEFAULT UINT32_C(0x1)
7730 * When this bit is '1', the VNIC is configured to strip VLAN in
7731 * the RX path. If set to '0', then VLAN stripping is disabled
7734 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_VLAN_STRIP_MODE UINT32_C(0x2)
7736 * When this bit is '1', the VNIC is configured to buffer
7737 * receive packets in the hardware until the host posts new
7738 * receive buffers. If set to '0', then bd_stall is disabled on
7741 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_BD_STALL_MODE UINT32_C(0x4)
7743 * When this bit is '1', the VNIC is configured to receive both
7744 * RoCE and non-RoCE traffic. If set to '0', then this VNIC is
7745 * not configured to operate in dual VNIC mode.
7747 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_DUAL_VNIC_MODE UINT32_C(0x8)
7749 * When this flag is set to '1', the VNIC is configured to
7750 * receive only RoCE traffic. When this flag is set to '0', the
7751 * VNIC is not configured to receive only RoCE traffic. If
7752 * roce_dual_vnic_mode flag and this flag both are set to '1',
7753 * then it is an invalid configuration of the VNIC. The HWRM
7754 * should not allow that type of mis-configuration by HWRM
7757 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_ONLY_VNIC_MODE UINT32_C(0x10)
7759 * When a VNIC uses one destination ring group for certain
7760 * application (e.g. Receive Flow Steering) where exact match is
7761 * used to direct packets to a VNIC with one destination ring
7762 * group only, there is no need to configure RSS indirection
7763 * table for that VNIC as only one destination ring group is
7764 * used. When this bit is set to '1', then the VNIC is enabled
7765 * in a mode where RSS is enabled in the VNIC using a RSS
7766 * context for computing RSS hash but the RSS indirection table
7767 * is not configured.
7769 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_RSS_DFLT_CR_MODE UINT32_C(0x20)
7771 * When this bit is '1', the VNIC is configured to receive both
7772 * RoCE and non-RoCE traffic, but forward only RoCE traffic
7773 * further. Also RoCE traffic can be mirrored to L2 driver.
7775 #define HWRM_VNIC_QCFG_OUTPUT_FLAGS_ROCE_MIRRORING_CAPABLE_VNIC_MODE \
7783 * This field is used in Output records to indicate that the
7784 * output is completely written to RAM. This field should be
7785 * read as '1' to indicate that the output has been completely
7786 * written. When writing a command completion or response to an
7787 * internal processor, the order of writes has to be such that
7788 * this field is written last.
7790 } __attribute__((packed));
7793 /* hwrm_vnic_tpa_cfg */
7794 /* Description: This function is used to enable/configure TPA on the VNIC. */
7795 /* Input (40 bytes) */
7796 struct hwrm_vnic_tpa_cfg_input {
7799 * This value indicates what type of request this is. The format
7800 * for the rest of the command is determined by this field.
7804 * This value indicates the what completion ring the request
7805 * will be optionally completed on. If the value is -1, then no
7806 * CR completion will be generated. Any other value must be a
7807 * valid CR ring_id value for this function.
7810 /* This value indicates the command sequence number. */
7813 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7814 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7819 * This is the host address where the response will be written
7820 * when the request is complete. This area must be 16B aligned
7821 * and must be cleared to zero before the request is made.
7825 * When this bit is '1', the VNIC shall be configured to perform
7826 * transparent packet aggregation (TPA) of non-tunneled TCP
7829 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_TPA UINT32_C(0x1)
7831 * When this bit is '1', the VNIC shall be configured to perform
7832 * transparent packet aggregation (TPA) of tunneled TCP packets.
7834 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_ENCAP_TPA UINT32_C(0x2)
7836 * When this bit is '1', the VNIC shall be configured to perform
7837 * transparent packet aggregation (TPA) according to Windows
7838 * Receive Segment Coalescing (RSC) rules.
7840 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_RSC_WND_UPDATE UINT32_C(0x4)
7842 * When this bit is '1', the VNIC shall be configured to perform
7843 * transparent packet aggregation (TPA) according to Linux
7844 * Generic Receive Offload (GRO) rules.
7846 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO UINT32_C(0x8)
7848 * When this bit is '1', the VNIC shall be configured to perform
7849 * transparent packet aggregation (TPA) for TCP packets with IP
7850 * ECN set to non-zero.
7852 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_ECN UINT32_C(0x10)
7854 * When this bit is '1', the VNIC shall be configured to perform
7855 * transparent packet aggregation (TPA) for GRE tunneled TCP
7856 * packets only if all packets have the same GRE sequence.
7858 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_AGG_WITH_SAME_GRE_SEQ \
7861 * When this bit is '1' and the GRO mode is enabled, the VNIC
7862 * shall be configured to perform transparent packet aggregation
7863 * (TPA) for TCP/IPv4 packets with consecutively increasing
7864 * IPIDs. In other words, the last packet that is being
7865 * aggregated to an already existing aggregation context shall
7866 * have IPID 1 more than the IPID of the last packet that was
7867 * aggregated in that aggregation context.
7869 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_IPID_CHECK UINT32_C(0x40)
7871 * When this bit is '1' and the GRO mode is enabled, the VNIC
7872 * shall be configured to perform transparent packet aggregation
7873 * (TPA) for TCP packets with the same TTL (IPv4) or Hop limit
7876 #define HWRM_VNIC_TPA_CFG_INPUT_FLAGS_GRO_TTL_CHECK UINT32_C(0x80)
7878 /* This bit must be '1' for the max_agg_segs field to be configured. */
7879 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_SEGS UINT32_C(0x1)
7880 /* This bit must be '1' for the max_aggs field to be configured. */
7881 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGGS UINT32_C(0x2)
7883 * This bit must be '1' for the max_agg_timer field to be
7886 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MAX_AGG_TIMER UINT32_C(0x4)
7887 /* This bit must be '1' for the min_agg_len field to be configured. */
7888 #define HWRM_VNIC_TPA_CFG_INPUT_ENABLES_MIN_AGG_LEN UINT32_C(0x8)
7890 /* Logical vnic ID */
7891 uint16_t max_agg_segs;
7893 * This is the maximum number of TCP segments that can be
7894 * aggregated (unit is Log2). Max value is 31.
7897 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_1 UINT32_C(0x0)
7899 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_2 UINT32_C(0x1)
7901 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_4 UINT32_C(0x2)
7903 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_8 UINT32_C(0x3)
7904 /* Any segment size larger than this is not valid */
7905 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGG_SEGS_MAX UINT32_C(0x1f)
7908 * This is the maximum number of aggregations this VNIC is
7909 * allowed (unit is Log2). Max value is 7
7912 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_1 UINT32_C(0x0)
7913 /* 2 aggregations */
7914 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_2 UINT32_C(0x1)
7915 /* 4 aggregations */
7916 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_4 UINT32_C(0x2)
7917 /* 8 aggregations */
7918 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_8 UINT32_C(0x3)
7919 /* 16 aggregations */
7920 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_16 UINT32_C(0x4)
7921 /* Any aggregation size larger than this is not valid */
7922 #define HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX UINT32_C(0x7)
7925 uint32_t max_agg_timer;
7927 * This is the maximum amount of time allowed for an aggregation
7928 * context to complete after it was initiated.
7930 uint32_t min_agg_len;
7932 * This is the minimum amount of payload length required to
7933 * start an aggregation context.
7935 } __attribute__((packed));
7937 /* Output (16 bytes) */
7938 struct hwrm_vnic_tpa_cfg_output {
7939 uint16_t error_code;
7941 * Pass/Fail or error type Note: receiver to verify the in
7942 * parameters, and fail the call with an error when appropriate
7945 /* This field returns the type of original request. */
7947 /* This field provides original sequence number of the command. */
7950 * This field is the length of the response in bytes. The last
7951 * byte of the response is a valid flag that will read as '1'
7952 * when the command has been completely written to memory.
7960 * This field is used in Output records to indicate that the
7961 * output is completely written to RAM. This field should be
7962 * read as '1' to indicate that the output has been completely
7963 * written. When writing a command completion or response to an
7964 * internal processor, the order of writes has to be such that
7965 * this field is written last.
7967 } __attribute__((packed));
7969 /* hwrm_vnic_rss_cfg */
7970 /* Description: This function is used to enable RSS configuration. */
7971 /* Input (48 bytes) */
7972 struct hwrm_vnic_rss_cfg_input {
7975 * This value indicates what type of request this is. The format
7976 * for the rest of the command is determined by this field.
7980 * This value indicates the what completion ring the request
7981 * will be optionally completed on. If the value is -1, then no
7982 * CR completion will be generated. Any other value must be a
7983 * valid CR ring_id value for this function.
7986 /* This value indicates the command sequence number. */
7989 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
7990 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
7995 * This is the host address where the response will be written
7996 * when the request is complete. This area must be 16B aligned
7997 * and must be cleared to zero before the request is made.
8001 * When this bit is '1', the RSS hash shall be computed over
8002 * source and destination IPv4 addresses of IPv4 packets.
8004 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 UINT32_C(0x1)
8006 * When this bit is '1', the RSS hash shall be computed over
8007 * source/destination IPv4 addresses and source/destination
8008 * ports of TCP/IPv4 packets.
8010 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 UINT32_C(0x2)
8012 * When this bit is '1', the RSS hash shall be computed over
8013 * source/destination IPv4 addresses and source/destination
8014 * ports of UDP/IPv4 packets.
8016 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 UINT32_C(0x4)
8018 * When this bit is '1', the RSS hash shall be computed over
8019 * source and destination IPv4 addresses of IPv6 packets.
8021 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 UINT32_C(0x8)
8023 * When this bit is '1', the RSS hash shall be computed over
8024 * source/destination IPv6 addresses and source/destination
8025 * ports of TCP/IPv6 packets.
8027 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 UINT32_C(0x10)
8029 * When this bit is '1', the RSS hash shall be computed over
8030 * source/destination IPv6 addresses and source/destination
8031 * ports of UDP/IPv6 packets.
8033 #define HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6 UINT32_C(0x20)
8035 uint64_t ring_grp_tbl_addr;
8036 /* This is the address for rss ring group table */
8037 uint64_t hash_key_tbl_addr;
8038 /* This is the address for rss hash key table */
8039 uint16_t rss_ctx_idx;
8040 /* Index to the rss indirection table. */
8041 uint16_t unused_1[3];
8042 } __attribute__((packed));
8044 /* Output (16 bytes) */
8045 struct hwrm_vnic_rss_cfg_output {
8046 uint16_t error_code;
8048 * Pass/Fail or error type Note: receiver to verify the in
8049 * parameters, and fail the call with an error when appropriate
8052 /* This field returns the type of original request. */
8054 /* This field provides original sequence number of the command. */
8057 * This field is the length of the response in bytes. The last
8058 * byte of the response is a valid flag that will read as '1'
8059 * when the command has been completely written to memory.
8067 * This field is used in Output records to indicate that the
8068 * output is completely written to RAM. This field should be
8069 * read as '1' to indicate that the output has been completely
8070 * written. When writing a command completion or response to an
8071 * internal processor, the order of writes has to be such that
8072 * this field is written last.
8074 } __attribute__((packed));
8076 /* hwrm_vnic_plcmodes_cfg */
8078 * Description: This function can be used to set placement mode configuration of
8081 /* Input (40 bytes) */
8082 struct hwrm_vnic_plcmodes_cfg_input {
8085 * This value indicates what type of request this is. The format for the
8086 * rest of the command is determined by this field.
8090 * This value indicates the what completion ring the request will be
8091 * optionally completed on. If the value is -1, then no CR completion
8092 * will be generated. Any other value must be a valid CR ring_id value
8093 * for this function.
8096 /* This value indicates the command sequence number. */
8099 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8100 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8104 * This is the host address where the response will be written when the
8105 * request is complete. This area must be 16B aligned and must be
8106 * cleared to zero before the request is made.
8110 * When this bit is '1', the VNIC shall be configured to use regular
8111 * placement algorithm. By default, the regular placement algorithm
8112 * shall be enabled on the VNIC.
8114 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_REGULAR_PLACEMENT \
8117 * When this bit is '1', the VNIC shall be configured use the jumbo
8118 * placement algorithm.
8120 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_JUMBO_PLACEMENT \
8123 * When this bit is '1', the VNIC shall be configured to enable Header-
8124 * Data split for IPv4 packets according to the following rules: # If
8125 * the packet is identified as TCP/IPv4, then the packet is split at the
8126 * beginning of the TCP payload. # If the packet is identified as
8127 * UDP/IPv4, then the packet is split at the beginning of UDP payload. #
8128 * If the packet is identified as non-TCP and non-UDP IPv4 packet, then
8129 * the packet is split at the beginning of the upper layer protocol
8130 * header carried in the IPv4 packet.
8132 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
8134 * When this bit is '1', the VNIC shall be configured to enable Header-
8135 * Data split for IPv6 packets according to the following rules: # If
8136 * the packet is identified as TCP/IPv6, then the packet is split at the
8137 * beginning of the TCP payload. # If the packet is identified as
8138 * UDP/IPv6, then the packet is split at the beginning of UDP payload. #
8139 * If the packet is identified as non-TCP and non-UDP IPv6 packet, then
8140 * the packet is split at the beginning of the upper layer protocol
8141 * header carried in the IPv6 packet.
8143 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
8145 * When this bit is '1', the VNIC shall be configured to enable Header-
8146 * Data split for FCoE packets at the beginning of FC payload.
8148 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
8150 * When this bit is '1', the VNIC shall be configured to enable Header-
8151 * Data split for RoCE packets at the beginning of RoCE payload (after
8154 #define HWRM_VNIC_PLCMODES_CFG_INPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
8157 * This bit must be '1' for the jumbo_thresh_valid field to be
8160 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_JUMBO_THRESH_VALID \
8163 * This bit must be '1' for the hds_offset_valid field to be configured.
8165 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_OFFSET_VALID \
8168 * This bit must be '1' for the hds_threshold_valid field to be
8171 #define HWRM_VNIC_PLCMODES_CFG_INPUT_ENABLES_HDS_THRESHOLD_VALID \
8174 /* Logical vnic ID */
8175 uint16_t jumbo_thresh;
8177 * When jumbo placement algorithm is enabled, this value is used to
8178 * determine the threshold for jumbo placement. Packets with length
8179 * larger than this value will be placed according to the jumbo
8180 * placement algorithm.
8182 uint16_t hds_offset;
8184 * This value is used to determine the offset into packet buffer where
8185 * the split data (payload) will be placed according to one of of HDS
8186 * placement algorithm. The lengths of packet buffers provided for split
8187 * data shall be larger than this value.
8189 uint16_t hds_threshold;
8191 * When one of the HDS placement algorithm is enabled, this value is
8192 * used to determine the threshold for HDS placement. Packets with
8193 * length larger than this value will be placed according to the HDS
8194 * placement algorithm. This value shall be in multiple of 4 bytes.
8196 uint16_t unused_0[3];
8197 } __attribute__((packed));
8199 /* Output (16 bytes) */
8200 struct hwrm_vnic_plcmodes_cfg_output {
8201 uint16_t error_code;
8203 * Pass/Fail or error type Note: receiver to verify the in parameters,
8204 * and fail the call with an error when appropriate
8207 /* This field returns the type of original request. */
8209 /* This field provides original sequence number of the command. */
8212 * This field is the length of the response in bytes. The last byte of
8213 * the response is a valid flag that will read as '1' when the command
8214 * has been completely written to memory.
8222 * This field is used in Output records to indicate that the output is
8223 * completely written to RAM. This field should be read as '1' to
8224 * indicate that the output has been completely written. When writing a
8225 * command completion or response to an internal processor, the order of
8226 * writes has to be such that this field is written last.
8228 } __attribute__((packed));
8230 /* hwrm_vnic_plcmodes_qcfg */
8232 * Description: This function can be used to query placement mode configuration
8235 /* Input (24 bytes) */
8236 struct hwrm_vnic_plcmodes_qcfg_input {
8239 * This value indicates what type of request this is. The format for the
8240 * rest of the command is determined by this field.
8244 * This value indicates the what completion ring the request will be
8245 * optionally completed on. If the value is -1, then no CR completion
8246 * will be generated. Any other value must be a valid CR ring_id value
8247 * for this function.
8250 /* This value indicates the command sequence number. */
8253 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
8254 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
8258 * This is the host address where the response will be written when the
8259 * request is complete. This area must be 16B aligned and must be
8260 * cleared to zero before the request is made.
8263 /* Logical vnic ID */
8265 } __attribute__((packed));
8267 /* Output (24 bytes) */
8268 struct hwrm_vnic_plcmodes_qcfg_output {
8269 uint16_t error_code;
8271 * Pass/Fail or error type Note: receiver to verify the in parameters,
8272 * and fail the call with an error when appropriate
8275 /* This field returns the type of original request. */
8277 /* This field provides original sequence number of the command. */
8280 * This field is the length of the response in bytes. The last byte of
8281 * the response is a valid flag that will read as '1' when the command
8282 * has been completely written to memory.
8286 * When this bit is '1', the VNIC is configured to use regular placement
8289 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_REGULAR_PLACEMENT \
8292 * When this bit is '1', the VNIC is configured to use the jumbo
8293 * placement algorithm.
8295 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_JUMBO_PLACEMENT \
8298 * When this bit is '1', the VNIC is configured to enable Header-Data
8299 * split for IPv4 packets.
8301 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV4 UINT32_C(0x4)
8303 * When this bit is '1', the VNIC is configured to enable Header-Data
8304 * split for IPv6 packets.
8306 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_IPV6 UINT32_C(0x8)
8308 * When this bit is '1', the VNIC is configured to enable Header-Data
8309 * split for FCoE packets.
8311 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_FCOE UINT32_C(0x10)
8313 * When this bit is '1', the VNIC is configured to enable Header-Data
8314 * split for RoCE packets.
8316 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_HDS_ROCE UINT32_C(0x20)
8318 * When this bit is '1', the VNIC is configured to be the default VNIC
8319 * of the requesting function.
8321 #define HWRM_VNIC_PLCMODES_QCFG_OUTPUT_FLAGS_DFLT_VNIC UINT32_C(0x40)
8322 uint16_t jumbo_thresh;
8324 * When jumbo placement algorithm is enabled, this value is used to
8325 * determine the threshold for jumbo placement. Packets with length
8326 * larger than this value will be placed according to the jumbo
8327 * placement algorithm.
8329 uint16_t hds_offset;
8331 * This value is used to determine the offset into packet buffer where
8332 * the split data (payload) will be placed according to one of of HDS
8333 * placement algorithm. The lengths of packet buffers provided for split
8334 * data shall be larger than this value.
8336 uint16_t hds_threshold;
8338 * When one of the HDS placement algorithm is enabled, this value is
8339 * used to determine the threshold for HDS placement. Packets with
8340 * length larger than this value will be placed according to the HDS
8341 * placement algorithm. This value shall be in multiple of 4 bytes.
8350 * This field is used in Output records to indicate that the output is
8351 * completely written to RAM. This field should be read as '1' to
8352 * indicate that the output has been completely written. When writing a
8353 * command completion or response to an internal processor, the order of
8354 * writes has to be such that this field is written last.
8356 } __attribute__((packed));
8358 /* hwrm_vnic_rss_cos_lb_ctx_alloc */
8359 /* Description: This function is used to allocate COS/Load Balance context. */
8360 /* Input (16 bytes) */
8361 struct hwrm_vnic_rss_cos_lb_ctx_alloc_input {
8364 * This value indicates what type of request this is. The format
8365 * for the rest of the command is determined by this field.
8369 * This value indicates the what completion ring the request
8370 * will be optionally completed on. If the value is -1, then no
8371 * CR completion will be generated. Any other value must be a
8372 * valid CR ring_id value for this function.
8375 /* This value indicates the command sequence number. */
8378 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8379 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8384 * This is the host address where the response will be written
8385 * when the request is complete. This area must be 16B aligned
8386 * and must be cleared to zero before the request is made.
8388 } __attribute__((packed));
8390 /* Output (16 bytes) */
8391 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output {
8392 uint16_t error_code;
8394 * Pass/Fail or error type Note: receiver to verify the in
8395 * parameters, and fail the call with an error when appropriate
8398 /* This field returns the type of original request. */
8400 /* This field provides original sequence number of the command. */
8403 * This field is the length of the response in bytes. The last
8404 * byte of the response is a valid flag that will read as '1'
8405 * when the command has been completely written to memory.
8407 uint16_t rss_cos_lb_ctx_id;
8408 /* rss_cos_lb_ctx_id is 16 b */
8416 * This field is used in Output records to indicate that the
8417 * output is completely written to RAM. This field should be
8418 * read as '1' to indicate that the output has been completely
8419 * written. When writing a command completion or response to an
8420 * internal processor, the order of writes has to be such that
8421 * this field is written last.
8423 } __attribute__((packed));
8425 /* hwrm_vnic_rss_cos_lb_ctx_free */
8426 /* Description: This function can be used to free COS/Load Balance context. */
8427 /* Input (24 bytes) */
8428 struct hwrm_vnic_rss_cos_lb_ctx_free_input {
8431 * This value indicates what type of request this is. The format
8432 * for the rest of the command is determined by this field.
8436 * This value indicates the what completion ring the request
8437 * will be optionally completed on. If the value is -1, then no
8438 * CR completion will be generated. Any other value must be a
8439 * valid CR ring_id value for this function.
8442 /* This value indicates the command sequence number. */
8445 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8446 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8451 * This is the host address where the response will be written
8452 * when the request is complete. This area must be 16B aligned
8453 * and must be cleared to zero before the request is made.
8455 uint16_t rss_cos_lb_ctx_id;
8456 /* rss_cos_lb_ctx_id is 16 b */
8457 uint16_t unused_0[3];
8458 } __attribute__((packed));
8460 /* Output (16 bytes) */
8461 struct hwrm_vnic_rss_cos_lb_ctx_free_output {
8462 uint16_t error_code;
8464 * Pass/Fail or error type Note: receiver to verify the in
8465 * parameters, and fail the call with an error when appropriate
8468 /* This field returns the type of original request. */
8470 /* This field provides original sequence number of the command. */
8473 * This field is the length of the response in bytes. The last
8474 * byte of the response is a valid flag that will read as '1'
8475 * when the command has been completely written to memory.
8483 * This field is used in Output records to indicate that the
8484 * output is completely written to RAM. This field should be
8485 * read as '1' to indicate that the output has been completely
8486 * written. When writing a command completion or response to an
8487 * internal processor, the order of writes has to be such that
8488 * this field is written last.
8490 } __attribute__((packed));
8492 /* hwrm_ring_alloc */
8494 * Description: This command allocates and does basic preparation for a ring.
8496 /* Input (80 bytes) */
8497 struct hwrm_ring_alloc_input {
8500 * This value indicates what type of request this is. The format
8501 * for the rest of the command is determined by this field.
8505 * This value indicates the what completion ring the request
8506 * will be optionally completed on. If the value is -1, then no
8507 * CR completion will be generated. Any other value must be a
8508 * valid CR ring_id value for this function.
8511 /* This value indicates the command sequence number. */
8514 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8515 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8520 * This is the host address where the response will be written
8521 * when the request is complete. This area must be 16B aligned
8522 * and must be cleared to zero before the request is made.
8525 /* This bit must be '1' for the Reserved1 field to be configured. */
8526 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED1 UINT32_C(0x1)
8527 /* This bit must be '1' for the ring_arb_cfg field to be configured. */
8528 #define HWRM_RING_ALLOC_INPUT_ENABLES_RING_ARB_CFG UINT32_C(0x2)
8529 /* This bit must be '1' for the Reserved3 field to be configured. */
8530 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED3 UINT32_C(0x4)
8532 * This bit must be '1' for the stat_ctx_id_valid field to be
8535 #define HWRM_RING_ALLOC_INPUT_ENABLES_STAT_CTX_ID_VALID UINT32_C(0x8)
8536 /* This bit must be '1' for the Reserved4 field to be configured. */
8537 #define HWRM_RING_ALLOC_INPUT_ENABLES_RESERVED4 UINT32_C(0x10)
8538 /* This bit must be '1' for the max_bw_valid field to be configured. */
8539 #define HWRM_RING_ALLOC_INPUT_ENABLES_MAX_BW_VALID UINT32_C(0x20)
8542 /* L2 Completion Ring (CR) */
8543 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8545 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_TX UINT32_C(0x1)
8547 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_RX UINT32_C(0x2)
8548 /* RoCE Notification Completion Ring (ROCE_CR) */
8549 #define HWRM_RING_ALLOC_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8552 uint64_t page_tbl_addr;
8553 /* This value is a pointer to the page table for the Ring. */
8555 /* First Byte Offset of the first entry in the first page. */
8558 * Actual page size in 2^page_size. The supported range is
8559 * increments in powers of 2 from 16 bytes to 1GB. - 4 = 16 B
8560 * Page size is 16 B. - 12 = 4 KB Page size is 4 KB. - 13 = 8 KB
8561 * Page size is 8 KB. - 16 = 64 KB Page size is 64 KB. - 21 = 2
8562 * MB Page size is 2 MB. - 22 = 4 MB Page size is 4 MB. - 30 = 1
8563 * GB Page size is 1 GB.
8565 uint8_t page_tbl_depth;
8567 * This value indicates the depth of page table. For this
8568 * version of the specification, value other than 0 or 1 shall
8569 * be considered as an invalid value. When the page_tbl_depth =
8570 * 0, then it is treated as a special case with the following.
8571 * 1. FBO and page size fields are not valid. 2. page_tbl_addr
8572 * is the physical address of the first element of the ring.
8578 * Number of 16B units in the ring. Minimum size for a ring is
8581 uint16_t logical_id;
8583 * Logical ring number for the ring to be allocated. This value
8584 * determines the position in the doorbell area where the update
8585 * to the ring will be made. For completion rings, this value is
8586 * also the MSI-X vector number for the function the completion
8587 * ring is associated with.
8589 uint16_t cmpl_ring_id;
8591 * This field is used only when ring_type is a TX ring. This
8592 * value indicates what completion ring the TX ring is
8597 * This field is used only when ring_type is a TX ring. This
8598 * value indicates what CoS queue the TX ring is associated
8604 /* This field is reserved for the future use. It shall be set to 0. */
8605 uint16_t ring_arb_cfg;
8607 * This field is used only when ring_type is a TX ring. This
8608 * field is used to configure arbitration related parameters for
8611 /* Arbitration policy used for the ring. */
8612 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_MASK UINT32_C(0xf)
8613 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SFT 0
8615 * Use strict priority for the TX ring. Priority
8616 * value is specified in arb_policy_param
8618 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_SP \
8619 (UINT32_C(0x1) << 0)
8621 * Use weighted fair queue arbitration for the
8622 * TX ring. Weight is specified in
8625 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ \
8626 (UINT32_C(0x2) << 0)
8627 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_LAST \
8628 RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_WFQ
8629 /* Reserved field. */
8630 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_MASK UINT32_C(0xf0)
8631 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_RSVD_SFT 4
8633 * Arbitration policy specific parameter. # For strict priority
8634 * arbitration policy, this field represents a priority value.
8635 * If set to 0, then the priority is not specified and the HWRM
8636 * is allowed to select any priority for this TX ring. # For
8637 * weighted fair queue arbitration policy, this field represents
8638 * a weight value. If set to 0, then the weight is not specified
8639 * and the HWRM is allowed to select any weight for this TX
8642 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_MASK \
8644 #define HWRM_RING_ALLOC_INPUT_RING_ARB_CFG_ARB_POLICY_PARAM_SFT 8
8648 /* This field is reserved for the future use. It shall be set to 0. */
8649 uint32_t stat_ctx_id;
8651 * This field is used only when ring_type is a TX ring. This
8652 * input indicates what statistics context this ring should be
8656 /* This field is reserved for the future use. It shall be set to 0. */
8659 * This field is used only when ring_type is a TX ring to
8660 * specify maximum BW allocated to the TX ring. The HWRM will
8661 * translate this value into byte counter and time interval used
8662 * for this ring inside the device.
8664 /* The bandwidth value. */
8665 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_MASK UINT32_C(0xfffffff)
8666 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_SFT 0
8667 /* The granularity of the value (bits or bytes). */
8668 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE UINT32_C(0x10000000)
8669 /* Value is in bits. */
8670 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BITS (UINT32_C(0x0) << 28)
8671 /* Value is in bytes. */
8672 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES (UINT32_C(0x1) << 28)
8673 #define HWRM_RING_ALLOC_INPUT_MAX_BW_SCALE_LAST \
8674 RING_ALLOC_INPUT_MAX_BW_SCALE_BYTES
8675 /* bw_value_unit is 3 b */
8676 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MASK \
8677 UINT32_C(0xe0000000)
8678 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_SFT 29
8679 /* Value is in Mb or MB (base 10). */
8680 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_MEGA \
8681 (UINT32_C(0x0) << 29)
8682 /* Value is in Kb or KB (base 10). */
8683 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_KILO \
8684 (UINT32_C(0x2) << 29)
8685 /* Value is in bits or bytes. */
8686 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_BASE \
8687 (UINT32_C(0x4) << 29)
8688 /* Value is in Gb or GB (base 10). */
8689 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_GIGA \
8690 (UINT32_C(0x6) << 29)
8691 /* Value is in 1/100th of a percentage of total bandwidth. */
8692 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_PERCENT1_100 \
8693 (UINT32_C(0x1) << 29)
8695 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID \
8696 (UINT32_C(0x7) << 29)
8697 #define HWRM_RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_LAST \
8698 RING_ALLOC_INPUT_MAX_BW_BW_VALUE_UNIT_INVALID
8701 * This field is used only when ring_type is a Completion ring.
8702 * This value indicates what interrupt mode should be used on
8703 * this completion ring. Note: In the legacy interrupt mode, no
8704 * more than 16 completion rings are allowed.
8707 #define HWRM_RING_ALLOC_INPUT_INT_MODE_LEGACY UINT32_C(0x0)
8709 #define HWRM_RING_ALLOC_INPUT_INT_MODE_RSVD UINT32_C(0x1)
8711 #define HWRM_RING_ALLOC_INPUT_INT_MODE_MSIX UINT32_C(0x2)
8712 /* No Interrupt - Polled mode */
8713 #define HWRM_RING_ALLOC_INPUT_INT_MODE_POLL UINT32_C(0x3)
8714 uint8_t unused_8[3];
8715 } __attribute__((packed));
8717 /* Output (16 bytes) */
8718 struct hwrm_ring_alloc_output {
8719 uint16_t error_code;
8721 * Pass/Fail or error type Note: receiver to verify the in
8722 * parameters, and fail the call with an error when appropriate
8725 /* This field returns the type of original request. */
8727 /* This field provides original sequence number of the command. */
8730 * This field is the length of the response in bytes. The last
8731 * byte of the response is a valid flag that will read as '1'
8732 * when the command has been completely written to memory.
8736 * Physical number of ring allocated. This value shall be unique
8739 uint16_t logical_ring_id;
8740 /* Logical number of ring allocated. */
8746 * This field is used in Output records to indicate that the
8747 * output is completely written to RAM. This field should be
8748 * read as '1' to indicate that the output has been completely
8749 * written. When writing a command completion or response to an
8750 * internal processor, the order of writes has to be such that
8751 * this field is written last.
8753 } __attribute__((packed));
8755 /* hwrm_ring_free */
8757 * Description: This command is used to free a ring and associated resources.
8758 * With QoS and DCBx agents, it is possible the traffic classes will be moved
8759 * from one CoS queue to another. When this occurs, the driver shall call
8760 * 'hwrm_ring_free' to free the allocated rings and then call 'hwrm_ring_alloc'
8761 * to re-allocate each ring and assign it to a new CoS queue. hwrm_ring_free
8762 * shall be called on a ring only after it has been idle for 500ms or more and
8763 * no frames have been posted to the ring during this time. All frames queued
8764 * for transmission shall be completed and at least 500ms time elapsed from the
8765 * last completion before calling this command.
8767 /* Input (24 bytes) */
8768 struct hwrm_ring_free_input {
8771 * This value indicates what type of request this is. The format
8772 * for the rest of the command is determined by this field.
8776 * This value indicates the what completion ring the request
8777 * will be optionally completed on. If the value is -1, then no
8778 * CR completion will be generated. Any other value must be a
8779 * valid CR ring_id value for this function.
8782 /* This value indicates the command sequence number. */
8785 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8786 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8791 * This is the host address where the response will be written
8792 * when the request is complete. This area must be 16B aligned
8793 * and must be cleared to zero before the request is made.
8797 /* L2 Completion Ring (CR) */
8798 #define HWRM_RING_FREE_INPUT_RING_TYPE_L2_CMPL UINT32_C(0x0)
8800 #define HWRM_RING_FREE_INPUT_RING_TYPE_TX UINT32_C(0x1)
8802 #define HWRM_RING_FREE_INPUT_RING_TYPE_RX UINT32_C(0x2)
8803 /* RoCE Notification Completion Ring (ROCE_CR) */
8804 #define HWRM_RING_FREE_INPUT_RING_TYPE_ROCE_CMPL UINT32_C(0x3)
8807 /* Physical number of ring allocated. */
8809 } __attribute__((packed));
8811 /* Output (16 bytes) */
8812 struct hwrm_ring_free_output {
8813 uint16_t error_code;
8815 * Pass/Fail or error type Note: receiver to verify the in
8816 * parameters, and fail the call with an error when appropriate
8819 /* This field returns the type of original request. */
8821 /* This field provides original sequence number of the command. */
8824 * This field is the length of the response in bytes. The last
8825 * byte of the response is a valid flag that will read as '1'
8826 * when the command has been completely written to memory.
8834 * This field is used in Output records to indicate that the
8835 * output is completely written to RAM. This field should be
8836 * read as '1' to indicate that the output has been completely
8837 * written. When writing a command completion or response to an
8838 * internal processor, the order of writes has to be such that
8839 * this field is written last.
8841 } __attribute__((packed));
8843 /* hwrm_ring_grp_alloc */
8845 * Description: This API allocates and does basic preparation for a ring group.
8847 /* Input (24 bytes) */
8848 struct hwrm_ring_grp_alloc_input {
8851 * This value indicates what type of request this is. The format
8852 * for the rest of the command is determined by this field.
8856 * This value indicates the what completion ring the request
8857 * will be optionally completed on. If the value is -1, then no
8858 * CR completion will be generated. Any other value must be a
8859 * valid CR ring_id value for this function.
8862 /* This value indicates the command sequence number. */
8865 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8866 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8871 * This is the host address where the response will be written
8872 * when the request is complete. This area must be 16B aligned
8873 * and must be cleared to zero before the request is made.
8876 /* This value identifies the CR associated with the ring group. */
8878 /* This value identifies the main RR associated with the ring group. */
8881 * This value identifies the aggregation RR associated with the
8882 * ring group. If this value is 0xFF... (All Fs), then no
8883 * Aggregation ring will be set.
8887 * This value identifies the statistics context associated with
8890 } __attribute__((packed));
8892 /* Output (16 bytes) */
8893 struct hwrm_ring_grp_alloc_output {
8894 uint16_t error_code;
8896 * Pass/Fail or error type Note: receiver to verify the in
8897 * parameters, and fail the call with an error when appropriate
8900 /* This field returns the type of original request. */
8902 /* This field provides original sequence number of the command. */
8905 * This field is the length of the response in bytes. The last
8906 * byte of the response is a valid flag that will read as '1'
8907 * when the command has been completely written to memory.
8909 uint32_t ring_group_id;
8911 * This is the ring group ID value. Use this value to program
8912 * the default ring group for the VNIC or as table entries in an
8920 * This field is used in Output records to indicate that the
8921 * output is completely written to RAM. This field should be
8922 * read as '1' to indicate that the output has been completely
8923 * written. When writing a command completion or response to an
8924 * internal processor, the order of writes has to be such that
8925 * this field is written last.
8927 } __attribute__((packed));
8929 /* hwrm_ring_grp_free */
8931 * Description: This API frees a ring group and associated resources. # If a
8932 * ring in the ring group is reset or free, then the associated rings in the
8933 * ring group shall also be reset/free using hwrm_ring_free. # A function driver
8934 * shall always use hwrm_ring_grp_free after freeing all rings in a group. # As
8935 * a part of executing this command, the HWRM shall reset all associated ring
8938 /* Input (24 bytes) */
8939 struct hwrm_ring_grp_free_input {
8942 * This value indicates what type of request this is. The format
8943 * for the rest of the command is determined by this field.
8947 * This value indicates the what completion ring the request
8948 * will be optionally completed on. If the value is -1, then no
8949 * CR completion will be generated. Any other value must be a
8950 * valid CR ring_id value for this function.
8953 /* This value indicates the command sequence number. */
8956 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
8957 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
8962 * This is the host address where the response will be written
8963 * when the request is complete. This area must be 16B aligned
8964 * and must be cleared to zero before the request is made.
8966 uint32_t ring_group_id;
8967 /* This is the ring group ID value. */
8969 } __attribute__((packed));
8971 /* Output (16 bytes) */
8972 struct hwrm_ring_grp_free_output {
8973 uint16_t error_code;
8975 * Pass/Fail or error type Note: receiver to verify the in
8976 * parameters, and fail the call with an error when appropriate
8979 /* This field returns the type of original request. */
8981 /* This field provides original sequence number of the command. */
8984 * This field is the length of the response in bytes. The last
8985 * byte of the response is a valid flag that will read as '1'
8986 * when the command has been completely written to memory.
8994 * This field is used in Output records to indicate that the
8995 * output is completely written to RAM. This field should be
8996 * read as '1' to indicate that the output has been completely
8997 * written. When writing a command completion or response to an
8998 * internal processor, the order of writes has to be such that
8999 * this field is written last.
9001 } __attribute__((packed));
9003 /* hwrm_cfa_l2_filter_alloc */
9005 * Description: An L2 filter is a filter resource that is used to identify a
9006 * vnic or ring for a packet based on layer 2 fields. Layer 2 fields for
9007 * encapsulated packets include both outer L2 header and/or inner l2 header of
9008 * encapsulated packet. The L2 filter resource covers the following OS specific
9009 * L2 filters. Linux/FreeBSD (per function): # Broadcast enable/disable # List
9010 * of individual multicast filters # All multicast enable/disable filter #
9011 * Unicast filters # Promiscuous mode VMware: # Broadcast enable/disable (per
9012 * physical function) # All multicast enable/disable (per function) # Unicast
9013 * filters per ring or vnic # Promiscuous mode per PF Windows: # Broadcast
9014 * enable/disable (per physical function) # List of individual multicast filters
9015 * (Driver needs to advertise the maximum number of filters supported) # All
9016 * multicast enable/disable per physical function # Unicast filters per vnic #
9017 * Promiscuous mode per PF Implementation notes on the use of VNIC in this
9018 * command: # By default, these filters belong to default vnic for the function.
9019 * # Once these filters are set up, only destination VNIC can be modified. # If
9020 * the destination VNIC is not specified in this command, then the HWRM shall
9021 * only create an l2 context id. HWRM Implementation notes for multicast
9022 * filters: # The hwrm_filter_alloc command can be used to set up multicast
9023 * filters (perfect match or partial match). Each individual function driver can
9024 * set up multicast filters independently. # The HWRM needs to keep track of
9025 * multicast filters set up by function drivers and maintain multicast group
9026 * replication records to enable a subset of functions to receive traffic for a
9027 * specific multicast address. # When a specific multicast filter cannot be set,
9028 * the HWRM shall return an error. In this error case, the driver should fall
9029 * back to using one general filter (rather than specific) for all multicast
9030 * traffic. # When the SR-IOV is enabled, the HWRM needs to additionally track
9031 * source knockout per multicast group record. Examples of setting unicast
9032 * filters: For a unicast MAC based filter, one can use a combination of the
9033 * fields and masks provided in this command to set up the filter. Below are
9034 * some examples: # MAC + no VLAN filter: This filter is used to identify
9035 * traffic that does not contain any VLAN tags and matches destination (or
9036 * source) MAC address. This filter can be set up by setting only l2_addr field
9037 * to be a valid field. All other fields are not valid. The following value is
9038 * set for l2_addr. l2_addr = MAC # MAC + Any VLAN filter: This filter is used
9039 * to identify traffic that carries single VLAN tag and matches (destination or
9040 * source) MAC address. This filter can be set up by setting only l2_addr and
9041 * l2_ovlan_mask fields to be valid fields. All other fields are not valid. The
9042 * following values are set for those two valid fields. l2_addr = MAC,
9043 * l2_ovlan_mask = 0xFFFF # MAC + no VLAN or VLAN ID=0: This filter is used to
9044 * identify untagged traffic that does not contain any VLAN tags or a VLAN tag
9045 * with VLAN ID = 0 and matches destination (or source) MAC address. This filter
9046 * can be set up by setting only l2_addr and l2_ovlan fields to be valid fields.
9047 * All other fields are not valid. The following value are set for l2_addr and
9048 * l2_ovlan. l2_addr = MAC, l2_ovlan = 0x0 # MAC + no VLAN or any VLAN: This
9049 * filter is used to identify traffic that contains zero or 1 VLAN tag and
9050 * matches destination (or source) MAC address. This filter can be set up by
9051 * setting only l2_addr, l2_ovlan, and l2_mask fields to be valid fields. All
9052 * other fields are not valid. The following value are set for l2_addr,
9053 * l2_ovlan, and l2_mask fields. l2_addr = MAC, l2_ovlan = 0x0, l2_ovlan_mask =
9054 * 0xFFFF # MAC + VLAN ID filter: This filter can be set up by setting only
9055 * l2_addr, l2_ovlan, and l2_ovlan_mask fields to be valid fields. All other
9056 * fields are not valid. The following values are set for those three valid
9057 * fields. l2_addr = MAC, l2_ovlan = VLAN ID, l2_ovlan_mask = 0xF000
9059 /* Input (96 bytes) */
9060 struct hwrm_cfa_l2_filter_alloc_input {
9063 * This value indicates what type of request this is. The format
9064 * for the rest of the command is determined by this field.
9068 * This value indicates the what completion ring the request
9069 * will be optionally completed on. If the value is -1, then no
9070 * CR completion will be generated. Any other value must be a
9071 * valid CR ring_id value for this function.
9074 /* This value indicates the command sequence number. */
9077 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9078 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9083 * This is the host address where the response will be written
9084 * when the request is complete. This area must be 16B aligned
9085 * and must be cleared to zero before the request is made.
9089 * Enumeration denoting the RX, TX type of the resource. This
9090 * enumeration is used for resources that are similar for both
9091 * TX and RX paths of the chip.
9093 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
9095 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_TX \
9096 (UINT32_C(0x0) << 0)
9098 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX \
9099 (UINT32_C(0x1) << 0)
9100 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_LAST \
9101 CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX
9103 * Setting of this flag indicates the applicability to the
9106 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK UINT32_C(0x2)
9108 * Setting of this flag indicates drop action. If this flag is
9109 * not set, then it should be considered accept action.
9111 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x4)
9113 * If this flag is set, all t_l2_* fields are invalid and they
9114 * should not be specified. If this flag is set, then l2_*
9115 * fields refer to fields of outermost L2 header.
9117 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_OUTERMOST UINT32_C(0x8)
9119 /* This bit must be '1' for the l2_addr field to be configured. */
9120 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR UINT32_C(0x1)
9121 /* This bit must be '1' for the l2_addr_mask field to be configured. */
9122 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK \
9124 /* This bit must be '1' for the l2_ovlan field to be configured. */
9125 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN UINT32_C(0x4)
9127 * This bit must be '1' for the l2_ovlan_mask field to be
9130 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK \
9132 /* This bit must be '1' for the l2_ivlan field to be configured. */
9133 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN UINT32_C(0x10)
9135 * This bit must be '1' for the l2_ivlan_mask field to be
9138 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_IVLAN_MASK \
9140 /* This bit must be '1' for the t_l2_addr field to be configured. */
9141 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR UINT32_C(0x40)
9143 * This bit must be '1' for the t_l2_addr_mask field to be
9146 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_ADDR_MASK \
9148 /* This bit must be '1' for the t_l2_ovlan field to be configured. */
9149 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN \
9152 * This bit must be '1' for the t_l2_ovlan_mask field to be
9155 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_OVLAN_MASK \
9157 /* This bit must be '1' for the t_l2_ivlan field to be configured. */
9158 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN \
9161 * This bit must be '1' for the t_l2_ivlan_mask field to be
9164 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_T_L2_IVLAN_MASK \
9166 /* This bit must be '1' for the src_type field to be configured. */
9167 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_TYPE UINT32_C(0x1000)
9168 /* This bit must be '1' for the src_id field to be configured. */
9169 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_SRC_ID UINT32_C(0x2000)
9170 /* This bit must be '1' for the tunnel_type field to be configured. */
9171 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9173 /* This bit must be '1' for the dst_id field to be configured. */
9174 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x8000)
9176 * This bit must be '1' for the mirror_vnic_id field to be
9179 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9183 * This value sets the match value for the L2 MAC address.
9184 * Destination MAC address for RX path. Source MAC address for
9189 uint8_t l2_addr_mask[6];
9191 * This value sets the mask value for the L2 address. A value of
9192 * 0 will mask the corresponding bit from compare.
9195 /* This value sets VLAN ID value for outer VLAN. */
9196 uint16_t l2_ovlan_mask;
9198 * This value sets the mask value for the ovlan id. A value of 0
9199 * will mask the corresponding bit from compare.
9202 /* This value sets VLAN ID value for inner VLAN. */
9203 uint16_t l2_ivlan_mask;
9205 * This value sets the mask value for the ivlan id. A value of 0
9206 * will mask the corresponding bit from compare.
9210 uint8_t t_l2_addr[6];
9212 * This value sets the match value for the tunnel L2 MAC
9213 * address. Destination MAC address for RX path. Source MAC
9214 * address for TX path.
9218 uint8_t t_l2_addr_mask[6];
9220 * This value sets the mask value for the tunnel L2 address. A
9221 * value of 0 will mask the corresponding bit from compare.
9223 uint16_t t_l2_ovlan;
9224 /* This value sets VLAN ID value for tunnel outer VLAN. */
9225 uint16_t t_l2_ovlan_mask;
9227 * This value sets the mask value for the tunnel ovlan id. A
9228 * value of 0 will mask the corresponding bit from compare.
9230 uint16_t t_l2_ivlan;
9231 /* This value sets VLAN ID value for tunnel inner VLAN. */
9232 uint16_t t_l2_ivlan_mask;
9234 * This value sets the mask value for the tunnel ivlan id. A
9235 * value of 0 will mask the corresponding bit from compare.
9238 /* This value identifies the type of source of the packet. */
9240 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_NPORT UINT32_C(0x0)
9241 /* Physical function */
9242 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_PF UINT32_C(0x1)
9243 /* Virtual function */
9244 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VF UINT32_C(0x2)
9245 /* Virtual NIC of a function */
9246 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_VNIC UINT32_C(0x3)
9247 /* Embedded processor for CFA management */
9248 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_KONG UINT32_C(0x4)
9249 /* Embedded processor for OOB management */
9250 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_APE UINT32_C(0x5)
9251 /* Embedded processor for RoCE */
9252 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_BONO UINT32_C(0x6)
9253 /* Embedded processor for network proxy functions */
9254 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_SRC_TYPE_TANG UINT32_C(0x7)
9258 * This value is the id of the source. For a network port, it
9259 * represents port_id. For a physical function, it represents
9260 * fid. For a virtual function, it represents vf_id. For a vnic,
9261 * it represents vnic_id. For embedded processors, this id is
9262 * not valid. Notes: 1. The function ID is implied if it src_id
9263 * is not provided for a src_type that is either
9265 uint8_t tunnel_type;
9268 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
9270 /* Virtual eXtensible Local Area Network (VXLAN) */
9271 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
9274 * Network Virtualization Generic Routing
9275 * Encapsulation (NVGRE)
9277 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
9280 * Generic Routing Encapsulation (GRE) inside
9283 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
9285 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
9286 /* Generic Network Virtualization Encapsulation (Geneve) */
9287 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
9288 /* Multi-Protocol Lable Switching (MPLS) */
9289 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
9290 /* Stateless Transport Tunnel (STT) */
9291 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
9293 * Generic Routing Encapsulation (GRE) inside IP
9296 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
9298 * IPV4 over virtual eXtensible Local Area
9299 * Network (IPV4oVXLAN)
9301 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
9303 /* Any tunneled traffic */
9304 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
9309 * If set, this value shall represent the Logical VNIC ID of the
9310 * destination VNIC for the RX path and network port id of the
9311 * destination port for the TX path.
9313 uint16_t mirror_vnic_id;
9314 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
9317 * This hint is provided to help in placing the filter in the
9321 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
9323 /* Above the given filter */
9324 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE_FILTER \
9326 /* Below the given filter */
9327 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_BELOW_FILTER \
9329 /* As high as possible */
9330 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MAX UINT32_C(0x3)
9331 /* As low as possible */
9332 #define HWRM_CFA_L2_FILTER_ALLOC_INPUT_PRI_HINT_MIN UINT32_C(0x4)
9335 uint64_t l2_filter_id_hint;
9337 * This is the ID of the filter that goes along with the
9338 * pri_hint. This field is valid only for the following values.
9339 * 1 - Above the given filter 2 - Below the given filter
9341 } __attribute__((packed));
9343 /* Output (24 bytes) */
9344 struct hwrm_cfa_l2_filter_alloc_output {
9345 uint16_t error_code;
9347 * Pass/Fail or error type Note: receiver to verify the in
9348 * parameters, and fail the call with an error when appropriate
9351 /* This field returns the type of original request. */
9353 /* This field provides original sequence number of the command. */
9356 * This field is the length of the response in bytes. The last
9357 * byte of the response is a valid flag that will read as '1'
9358 * when the command has been completely written to memory.
9360 uint64_t l2_filter_id;
9362 * This value identifies a set of CFA data structures used for
9367 * This is the ID of the flow associated with this filter. This
9368 * value shall be used to match and associate the flow
9369 * identifier returned in completion records. A value of
9370 * 0xFFFFFFFF shall indicate no flow id.
9377 * This field is used in Output records to indicate that the
9378 * output is completely written to RAM. This field should be
9379 * read as '1' to indicate that the output has been completely
9380 * written. When writing a command completion or response to an
9381 * internal processor, the order of writes has to be such that
9382 * this field is written last.
9384 } __attribute__((packed));
9386 /* hwrm_cfa_l2_filter_free */
9388 * Description: Free a L2 filter. The HWRM shall free all associated filter
9389 * resources with the L2 filter.
9391 /* Input (24 bytes) */
9392 struct hwrm_cfa_l2_filter_free_input {
9395 * This value indicates what type of request this is. The format
9396 * for the rest of the command is determined by this field.
9400 * This value indicates the what completion ring the request
9401 * will be optionally completed on. If the value is -1, then no
9402 * CR completion will be generated. Any other value must be a
9403 * valid CR ring_id value for this function.
9406 /* This value indicates the command sequence number. */
9409 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9410 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9415 * This is the host address where the response will be written
9416 * when the request is complete. This area must be 16B aligned
9417 * and must be cleared to zero before the request is made.
9419 uint64_t l2_filter_id;
9421 * This value identifies a set of CFA data structures used for
9424 } __attribute__((packed));
9426 /* Output (16 bytes) */
9427 struct hwrm_cfa_l2_filter_free_output {
9428 uint16_t error_code;
9430 * Pass/Fail or error type Note: receiver to verify the in
9431 * parameters, and fail the call with an error when appropriate
9434 /* This field returns the type of original request. */
9436 /* This field provides original sequence number of the command. */
9439 * This field is the length of the response in bytes. The last
9440 * byte of the response is a valid flag that will read as '1'
9441 * when the command has been completely written to memory.
9449 * This field is used in Output records to indicate that the
9450 * output is completely written to RAM. This field should be
9451 * read as '1' to indicate that the output has been completely
9452 * written. When writing a command completion or response to an
9453 * internal processor, the order of writes has to be such that
9454 * this field is written last.
9456 } __attribute__((packed));
9458 /* hwrm_cfa_l2_filter_cfg */
9459 /* Description: Change the configuration of an existing L2 filter */
9460 /* Input (40 bytes) */
9461 struct hwrm_cfa_l2_filter_cfg_input {
9464 * This value indicates what type of request this is. The format
9465 * for the rest of the command is determined by this field.
9469 * This value indicates the what completion ring the request
9470 * will be optionally completed on. If the value is -1, then no
9471 * CR completion will be generated. Any other value must be a
9472 * valid CR ring_id value for this function.
9475 /* This value indicates the command sequence number. */
9478 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9479 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9484 * This is the host address where the response will be written
9485 * when the request is complete. This area must be 16B aligned
9486 * and must be cleared to zero before the request is made.
9490 * Enumeration denoting the RX, TX type of the resource. This
9491 * enumeration is used for resources that are similar for both
9492 * TX and RX paths of the chip.
9494 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH UINT32_C(0x1)
9496 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_TX \
9497 (UINT32_C(0x0) << 0)
9499 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX \
9500 (UINT32_C(0x1) << 0)
9501 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_LAST \
9502 CFA_L2_FILTER_CFG_INPUT_FLAGS_PATH_RX
9504 * Setting of this flag indicates drop action. If this flag is
9505 * not set, then it should be considered accept action.
9507 #define HWRM_CFA_L2_FILTER_CFG_INPUT_FLAGS_DROP UINT32_C(0x2)
9509 /* This bit must be '1' for the dst_id field to be configured. */
9510 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_DST_ID UINT32_C(0x1)
9512 * This bit must be '1' for the new_mirror_vnic_id field to be
9515 #define HWRM_CFA_L2_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
9517 uint64_t l2_filter_id;
9519 * This value identifies a set of CFA data structures used for
9524 * If set, this value shall represent the Logical VNIC ID of the
9525 * destination VNIC for the RX path and network port id of the
9526 * destination port for the TX path.
9528 uint32_t new_mirror_vnic_id;
9529 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
9530 } __attribute__((packed));
9532 /* Output (16 bytes) */
9533 struct hwrm_cfa_l2_filter_cfg_output {
9534 uint16_t error_code;
9536 * Pass/Fail or error type Note: receiver to verify the in
9537 * parameters, and fail the call with an error when appropriate
9540 /* This field returns the type of original request. */
9542 /* This field provides original sequence number of the command. */
9545 * This field is the length of the response in bytes. The last
9546 * byte of the response is a valid flag that will read as '1'
9547 * when the command has been completely written to memory.
9555 * This field is used in Output records to indicate that the
9556 * output is completely written to RAM. This field should be
9557 * read as '1' to indicate that the output has been completely
9558 * written. When writing a command completion or response to an
9559 * internal processor, the order of writes has to be such that
9560 * this field is written last.
9562 } __attribute__((packed));
9564 /* hwrm_cfa_l2_set_rx_mask */
9565 /* Description: This command will set rx mask of the function. */
9566 /* Input (56 bytes) */
9567 struct hwrm_cfa_l2_set_rx_mask_input {
9570 * This value indicates what type of request this is. The format
9571 * for the rest of the command is determined by this field.
9575 * This value indicates the what completion ring the request
9576 * will be optionally completed on. If the value is -1, then no
9577 * CR completion will be generated. Any other value must be a
9578 * valid CR ring_id value for this function.
9581 /* This value indicates the command sequence number. */
9584 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9585 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9590 * This is the host address where the response will be written
9591 * when the request is complete. This area must be 16B aligned
9592 * and must be cleared to zero before the request is made.
9597 /* Reserved for future use. */
9598 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_RESERVED UINT32_C(0x1)
9600 * When this bit is '1', the function is requested to accept
9601 * multi-cast packets specified by the multicast addr table.
9603 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST UINT32_C(0x2)
9605 * When this bit is '1', the function is requested to accept all
9606 * multi-cast packets.
9608 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST UINT32_C(0x4)
9610 * When this bit is '1', the function is requested to accept
9611 * broadcast packets.
9613 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST UINT32_C(0x8)
9615 * When this bit is '1', the function is requested to be put in
9616 * the promiscuous mode. The HWRM should accept any function to
9617 * set up promiscuous mode. The HWRM shall follow the semantics
9618 * below for the promiscuous mode support. # When partitioning
9619 * is not enabled on a port (i.e. single PF on the port), then
9620 * the PF shall be allowed to be in the promiscuous mode. When
9621 * the PF is in the promiscuous mode, then it shall receive all
9622 * host bound traffic on that port. # When partitioning is
9623 * enabled on a port (i.e. multiple PFs per port) and a PF on
9624 * that port is in the promiscuous mode, then the PF receives
9625 * all traffic within that partition as identified by a unique
9626 * identifier for the PF (e.g. S-Tag). If a unique outer VLAN
9627 * for the PF is specified, then the setting of promiscuous mode
9628 * on that PF shall result in the PF receiving all host bound
9629 * traffic with matching outer VLAN. # A VF shall can be set in
9630 * the promiscuous mode. In the promiscuous mode, the VF does
9631 * not receive any traffic unless a unique outer VLAN for the VF
9632 * is specified. If a unique outer VLAN for the VF is specified,
9633 * then the setting of promiscuous mode on that VF shall result
9634 * in the VF receiving all host bound traffic with the matching
9635 * outer VLAN. # The HWRM shall allow the setting of promiscuous
9636 * mode on a function independently from the promiscuous mode
9637 * settings on other functions.
9639 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS UINT32_C(0x10)
9641 * If this flag is set, the corresponding RX filters shall be
9642 * set up to cover multicast/broadcast filters for the outermost
9643 * Layer 2 destination MAC address field.
9645 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_OUTERMOST UINT32_C(0x20)
9647 * If this flag is set, the corresponding RX filters shall be
9648 * set up to cover multicast/broadcast filters for the VLAN-
9649 * tagged packets that match the TPID and VID fields of VLAN
9650 * tags in the VLAN tag table specified in this command.
9652 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLANONLY UINT32_C(0x40)
9654 * If this flag is set, the corresponding RX filters shall be
9655 * set up to cover multicast/broadcast filters for non-VLAN
9656 * tagged packets and VLAN-tagged packets that match the TPID
9657 * and VID fields of VLAN tags in the VLAN tag table specified
9660 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_VLAN_NONVLAN UINT32_C(0x80)
9662 * If this flag is set, the corresponding RX filters shall be
9663 * set up to cover multicast/broadcast filters for non-VLAN
9664 * tagged packets and VLAN-tagged packets matching any VLAN tag.
9665 * If this flag is set, then the HWRM shall ignore VLAN tags
9666 * specified in vlan_tag_tbl. If none of vlanonly, vlan_nonvlan,
9667 * and anyvlan_nonvlan flags is set, then the HWRM shall ignore
9668 * VLAN tags specified in vlan_tag_tbl. The HWRM client shall
9669 * set at most one flag out of vlanonly, vlan_nonvlan, and
9672 #define HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN \
9674 uint64_t mc_tbl_addr;
9675 /* This is the address for mcast address tbl. */
9676 uint32_t num_mc_entries;
9678 * This value indicates how many entries in mc_tbl are valid.
9679 * Each entry is 6 bytes.
9682 uint64_t vlan_tag_tbl_addr;
9684 * This is the address for VLAN tag table. Each VLAN entry in
9685 * the table is 4 bytes of a VLAN tag including TPID, PCP, DEI,
9686 * and VID fields in network byte order.
9688 uint32_t num_vlan_tags;
9690 * This value indicates how many entries in vlan_tag_tbl are
9691 * valid. Each entry is 4 bytes.
9694 } __attribute__((packed));
9696 /* Output (16 bytes) */
9697 struct hwrm_cfa_l2_set_rx_mask_output {
9698 uint16_t error_code;
9700 * Pass/Fail or error type Note: receiver to verify the in
9701 * parameters, and fail the call with an error when appropriate
9704 /* This field returns the type of original request. */
9706 /* This field provides original sequence number of the command. */
9709 * This field is the length of the response in bytes. The last
9710 * byte of the response is a valid flag that will read as '1'
9711 * when the command has been completely written to memory.
9719 * This field is used in Output records to indicate that the
9720 * output is completely written to RAM. This field should be
9721 * read as '1' to indicate that the output has been completely
9722 * written. When writing a command completion or response to an
9723 * internal processor, the order of writes has to be such that
9724 * this field is written last.
9726 } __attribute__((packed));
9728 /* Command specific Error Codes (8 bytes) */
9729 struct hwrm_cfa_l2_set_rx_mask_cmd_err {
9732 * command specific error codes that goes to the cmd_err field
9733 * in Common HWRM Error Response.
9736 #define HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
9738 * Unable to complete operation due to conflict
9739 * with Ntuple Filter
9742 HWRM_CFA_L2_SET_RX_MASK_CMD_ERR_CODE_NTUPLE_FILTER_CONFLICT_ERR \
9744 uint8_t unused_0[7];
9745 } __attribute__((packed));
9747 /* hwrm_cfa_vlan_antispoof_cfg */
9748 /* Description: Configures vlan anti-spoof filters for VF. */
9749 /* Input (32 bytes) */
9750 struct hwrm_cfa_vlan_antispoof_cfg_input {
9753 * This value indicates what type of request this is. The format for the
9754 * rest of the command is determined by this field.
9758 * This value indicates the what completion ring the request will be
9759 * optionally completed on. If the value is -1, then no CR completion
9760 * will be generated. Any other value must be a valid CR ring_id value
9761 * for this function.
9764 /* This value indicates the command sequence number. */
9767 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
9768 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
9772 * This is the host address where the response will be written when the
9773 * request is complete. This area must be 16B aligned and must be
9774 * cleared to zero before the request is made.
9778 * Function ID of the function that is being configured. Only valid for
9779 * a VF FID configured by the PF.
9783 uint32_t num_vlan_entries;
9784 /* Number of VLAN entries in the vlan_tag_mask_tbl. */
9785 uint64_t vlan_tag_mask_tbl_addr;
9787 * The vlan_tag_mask_tbl_addr is the DMA address of the VLAN antispoof
9788 * table. Each table entry contains the 16-bit TPID (0x8100 or 0x88a8
9789 * only), 16-bit VLAN ID, and a 16-bit mask, all in network order to
9790 * match hwrm_cfa_l2_set_rx_mask. For an individual VLAN entry, the mask
9791 * value should be 0xfff for the 12-bit VLAN ID.
9795 /* Output (16 bytes) */
9796 struct hwrm_cfa_vlan_antispoof_cfg_output {
9797 uint16_t error_code;
9799 * Pass/Fail or error type Note: receiver to verify the in parameters,
9800 * and fail the call with an error when appropriate
9803 /* This field returns the type of original request. */
9805 /* This field provides original sequence number of the command. */
9808 * This field is the length of the response in bytes. The last byte of
9809 * the response is a valid flag that will read as '1' when the command
9810 * has been completely written to memory.
9818 * This field is used in Output records to indicate that the output is
9819 * completely written to RAM. This field should be read as '1' to
9820 * indicate that the output has been completely written. When writing a
9821 * command completion or response to an internal processor, the order of
9822 * writes has to be such that this field is written last.
9826 /* hwrm_cfa_ntuple_filter_alloc */
9828 * Description: This is a ntuple filter that uses fields from L4/L3 header and
9829 * optionally fields from L2. The ntuple filters apply to receive traffic only.
9830 * All L2/L3/L4 header fields are specified in network byte order. These filters
9831 * can be used for Receive Flow Steering (RFS). # For ethertype value, only
9832 * 0x0800 (IPv4) and 0x86dd (IPv6) shall be supported for ntuple filters. # If a
9833 * field specified in this command is not enabled as a valid field, then that
9834 * field shall not be used in matching packet header fields against this filter.
9836 /* Input (128 bytes) */
9837 struct hwrm_cfa_ntuple_filter_alloc_input {
9840 * This value indicates what type of request this is. The format
9841 * for the rest of the command is determined by this field.
9845 * This value indicates the what completion ring the request
9846 * will be optionally completed on. If the value is -1, then no
9847 * CR completion will be generated. Any other value must be a
9848 * valid CR ring_id value for this function.
9851 /* This value indicates the command sequence number. */
9854 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
9855 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
9860 * This is the host address where the response will be written
9861 * when the request is complete. This area must be 16B aligned
9862 * and must be cleared to zero before the request is made.
9866 * Setting of this flag indicates the applicability to the
9869 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_LOOPBACK \
9872 * Setting of this flag indicates drop action. If this flag is
9873 * not set, then it should be considered accept action.
9875 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x2)
9877 * Setting of this flag indicates that a meter is expected to be
9878 * attached to this flow. This hint can be used when choosing
9879 * the action record format required for the flow.
9881 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_FLAGS_METER UINT32_C(0x4)
9883 /* This bit must be '1' for the l2_filter_id field to be configured. */
9884 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_L2_FILTER_ID \
9886 /* This bit must be '1' for the ethertype field to be configured. */
9887 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_ETHERTYPE \
9889 /* This bit must be '1' for the tunnel_type field to be configured. */
9890 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_TUNNEL_TYPE \
9892 /* This bit must be '1' for the src_macaddr field to be configured. */
9893 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_MACADDR \
9895 /* This bit must be '1' for the ipaddr_type field to be configured. */
9896 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IPADDR_TYPE \
9898 /* This bit must be '1' for the src_ipaddr field to be configured. */
9899 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR \
9902 * This bit must be '1' for the src_ipaddr_mask field to be
9905 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_IPADDR_MASK \
9907 /* This bit must be '1' for the dst_ipaddr field to be configured. */
9908 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR \
9911 * This bit must be '1' for the dst_ipaddr_mask field to be
9914 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_IPADDR_MASK \
9916 /* This bit must be '1' for the ip_protocol field to be configured. */
9917 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_IP_PROTOCOL \
9919 /* This bit must be '1' for the src_port field to be configured. */
9920 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT \
9923 * This bit must be '1' for the src_port_mask field to be
9926 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_SRC_PORT_MASK \
9928 /* This bit must be '1' for the dst_port field to be configured. */
9929 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT \
9932 * This bit must be '1' for the dst_port_mask field to be
9935 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_PORT_MASK \
9937 /* This bit must be '1' for the pri_hint field to be configured. */
9938 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_PRI_HINT \
9941 * This bit must be '1' for the ntuple_filter_id field to be
9944 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_NTUPLE_FILTER_ID \
9946 /* This bit must be '1' for the dst_id field to be configured. */
9947 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_ID \
9950 * This bit must be '1' for the mirror_vnic_id field to be
9953 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
9955 /* This bit must be '1' for the dst_macaddr field to be configured. */
9956 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_ENABLES_DST_MACADDR \
9958 uint64_t l2_filter_id;
9960 * This value identifies a set of CFA data structures used for
9963 uint8_t src_macaddr[6];
9965 * This value indicates the source MAC address in the Ethernet
9969 /* This value indicates the ethertype in the Ethernet header. */
9970 uint8_t ip_addr_type;
9972 * This value indicates the type of IP address. 4 - IPv4 6 -
9973 * IPv6 All others are invalid.
9976 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN \
9979 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 \
9982 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 \
9984 uint8_t ip_protocol;
9986 * The value of protocol filed in IP header. Applies to UDP and
9987 * TCP traffic. 6 - TCP 17 - UDP
9990 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN \
9993 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_TCP \
9996 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_IP_PROTOCOL_UDP \
10000 * If set, this value shall represent the Logical VNIC ID of the
10001 * destination VNIC for the RX path and network port id of the
10002 * destination port for the TX path.
10004 uint16_t mirror_vnic_id;
10005 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10006 uint8_t tunnel_type;
10008 * This value indicates the tunnel type for this filter. If this
10009 * field is not specified, then the filter shall apply to both
10010 * non-tunneled and tunneled packets. If this field conflicts
10011 * with the tunnel_type specified in the l2_filter_id, then the
10012 * HWRM shall return an error for this command.
10015 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10017 /* Virtual eXtensible Local Area Network (VXLAN) */
10018 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_VXLAN \
10021 * Network Virtualization Generic Routing
10022 * Encapsulation (NVGRE)
10024 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_NVGRE \
10027 * Generic Routing Encapsulation (GRE) inside
10030 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_L2GRE \
10033 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPIP \
10035 /* Generic Network Virtualization Encapsulation (Geneve) */
10036 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
10038 /* Multi-Protocol Lable Switching (MPLS) */
10039 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_MPLS \
10041 /* Stateless Transport Tunnel (STT) */
10042 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10044 * Generic Routing Encapsulation (GRE) inside IP
10047 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_IPGRE \
10049 /* Any tunneled traffic */
10050 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10054 * This hint is provided to help in placing the filter in the
10057 /* No preference */
10058 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_NO_PREFER \
10060 /* Above the given filter */
10061 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_ABOVE UINT32_C(0x1)
10062 /* Below the given filter */
10063 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_BELOW UINT32_C(0x2)
10064 /* As high as possible */
10065 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_HIGHEST \
10067 /* As low as possible */
10068 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_INPUT_PRI_HINT_LOWEST UINT32_C(0x4)
10069 uint32_t src_ipaddr[4];
10071 * The value of source IP address to be used in filtering. For
10072 * IPv4, first four bytes represent the IP address.
10074 uint32_t src_ipaddr_mask[4];
10076 * The value of source IP address mask to be used in filtering.
10077 * For IPv4, first four bytes represent the IP address mask.
10079 uint32_t dst_ipaddr[4];
10081 * The value of destination IP address to be used in filtering.
10082 * For IPv4, first four bytes represent the IP address.
10084 uint32_t dst_ipaddr_mask[4];
10086 * The value of destination IP address mask to be used in
10087 * filtering. For IPv4, first four bytes represent the IP
10092 * The value of source port to be used in filtering. Applies to
10093 * UDP and TCP traffic.
10095 uint16_t src_port_mask;
10097 * The value of source port mask to be used in filtering.
10098 * Applies to UDP and TCP traffic.
10102 * The value of destination port to be used in filtering.
10103 * Applies to UDP and TCP traffic.
10105 uint16_t dst_port_mask;
10107 * The value of destination port mask to be used in filtering.
10108 * Applies to UDP and TCP traffic.
10110 uint64_t ntuple_filter_id_hint;
10111 /* This is the ID of the filter that goes along with the pri_hint. */
10112 } __attribute__((packed));
10114 /* Output (24 bytes) */
10115 struct hwrm_cfa_ntuple_filter_alloc_output {
10116 uint16_t error_code;
10118 * Pass/Fail or error type Note: receiver to verify the in
10119 * parameters, and fail the call with an error when appropriate
10122 /* This field returns the type of original request. */
10124 /* This field provides original sequence number of the command. */
10127 * This field is the length of the response in bytes. The last
10128 * byte of the response is a valid flag that will read as '1'
10129 * when the command has been completely written to memory.
10131 uint64_t ntuple_filter_id;
10132 /* This value is an opaque id into CFA data structures. */
10135 * This is the ID of the flow associated with this filter. This
10136 * value shall be used to match and associate the flow
10137 * identifier returned in completion records. A value of
10138 * 0xFFFFFFFF shall indicate no flow id.
10145 * This field is used in Output records to indicate that the
10146 * output is completely written to RAM. This field should be
10147 * read as '1' to indicate that the output has been completely
10148 * written. When writing a command completion or response to an
10149 * internal processor, the order of writes has to be such that
10150 * this field is written last.
10152 } __attribute__((packed));
10154 /* Command specific Error Codes (8 bytes) */
10155 struct hwrm_cfa_ntuple_filter_alloc_cmd_err {
10158 * command specific error codes that goes to the cmd_err field
10159 * in Common HWRM Error Response.
10161 /* Unknown error */
10162 #define HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_UNKNOWN UINT32_C(0x0)
10164 * Unable to complete operation due to conflict
10165 * with Rx Mask VLAN
10168 HWRM_CFA_NTUPLE_FILTER_ALLOC_CMD_ERR_CODE_RX_MASK_VLAN_CONFLICT_ERR \
10170 uint8_t unused_0[7];
10171 } __attribute__((packed));
10173 /* hwrm_cfa_ntuple_filter_free */
10174 /* Description: Free an ntuple filter */
10175 /* Input (24 bytes) */
10176 struct hwrm_cfa_ntuple_filter_free_input {
10179 * This value indicates what type of request this is. The format
10180 * for the rest of the command is determined by this field.
10182 uint16_t cmpl_ring;
10184 * This value indicates the what completion ring the request
10185 * will be optionally completed on. If the value is -1, then no
10186 * CR completion will be generated. Any other value must be a
10187 * valid CR ring_id value for this function.
10190 /* This value indicates the command sequence number. */
10191 uint16_t target_id;
10193 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10194 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10197 uint64_t resp_addr;
10199 * This is the host address where the response will be written
10200 * when the request is complete. This area must be 16B aligned
10201 * and must be cleared to zero before the request is made.
10203 uint64_t ntuple_filter_id;
10204 /* This value is an opaque id into CFA data structures. */
10205 } __attribute__((packed));
10207 /* Output (16 bytes) */
10208 struct hwrm_cfa_ntuple_filter_free_output {
10209 uint16_t error_code;
10211 * Pass/Fail or error type Note: receiver to verify the in
10212 * parameters, and fail the call with an error when appropriate
10215 /* This field returns the type of original request. */
10217 /* This field provides original sequence number of the command. */
10220 * This field is the length of the response in bytes. The last
10221 * byte of the response is a valid flag that will read as '1'
10222 * when the command has been completely written to memory.
10230 * This field is used in Output records to indicate that the
10231 * output is completely written to RAM. This field should be
10232 * read as '1' to indicate that the output has been completely
10233 * written. When writing a command completion or response to an
10234 * internal processor, the order of writes has to be such that
10235 * this field is written last.
10237 } __attribute__((packed));
10239 /* hwrm_cfa_ntuple_filter_cfg */
10241 * Description: Configure an ntuple filter with a new destination VNIC and/or
10244 /* Input (48 bytes) */
10245 struct hwrm_cfa_ntuple_filter_cfg_input {
10248 * This value indicates what type of request this is. The format
10249 * for the rest of the command is determined by this field.
10251 uint16_t cmpl_ring;
10253 * This value indicates the what completion ring the request
10254 * will be optionally completed on. If the value is -1, then no
10255 * CR completion will be generated. Any other value must be a
10256 * valid CR ring_id value for this function.
10259 /* This value indicates the command sequence number. */
10260 uint16_t target_id;
10262 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10263 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10266 uint64_t resp_addr;
10268 * This is the host address where the response will be written
10269 * when the request is complete. This area must be 16B aligned
10270 * and must be cleared to zero before the request is made.
10273 /* This bit must be '1' for the new_dst_id field to be configured. */
10274 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_DST_ID \
10277 * This bit must be '1' for the new_mirror_vnic_id field to be
10280 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10283 * This bit must be '1' for the new_meter_instance_id field to
10286 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10289 uint64_t ntuple_filter_id;
10290 /* This value is an opaque id into CFA data structures. */
10291 uint32_t new_dst_id;
10293 * If set, this value shall represent the new Logical VNIC ID of
10294 * the destination VNIC for the RX path and new network port id
10295 * of the destination port for the TX path.
10297 uint32_t new_mirror_vnic_id;
10298 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10299 uint16_t new_meter_instance_id;
10301 * New meter to attach to the flow. Specifying the invalid
10302 * instance ID is used to remove any existing meter from the
10306 * A value of 0xfff is considered invalid and
10307 * implies the instance is not configured.
10309 #define HWRM_CFA_NTUPLE_FILTER_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10311 uint16_t unused_1[3];
10312 } __attribute__((packed));
10314 /* Output (16 bytes) */
10315 struct hwrm_cfa_ntuple_filter_cfg_output {
10316 uint16_t error_code;
10318 * Pass/Fail or error type Note: receiver to verify the in
10319 * parameters, and fail the call with an error when appropriate
10322 /* This field returns the type of original request. */
10324 /* This field provides original sequence number of the command. */
10327 * This field is the length of the response in bytes. The last
10328 * byte of the response is a valid flag that will read as '1'
10329 * when the command has been completely written to memory.
10337 * This field is used in Output records to indicate that the
10338 * output is completely written to RAM. This field should be
10339 * read as '1' to indicate that the output has been completely
10340 * written. When writing a command completion or response to an
10341 * internal processor, the order of writes has to be such that
10342 * this field is written last.
10344 } __attribute__((packed));
10346 /* hwrm_cfa_em_flow_alloc */
10348 * Description: This is a generic Exact Match (EM) flow that uses fields from
10349 * L4/L3/L2 headers. The EM flows apply to transmit and receive traffic. All
10350 * L2/L3/L4 header fields are specified in network byte order. For each EM flow,
10351 * there is an associated set of actions specified. For tunneled packets, all
10352 * L2/L3/L4 fields specified are fields of inner headers unless otherwise
10353 * specified. # If a field specified in this command is not enabled as a valid
10354 * field, then that field shall not be used in matching packet header fields
10355 * against this EM flow entry.
10357 /* Input (112 bytes) */
10358 struct hwrm_cfa_em_flow_alloc_input {
10361 * This value indicates what type of request this is. The format
10362 * for the rest of the command is determined by this field.
10364 uint16_t cmpl_ring;
10366 * This value indicates the what completion ring the request
10367 * will be optionally completed on. If the value is -1, then no
10368 * CR completion will be generated. Any other value must be a
10369 * valid CR ring_id value for this function.
10372 /* This value indicates the command sequence number. */
10373 uint16_t target_id;
10375 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10376 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10379 uint64_t resp_addr;
10381 * This is the host address where the response will be written
10382 * when the request is complete. This area must be 16B aligned
10383 * and must be cleared to zero before the request is made.
10387 * Enumeration denoting the RX, TX type of the resource. This
10388 * enumeration is used for resources that are similar for both
10389 * TX and RX paths of the chip.
10391 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH UINT32_C(0x1)
10393 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_TX \
10394 (UINT32_C(0x0) << 0)
10396 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX \
10397 (UINT32_C(0x1) << 0)
10398 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_LAST \
10399 CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PATH_RX
10401 * Setting of this flag indicates enabling of a byte counter for
10404 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_BYTE_CTR UINT32_C(0x2)
10406 * Setting of this flag indicates enabling of a packet counter
10407 * for a given flow.
10409 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_PKT_CTR UINT32_C(0x4)
10411 * Setting of this flag indicates de-capsulation action for the
10414 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DECAP UINT32_C(0x8)
10416 * Setting of this flag indicates encapsulation action for the
10419 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_ENCAP UINT32_C(0x10)
10421 * Setting of this flag indicates drop action. If this flag is
10422 * not set, then it should be considered accept action.
10424 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_DROP UINT32_C(0x20)
10426 * Setting of this flag indicates that a meter is expected to be
10427 * attached to this flow. This hint can be used when choosing
10428 * the action record format required for the flow.
10430 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_FLAGS_METER UINT32_C(0x40)
10432 /* This bit must be '1' for the l2_filter_id field to be configured. */
10433 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_L2_FILTER_ID UINT32_C(0x1)
10434 /* This bit must be '1' for the tunnel_type field to be configured. */
10435 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_TYPE UINT32_C(0x2)
10436 /* This bit must be '1' for the tunnel_id field to be configured. */
10437 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_TUNNEL_ID UINT32_C(0x4)
10438 /* This bit must be '1' for the src_macaddr field to be configured. */
10439 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_MACADDR UINT32_C(0x8)
10440 /* This bit must be '1' for the dst_macaddr field to be configured. */
10441 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_MACADDR UINT32_C(0x10)
10442 /* This bit must be '1' for the ovlan_vid field to be configured. */
10443 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_OVLAN_VID UINT32_C(0x20)
10444 /* This bit must be '1' for the ivlan_vid field to be configured. */
10445 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IVLAN_VID UINT32_C(0x40)
10446 /* This bit must be '1' for the ethertype field to be configured. */
10447 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ETHERTYPE UINT32_C(0x80)
10448 /* This bit must be '1' for the src_ipaddr field to be configured. */
10449 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_IPADDR UINT32_C(0x100)
10450 /* This bit must be '1' for the dst_ipaddr field to be configured. */
10451 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_IPADDR UINT32_C(0x200)
10452 /* This bit must be '1' for the ipaddr_type field to be configured. */
10453 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IPADDR_TYPE UINT32_C(0x400)
10454 /* This bit must be '1' for the ip_protocol field to be configured. */
10455 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_IP_PROTOCOL UINT32_C(0x800)
10456 /* This bit must be '1' for the src_port field to be configured. */
10457 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_SRC_PORT UINT32_C(0x1000)
10458 /* This bit must be '1' for the dst_port field to be configured. */
10459 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_PORT UINT32_C(0x2000)
10460 /* This bit must be '1' for the dst_id field to be configured. */
10461 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_DST_ID UINT32_C(0x4000)
10463 * This bit must be '1' for the mirror_vnic_id field to be
10466 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_MIRROR_VNIC_ID \
10469 * This bit must be '1' for the encap_record_id field to be
10472 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_ENCAP_RECORD_ID \
10475 * This bit must be '1' for the meter_instance_id field to be
10478 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_ENABLES_METER_INSTANCE_ID \
10480 uint64_t l2_filter_id;
10482 * This value identifies a set of CFA data structures used for
10485 uint8_t tunnel_type;
10488 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NONTUNNEL \
10490 /* Virtual eXtensible Local Area Network (VXLAN) */
10491 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10493 * Network Virtualization Generic Routing
10494 * Encapsulation (NVGRE)
10496 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_NVGRE UINT32_C(0x2)
10498 * Generic Routing Encapsulation (GRE) inside
10501 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_L2GRE UINT32_C(0x3)
10503 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPIP UINT32_C(0x4)
10504 /* Generic Network Virtualization Encapsulation (Geneve) */
10505 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
10506 /* Multi-Protocol Lable Switching (MPLS) */
10507 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_MPLS UINT32_C(0x6)
10508 /* Stateless Transport Tunnel (STT) */
10509 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_STT UINT32_C(0x7)
10511 * Generic Routing Encapsulation (GRE) inside IP
10514 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_IPGRE UINT32_C(0x8)
10516 * IPV4 over virtual eXtensible Local Area
10517 * Network (IPV4oVXLAN)
10519 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 UINT32_C(0x9)
10520 /* Any tunneled traffic */
10521 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_TUNNEL_TYPE_ANYTUNNEL \
10525 uint32_t tunnel_id;
10527 * Tunnel identifier. Virtual Network Identifier (VNI). Only
10528 * valid with tunnel_types VXLAN, NVGRE, and Geneve. Only lower
10529 * 24-bits of VNI field are used in setting up the filter.
10531 uint8_t src_macaddr[6];
10533 * This value indicates the source MAC address in the Ethernet
10536 uint16_t meter_instance_id;
10537 /* The meter instance to attach to the flow. */
10539 * A value of 0xfff is considered invalid and
10540 * implies the instance is not configured.
10542 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_METER_INSTANCE_ID_INVALID \
10544 uint8_t dst_macaddr[6];
10546 * This value indicates the destination MAC address in the
10549 uint16_t ovlan_vid;
10551 * This value indicates the VLAN ID of the outer VLAN tag in the
10554 uint16_t ivlan_vid;
10556 * This value indicates the VLAN ID of the inner VLAN tag in the
10559 uint16_t ethertype;
10560 /* This value indicates the ethertype in the Ethernet header. */
10561 uint8_t ip_addr_type;
10563 * This value indicates the type of IP address. 4 - IPv4 6 -
10564 * IPv6 All others are invalid.
10567 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_UNKNOWN UINT32_C(0x0)
10569 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV4 UINT32_C(0x4)
10571 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_ADDR_TYPE_IPV6 UINT32_C(0x6)
10572 uint8_t ip_protocol;
10574 * The value of protocol filed in IP header. Applies to UDP and
10575 * TCP traffic. 6 - TCP 17 - UDP
10578 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UNKNOWN UINT32_C(0x0)
10580 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_TCP UINT32_C(0x6)
10582 #define HWRM_CFA_EM_FLOW_ALLOC_INPUT_IP_PROTOCOL_UDP UINT32_C(0x11)
10585 uint32_t src_ipaddr[4];
10587 * The value of source IP address to be used in filtering. For
10588 * IPv4, first four bytes represent the IP address.
10590 uint32_t dst_ipaddr[4];
10592 * big_endian = True The value of destination IP address to be
10593 * used in filtering. For IPv4, first four bytes represent the
10598 * The value of source port to be used in filtering. Applies to
10599 * UDP and TCP traffic.
10603 * The value of destination port to be used in filtering.
10604 * Applies to UDP and TCP traffic.
10608 * If set, this value shall represent the Logical VNIC ID of the
10609 * destination VNIC for the RX path and network port id of the
10610 * destination port for the TX path.
10612 uint16_t mirror_vnic_id;
10613 /* Logical VNIC ID of the VNIC where traffic is mirrored. */
10614 uint32_t encap_record_id;
10615 /* Logical ID of the encapsulation record. */
10617 } __attribute__((packed));
10619 /* Output (24 bytes) */
10620 struct hwrm_cfa_em_flow_alloc_output {
10621 uint16_t error_code;
10623 * Pass/Fail or error type Note: receiver to verify the in
10624 * parameters, and fail the call with an error when appropriate
10627 /* This field returns the type of original request. */
10629 /* This field provides original sequence number of the command. */
10632 * This field is the length of the response in bytes. The last
10633 * byte of the response is a valid flag that will read as '1'
10634 * when the command has been completely written to memory.
10636 uint64_t em_filter_id;
10637 /* This value is an opaque id into CFA data structures. */
10640 * This is the ID of the flow associated with this filter. This
10641 * value shall be used to match and associate the flow
10642 * identifier returned in completion records. A value of
10643 * 0xFFFFFFFF shall indicate no flow id.
10650 * This field is used in Output records to indicate that the
10651 * output is completely written to RAM. This field should be
10652 * read as '1' to indicate that the output has been completely
10653 * written. When writing a command completion or response to an
10654 * internal processor, the order of writes has to be such that
10655 * this field is written last.
10657 } __attribute__((packed));
10659 /* hwrm_cfa_em_flow_free */
10660 /* Description: Free an EM flow table entry */
10661 /* Input (24 bytes) */
10662 struct hwrm_cfa_em_flow_free_input {
10665 * This value indicates what type of request this is. The format
10666 * for the rest of the command is determined by this field.
10668 uint16_t cmpl_ring;
10670 * This value indicates the what completion ring the request
10671 * will be optionally completed on. If the value is -1, then no
10672 * CR completion will be generated. Any other value must be a
10673 * valid CR ring_id value for this function.
10676 /* This value indicates the command sequence number. */
10677 uint16_t target_id;
10679 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10680 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10683 uint64_t resp_addr;
10685 * This is the host address where the response will be written
10686 * when the request is complete. This area must be 16B aligned
10687 * and must be cleared to zero before the request is made.
10689 uint64_t em_filter_id;
10690 /* This value is an opaque id into CFA data structures. */
10691 } __attribute__((packed));
10693 /* Output (16 bytes) */
10694 struct hwrm_cfa_em_flow_free_output {
10695 uint16_t error_code;
10697 * Pass/Fail or error type Note: receiver to verify the in
10698 * parameters, and fail the call with an error when appropriate
10701 /* This field returns the type of original request. */
10703 /* This field provides original sequence number of the command. */
10706 * This field is the length of the response in bytes. The last
10707 * byte of the response is a valid flag that will read as '1'
10708 * when the command has been completely written to memory.
10716 * This field is used in Output records to indicate that the
10717 * output is completely written to RAM. This field should be
10718 * read as '1' to indicate that the output has been completely
10719 * written. When writing a command completion or response to an
10720 * internal processor, the order of writes has to be such that
10721 * this field is written last.
10723 } __attribute__((packed));
10725 /* hwrm_cfa_em_flow_cfg */
10727 * Description: Configure an EM flow with a new destination VNIC and/or meter.
10729 /* Input (48 bytes) */
10730 struct hwrm_cfa_em_flow_cfg_input {
10733 * This value indicates what type of request this is. The format
10734 * for the rest of the command is determined by this field.
10736 uint16_t cmpl_ring;
10738 * This value indicates the what completion ring the request
10739 * will be optionally completed on. If the value is -1, then no
10740 * CR completion will be generated. Any other value must be a
10741 * valid CR ring_id value for this function.
10744 /* This value indicates the command sequence number. */
10745 uint16_t target_id;
10747 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10748 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10751 uint64_t resp_addr;
10753 * This is the host address where the response will be written
10754 * when the request is complete. This area must be 16B aligned
10755 * and must be cleared to zero before the request is made.
10758 /* This bit must be '1' for the new_dst_id field to be configured. */
10759 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_DST_ID UINT32_C(0x1)
10761 * This bit must be '1' for the new_mirror_vnic_id field to be
10764 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_MIRROR_VNIC_ID \
10767 * This bit must be '1' for the new_meter_instance_id field to
10770 #define HWRM_CFA_EM_FLOW_CFG_INPUT_ENABLES_NEW_METER_INSTANCE_ID \
10773 uint64_t em_filter_id;
10774 /* This value is an opaque id into CFA data structures. */
10775 uint32_t new_dst_id;
10777 * If set, this value shall represent the new Logical VNIC ID of
10778 * the destination VNIC for the RX path and network port id of
10779 * the destination port for the TX path.
10781 uint32_t new_mirror_vnic_id;
10782 /* New Logical VNIC ID of the VNIC where traffic is mirrored. */
10783 uint16_t new_meter_instance_id;
10785 * New meter to attach to the flow. Specifying the invalid
10786 * instance ID is used to remove any existing meter from the
10790 * A value of 0xfff is considered invalid and
10791 * implies the instance is not configured.
10793 #define HWRM_CFA_EM_FLOW_CFG_INPUT_NEW_METER_INSTANCE_ID_INVALID \
10795 uint16_t unused_1[3];
10796 } __attribute__((packed));
10798 /* Output (16 bytes) */
10799 struct hwrm_cfa_em_flow_cfg_output {
10800 uint16_t error_code;
10802 * Pass/Fail or error type Note: receiver to verify the in
10803 * parameters, and fail the call with an error when appropriate
10806 /* This field returns the type of original request. */
10808 /* This field provides original sequence number of the command. */
10811 * This field is the length of the response in bytes. The last
10812 * byte of the response is a valid flag that will read as '1'
10813 * when the command has been completely written to memory.
10821 * This field is used in Output records to indicate that the
10822 * output is completely written to RAM. This field should be
10823 * read as '1' to indicate that the output has been completely
10824 * written. When writing a command completion or response to an
10825 * internal processor, the order of writes has to be such that
10826 * this field is written last.
10828 } __attribute__((packed));
10830 /* hwrm_tunnel_dst_port_query */
10832 * Description: This function is called by a driver to query tunnel type
10833 * specific destination port configuration.
10835 /* Input (24 bytes) */
10836 struct hwrm_tunnel_dst_port_query_input {
10839 * This value indicates what type of request this is. The format
10840 * for the rest of the command is determined by this field.
10842 uint16_t cmpl_ring;
10844 * This value indicates the what completion ring the request
10845 * will be optionally completed on. If the value is -1, then no
10846 * CR completion will be generated. Any other value must be a
10847 * valid CR ring_id value for this function.
10850 /* This value indicates the command sequence number. */
10851 uint16_t target_id;
10853 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10854 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10857 uint64_t resp_addr;
10859 * This is the host address where the response will be written
10860 * when the request is complete. This area must be 16B aligned
10861 * and must be cleared to zero before the request is made.
10863 uint8_t tunnel_type;
10865 /* Virtual eXtensible Local Area Network (VXLAN) */
10866 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN \
10868 /* Generic Network Virtualization Encapsulation (Geneve) */
10869 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_GENEVE \
10872 * IPV4 over virtual eXtensible Local Area
10873 * Network (IPV4oVXLAN)
10875 #define HWRM_TUNNEL_DST_PORT_QUERY_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10877 uint8_t unused_0[7];
10878 } __attribute__((packed));
10880 /* Output (16 bytes) */
10881 struct hwrm_tunnel_dst_port_query_output {
10882 uint16_t error_code;
10884 * Pass/Fail or error type Note: receiver to verify the in
10885 * parameters, and fail the call with an error when appropriate
10888 /* This field returns the type of original request. */
10890 /* This field provides original sequence number of the command. */
10893 * This field is the length of the response in bytes. The last
10894 * byte of the response is a valid flag that will read as '1'
10895 * when the command has been completely written to memory.
10897 uint16_t tunnel_dst_port_id;
10899 * This field represents the identifier of L4 destination port
10900 * used for the given tunnel type. This field is valid for
10901 * specific tunnel types that use layer 4 (e.g. UDP) transports
10904 uint16_t tunnel_dst_port_val;
10906 * This field represents the value of L4 destination port
10907 * identified by tunnel_dst_port_id. This field is valid for
10908 * specific tunnel types that use layer 4 (e.g. UDP) transports
10909 * for tunneling. This field is in network byte order. A value
10910 * of 0 means that the destination port is not configured.
10917 * This field is used in Output records to indicate that the
10918 * output is completely written to RAM. This field should be
10919 * read as '1' to indicate that the output has been completely
10920 * written. When writing a command completion or response to an
10921 * internal processor, the order of writes has to be such that
10922 * this field is written last.
10924 } __attribute__((packed));
10926 /* hwrm_tunnel_dst_port_alloc */
10928 * Description: This function is called by a driver to allocate l4 destination
10929 * port for a specific tunnel type. The destination port value is provided in
10930 * the input. If the HWRM supports only one global destination port for a tunnel
10931 * type, then the HWRM shall keep track of its usage as described below. # The
10932 * first caller that allocates a destination port shall always succeed and the
10933 * HWRM shall save the destination port configuration for that tunnel type and
10934 * increment the usage count to 1. # Subsequent callers allocating the same
10935 * destination port for that tunnel type shall succeed and the HWRM shall
10936 * increment the usage count for that port for each subsequent caller that
10937 * succeeds. # Any subsequent caller trying to allocate a different destination
10938 * port for that tunnel type shall fail until the usage count for the original
10939 * destination port goes to zero. # A caller that frees a port will cause the
10940 * usage count for that port to decrement.
10942 /* Input (24 bytes) */
10943 struct hwrm_tunnel_dst_port_alloc_input {
10946 * This value indicates what type of request this is. The format
10947 * for the rest of the command is determined by this field.
10949 uint16_t cmpl_ring;
10951 * This value indicates the what completion ring the request
10952 * will be optionally completed on. If the value is -1, then no
10953 * CR completion will be generated. Any other value must be a
10954 * valid CR ring_id value for this function.
10957 /* This value indicates the command sequence number. */
10958 uint16_t target_id;
10960 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
10961 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
10964 uint64_t resp_addr;
10966 * This is the host address where the response will be written
10967 * when the request is complete. This area must be 16B aligned
10968 * and must be cleared to zero before the request is made.
10970 uint8_t tunnel_type;
10972 /* Virtual eXtensible Local Area Network (VXLAN) */
10973 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
10974 /* Generic Network Virtualization Encapsulation (Geneve) */
10975 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE \
10978 * IPV4 over virtual eXtensible Local Area
10979 * Network (IPV4oVXLAN)
10981 #define HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN_V4 \
10984 uint16_t tunnel_dst_port_val;
10986 * This field represents the value of L4 destination port used
10987 * for the given tunnel type. This field is valid for specific
10988 * tunnel types that use layer 4 (e.g. UDP) transports for
10989 * tunneling. This field is in network byte order. A value of 0
10990 * shall fail the command.
10993 } __attribute__((packed));
10995 /* Output (16 bytes) */
10996 struct hwrm_tunnel_dst_port_alloc_output {
10997 uint16_t error_code;
10999 * Pass/Fail or error type Note: receiver to verify the in
11000 * parameters, and fail the call with an error when appropriate
11003 /* This field returns the type of original request. */
11005 /* This field provides original sequence number of the command. */
11008 * This field is the length of the response in bytes. The last
11009 * byte of the response is a valid flag that will read as '1'
11010 * when the command has been completely written to memory.
11012 uint16_t tunnel_dst_port_id;
11014 * Identifier of a tunnel L4 destination port value. Only
11015 * applies to tunnel types that has l4 destination port
11025 * This field is used in Output records to indicate that the
11026 * output is completely written to RAM. This field should be
11027 * read as '1' to indicate that the output has been completely
11028 * written. When writing a command completion or response to an
11029 * internal processor, the order of writes has to be such that
11030 * this field is written last.
11032 } __attribute__((packed));
11034 /* hwrm_tunnel_dst_port_free */
11036 * Description: This function is called by a driver to free l4 destination port
11037 * for a specific tunnel type.
11039 /* Input (24 bytes) */
11040 struct hwrm_tunnel_dst_port_free_input {
11043 * This value indicates what type of request this is. The format
11044 * for the rest of the command is determined by this field.
11046 uint16_t cmpl_ring;
11048 * This value indicates the what completion ring the request
11049 * will be optionally completed on. If the value is -1, then no
11050 * CR completion will be generated. Any other value must be a
11051 * valid CR ring_id value for this function.
11054 /* This value indicates the command sequence number. */
11055 uint16_t target_id;
11057 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11058 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11061 uint64_t resp_addr;
11063 * This is the host address where the response will be written
11064 * when the request is complete. This area must be 16B aligned
11065 * and must be cleared to zero before the request is made.
11067 uint8_t tunnel_type;
11069 /* Virtual eXtensible Local Area Network (VXLAN) */
11070 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN UINT32_C(0x1)
11071 /* Generic Network Virtualization Encapsulation (Geneve) */
11072 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE UINT32_C(0x5)
11074 * IPV4 over virtual eXtensible Local Area
11075 * Network (IPV4oVXLAN)
11077 #define HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN_V4 \
11080 uint16_t tunnel_dst_port_id;
11082 * Identifier of a tunnel L4 destination port value. Only
11083 * applies to tunnel types that has l4 destination port
11087 } __attribute__((packed));
11089 /* Output (16 bytes) */
11090 struct hwrm_tunnel_dst_port_free_output {
11091 uint16_t error_code;
11093 * Pass/Fail or error type Note: receiver to verify the in
11094 * parameters, and fail the call with an error when appropriate
11097 /* This field returns the type of original request. */
11099 /* This field provides original sequence number of the command. */
11102 * This field is the length of the response in bytes. The last
11103 * byte of the response is a valid flag that will read as '1'
11104 * when the command has been completely written to memory.
11112 * This field is used in Output records to indicate that the
11113 * output is completely written to RAM. This field should be
11114 * read as '1' to indicate that the output has been completely
11115 * written. When writing a command completion or response to an
11116 * internal processor, the order of writes has to be such that
11117 * this field is written last.
11119 } __attribute__((packed));
11121 /* hwrm_stat_ctx_alloc */
11123 * Description: This command allocates and does basic preparation for a stat
11126 /* Input (32 bytes) */
11127 struct hwrm_stat_ctx_alloc_input {
11130 * This value indicates what type of request this is. The format
11131 * for the rest of the command is determined by this field.
11133 uint16_t cmpl_ring;
11135 * This value indicates the what completion ring the request
11136 * will be optionally completed on. If the value is -1, then no
11137 * CR completion will be generated. Any other value must be a
11138 * valid CR ring_id value for this function.
11141 /* This value indicates the command sequence number. */
11142 uint16_t target_id;
11144 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11145 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11148 uint64_t resp_addr;
11150 * This is the host address where the response will be written
11151 * when the request is complete. This area must be 16B aligned
11152 * and must be cleared to zero before the request is made.
11154 uint64_t stats_dma_addr;
11155 /* This is the address for statistic block. */
11156 uint32_t update_period_ms;
11158 * The statistic block update period in ms. e.g. 250ms, 500ms,
11159 * 750ms, 1000ms. If update_period_ms is 0, then the stats
11160 * update shall be never done and the DMA address shall not be
11161 * used. In this case, the stat block can only be read by
11162 * hwrm_stat_ctx_query command.
11164 uint8_t stat_ctx_flags;
11166 * This field is used to specify statistics context specific
11167 * configuration flags.
11170 * When this bit is set to '1', the statistics context shall be
11171 * allocated for RoCE traffic only. In this case, traffic other
11172 * than offloaded RoCE traffic shall not be included in this
11173 * statistic context. When this bit is set to '0', the
11174 * statistics context shall be used for the network traffic
11175 * other than offloaded RoCE traffic.
11177 #define HWRM_STAT_CTX_ALLOC_INPUT_STAT_CTX_FLAGS_ROCE UINT32_C(0x1)
11178 uint8_t unused_0[3];
11179 } __attribute__((packed));
11181 /* Output (16 bytes) */
11182 struct hwrm_stat_ctx_alloc_output {
11183 uint16_t error_code;
11185 * Pass/Fail or error type Note: receiver to verify the in
11186 * parameters, and fail the call with an error when appropriate
11189 /* This field returns the type of original request. */
11191 /* This field provides original sequence number of the command. */
11194 * This field is the length of the response in bytes. The last
11195 * byte of the response is a valid flag that will read as '1'
11196 * when the command has been completely written to memory.
11198 uint32_t stat_ctx_id;
11199 /* This is the statistics context ID value. */
11205 * This field is used in Output records to indicate that the
11206 * output is completely written to RAM. This field should be
11207 * read as '1' to indicate that the output has been completely
11208 * written. When writing a command completion or response to an
11209 * internal processor, the order of writes has to be such that
11210 * this field is written last.
11212 } __attribute__((packed));
11214 /* hwrm_stat_ctx_free */
11215 /* Description: This command is used to free a stat context. */
11216 /* Input (24 bytes) */
11217 struct hwrm_stat_ctx_free_input {
11220 * This value indicates what type of request this is. The format
11221 * for the rest of the command is determined by this field.
11223 uint16_t cmpl_ring;
11225 * This value indicates the what completion ring the request
11226 * will be optionally completed on. If the value is -1, then no
11227 * CR completion will be generated. Any other value must be a
11228 * valid CR ring_id value for this function.
11231 /* This value indicates the command sequence number. */
11232 uint16_t target_id;
11234 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11235 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11238 uint64_t resp_addr;
11240 * This is the host address where the response will be written
11241 * when the request is complete. This area must be 16B aligned
11242 * and must be cleared to zero before the request is made.
11244 uint32_t stat_ctx_id;
11245 /* ID of the statistics context that is being queried. */
11247 } __attribute__((packed));
11249 /* Output (16 bytes) */
11250 struct hwrm_stat_ctx_free_output {
11251 uint16_t error_code;
11253 * Pass/Fail or error type Note: receiver to verify the in
11254 * parameters, and fail the call with an error when appropriate
11257 /* This field returns the type of original request. */
11259 /* This field provides original sequence number of the command. */
11262 * This field is the length of the response in bytes. The last
11263 * byte of the response is a valid flag that will read as '1'
11264 * when the command has been completely written to memory.
11266 uint32_t stat_ctx_id;
11267 /* This is the statistics context ID value. */
11273 * This field is used in Output records to indicate that the
11274 * output is completely written to RAM. This field should be
11275 * read as '1' to indicate that the output has been completely
11276 * written. When writing a command completion or response to an
11277 * internal processor, the order of writes has to be such that
11278 * this field is written last.
11280 } __attribute__((packed));
11282 /* hwrm_stat_ctx_query */
11283 /* Description: This command returns statistics of a context. */
11284 /* Input (24 bytes) */
11285 struct hwrm_stat_ctx_query_input {
11288 * This value indicates what type of request this is. The format for the
11289 * rest of the command is determined by this field.
11291 uint16_t cmpl_ring;
11293 * This value indicates the what completion ring the request will be
11294 * optionally completed on. If the value is -1, then no CR completion
11295 * will be generated. Any other value must be a valid CR ring_id value
11296 * for this function.
11299 /* This value indicates the command sequence number. */
11300 uint16_t target_id;
11302 * Target ID of this command. 0x0 - 0xFFF8 - Used for function ids
11303 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF - HWRM
11305 uint64_t resp_addr;
11307 * This is the host address where the response will be written when the
11308 * request is complete. This area must be 16B aligned and must be
11309 * cleared to zero before the request is made.
11311 uint32_t stat_ctx_id;
11312 /* ID of the statistics context that is being queried. */
11314 } __attribute__((packed));
11316 /* Output (176 bytes) */
11317 struct hwrm_stat_ctx_query_output {
11318 uint16_t error_code;
11320 * Pass/Fail or error type Note: receiver to verify the in parameters,
11321 * and fail the call with an error when appropriate
11324 /* This field returns the type of original request. */
11326 /* This field provides original sequence number of the command. */
11329 * This field is the length of the response in bytes. The last byte of
11330 * the response is a valid flag that will read as '1' when the command
11331 * has been completely written to memory.
11333 uint64_t tx_ucast_pkts;
11334 /* Number of transmitted unicast packets */
11335 uint64_t tx_mcast_pkts;
11336 /* Number of transmitted multicast packets */
11337 uint64_t tx_bcast_pkts;
11338 /* Number of transmitted broadcast packets */
11339 uint64_t tx_err_pkts;
11340 /* Number of transmitted packets with error */
11341 uint64_t tx_drop_pkts;
11342 /* Number of dropped packets on transmit path */
11343 uint64_t tx_ucast_bytes;
11344 /* Number of transmitted bytes for unicast traffic */
11345 uint64_t tx_mcast_bytes;
11346 /* Number of transmitted bytes for multicast traffic */
11347 uint64_t tx_bcast_bytes;
11348 /* Number of transmitted bytes for broadcast traffic */
11349 uint64_t rx_ucast_pkts;
11350 /* Number of received unicast packets */
11351 uint64_t rx_mcast_pkts;
11352 /* Number of received multicast packets */
11353 uint64_t rx_bcast_pkts;
11354 /* Number of received broadcast packets */
11355 uint64_t rx_err_pkts;
11356 /* Number of received packets with error */
11357 uint64_t rx_drop_pkts;
11358 /* Number of dropped packets on received path */
11359 uint64_t rx_ucast_bytes;
11360 /* Number of received bytes for unicast traffic */
11361 uint64_t rx_mcast_bytes;
11362 /* Number of received bytes for multicast traffic */
11363 uint64_t rx_bcast_bytes;
11364 /* Number of received bytes for broadcast traffic */
11365 uint64_t rx_agg_pkts;
11366 /* Number of aggregated unicast packets */
11367 uint64_t rx_agg_bytes;
11368 /* Number of aggregated unicast bytes */
11369 uint64_t rx_agg_events;
11370 /* Number of aggregation events */
11371 uint64_t rx_agg_aborts;
11372 /* Number of aborted aggregations */
11379 * This field is used in Output records to indicate that the output is
11380 * completely written to RAM. This field should be read as '1' to
11381 * indicate that the output has been completely written. When writing a
11382 * command completion or response to an internal processor, the order of
11383 * writes has to be such that this field is written last.
11385 } __attribute__((packed));
11387 /* hwrm_stat_ctx_clr_stats */
11388 /* Description: This command clears statistics of a context. */
11389 /* Input (24 bytes) */
11390 struct hwrm_stat_ctx_clr_stats_input {
11393 * This value indicates what type of request this is. The format
11394 * for the rest of the command is determined by this field.
11396 uint16_t cmpl_ring;
11398 * This value indicates the what completion ring the request
11399 * will be optionally completed on. If the value is -1, then no
11400 * CR completion will be generated. Any other value must be a
11401 * valid CR ring_id value for this function.
11404 /* This value indicates the command sequence number. */
11405 uint16_t target_id;
11407 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11408 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11411 uint64_t resp_addr;
11413 * This is the host address where the response will be written
11414 * when the request is complete. This area must be 16B aligned
11415 * and must be cleared to zero before the request is made.
11417 uint32_t stat_ctx_id;
11418 /* ID of the statistics context that is being queried. */
11420 } __attribute__((packed));
11422 /* Output (16 bytes) */
11423 struct hwrm_stat_ctx_clr_stats_output {
11424 uint16_t error_code;
11426 * Pass/Fail or error type Note: receiver to verify the in
11427 * parameters, and fail the call with an error when appropriate
11430 /* This field returns the type of original request. */
11432 /* This field provides original sequence number of the command. */
11435 * This field is the length of the response in bytes. The last
11436 * byte of the response is a valid flag that will read as '1'
11437 * when the command has been completely written to memory.
11445 * This field is used in Output records to indicate that the
11446 * output is completely written to RAM. This field should be
11447 * read as '1' to indicate that the output has been completely
11448 * written. When writing a command completion or response to an
11449 * internal processor, the order of writes has to be such that
11450 * this field is written last.
11452 } __attribute__((packed));
11454 /* hwrm_exec_fwd_resp */
11456 * Description: This command is used to send an encapsulated request to the
11457 * HWRM. This command instructs the HWRM to execute the request and forward the
11458 * response of the encapsulated request to the location specified in the
11459 * original request that is encapsulated. The target id of this command shall be
11460 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11461 * acknowledge the receipt of the encapsulated request and forwarding of the
11464 /* Input (128 bytes) */
11465 struct hwrm_exec_fwd_resp_input {
11468 * This value indicates what type of request this is. The format
11469 * for the rest of the command is determined by this field.
11471 uint16_t cmpl_ring;
11473 * This value indicates the what completion ring the request
11474 * will be optionally completed on. If the value is -1, then no
11475 * CR completion will be generated. Any other value must be a
11476 * valid CR ring_id value for this function.
11479 /* This value indicates the command sequence number. */
11480 uint16_t target_id;
11482 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11483 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11486 uint64_t resp_addr;
11488 * This is the host address where the response will be written
11489 * when the request is complete. This area must be 16B aligned
11490 * and must be cleared to zero before the request is made.
11492 uint32_t encap_request[26];
11494 * This is an encapsulated request. This request should be
11495 * executed by the HWRM and the response should be provided in
11496 * the response buffer inside the encapsulated request.
11498 uint16_t encap_resp_target_id;
11500 * This value indicates the target id of the response to the
11501 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11502 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11505 uint16_t unused_0[3];
11506 } __attribute__((packed));
11508 /* Output (16 bytes) */
11509 struct hwrm_exec_fwd_resp_output {
11510 uint16_t error_code;
11512 * Pass/Fail or error type Note: receiver to verify the in
11513 * parameters, and fail the call with an error when appropriate
11516 /* This field returns the type of original request. */
11518 /* This field provides original sequence number of the command. */
11521 * This field is the length of the response in bytes. The last
11522 * byte of the response is a valid flag that will read as '1'
11523 * when the command has been completely written to memory.
11531 * This field is used in Output records to indicate that the
11532 * output is completely written to RAM. This field should be
11533 * read as '1' to indicate that the output has been completely
11534 * written. When writing a command completion or response to an
11535 * internal processor, the order of writes has to be such that
11536 * this field is written last.
11538 } __attribute__((packed));
11540 /* hwrm_reject_fwd_resp */
11542 * Description: This command is used to send an encapsulated request to the
11543 * HWRM. This command instructs the HWRM to reject the request and forward the
11544 * error response of the encapsulated request to the location specified in the
11545 * original request that is encapsulated. The target id of this command shall be
11546 * set to 0xFFFF (HWRM). The response location in this command shall be used to
11547 * acknowledge the receipt of the encapsulated request and forwarding of the
11550 /* Input (128 bytes) */
11551 struct hwrm_reject_fwd_resp_input {
11554 * This value indicates what type of request this is. The format
11555 * for the rest of the command is determined by this field.
11557 uint16_t cmpl_ring;
11559 * This value indicates the what completion ring the request
11560 * will be optionally completed on. If the value is -1, then no
11561 * CR completion will be generated. Any other value must be a
11562 * valid CR ring_id value for this function.
11565 /* This value indicates the command sequence number. */
11566 uint16_t target_id;
11568 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11569 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11572 uint64_t resp_addr;
11574 * This is the host address where the response will be written
11575 * when the request is complete. This area must be 16B aligned
11576 * and must be cleared to zero before the request is made.
11578 uint32_t encap_request[26];
11580 * This is an encapsulated request. This request should be
11581 * rejected by the HWRM and the error response should be
11582 * provided in the response buffer inside the encapsulated
11585 uint16_t encap_resp_target_id;
11587 * This value indicates the target id of the response to the
11588 * encapsulated request. 0x0 - 0xFFF8 - Used for function ids
11589 * 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF -
11592 uint16_t unused_0[3];
11593 } __attribute__((packed));
11595 /* Output (16 bytes) */
11596 struct hwrm_reject_fwd_resp_output {
11597 uint16_t error_code;
11599 * Pass/Fail or error type Note: receiver to verify the in
11600 * parameters, and fail the call with an error when appropriate
11603 /* This field returns the type of original request. */
11605 /* This field provides original sequence number of the command. */
11608 * This field is the length of the response in bytes. The last
11609 * byte of the response is a valid flag that will read as '1'
11610 * when the command has been completely written to memory.
11618 * This field is used in Output records to indicate that the
11619 * output is completely written to RAM. This field should be
11620 * read as '1' to indicate that the output has been completely
11621 * written. When writing a command completion or response to an
11622 * internal processor, the order of writes has to be such that
11623 * this field is written last.
11625 } __attribute__((packed));
11627 /* hwrm_nvm_get_dir_entries */
11628 /* Input (24 bytes) */
11629 struct hwrm_nvm_get_dir_entries_input {
11631 uint16_t cmpl_ring;
11633 uint16_t target_id;
11634 uint64_t resp_addr;
11635 uint64_t host_dest_addr;
11636 } __attribute__((packed));
11638 /* Output (16 bytes) */
11639 struct hwrm_nvm_get_dir_entries_output {
11640 uint16_t error_code;
11649 } __attribute__((packed));
11652 /* hwrm_nvm_erase_dir_entry */
11653 /* Input (24 bytes) */
11654 struct hwrm_nvm_erase_dir_entry_input {
11656 uint16_t cmpl_ring;
11658 uint16_t target_id;
11659 uint64_t resp_addr;
11661 uint16_t unused_0[3];
11664 /* Output (16 bytes) */
11665 struct hwrm_nvm_erase_dir_entry_output {
11666 uint16_t error_code;
11677 /* hwrm_nvm_get_dir_info */
11678 /* Input (16 bytes) */
11679 struct hwrm_nvm_get_dir_info_input {
11681 uint16_t cmpl_ring;
11683 uint16_t target_id;
11684 uint64_t resp_addr;
11685 } __attribute__((packed));
11687 /* Output (24 bytes) */
11688 struct hwrm_nvm_get_dir_info_output {
11689 uint16_t error_code;
11691 * Pass/Fail or error type Note: receiver to verify the in
11692 * parameters, and fail the call with an error when appropriate
11695 /* This field returns the type of original request. */
11697 /* This field provides original sequence number of the command. */
11700 * This field is the length of the response in bytes. The last
11701 * byte of the response is a valid flag that will read as '1'
11702 * when the command has been completely written to memory.
11705 /* Number of directory entries in the directory. */
11706 uint32_t entry_length;
11707 /* Size of each directory entry, in bytes. */
11714 * This field is used in Output records to indicate that the
11715 * output is completely written to RAM. This field should be
11716 * read as '1' to indicate that the output has been completely
11717 * written. When writing a command completion or response to an
11718 * internal processor, the order of writes has to be such that
11719 * this field is written last.
11721 } __attribute__((packed));
11723 /* hwrm_nvm_write */
11725 * Note: Write to the allocated NVRAM of an item referenced by an existing
11728 /* Input (48 bytes) */
11729 struct hwrm_nvm_write_input {
11732 * This value indicates what type of request this is. The format
11733 * for the rest of the command is determined by this field.
11735 uint16_t cmpl_ring;
11737 * This value indicates the what completion ring the request
11738 * will be optionally completed on. If the value is -1, then no
11739 * CR completion will be generated. Any other value must be a
11740 * valid CR ring_id value for this function.
11743 /* This value indicates the command sequence number. */
11744 uint16_t target_id;
11746 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11747 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11750 uint64_t resp_addr;
11752 * This is the host address where the response will be written
11753 * when the request is complete. This area must be 16B aligned
11754 * and must be cleared to zero before the request is made.
11756 uint64_t host_src_addr;
11757 /* 64-bit Host Source Address. This is where the source data is. */
11760 * The Directory Entry Type (valid values are defined in the
11761 * bnxnvm_directory_type enum defined in the file
11764 uint16_t dir_ordinal;
11766 * Directory ordinal. The 0-based instance of the combined
11767 * Directory Entry Type and Extension.
11771 * The Directory Entry Extension flags (see BNX_DIR_EXT_* in the
11772 * file bnxnvm_defs.h).
11776 * Directory Entry Attribute flags (see BNX_DIR_ATTR_* in the
11777 * file bnxnvm_defs.h).
11779 uint32_t dir_data_length;
11781 * Length of data to write, in bytes. May be less than or equal
11782 * to the allocated size for the directory entry. The data
11783 * length stored in the directory entry will be updated to
11784 * reflect this value once the write is complete.
11790 * When this bit is '1', the original active image will not be
11791 * removed. TBD: what purpose is this?
11793 #define HWRM_NVM_WRITE_INPUT_FLAGS_KEEP_ORIG_ACTIVE_IMG UINT32_C(0x1)
11794 uint32_t dir_item_length;
11796 * The requested length of the allocated NVM for the item, in
11797 * bytes. This value may be greater than or equal to the
11798 * specified data length (dir_data_length). If this value is
11799 * less than the specified data length, it will be ignored. The
11800 * response will contain the actual allocated item length, which
11801 * may be greater than the requested item length. The purpose
11802 * for allocating more than the required number of bytes for an
11803 * item's data is to pre-allocate extra storage (padding) to
11804 * accommodate the potential future growth of an item (e.g.
11805 * upgraded firmware with a size increase, log growth, expanded
11806 * configuration data).
11809 } __attribute__((packed));
11811 /* Output (16 bytes) */
11812 struct hwrm_nvm_write_output {
11813 uint16_t error_code;
11815 * Pass/Fail or error type Note: receiver to verify the in
11816 * parameters, and fail the call with an error when appropriate
11819 /* This field returns the type of original request. */
11821 /* This field provides original sequence number of the command. */
11824 * This field is the length of the response in bytes. The last
11825 * byte of the response is a valid flag that will read as '1'
11826 * when the command has been completely written to memory.
11828 uint32_t dir_item_length;
11830 * Length of the allocated NVM for the item, in bytes. The value
11831 * may be greater than or equal to the specified data length or
11832 * the requested item length. The actual item length used when
11833 * creating a new directory entry will be a multiple of an NVM
11837 /* The directory index of the created or modified item. */
11841 * This field is used in Output records to indicate that the
11842 * output is completely written to RAM. This field should be
11843 * read as '1' to indicate that the output has been completely
11844 * written. When writing a command completion or response to an
11845 * internal processor, the order of writes has to be such that
11846 * this field is written last.
11848 } __attribute__((packed));
11850 /* hwrm_nvm_read */
11852 * Note: Read the contents of an NVRAM item as referenced (indexed) by an
11853 * existing directory entry.
11855 /* Input (40 bytes) */
11856 struct hwrm_nvm_read_input {
11859 * This value indicates what type of request this is. The format
11860 * for the rest of the command is determined by this field.
11862 uint16_t cmpl_ring;
11864 * This value indicates the what completion ring the request
11865 * will be optionally completed on. If the value is -1, then no
11866 * CR completion will be generated. Any other value must be a
11867 * valid CR ring_id value for this function.
11870 /* This value indicates the command sequence number. */
11871 uint16_t target_id;
11873 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11874 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11877 uint64_t resp_addr;
11879 * This is the host address where the response will be written
11880 * when the request is complete. This area must be 16B aligned
11881 * and must be cleared to zero before the request is made.
11883 uint64_t host_dest_addr;
11885 * 64-bit Host Destination Address. This is the host address
11886 * where the data will be written to.
11889 /* The 0-based index of the directory entry. */
11893 /* The NVRAM byte-offset to read from. */
11895 /* The length of the data to be read, in bytes. */
11897 } __attribute__((packed));
11899 /* Output (16 bytes) */
11900 struct hwrm_nvm_read_output {
11901 uint16_t error_code;
11903 * Pass/Fail or error type Note: receiver to verify the in
11904 * parameters, and fail the call with an error when appropriate
11907 /* This field returns the type of original request. */
11909 /* This field provides original sequence number of the command. */
11912 * This field is the length of the response in bytes. The last
11913 * byte of the response is a valid flag that will read as '1'
11914 * when the command has been completely written to memory.
11922 * This field is used in Output records to indicate that the
11923 * output is completely written to RAM. This field should be
11924 * read as '1' to indicate that the output has been completely
11925 * written. When writing a command completion or response to an
11926 * internal processor, the order of writes has to be such that
11927 * this field is written last.
11929 } __attribute__((packed));
11931 /* Hardware Resource Manager Specification */
11932 /* Description: This structure is used to specify port description. */
11934 * Note: The Hardware Resource Manager (HWRM) manages various hardware resources
11935 * inside the chip. The HWRM is implemented in firmware, and runs on embedded
11936 * processors inside the chip. This firmware service is vital part of the chip.
11937 * The chip can not be used by a driver or HWRM client without the HWRM.
11939 /* Input (16 bytes) */
11943 * This value indicates what type of request this is. The format
11944 * for the rest of the command is determined by this field.
11946 uint16_t cmpl_ring;
11948 * This value indicates the what completion ring the request
11949 * will be optionally completed on. If the value is -1, then no
11950 * CR completion will be generated. Any other value must be a
11951 * valid CR ring_id value for this function.
11954 /* This value indicates the command sequence number. */
11955 uint16_t target_id;
11957 * Target ID of this command. 0x0 - 0xFFF8 - Used for function
11958 * ids 0xFFF8 - 0xFFFE - Reserved for internal processors 0xFFFF
11961 uint64_t resp_addr;
11963 * This is the host address where the response will be written
11964 * when the request is complete. This area must be 16B aligned
11965 * and must be cleared to zero before the request is made.
11967 } __attribute__((packed));
11969 /* Output (8 bytes) */
11971 uint16_t error_code;
11973 * Pass/Fail or error type Note: receiver to verify the in
11974 * parameters, and fail the call with an error when appropriate
11977 /* This field returns the type of original request. */
11979 /* This field provides original sequence number of the command. */
11982 * This field is the length of the response in bytes. The last
11983 * byte of the response is a valid flag that will read as '1'
11984 * when the command has been completely written to memory.
11986 } __attribute__((packed));
11988 /* Short Command Structure (16 bytes) */
11989 struct hwrm_short_input {
11992 * This field indicates the type of request in the request
11993 * buffer. The format for the rest of the command (request) is
11994 * determined by this field.
11996 uint16_t signature;
11998 * This field indicates a signature that is used to identify
11999 * short form of the command listed here. This field shall be
12000 * set to 17185 (0x4321).
12002 /* Signature indicating this is a short form of HWRM command */
12003 #define HWRM_SHORT_REQ_SIGNATURE_SHORT_CMD UINT32_C(0x4321)
12005 /* Reserved for future use. */
12007 /* This value indicates the length of the request. */
12010 * This is the host address where the request was written. This
12011 * area must be 16B aligned.
12013 } __attribute__((packed));
12015 #define HWRM_GET_HWRM_ERROR_CODE(arg) \
12017 typeof(arg) x = (arg); \
12018 ((x) == 0xf ? "HWRM_ERROR" : \
12019 ((x) == 0xffff ? "CMD_NOT_SUPPORTED" : \
12020 ((x) == 0xfffe ? "UNKNOWN_ERR" : \
12021 ((x) == 0x4 ? "RESOURCE_ALLOC_ERROR" : \
12022 ((x) == 0x5 ? "INVALID_FLAGS" : \
12023 ((x) == 0x6 ? "INVALID_ENABLES" : \
12024 ((x) == 0x0 ? "SUCCESS" : \
12025 ((x) == 0x1 ? "FAIL" : \
12026 ((x) == 0x2 ? "INVALID_PARAMS" : \
12027 ((x) == 0x3 ? "RESOURCE_ACCESS_DENIED" : \
12028 "Unknown error_code")))))))))) \
12031 /* Return Codes (8 bytes) */
12033 uint16_t error_code;
12034 /* These are numbers assigned to return/error codes. */
12035 /* Request was successfully executed by the HWRM. */
12036 #define HWRM_ERR_CODE_SUCCESS (UINT32_C(0x0))
12037 /* THe HWRM failed to execute the request. */
12038 #define HWRM_ERR_CODE_FAIL (UINT32_C(0x1))
12040 * The request contains invalid argument(s) or
12041 * input parameters.
12043 #define HWRM_ERR_CODE_INVALID_PARAMS (UINT32_C(0x2))
12045 * The requester is not allowed to access the
12046 * requested resource. This error code shall be
12047 * provided in a response to a request to query
12048 * or modify an existing resource that is not
12049 * accessible by the requester.
12051 #define HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED (UINT32_C(0x3))
12053 * The HWRM is unable to allocate the requested
12054 * resource. This code only applies to requests
12055 * for HWRM resource allocations.
12057 #define HWRM_ERR_CODE_RESOURCE_ALLOC_ERROR (UINT32_C(0x4))
12058 /* Invalid combination of flags is specified in the request. */
12059 #define HWRM_ERR_CODE_INVALID_FLAGS (UINT32_C(0x5))
12061 * Invalid combination of enables fields is
12062 * specified in the request.
12064 #define HWRM_ERR_CODE_INVALID_ENABLES (UINT32_C(0x6))
12066 * Generic HWRM execution error that represents
12067 * an internal error.
12069 #define HWRM_ERR_CODE_HWRM_ERROR (UINT32_C(0xf))
12070 /* Unknown error */
12071 #define HWRM_ERR_CODE_UNKNOWN_ERR (UINT32_C(0xfffe))
12072 /* Unsupported or invalid command */
12073 #define HWRM_ERR_CODE_CMD_NOT_SUPPORTED (UINT32_C(0xffff))
12074 uint16_t unused_0[3];
12075 } __attribute__((packed));
12077 /* Output (16 bytes) */
12078 struct hwrm_err_output {
12079 uint16_t error_code;
12081 * Pass/Fail or error type Note: receiver to verify the in
12082 * parameters, and fail the call with an error when appropriate
12085 /* This field returns the type of original request. */
12087 /* This field provides original sequence number of the command. */
12090 * This field is the length of the response in bytes. The last
12091 * byte of the response is a valid flag that will read as '1'
12092 * when the command has been completely written to memory.
12095 /* debug info for this error response. */
12097 /* debug info for this error response. */
12100 * In the case of an error response, command specific error code
12101 * is returned in this field.
12105 * This field is used in Output records to indicate that the
12106 * output is completely written to RAM. This field should be
12107 * read as '1' to indicate that the output has been completely
12108 * written. When writing a command completion or response to an
12109 * internal processor, the order of writes has to be such that
12110 * this field is written last.
12112 } __attribute__((packed));
12114 /* Port Tx Statistics Formats (408 bytes) */
12115 struct tx_port_stats {
12116 uint64_t tx_64b_frames;
12117 /* Total Number of 64 Bytes frames transmitted */
12118 uint64_t tx_65b_127b_frames;
12119 /* Total Number of 65-127 Bytes frames transmitted */
12120 uint64_t tx_128b_255b_frames;
12121 /* Total Number of 128-255 Bytes frames transmitted */
12122 uint64_t tx_256b_511b_frames;
12123 /* Total Number of 256-511 Bytes frames transmitted */
12124 uint64_t tx_512b_1023b_frames;
12125 /* Total Number of 512-1023 Bytes frames transmitted */
12126 uint64_t tx_1024b_1518_frames;
12127 /* Total Number of 1024-1518 Bytes frames transmitted */
12128 uint64_t tx_good_vlan_frames;
12130 * Total Number of each good VLAN (exludes FCS errors) frame
12131 * transmitted which is 1519 to 1522 bytes in length inclusive
12132 * (excluding framing bits but including FCS bytes).
12134 uint64_t tx_1519b_2047_frames;
12135 /* Total Number of 1519-2047 Bytes frames transmitted */
12136 uint64_t tx_2048b_4095b_frames;
12137 /* Total Number of 2048-4095 Bytes frames transmitted */
12138 uint64_t tx_4096b_9216b_frames;
12139 /* Total Number of 4096-9216 Bytes frames transmitted */
12140 uint64_t tx_9217b_16383b_frames;
12141 /* Total Number of 9217-16383 Bytes frames transmitted */
12142 uint64_t tx_good_frames;
12143 /* Total Number of good frames transmitted */
12144 uint64_t tx_total_frames;
12145 /* Total Number of frames transmitted */
12146 uint64_t tx_ucast_frames;
12147 /* Total number of unicast frames transmitted */
12148 uint64_t tx_mcast_frames;
12149 /* Total number of multicast frames transmitted */
12150 uint64_t tx_bcast_frames;
12151 /* Total number of broadcast frames transmitted */
12152 uint64_t tx_pause_frames;
12153 /* Total number of PAUSE control frames transmitted */
12154 uint64_t tx_pfc_frames;
12155 /* Total number of PFC/per-priority PAUSE control frames transmitted */
12156 uint64_t tx_jabber_frames;
12157 /* Total number of jabber frames transmitted */
12158 uint64_t tx_fcs_err_frames;
12159 /* Total number of frames transmitted with FCS error */
12160 uint64_t tx_control_frames;
12161 /* Total number of control frames transmitted */
12162 uint64_t tx_oversz_frames;
12163 /* Total number of over-sized frames transmitted */
12164 uint64_t tx_single_dfrl_frames;
12165 /* Total number of frames with single deferral */
12166 uint64_t tx_multi_dfrl_frames;
12167 /* Total number of frames with multiple deferrals */
12168 uint64_t tx_single_coll_frames;
12169 /* Total number of frames with single collision */
12170 uint64_t tx_multi_coll_frames;
12171 /* Total number of frames with multiple collisions */
12172 uint64_t tx_late_coll_frames;
12173 /* Total number of frames with late collisions */
12174 uint64_t tx_excessive_coll_frames;
12175 /* Total number of frames with excessive collisions */
12176 uint64_t tx_frag_frames;
12177 /* Total number of fragmented frames transmitted */
12179 /* Total number of transmit errors */
12180 uint64_t tx_tagged_frames;
12181 /* Total number of single VLAN tagged frames transmitted */
12182 uint64_t tx_dbl_tagged_frames;
12183 /* Total number of double VLAN tagged frames transmitted */
12184 uint64_t tx_runt_frames;
12185 /* Total number of runt frames transmitted */
12186 uint64_t tx_fifo_underruns;
12187 /* Total number of TX FIFO under runs */
12188 uint64_t tx_pfc_ena_frames_pri0;
12190 * Total number of PFC frames with PFC enabled bit for Pri 0
12193 uint64_t tx_pfc_ena_frames_pri1;
12195 * Total number of PFC frames with PFC enabled bit for Pri 1
12198 uint64_t tx_pfc_ena_frames_pri2;
12200 * Total number of PFC frames with PFC enabled bit for Pri 2
12203 uint64_t tx_pfc_ena_frames_pri3;
12205 * Total number of PFC frames with PFC enabled bit for Pri 3
12208 uint64_t tx_pfc_ena_frames_pri4;
12210 * Total number of PFC frames with PFC enabled bit for Pri 4
12213 uint64_t tx_pfc_ena_frames_pri5;
12215 * Total number of PFC frames with PFC enabled bit for Pri 5
12218 uint64_t tx_pfc_ena_frames_pri6;
12220 * Total number of PFC frames with PFC enabled bit for Pri 6
12223 uint64_t tx_pfc_ena_frames_pri7;
12225 * Total number of PFC frames with PFC enabled bit for Pri 7
12228 uint64_t tx_eee_lpi_events;
12229 /* Total number of EEE LPI Events on TX */
12230 uint64_t tx_eee_lpi_duration;
12231 /* EEE LPI Duration Counter on TX */
12232 uint64_t tx_llfc_logical_msgs;
12234 * Total number of Link Level Flow Control (LLFC) messages
12237 uint64_t tx_hcfc_msgs;
12238 /* Total number of HCFC messages transmitted */
12239 uint64_t tx_total_collisions;
12240 /* Total number of TX collisions */
12242 /* Total number of transmitted bytes */
12243 uint64_t tx_xthol_frames;
12244 /* Total number of end-to-end HOL frames */
12245 uint64_t tx_stat_discard;
12246 /* Total Tx Drops per Port reported by STATS block */
12247 uint64_t tx_stat_error;
12248 /* Total Tx Error Drops per Port reported by STATS block */
12249 } __attribute__((packed));
12251 /* Port Rx Statistics Formats (528 bytes) */
12252 struct rx_port_stats {
12253 uint64_t rx_64b_frames;
12254 /* Total Number of 64 Bytes frames received */
12255 uint64_t rx_65b_127b_frames;
12256 /* Total Number of 65-127 Bytes frames received */
12257 uint64_t rx_128b_255b_frames;
12258 /* Total Number of 128-255 Bytes frames received */
12259 uint64_t rx_256b_511b_frames;
12260 /* Total Number of 256-511 Bytes frames received */
12261 uint64_t rx_512b_1023b_frames;
12262 /* Total Number of 512-1023 Bytes frames received */
12263 uint64_t rx_1024b_1518_frames;
12264 /* Total Number of 1024-1518 Bytes frames received */
12265 uint64_t rx_good_vlan_frames;
12267 * Total Number of each good VLAN (exludes FCS errors) frame
12268 * received which is 1519 to 1522 bytes in length inclusive
12269 * (excluding framing bits but including FCS bytes).
12271 uint64_t rx_1519b_2047b_frames;
12272 /* Total Number of 1519-2047 Bytes frames received */
12273 uint64_t rx_2048b_4095b_frames;
12274 /* Total Number of 2048-4095 Bytes frames received */
12275 uint64_t rx_4096b_9216b_frames;
12276 /* Total Number of 4096-9216 Bytes frames received */
12277 uint64_t rx_9217b_16383b_frames;
12278 /* Total Number of 9217-16383 Bytes frames received */
12279 uint64_t rx_total_frames;
12280 /* Total number of frames received */
12281 uint64_t rx_ucast_frames;
12282 /* Total number of unicast frames received */
12283 uint64_t rx_mcast_frames;
12284 /* Total number of multicast frames received */
12285 uint64_t rx_bcast_frames;
12286 /* Total number of broadcast frames received */
12287 uint64_t rx_fcs_err_frames;
12288 /* Total number of received frames with FCS error */
12289 uint64_t rx_ctrl_frames;
12290 /* Total number of control frames received */
12291 uint64_t rx_pause_frames;
12292 /* Total number of PAUSE frames received */
12293 uint64_t rx_pfc_frames;
12294 /* Total number of PFC frames received */
12295 uint64_t rx_unsupported_opcode_frames;
12296 /* Total number of frames received with an unsupported opcode */
12297 uint64_t rx_unsupported_da_pausepfc_frames;
12299 * Total number of frames received with an unsupported DA for
12302 uint64_t rx_wrong_sa_frames;
12303 /* Total number of frames received with an unsupported SA */
12304 uint64_t rx_align_err_frames;
12305 /* Total number of received packets with alignment error */
12306 uint64_t rx_oor_len_frames;
12307 /* Total number of received frames with out-of-range length */
12308 uint64_t rx_code_err_frames;
12309 /* Total number of received frames with error termination */
12310 uint64_t rx_false_carrier_frames;
12312 * Total number of received frames with a false carrier is
12313 * detected during idle, as defined by RX_ER samples active and
12314 * RXD is 0xE. The event is reported along with the statistics
12315 * generated on the next received frame. Only one false carrier
12316 * condition can be detected and logged between frames. Carrier
12317 * event, valid for 10M/100M speed modes only.
12319 uint64_t rx_ovrsz_frames;
12320 /* Total number of over-sized frames received */
12321 uint64_t rx_jbr_frames;
12322 /* Total number of jabber packets received */
12323 uint64_t rx_mtu_err_frames;
12324 /* Total number of received frames with MTU error */
12325 uint64_t rx_match_crc_frames;
12326 /* Total number of received frames with CRC match */
12327 uint64_t rx_promiscuous_frames;
12328 /* Total number of frames received promiscuously */
12329 uint64_t rx_tagged_frames;
12330 /* Total number of received frames with one or two VLAN tags */
12331 uint64_t rx_double_tagged_frames;
12332 /* Total number of received frames with two VLAN tags */
12333 uint64_t rx_trunc_frames;
12334 /* Total number of truncated frames received */
12335 uint64_t rx_good_frames;
12336 /* Total number of good frames (without errors) received */
12337 uint64_t rx_pfc_xon2xoff_frames_pri0;
12339 * Total number of received PFC frames with transition from XON
12342 uint64_t rx_pfc_xon2xoff_frames_pri1;
12344 * Total number of received PFC frames with transition from XON
12347 uint64_t rx_pfc_xon2xoff_frames_pri2;
12349 * Total number of received PFC frames with transition from XON
12352 uint64_t rx_pfc_xon2xoff_frames_pri3;
12354 * Total number of received PFC frames with transition from XON
12357 uint64_t rx_pfc_xon2xoff_frames_pri4;
12359 * Total number of received PFC frames with transition from XON
12362 uint64_t rx_pfc_xon2xoff_frames_pri5;
12364 * Total number of received PFC frames with transition from XON
12367 uint64_t rx_pfc_xon2xoff_frames_pri6;
12369 * Total number of received PFC frames with transition from XON
12372 uint64_t rx_pfc_xon2xoff_frames_pri7;
12374 * Total number of received PFC frames with transition from XON
12377 uint64_t rx_pfc_ena_frames_pri0;
12379 * Total number of received PFC frames with PFC enabled bit for
12382 uint64_t rx_pfc_ena_frames_pri1;
12384 * Total number of received PFC frames with PFC enabled bit for
12387 uint64_t rx_pfc_ena_frames_pri2;
12389 * Total number of received PFC frames with PFC enabled bit for
12392 uint64_t rx_pfc_ena_frames_pri3;
12394 * Total number of received PFC frames with PFC enabled bit for
12397 uint64_t rx_pfc_ena_frames_pri4;
12399 * Total number of received PFC frames with PFC enabled bit for
12402 uint64_t rx_pfc_ena_frames_pri5;
12404 * Total number of received PFC frames with PFC enabled bit for
12407 uint64_t rx_pfc_ena_frames_pri6;
12409 * Total number of received PFC frames with PFC enabled bit for
12412 uint64_t rx_pfc_ena_frames_pri7;
12414 * Total number of received PFC frames with PFC enabled bit for
12417 uint64_t rx_sch_crc_err_frames;
12418 /* Total Number of frames received with SCH CRC error */
12419 uint64_t rx_undrsz_frames;
12420 /* Total Number of under-sized frames received */
12421 uint64_t rx_frag_frames;
12422 /* Total Number of fragmented frames received */
12423 uint64_t rx_eee_lpi_events;
12424 /* Total number of RX EEE LPI Events */
12425 uint64_t rx_eee_lpi_duration;
12426 /* EEE LPI Duration Counter on RX */
12427 uint64_t rx_llfc_physical_msgs;
12429 * Total number of physical type Link Level Flow Control (LLFC)
12430 * messages received
12432 uint64_t rx_llfc_logical_msgs;
12434 * Total number of logical type Link Level Flow Control (LLFC)
12435 * messages received
12437 uint64_t rx_llfc_msgs_with_crc_err;
12439 * Total number of logical type Link Level Flow Control (LLFC)
12440 * messages received with CRC error
12442 uint64_t rx_hcfc_msgs;
12443 /* Total number of HCFC messages received */
12444 uint64_t rx_hcfc_msgs_with_crc_err;
12445 /* Total number of HCFC messages received with CRC error */
12447 /* Total number of received bytes */
12448 uint64_t rx_runt_bytes;
12449 /* Total number of bytes received in runt frames */
12450 uint64_t rx_runt_frames;
12451 /* Total number of runt frames received */
12452 uint64_t rx_stat_discard;
12453 /* Total Rx Discards per Port reported by STATS block */
12454 uint64_t rx_stat_err;
12455 /* Total Rx Error Drops per Port reported by STATS block */
12456 } __attribute__((packed));
12458 /* Periodic Statistics Context DMA to host (160 bytes) */
12460 * per-context HW statistics -- chip view
12463 struct ctx_hw_stats64 {
12464 uint64_t rx_ucast_pkts;
12465 uint64_t rx_mcast_pkts;
12466 uint64_t rx_bcast_pkts;
12467 uint64_t rx_drop_pkts;
12468 uint64_t rx_discard_pkts;
12469 uint64_t rx_ucast_bytes;
12470 uint64_t rx_mcast_bytes;
12471 uint64_t rx_bcast_bytes;
12473 uint64_t tx_ucast_pkts;
12474 uint64_t tx_mcast_pkts;
12475 uint64_t tx_bcast_pkts;
12476 uint64_t tx_drop_pkts;
12477 uint64_t tx_discard_pkts;
12478 uint64_t tx_ucast_bytes;
12479 uint64_t tx_mcast_bytes;
12480 uint64_t tx_bcast_bytes;
12483 uint64_t tpa_bytes;
12484 uint64_t tpa_events;
12485 uint64_t tpa_aborts;
12486 } __attribute__((packed));
12488 #endif /* _HSI_STRUCT_DEF_DPDK_ */