1 /* * SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
12 #include <rte_ethdev_driver.h>
13 #include <rte_malloc.h>
14 #include <rte_memcpy.h>
15 #include <rte_string_fns.h>
16 #include <rte_cycles.h>
17 #include <rte_kvargs.h>
19 #include <rte_fslmc.h>
21 #include "dpaa2_pmd_logs.h"
22 #include <fslmc_vfio.h>
23 #include <dpaa2_hw_pvt.h>
24 #include <dpaa2_hw_mempool.h>
25 #include <dpaa2_hw_dpio.h>
26 #include <mc/fsl_dpmng.h>
27 #include "dpaa2_ethdev.h"
28 #include <fsl_qbman_debug.h>
30 struct rte_dpaa2_xstats_name_off {
31 char name[RTE_ETH_XSTATS_NAME_SIZE];
32 uint8_t page_id; /* dpni statistics page id */
33 uint8_t stats_id; /* stats id in the given page */
36 static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
37 {"ingress_multicast_frames", 0, 2},
38 {"ingress_multicast_bytes", 0, 3},
39 {"ingress_broadcast_frames", 0, 4},
40 {"ingress_broadcast_bytes", 0, 5},
41 {"egress_multicast_frames", 1, 2},
42 {"egress_multicast_bytes", 1, 3},
43 {"egress_broadcast_frames", 1, 4},
44 {"egress_broadcast_bytes", 1, 5},
45 {"ingress_filtered_frames", 2, 0},
46 {"ingress_discarded_frames", 2, 1},
47 {"ingress_nobuffer_discards", 2, 2},
48 {"egress_discarded_frames", 2, 3},
49 {"egress_confirmed_frames", 2, 4},
52 static struct rte_dpaa2_driver rte_dpaa2_pmd;
53 static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
54 static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
55 int wait_to_complete);
56 static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
57 static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
58 static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
60 int dpaa2_logtype_pmd;
63 dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
66 struct dpaa2_dev_priv *priv = dev->data->dev_private;
67 struct fsl_mc_io *dpni = priv->hw;
69 PMD_INIT_FUNC_TRACE();
72 DPAA2_PMD_ERR("dpni is NULL");
77 ret = dpni_add_vlan_id(dpni, CMD_PRI_LOW,
78 priv->token, vlan_id);
80 ret = dpni_remove_vlan_id(dpni, CMD_PRI_LOW,
81 priv->token, vlan_id);
84 DPAA2_PMD_ERR("ret = %d Unable to add/rem vlan %d hwid =%d",
85 ret, vlan_id, priv->hw_id);
91 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
93 struct dpaa2_dev_priv *priv = dev->data->dev_private;
94 struct fsl_mc_io *dpni = priv->hw;
97 PMD_INIT_FUNC_TRACE();
99 if (mask & ETH_VLAN_FILTER_MASK) {
100 /* VLAN Filter not avaialble */
101 if (!priv->max_vlan_filters) {
102 DPAA2_PMD_INFO("VLAN filter not available");
106 if (dev->data->dev_conf.rxmode.offloads &
107 DEV_RX_OFFLOAD_VLAN_FILTER)
108 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
111 ret = dpni_enable_vlan_filter(dpni, CMD_PRI_LOW,
114 DPAA2_PMD_INFO("Unable to set vlan filter = %d", ret);
117 if (mask & ETH_VLAN_EXTEND_MASK) {
118 if (dev->data->dev_conf.rxmode.offloads &
119 DEV_RX_OFFLOAD_VLAN_EXTEND)
120 DPAA2_PMD_INFO("VLAN extend offload not supported");
127 dpaa2_fw_version_get(struct rte_eth_dev *dev,
132 struct dpaa2_dev_priv *priv = dev->data->dev_private;
133 struct fsl_mc_io *dpni = priv->hw;
134 struct mc_soc_version mc_plat_info = {0};
135 struct mc_version mc_ver_info = {0};
137 PMD_INIT_FUNC_TRACE();
139 if (mc_get_soc_version(dpni, CMD_PRI_LOW, &mc_plat_info))
140 DPAA2_PMD_WARN("\tmc_get_soc_version failed");
142 if (mc_get_version(dpni, CMD_PRI_LOW, &mc_ver_info))
143 DPAA2_PMD_WARN("\tmc_get_version failed");
145 ret = snprintf(fw_version, fw_size,
150 mc_ver_info.revision);
152 ret += 1; /* add the size of '\0' */
153 if (fw_size < (uint32_t)ret)
160 dpaa2_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
162 struct dpaa2_dev_priv *priv = dev->data->dev_private;
164 PMD_INIT_FUNC_TRACE();
166 dev_info->if_index = priv->hw_id;
168 dev_info->max_mac_addrs = priv->max_mac_filters;
169 dev_info->max_rx_pktlen = DPAA2_MAX_RX_PKT_LEN;
170 dev_info->min_rx_bufsize = DPAA2_MIN_RX_BUF_SIZE;
171 dev_info->max_rx_queues = (uint16_t)priv->nb_rx_queues;
172 dev_info->max_tx_queues = (uint16_t)priv->nb_tx_queues;
173 dev_info->rx_offload_capa =
174 DEV_RX_OFFLOAD_IPV4_CKSUM |
175 DEV_RX_OFFLOAD_UDP_CKSUM |
176 DEV_RX_OFFLOAD_TCP_CKSUM |
177 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
178 DEV_RX_OFFLOAD_VLAN_FILTER |
179 DEV_RX_OFFLOAD_VLAN_STRIP |
180 DEV_RX_OFFLOAD_JUMBO_FRAME |
181 DEV_RX_OFFLOAD_SCATTER;
182 dev_info->tx_offload_capa =
183 DEV_TX_OFFLOAD_IPV4_CKSUM |
184 DEV_TX_OFFLOAD_UDP_CKSUM |
185 DEV_TX_OFFLOAD_TCP_CKSUM |
186 DEV_TX_OFFLOAD_SCTP_CKSUM |
187 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
188 DEV_TX_OFFLOAD_VLAN_INSERT |
189 DEV_TX_OFFLOAD_MBUF_FAST_FREE |
190 DEV_TX_OFFLOAD_MULTI_SEGS;
191 dev_info->speed_capa = ETH_LINK_SPEED_1G |
192 ETH_LINK_SPEED_2_5G |
197 dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
199 struct dpaa2_dev_priv *priv = dev->data->dev_private;
202 struct dpaa2_queue *mc_q, *mcq;
205 struct dpaa2_queue *dpaa2_q;
207 PMD_INIT_FUNC_TRACE();
209 tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
210 mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
211 RTE_CACHE_LINE_SIZE);
213 DPAA2_PMD_ERR("Memory allocation failed for rx/tx queues");
217 for (i = 0; i < priv->nb_rx_queues; i++) {
219 priv->rx_vq[i] = mc_q++;
220 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
221 dpaa2_q->q_storage = rte_malloc("dq_storage",
222 sizeof(struct queue_storage_info_t),
223 RTE_CACHE_LINE_SIZE);
224 if (!dpaa2_q->q_storage)
227 memset(dpaa2_q->q_storage, 0,
228 sizeof(struct queue_storage_info_t));
229 if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
233 for (i = 0; i < priv->nb_tx_queues; i++) {
235 mc_q->flow_id = 0xffff;
236 priv->tx_vq[i] = mc_q++;
237 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
238 dpaa2_q->cscn = rte_malloc(NULL,
239 sizeof(struct qbman_result), 16);
245 for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
246 mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
247 mcq->tc_index = DPAA2_DEF_TC;
248 mcq->flow_id = dist_idx;
256 dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
257 rte_free(dpaa2_q->cscn);
258 priv->tx_vq[i--] = NULL;
260 i = priv->nb_rx_queues;
263 mc_q = priv->rx_vq[0];
265 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
266 dpaa2_free_dq_storage(dpaa2_q->q_storage);
267 rte_free(dpaa2_q->q_storage);
268 priv->rx_vq[i--] = NULL;
275 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
277 struct dpaa2_dev_priv *priv = dev->data->dev_private;
278 struct fsl_mc_io *dpni = priv->hw;
279 struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
280 struct rte_eth_dev_info dev_info;
281 uint64_t rx_offloads = eth_conf->rxmode.offloads;
282 uint64_t tx_offloads = eth_conf->txmode.offloads;
283 int rx_l3_csum_offload = false;
284 int rx_l4_csum_offload = false;
285 int tx_l3_csum_offload = false;
286 int tx_l4_csum_offload = false;
289 PMD_INIT_FUNC_TRACE();
291 dpaa2_dev_info_get(dev, &dev_info);
292 if ((~(dev_info.rx_offload_capa) & rx_offloads) != 0) {
293 DPAA2_PMD_ERR("Some Rx offloads are not supported "
294 "requested 0x%" PRIx64 " supported 0x%" PRIx64,
295 rx_offloads, dev_info.rx_offload_capa);
299 if ((~(dev_info.tx_offload_capa) & tx_offloads) != 0) {
300 DPAA2_PMD_ERR("Some Tx offloads are not supported "
301 "requested 0x%" PRIx64 " supported 0x%" PRIx64,
302 tx_offloads, dev_info.tx_offload_capa);
306 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
307 if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
308 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
309 priv->token, eth_conf->rxmode.max_rx_pkt_len);
312 "Unable to set mtu. check config");
320 if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
321 ret = dpaa2_setup_flow_dist(dev,
322 eth_conf->rx_adv_conf.rss_conf.rss_hf);
324 DPAA2_PMD_ERR("Unable to set flow distribution."
325 "Check queue config");
330 if (rx_offloads & DEV_RX_OFFLOAD_IPV4_CKSUM)
331 rx_l3_csum_offload = true;
333 if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
334 (rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
335 rx_l4_csum_offload = true;
337 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
338 DPNI_OFF_RX_L3_CSUM, rx_l3_csum_offload);
340 DPAA2_PMD_ERR("Error to set RX l3 csum:Error = %d", ret);
344 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
345 DPNI_OFF_RX_L4_CSUM, rx_l4_csum_offload);
347 DPAA2_PMD_ERR("Error to get RX l4 csum:Error = %d", ret);
351 if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
352 tx_l3_csum_offload = true;
354 if ((tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM) ||
355 (tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM) ||
356 (tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
357 tx_l4_csum_offload = true;
359 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
360 DPNI_OFF_TX_L3_CSUM, tx_l3_csum_offload);
362 DPAA2_PMD_ERR("Error to set TX l3 csum:Error = %d", ret);
366 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
367 DPNI_OFF_TX_L4_CSUM, tx_l4_csum_offload);
369 DPAA2_PMD_ERR("Error to get TX l4 csum:Error = %d", ret);
373 /* Enabling hash results in FD requires setting DPNI_FLCTYPE_HASH in
374 * dpni_set_offload API. Setting this FLCTYPE for DPNI sets the FD[SC]
375 * to 0 for LS2 in the hardware thus disabling data/annotation
376 * stashing. For LX2 this is fixed in hardware and thus hash result and
377 * parse results can be received in FD using this option.
379 if (dpaa2_svr_family == SVR_LX2160A) {
380 ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
381 DPNI_FLCTYPE_HASH, true);
383 DPAA2_PMD_ERR("Error setting FLCTYPE: Err = %d", ret);
388 dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
390 /* update the current status */
391 dpaa2_dev_link_update(dev, 0);
396 /* Function to setup RX flow information. It contains traffic class ID,
397 * flow ID, destination configuration etc.
400 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
401 uint16_t rx_queue_id,
402 uint16_t nb_rx_desc __rte_unused,
403 unsigned int socket_id __rte_unused,
404 const struct rte_eth_rxconf *rx_conf __rte_unused,
405 struct rte_mempool *mb_pool)
407 struct dpaa2_dev_priv *priv = dev->data->dev_private;
408 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
409 struct dpaa2_queue *dpaa2_q;
410 struct dpni_queue cfg;
416 PMD_INIT_FUNC_TRACE();
418 DPAA2_PMD_DEBUG("dev =%p, queue =%d, pool = %p, conf =%p",
419 dev, rx_queue_id, mb_pool, rx_conf);
421 if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
422 bpid = mempool_to_bpid(mb_pool);
423 ret = dpaa2_attach_bp_list(priv,
424 rte_dpaa2_bpid_info[bpid].bp_list);
428 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
429 dpaa2_q->mb_pool = mb_pool; /**< mbuf pool to populate RX ring. */
431 /*Get the flow id from given VQ id*/
432 flow_id = rx_queue_id % priv->nb_rx_queues;
433 memset(&cfg, 0, sizeof(struct dpni_queue));
435 options = options | DPNI_QUEUE_OPT_USER_CTX;
436 cfg.user_context = (size_t)(dpaa2_q);
438 /*if ls2088 or rev2 device, enable the stashing */
440 if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
441 options |= DPNI_QUEUE_OPT_FLC;
442 cfg.flc.stash_control = true;
443 cfg.flc.value &= 0xFFFFFFFFFFFFFFC0;
444 /* 00 00 00 - last 6 bit represent annotation, context stashing,
445 * data stashing setting 01 01 00 (0x14)
446 * (in following order ->DS AS CS)
447 * to enable 1 line data, 1 line annotation.
448 * For LX2, this setting should be 01 00 00 (0x10)
450 if ((dpaa2_svr_family & 0xffff0000) == SVR_LX2160A)
451 cfg.flc.value |= 0x10;
453 cfg.flc.value |= 0x14;
455 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_RX,
456 dpaa2_q->tc_index, flow_id, options, &cfg);
458 DPAA2_PMD_ERR("Error in setting the rx flow: = %d", ret);
462 if (!(priv->flags & DPAA2_RX_TAILDROP_OFF)) {
463 struct dpni_taildrop taildrop;
466 /*enabling per rx queue congestion control */
467 taildrop.threshold = CONG_THRESHOLD_RX_Q;
468 taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
469 taildrop.oal = CONG_RX_OAL;
470 DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
472 ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
473 DPNI_CP_QUEUE, DPNI_QUEUE_RX,
474 dpaa2_q->tc_index, flow_id, &taildrop);
476 DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
482 dev->data->rx_queues[rx_queue_id] = dpaa2_q;
487 dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
488 uint16_t tx_queue_id,
489 uint16_t nb_tx_desc __rte_unused,
490 unsigned int socket_id __rte_unused,
491 const struct rte_eth_txconf *tx_conf __rte_unused)
493 struct dpaa2_dev_priv *priv = dev->data->dev_private;
494 struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
495 priv->tx_vq[tx_queue_id];
496 struct fsl_mc_io *dpni = priv->hw;
497 struct dpni_queue tx_conf_cfg;
498 struct dpni_queue tx_flow_cfg;
499 uint8_t options = 0, flow_id;
503 PMD_INIT_FUNC_TRACE();
505 /* Return if queue already configured */
506 if (dpaa2_q->flow_id != 0xffff) {
507 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
511 memset(&tx_conf_cfg, 0, sizeof(struct dpni_queue));
512 memset(&tx_flow_cfg, 0, sizeof(struct dpni_queue));
517 ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token, DPNI_QUEUE_TX,
518 tc_id, flow_id, options, &tx_flow_cfg);
520 DPAA2_PMD_ERR("Error in setting the tx flow: "
521 "tc_id=%d, flow=%d err=%d",
522 tc_id, flow_id, ret);
526 dpaa2_q->flow_id = flow_id;
528 if (tx_queue_id == 0) {
529 /*Set tx-conf and error configuration*/
530 ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
534 DPAA2_PMD_ERR("Error in set tx conf mode settings: "
539 dpaa2_q->tc_index = tc_id;
541 if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
542 struct dpni_congestion_notification_cfg cong_notif_cfg;
544 cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
545 cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
546 /* Notify that the queue is not congested when the data in
547 * the queue is below this thershold.
549 cong_notif_cfg.threshold_exit = CONG_EXIT_TX_THRESHOLD;
550 cong_notif_cfg.message_ctx = 0;
551 cong_notif_cfg.message_iova = (size_t)dpaa2_q->cscn;
552 cong_notif_cfg.dest_cfg.dest_type = DPNI_DEST_NONE;
553 cong_notif_cfg.notification_mode =
554 DPNI_CONG_OPT_WRITE_MEM_ON_ENTER |
555 DPNI_CONG_OPT_WRITE_MEM_ON_EXIT |
556 DPNI_CONG_OPT_COHERENT_WRITE;
558 ret = dpni_set_congestion_notification(dpni, CMD_PRI_LOW,
565 "Error in setting tx congestion notification: "
570 dev->data->tx_queues[tx_queue_id] = dpaa2_q;
575 dpaa2_dev_rx_queue_release(void *q __rte_unused)
577 PMD_INIT_FUNC_TRACE();
581 dpaa2_dev_tx_queue_release(void *q __rte_unused)
583 PMD_INIT_FUNC_TRACE();
587 dpaa2_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
590 struct dpaa2_dev_priv *priv = dev->data->dev_private;
591 struct dpaa2_queue *dpaa2_q;
592 struct qbman_swp *swp;
593 struct qbman_fq_query_np_rslt state;
594 uint32_t frame_cnt = 0;
596 PMD_INIT_FUNC_TRACE();
598 if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
599 ret = dpaa2_affine_qbman_swp();
601 DPAA2_PMD_ERR("Failure in affining portal");
605 swp = DPAA2_PER_LCORE_PORTAL;
607 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[rx_queue_id];
609 if (qbman_fq_query_state(swp, dpaa2_q->fqid, &state) == 0) {
610 frame_cnt = qbman_fq_state_frame_count(&state);
611 DPAA2_PMD_DEBUG("RX frame count for q(%d) is %u",
612 rx_queue_id, frame_cnt);
617 static const uint32_t *
618 dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
620 static const uint32_t ptypes[] = {
621 /*todo -= add more types */
624 RTE_PTYPE_L3_IPV4_EXT,
626 RTE_PTYPE_L3_IPV6_EXT,
634 if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx)
640 * Dpaa2 link Interrupt handler
643 * The address of parameter (struct rte_eth_dev *) regsitered before.
649 dpaa2_interrupt_handler(void *param)
651 struct rte_eth_dev *dev = param;
652 struct dpaa2_dev_priv *priv = dev->data->dev_private;
653 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
655 int irq_index = DPNI_IRQ_INDEX;
656 unsigned int status = 0, clear = 0;
658 PMD_INIT_FUNC_TRACE();
661 DPAA2_PMD_ERR("dpni is NULL");
665 ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
668 DPAA2_PMD_ERR("Can't get irq status (err %d)", ret);
673 if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
674 clear = DPNI_IRQ_EVENT_LINK_CHANGED;
675 dpaa2_dev_link_update(dev, 0);
676 /* calling all the apps registered for link status event */
677 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
681 ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
684 DPAA2_PMD_ERR("Can't clear irq status (err %d)", ret);
688 dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
691 struct dpaa2_dev_priv *priv = dev->data->dev_private;
692 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
693 int irq_index = DPNI_IRQ_INDEX;
694 unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
696 PMD_INIT_FUNC_TRACE();
698 err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
701 DPAA2_PMD_ERR("Error: dpni_set_irq_mask():%d (%s)", err,
706 err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
709 DPAA2_PMD_ERR("Error: dpni_set_irq_enable():%d (%s)", err,
716 dpaa2_dev_start(struct rte_eth_dev *dev)
718 struct rte_device *rdev = dev->device;
719 struct rte_dpaa2_device *dpaa2_dev;
720 struct rte_eth_dev_data *data = dev->data;
721 struct dpaa2_dev_priv *priv = data->dev_private;
722 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
723 struct dpni_queue cfg;
724 struct dpni_error_cfg err_cfg;
726 struct dpni_queue_id qid;
727 struct dpaa2_queue *dpaa2_q;
729 struct rte_intr_handle *intr_handle;
731 dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
732 intr_handle = &dpaa2_dev->intr_handle;
734 PMD_INIT_FUNC_TRACE();
736 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
738 DPAA2_PMD_ERR("Failure in enabling dpni %d device: err=%d",
743 /* Power up the phy. Needed to make the link go UP */
744 dpaa2_dev_set_link_up(dev);
746 ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
747 DPNI_QUEUE_TX, &qdid);
749 DPAA2_PMD_ERR("Error in getting qdid: err=%d", ret);
754 for (i = 0; i < data->nb_rx_queues; i++) {
755 dpaa2_q = (struct dpaa2_queue *)data->rx_queues[i];
756 ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
757 DPNI_QUEUE_RX, dpaa2_q->tc_index,
758 dpaa2_q->flow_id, &cfg, &qid);
760 DPAA2_PMD_ERR("Error in getting flow information: "
764 dpaa2_q->fqid = qid.fqid;
767 /*checksum errors, send them to normal path and set it in annotation */
768 err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
770 err_cfg.error_action = DPNI_ERROR_ACTION_CONTINUE;
771 err_cfg.set_frame_annotation = true;
773 ret = dpni_set_errors_behavior(dpni, CMD_PRI_LOW,
774 priv->token, &err_cfg);
776 DPAA2_PMD_ERR("Error to dpni_set_errors_behavior: code = %d",
781 /* if the interrupts were configured on this devices*/
782 if (intr_handle && (intr_handle->fd) &&
783 (dev->data->dev_conf.intr_conf.lsc != 0)) {
784 /* Registering LSC interrupt handler */
785 rte_intr_callback_register(intr_handle,
786 dpaa2_interrupt_handler,
789 /* enable vfio intr/eventfd mapping
790 * Interrupt index 0 is required, so we can not use
793 rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
795 /* enable dpni_irqs */
796 dpaa2_eth_setup_irqs(dev, 1);
803 * This routine disables all traffic on the adapter by issuing a
804 * global reset on the MAC.
807 dpaa2_dev_stop(struct rte_eth_dev *dev)
809 struct dpaa2_dev_priv *priv = dev->data->dev_private;
810 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
812 struct rte_eth_link link;
813 struct rte_intr_handle *intr_handle = dev->intr_handle;
815 PMD_INIT_FUNC_TRACE();
817 /* reset interrupt callback */
818 if (intr_handle && (intr_handle->fd) &&
819 (dev->data->dev_conf.intr_conf.lsc != 0)) {
820 /*disable dpni irqs */
821 dpaa2_eth_setup_irqs(dev, 0);
823 /* disable vfio intr before callback unregister */
824 rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
826 /* Unregistering LSC interrupt handler */
827 rte_intr_callback_unregister(intr_handle,
828 dpaa2_interrupt_handler,
832 dpaa2_dev_set_link_down(dev);
834 ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
836 DPAA2_PMD_ERR("Failure (ret %d) in disabling dpni %d dev",
841 /* clear the recorded link status */
842 memset(&link, 0, sizeof(link));
843 rte_eth_linkstatus_set(dev, &link);
847 dpaa2_dev_close(struct rte_eth_dev *dev)
849 struct rte_eth_dev_data *data = dev->data;
850 struct dpaa2_dev_priv *priv = dev->data->dev_private;
851 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
853 struct rte_eth_link link;
854 struct dpaa2_queue *dpaa2_q;
856 PMD_INIT_FUNC_TRACE();
858 for (i = 0; i < data->nb_tx_queues; i++) {
859 dpaa2_q = (struct dpaa2_queue *)data->tx_queues[i];
860 if (!dpaa2_q->cscn) {
861 rte_free(dpaa2_q->cscn);
862 dpaa2_q->cscn = NULL;
866 /* Clean the device first */
867 ret = dpni_reset(dpni, CMD_PRI_LOW, priv->token);
869 DPAA2_PMD_ERR("Failure cleaning dpni device: err=%d", ret);
873 memset(&link, 0, sizeof(link));
874 rte_eth_linkstatus_set(dev, &link);
878 dpaa2_dev_promiscuous_enable(
879 struct rte_eth_dev *dev)
882 struct dpaa2_dev_priv *priv = dev->data->dev_private;
883 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
885 PMD_INIT_FUNC_TRACE();
888 DPAA2_PMD_ERR("dpni is NULL");
892 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
894 DPAA2_PMD_ERR("Unable to enable U promisc mode %d", ret);
896 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
898 DPAA2_PMD_ERR("Unable to enable M promisc mode %d", ret);
902 dpaa2_dev_promiscuous_disable(
903 struct rte_eth_dev *dev)
906 struct dpaa2_dev_priv *priv = dev->data->dev_private;
907 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
909 PMD_INIT_FUNC_TRACE();
912 DPAA2_PMD_ERR("dpni is NULL");
916 ret = dpni_set_unicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
918 DPAA2_PMD_ERR("Unable to disable U promisc mode %d", ret);
920 if (dev->data->all_multicast == 0) {
921 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW,
924 DPAA2_PMD_ERR("Unable to disable M promisc mode %d",
930 dpaa2_dev_allmulticast_enable(
931 struct rte_eth_dev *dev)
934 struct dpaa2_dev_priv *priv = dev->data->dev_private;
935 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
937 PMD_INIT_FUNC_TRACE();
940 DPAA2_PMD_ERR("dpni is NULL");
944 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, true);
946 DPAA2_PMD_ERR("Unable to enable multicast mode %d", ret);
950 dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
953 struct dpaa2_dev_priv *priv = dev->data->dev_private;
954 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
956 PMD_INIT_FUNC_TRACE();
959 DPAA2_PMD_ERR("dpni is NULL");
963 /* must remain on for all promiscuous */
964 if (dev->data->promiscuous == 1)
967 ret = dpni_set_multicast_promisc(dpni, CMD_PRI_LOW, priv->token, false);
969 DPAA2_PMD_ERR("Unable to disable multicast mode %d", ret);
973 dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
976 struct dpaa2_dev_priv *priv = dev->data->dev_private;
977 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
978 uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
981 PMD_INIT_FUNC_TRACE();
984 DPAA2_PMD_ERR("dpni is NULL");
988 /* check that mtu is within the allowed range */
989 if ((mtu < ETHER_MIN_MTU) || (frame_size > DPAA2_MAX_RX_PKT_LEN))
992 if (frame_size > ETHER_MAX_LEN)
993 dev->data->dev_conf.rxmode.offloads &=
994 DEV_RX_OFFLOAD_JUMBO_FRAME;
996 dev->data->dev_conf.rxmode.offloads &=
997 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
999 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1001 /* Set the Max Rx frame length as 'mtu' +
1002 * Maximum Ethernet header length
1004 ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
1007 DPAA2_PMD_ERR("Setting the max frame length failed");
1010 DPAA2_PMD_INFO("MTU configured for the device: %d", mtu);
1015 dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
1016 struct ether_addr *addr,
1017 __rte_unused uint32_t index,
1018 __rte_unused uint32_t pool)
1021 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1022 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1024 PMD_INIT_FUNC_TRACE();
1027 DPAA2_PMD_ERR("dpni is NULL");
1031 ret = dpni_add_mac_addr(dpni, CMD_PRI_LOW,
1032 priv->token, addr->addr_bytes);
1035 "error: Adding the MAC ADDR failed: err = %d", ret);
1040 dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
1044 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1045 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1046 struct rte_eth_dev_data *data = dev->data;
1047 struct ether_addr *macaddr;
1049 PMD_INIT_FUNC_TRACE();
1051 macaddr = &data->mac_addrs[index];
1054 DPAA2_PMD_ERR("dpni is NULL");
1058 ret = dpni_remove_mac_addr(dpni, CMD_PRI_LOW,
1059 priv->token, macaddr->addr_bytes);
1062 "error: Removing the MAC ADDR failed: err = %d", ret);
1066 dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
1067 struct ether_addr *addr)
1070 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1071 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1073 PMD_INIT_FUNC_TRACE();
1076 DPAA2_PMD_ERR("dpni is NULL");
1080 ret = dpni_set_primary_mac_addr(dpni, CMD_PRI_LOW,
1081 priv->token, addr->addr_bytes);
1085 "error: Setting the MAC ADDR failed %d", ret);
1091 int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
1092 struct rte_eth_stats *stats)
1094 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1095 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1097 uint8_t page0 = 0, page1 = 1, page2 = 2;
1098 union dpni_statistics value;
1100 memset(&value, 0, sizeof(union dpni_statistics));
1102 PMD_INIT_FUNC_TRACE();
1105 DPAA2_PMD_ERR("dpni is NULL");
1110 DPAA2_PMD_ERR("stats is NULL");
1114 /*Get Counters from page_0*/
1115 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1120 stats->ipackets = value.page_0.ingress_all_frames;
1121 stats->ibytes = value.page_0.ingress_all_bytes;
1123 /*Get Counters from page_1*/
1124 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1129 stats->opackets = value.page_1.egress_all_frames;
1130 stats->obytes = value.page_1.egress_all_bytes;
1132 /*Get Counters from page_2*/
1133 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1138 /* Ingress drop frame count due to configured rules */
1139 stats->ierrors = value.page_2.ingress_filtered_frames;
1140 /* Ingress drop frame count due to error */
1141 stats->ierrors += value.page_2.ingress_discarded_frames;
1143 stats->oerrors = value.page_2.egress_discarded_frames;
1144 stats->imissed = value.page_2.ingress_nobuffer_discards;
1149 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1154 dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1157 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1158 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1160 union dpni_statistics value[3] = {};
1161 unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
1169 /* Get Counters from page_0*/
1170 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1175 /* Get Counters from page_1*/
1176 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1181 /* Get Counters from page_2*/
1182 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1187 for (i = 0; i < num; i++) {
1189 xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
1190 raw.counter[dpaa2_xstats_strings[i].stats_id];
1194 DPAA2_PMD_ERR("Error in obtaining extended stats (%d)", retcode);
1199 dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
1200 struct rte_eth_xstat_name *xstats_names,
1203 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1205 if (limit < stat_cnt)
1208 if (xstats_names != NULL)
1209 for (i = 0; i < stat_cnt; i++)
1210 snprintf(xstats_names[i].name,
1211 sizeof(xstats_names[i].name),
1213 dpaa2_xstats_strings[i].name);
1219 dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
1220 uint64_t *values, unsigned int n)
1222 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1223 uint64_t values_copy[stat_cnt];
1226 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1227 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1229 union dpni_statistics value[3] = {};
1237 /* Get Counters from page_0*/
1238 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1243 /* Get Counters from page_1*/
1244 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1249 /* Get Counters from page_2*/
1250 retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
1255 for (i = 0; i < stat_cnt; i++) {
1256 values[i] = value[dpaa2_xstats_strings[i].page_id].
1257 raw.counter[dpaa2_xstats_strings[i].stats_id];
1262 dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
1264 for (i = 0; i < n; i++) {
1265 if (ids[i] >= stat_cnt) {
1266 DPAA2_PMD_ERR("xstats id value isn't valid");
1269 values[i] = values_copy[ids[i]];
1275 dpaa2_xstats_get_names_by_id(
1276 struct rte_eth_dev *dev,
1277 struct rte_eth_xstat_name *xstats_names,
1278 const uint64_t *ids,
1281 unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
1282 struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
1285 return dpaa2_xstats_get_names(dev, xstats_names, limit);
1287 dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
1289 for (i = 0; i < limit; i++) {
1290 if (ids[i] >= stat_cnt) {
1291 DPAA2_PMD_ERR("xstats id value isn't valid");
1294 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
1300 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
1302 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1303 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1306 PMD_INIT_FUNC_TRACE();
1309 DPAA2_PMD_ERR("dpni is NULL");
1313 retcode = dpni_reset_statistics(dpni, CMD_PRI_LOW, priv->token);
1320 DPAA2_PMD_ERR("Operation not completed:Error Code = %d", retcode);
1324 /* return 0 means link status changed, -1 means not changed */
1326 dpaa2_dev_link_update(struct rte_eth_dev *dev,
1327 int wait_to_complete __rte_unused)
1330 struct dpaa2_dev_priv *priv = dev->data->dev_private;
1331 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1332 struct rte_eth_link link;
1333 struct dpni_link_state state = {0};
1336 DPAA2_PMD_ERR("dpni is NULL");
1340 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1342 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1346 memset(&link, 0, sizeof(struct rte_eth_link));
1347 link.link_status = state.up;
1348 link.link_speed = state.rate;
1350 if (state.options & DPNI_LINK_OPT_HALF_DUPLEX)
1351 link.link_duplex = ETH_LINK_HALF_DUPLEX;
1353 link.link_duplex = ETH_LINK_FULL_DUPLEX;
1355 ret = rte_eth_linkstatus_set(dev, &link);
1357 DPAA2_PMD_DEBUG("No change in status");
1359 DPAA2_PMD_INFO("Port %d Link is %s\n", dev->data->port_id,
1360 link.link_status ? "Up" : "Down");
1366 * Toggle the DPNI to enable, if not already enabled.
1367 * This is not strictly PHY up/down - it is more of logical toggling.
1370 dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
1373 struct dpaa2_dev_priv *priv;
1374 struct fsl_mc_io *dpni;
1376 struct dpni_link_state state = {0};
1378 priv = dev->data->dev_private;
1379 dpni = (struct fsl_mc_io *)priv->hw;
1382 DPAA2_PMD_ERR("dpni is NULL");
1386 /* Check if DPNI is currently enabled */
1387 ret = dpni_is_enabled(dpni, CMD_PRI_LOW, priv->token, &en);
1389 /* Unable to obtain dpni status; Not continuing */
1390 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1394 /* Enable link if not already enabled */
1396 ret = dpni_enable(dpni, CMD_PRI_LOW, priv->token);
1398 DPAA2_PMD_ERR("Interface Link UP failed (%d)", ret);
1402 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1404 DPAA2_PMD_ERR("Unable to get link state (%d)", ret);
1408 /* changing tx burst function to start enqueues */
1409 dev->tx_pkt_burst = dpaa2_dev_tx;
1410 dev->data->dev_link.link_status = state.up;
1413 DPAA2_PMD_INFO("Port %d Link is Up", dev->data->port_id);
1415 DPAA2_PMD_INFO("Port %d Link is Down", dev->data->port_id);
1420 * Toggle the DPNI to disable, if not already disabled.
1421 * This is not strictly PHY up/down - it is more of logical toggling.
1424 dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
1427 struct dpaa2_dev_priv *priv;
1428 struct fsl_mc_io *dpni;
1429 int dpni_enabled = 0;
1432 PMD_INIT_FUNC_TRACE();
1434 priv = dev->data->dev_private;
1435 dpni = (struct fsl_mc_io *)priv->hw;
1438 DPAA2_PMD_ERR("Device has not yet been configured");
1442 /*changing tx burst function to avoid any more enqueues */
1443 dev->tx_pkt_burst = dummy_dev_tx;
1445 /* Loop while dpni_disable() attempts to drain the egress FQs
1446 * and confirm them back to us.
1449 ret = dpni_disable(dpni, 0, priv->token);
1451 DPAA2_PMD_ERR("dpni disable failed (%d)", ret);
1454 ret = dpni_is_enabled(dpni, 0, priv->token, &dpni_enabled);
1456 DPAA2_PMD_ERR("dpni enable check failed (%d)", ret);
1460 /* Allow the MC some slack */
1461 rte_delay_us(100 * 1000);
1462 } while (dpni_enabled && --retries);
1465 DPAA2_PMD_WARN("Retry count exceeded disabling dpni");
1466 /* todo- we may have to manually cleanup queues.
1469 DPAA2_PMD_INFO("Port %d Link DOWN successful",
1470 dev->data->port_id);
1473 dev->data->dev_link.link_status = 0;
1479 dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1482 struct dpaa2_dev_priv *priv;
1483 struct fsl_mc_io *dpni;
1484 struct dpni_link_state state = {0};
1486 PMD_INIT_FUNC_TRACE();
1488 priv = dev->data->dev_private;
1489 dpni = (struct fsl_mc_io *)priv->hw;
1491 if (dpni == NULL || fc_conf == NULL) {
1492 DPAA2_PMD_ERR("device not configured");
1496 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1498 DPAA2_PMD_ERR("error: dpni_get_link_state %d", ret);
1502 memset(fc_conf, 0, sizeof(struct rte_eth_fc_conf));
1503 if (state.options & DPNI_LINK_OPT_PAUSE) {
1504 /* DPNI_LINK_OPT_PAUSE set
1505 * if ASYM_PAUSE not set,
1506 * RX Side flow control (handle received Pause frame)
1507 * TX side flow control (send Pause frame)
1508 * if ASYM_PAUSE set,
1509 * RX Side flow control (handle received Pause frame)
1510 * No TX side flow control (send Pause frame disabled)
1512 if (!(state.options & DPNI_LINK_OPT_ASYM_PAUSE))
1513 fc_conf->mode = RTE_FC_FULL;
1515 fc_conf->mode = RTE_FC_RX_PAUSE;
1517 /* DPNI_LINK_OPT_PAUSE not set
1518 * if ASYM_PAUSE set,
1519 * TX side flow control (send Pause frame)
1520 * No RX side flow control (No action on pause frame rx)
1521 * if ASYM_PAUSE not set,
1522 * Flow control disabled
1524 if (state.options & DPNI_LINK_OPT_ASYM_PAUSE)
1525 fc_conf->mode = RTE_FC_TX_PAUSE;
1527 fc_conf->mode = RTE_FC_NONE;
1534 dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
1537 struct dpaa2_dev_priv *priv;
1538 struct fsl_mc_io *dpni;
1539 struct dpni_link_state state = {0};
1540 struct dpni_link_cfg cfg = {0};
1542 PMD_INIT_FUNC_TRACE();
1544 priv = dev->data->dev_private;
1545 dpni = (struct fsl_mc_io *)priv->hw;
1548 DPAA2_PMD_ERR("dpni is NULL");
1552 /* It is necessary to obtain the current state before setting fc_conf
1553 * as MC would return error in case rate, autoneg or duplex values are
1556 ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
1558 DPAA2_PMD_ERR("Unable to get link state (err=%d)", ret);
1562 /* Disable link before setting configuration */
1563 dpaa2_dev_set_link_down(dev);
1565 /* Based on fc_conf, update cfg */
1566 cfg.rate = state.rate;
1567 cfg.options = state.options;
1569 /* update cfg with fc_conf */
1570 switch (fc_conf->mode) {
1572 /* Full flow control;
1573 * OPT_PAUSE set, ASYM_PAUSE not set
1575 cfg.options |= DPNI_LINK_OPT_PAUSE;
1576 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1578 case RTE_FC_TX_PAUSE:
1579 /* Enable RX flow control
1580 * OPT_PAUSE not set;
1583 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1584 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1586 case RTE_FC_RX_PAUSE:
1587 /* Enable TX Flow control
1591 cfg.options |= DPNI_LINK_OPT_PAUSE;
1592 cfg.options |= DPNI_LINK_OPT_ASYM_PAUSE;
1595 /* Disable Flow control
1597 * ASYM_PAUSE not set
1599 cfg.options &= ~DPNI_LINK_OPT_PAUSE;
1600 cfg.options &= ~DPNI_LINK_OPT_ASYM_PAUSE;
1603 DPAA2_PMD_ERR("Incorrect Flow control flag (%d)",
1608 ret = dpni_set_link_cfg(dpni, CMD_PRI_LOW, priv->token, &cfg);
1610 DPAA2_PMD_ERR("Unable to set Link configuration (err=%d)",
1614 dpaa2_dev_set_link_up(dev);
1620 dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
1621 struct rte_eth_rss_conf *rss_conf)
1623 struct rte_eth_dev_data *data = dev->data;
1624 struct rte_eth_conf *eth_conf = &data->dev_conf;
1627 PMD_INIT_FUNC_TRACE();
1629 if (rss_conf->rss_hf) {
1630 ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
1632 DPAA2_PMD_ERR("Unable to set flow dist");
1636 ret = dpaa2_remove_flow_dist(dev, 0);
1638 DPAA2_PMD_ERR("Unable to remove flow dist");
1642 eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
1647 dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
1648 struct rte_eth_rss_conf *rss_conf)
1650 struct rte_eth_dev_data *data = dev->data;
1651 struct rte_eth_conf *eth_conf = &data->dev_conf;
1653 /* dpaa2 does not support rss_key, so length should be 0*/
1654 rss_conf->rss_key_len = 0;
1655 rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
1659 int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
1660 int eth_rx_queue_id,
1662 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
1664 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1665 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1666 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1667 uint8_t flow_id = dpaa2_ethq->flow_id;
1668 struct dpni_queue cfg;
1672 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
1673 dpaa2_ethq->cb = dpaa2_dev_process_parallel_event;
1674 else if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC)
1675 dpaa2_ethq->cb = dpaa2_dev_process_atomic_event;
1679 memset(&cfg, 0, sizeof(struct dpni_queue));
1680 options = DPNI_QUEUE_OPT_DEST;
1681 cfg.destination.type = DPNI_DEST_DPCON;
1682 cfg.destination.id = dpcon_id;
1683 cfg.destination.priority = queue_conf->ev.priority;
1685 if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_ATOMIC) {
1686 options |= DPNI_QUEUE_OPT_HOLD_ACTIVE;
1687 cfg.destination.hold_active = 1;
1690 options |= DPNI_QUEUE_OPT_USER_CTX;
1691 cfg.user_context = (size_t)(dpaa2_ethq);
1693 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1694 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1696 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1700 memcpy(&dpaa2_ethq->ev, &queue_conf->ev, sizeof(struct rte_event));
1705 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
1706 int eth_rx_queue_id)
1708 struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
1709 struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
1710 struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
1711 uint8_t flow_id = dpaa2_ethq->flow_id;
1712 struct dpni_queue cfg;
1716 memset(&cfg, 0, sizeof(struct dpni_queue));
1717 options = DPNI_QUEUE_OPT_DEST;
1718 cfg.destination.type = DPNI_DEST_NONE;
1720 ret = dpni_set_queue(dpni, CMD_PRI_LOW, eth_priv->token, DPNI_QUEUE_RX,
1721 dpaa2_ethq->tc_index, flow_id, options, &cfg);
1723 DPAA2_PMD_ERR("Error in dpni_set_queue: ret: %d", ret);
1728 static struct eth_dev_ops dpaa2_ethdev_ops = {
1729 .dev_configure = dpaa2_eth_dev_configure,
1730 .dev_start = dpaa2_dev_start,
1731 .dev_stop = dpaa2_dev_stop,
1732 .dev_close = dpaa2_dev_close,
1733 .promiscuous_enable = dpaa2_dev_promiscuous_enable,
1734 .promiscuous_disable = dpaa2_dev_promiscuous_disable,
1735 .allmulticast_enable = dpaa2_dev_allmulticast_enable,
1736 .allmulticast_disable = dpaa2_dev_allmulticast_disable,
1737 .dev_set_link_up = dpaa2_dev_set_link_up,
1738 .dev_set_link_down = dpaa2_dev_set_link_down,
1739 .link_update = dpaa2_dev_link_update,
1740 .stats_get = dpaa2_dev_stats_get,
1741 .xstats_get = dpaa2_dev_xstats_get,
1742 .xstats_get_by_id = dpaa2_xstats_get_by_id,
1743 .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
1744 .xstats_get_names = dpaa2_xstats_get_names,
1745 .stats_reset = dpaa2_dev_stats_reset,
1746 .xstats_reset = dpaa2_dev_stats_reset,
1747 .fw_version_get = dpaa2_fw_version_get,
1748 .dev_infos_get = dpaa2_dev_info_get,
1749 .dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
1750 .mtu_set = dpaa2_dev_mtu_set,
1751 .vlan_filter_set = dpaa2_vlan_filter_set,
1752 .vlan_offload_set = dpaa2_vlan_offload_set,
1753 .rx_queue_setup = dpaa2_dev_rx_queue_setup,
1754 .rx_queue_release = dpaa2_dev_rx_queue_release,
1755 .tx_queue_setup = dpaa2_dev_tx_queue_setup,
1756 .tx_queue_release = dpaa2_dev_tx_queue_release,
1757 .rx_queue_count = dpaa2_dev_rx_queue_count,
1758 .flow_ctrl_get = dpaa2_flow_ctrl_get,
1759 .flow_ctrl_set = dpaa2_flow_ctrl_set,
1760 .mac_addr_add = dpaa2_dev_add_mac_addr,
1761 .mac_addr_remove = dpaa2_dev_remove_mac_addr,
1762 .mac_addr_set = dpaa2_dev_set_mac_addr,
1763 .rss_hash_update = dpaa2_dev_rss_hash_update,
1764 .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
1768 dpaa2_dev_init(struct rte_eth_dev *eth_dev)
1770 struct rte_device *dev = eth_dev->device;
1771 struct rte_dpaa2_device *dpaa2_dev;
1772 struct fsl_mc_io *dpni_dev;
1773 struct dpni_attr attr;
1774 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1775 struct dpni_buffer_layout layout;
1778 PMD_INIT_FUNC_TRACE();
1780 /* For secondary processes, the primary has done all the work */
1781 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1784 dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
1786 hw_id = dpaa2_dev->object_id;
1788 dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
1790 DPAA2_PMD_ERR("Memory allocation failed for dpni device");
1794 dpni_dev->regs = rte_mcp_ptr_list[0];
1795 ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
1798 "Failure in opening dpni@%d with err code %d",
1804 /* Clean the device first */
1805 ret = dpni_reset(dpni_dev, CMD_PRI_LOW, priv->token);
1807 DPAA2_PMD_ERR("Failure cleaning dpni@%d with err code %d",
1812 ret = dpni_get_attributes(dpni_dev, CMD_PRI_LOW, priv->token, &attr);
1815 "Failure in get dpni@%d attribute, err code %d",
1820 priv->num_rx_tc = attr.num_rx_tcs;
1822 /* Resetting the "num_rx_queues" to equal number of queues in first TC
1823 * as only one TC is supported on Rx Side. Once Multiple TCs will be
1824 * in use for Rx processing then this will be changed or removed.
1826 priv->nb_rx_queues = attr.num_queues;
1828 /* Using number of TX queues as number of TX TCs */
1829 priv->nb_tx_queues = attr.num_tx_tcs;
1831 DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
1832 priv->num_rx_tc, priv->nb_rx_queues,
1833 priv->nb_tx_queues);
1835 priv->hw = dpni_dev;
1836 priv->hw_id = hw_id;
1837 priv->options = attr.options;
1838 priv->max_mac_filters = attr.mac_filter_entries;
1839 priv->max_vlan_filters = attr.vlan_filter_entries;
1842 /* Allocate memory for hardware structure for queues */
1843 ret = dpaa2_alloc_rx_tx_queues(eth_dev);
1845 DPAA2_PMD_ERR("Queue allocation Failed");
1849 /* Allocate memory for storing MAC addresses */
1850 eth_dev->data->mac_addrs = rte_zmalloc("dpni",
1851 ETHER_ADDR_LEN * attr.mac_filter_entries, 0);
1852 if (eth_dev->data->mac_addrs == NULL) {
1854 "Failed to allocate %d bytes needed to store MAC addresses",
1855 ETHER_ADDR_LEN * attr.mac_filter_entries);
1860 ret = dpni_get_primary_mac_addr(dpni_dev, CMD_PRI_LOW,
1862 (uint8_t *)(eth_dev->data->mac_addrs[0].addr_bytes));
1864 DPAA2_PMD_ERR("DPNI get mac address failed:Err Code = %d",
1869 /* ... tx buffer layout ... */
1870 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1871 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1872 layout.pass_frame_status = 1;
1873 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1874 DPNI_QUEUE_TX, &layout);
1876 DPAA2_PMD_ERR("Error (%d) in setting tx buffer layout", ret);
1880 /* ... tx-conf and error buffer layout ... */
1881 memset(&layout, 0, sizeof(struct dpni_buffer_layout));
1882 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
1883 layout.pass_frame_status = 1;
1884 ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
1885 DPNI_QUEUE_TX_CONFIRM, &layout);
1887 DPAA2_PMD_ERR("Error (%d) in setting tx-conf buffer layout",
1892 eth_dev->dev_ops = &dpaa2_ethdev_ops;
1894 eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
1895 eth_dev->tx_pkt_burst = dpaa2_dev_tx;
1897 DPAA2_PMD_INFO("%s: netdev created", eth_dev->data->name);
1900 dpaa2_dev_uninit(eth_dev);
1905 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
1907 struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
1908 struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
1910 struct dpaa2_queue *dpaa2_q;
1912 PMD_INIT_FUNC_TRACE();
1914 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1918 DPAA2_PMD_WARN("Already closed or not started");
1922 dpaa2_dev_close(eth_dev);
1924 if (priv->rx_vq[0]) {
1925 /* cleaning up queue storage */
1926 for (i = 0; i < priv->nb_rx_queues; i++) {
1927 dpaa2_q = (struct dpaa2_queue *)priv->rx_vq[i];
1928 if (dpaa2_q->q_storage)
1929 rte_free(dpaa2_q->q_storage);
1931 /*free the all queue memory */
1932 rte_free(priv->rx_vq[0]);
1933 priv->rx_vq[0] = NULL;
1936 /* free memory for storing MAC addresses */
1937 if (eth_dev->data->mac_addrs) {
1938 rte_free(eth_dev->data->mac_addrs);
1939 eth_dev->data->mac_addrs = NULL;
1942 /* Close the device at underlying layer*/
1943 ret = dpni_close(dpni, CMD_PRI_LOW, priv->token);
1946 "Failure closing dpni device with err code %d",
1950 /* Free the allocated memory for ethernet private data and dpni*/
1954 eth_dev->dev_ops = NULL;
1955 eth_dev->rx_pkt_burst = NULL;
1956 eth_dev->tx_pkt_burst = NULL;
1958 DPAA2_PMD_INFO("%s: netdev deleted", eth_dev->data->name);
1963 rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
1964 struct rte_dpaa2_device *dpaa2_dev)
1966 struct rte_eth_dev *eth_dev;
1969 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
1970 eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
1973 eth_dev->data->dev_private = rte_zmalloc(
1974 "ethdev private structure",
1975 sizeof(struct dpaa2_dev_priv),
1976 RTE_CACHE_LINE_SIZE);
1977 if (eth_dev->data->dev_private == NULL) {
1979 "Unable to allocate memory for private data");
1980 rte_eth_dev_release_port(eth_dev);
1984 eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
1989 eth_dev->device = &dpaa2_dev->device;
1990 eth_dev->device->driver = &dpaa2_drv->driver;
1992 dpaa2_dev->eth_dev = eth_dev;
1993 eth_dev->data->rx_mbuf_alloc_failed = 0;
1995 if (dpaa2_drv->drv_flags & RTE_DPAA2_DRV_INTR_LSC)
1996 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
1998 /* Invoke PMD device initialization function */
1999 diag = dpaa2_dev_init(eth_dev);
2003 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2004 rte_free(eth_dev->data->dev_private);
2005 rte_eth_dev_release_port(eth_dev);
2010 rte_dpaa2_remove(struct rte_dpaa2_device *dpaa2_dev)
2012 struct rte_eth_dev *eth_dev;
2014 eth_dev = dpaa2_dev->eth_dev;
2015 dpaa2_dev_uninit(eth_dev);
2017 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
2018 rte_free(eth_dev->data->dev_private);
2019 rte_eth_dev_release_port(eth_dev);
2024 static struct rte_dpaa2_driver rte_dpaa2_pmd = {
2025 .drv_flags = RTE_DPAA2_DRV_INTR_LSC | RTE_DPAA2_DRV_IOVA_AS_VA,
2026 .drv_type = DPAA2_ETH,
2027 .probe = rte_dpaa2_probe,
2028 .remove = rte_dpaa2_remove,
2031 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
2033 RTE_INIT(dpaa2_pmd_init_log);
2035 dpaa2_pmd_init_log(void)
2037 dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
2038 if (dpaa2_logtype_pmd >= 0)
2039 rte_log_set_level(dpaa2_logtype_pmd, RTE_LOG_NOTICE);