1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018-2019 Hisilicon Limited.
11 #include <arpa/inet.h>
12 #include <rte_alarm.h>
13 #include <rte_atomic.h>
14 #include <rte_bus_pci.h>
15 #include <rte_byteorder.h>
16 #include <rte_common.h>
17 #include <rte_cycles.h>
20 #include <rte_ether.h>
21 #include <rte_ethdev_driver.h>
22 #include <rte_ethdev_pci.h>
23 #include <rte_interrupts.h>
28 #include "hns3_ethdev.h"
29 #include "hns3_logs.h"
30 #include "hns3_rxtx.h"
31 #include "hns3_regs.h"
32 #include "hns3_intr.h"
35 #define HNS3VF_KEEP_ALIVE_INTERVAL 2000000 /* us */
36 #define HNS3VF_SERVICE_INTERVAL 1000000 /* us */
38 #define HNS3VF_RESET_WAIT_MS 20
39 #define HNS3VF_RESET_WAIT_CNT 2000
41 enum hns3vf_evt_cause {
42 HNS3VF_VECTOR0_EVENT_RST,
43 HNS3VF_VECTOR0_EVENT_MBX,
44 HNS3VF_VECTOR0_EVENT_OTHER,
47 static int hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
48 static int hns3vf_dev_configure_vlan(struct rte_eth_dev *dev);
51 hns3vf_add_mac_addr(struct rte_eth_dev *dev, struct rte_ether_addr *mac_addr,
52 __attribute__ ((unused)) uint32_t idx,
53 __attribute__ ((unused)) uint32_t pool)
55 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
56 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
59 rte_spinlock_lock(&hw->lock);
60 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
61 HNS3_MBX_MAC_VLAN_UC_ADD, mac_addr->addr_bytes,
62 RTE_ETHER_ADDR_LEN, false, NULL, 0);
63 rte_spinlock_unlock(&hw->lock);
65 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
67 hns3_err(hw, "Failed to add mac addr(%s) for vf: %d", mac_str,
75 hns3vf_remove_mac_addr(struct rte_eth_dev *dev, uint32_t idx)
77 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
78 /* index will be checked by upper level rte interface */
79 struct rte_ether_addr *mac_addr = &dev->data->mac_addrs[idx];
80 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
83 rte_spinlock_lock(&hw->lock);
84 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
85 HNS3_MBX_MAC_VLAN_UC_REMOVE,
86 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
88 rte_spinlock_unlock(&hw->lock);
90 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
92 hns3_err(hw, "Failed to remove mac addr(%s) for vf: %d",
98 hns3vf_set_default_mac_addr(struct rte_eth_dev *dev,
99 struct rte_ether_addr *mac_addr)
101 #define HNS3_TWO_ETHER_ADDR_LEN (RTE_ETHER_ADDR_LEN * 2)
102 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
103 struct rte_ether_addr *old_addr;
104 uint8_t addr_bytes[HNS3_TWO_ETHER_ADDR_LEN]; /* for 2 MAC addresses */
105 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
108 if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
109 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
111 hns3_err(hw, "Failed to set mac addr, addr(%s) invalid.",
116 old_addr = (struct rte_ether_addr *)hw->mac.mac_addr;
117 rte_spinlock_lock(&hw->lock);
118 memcpy(addr_bytes, mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN);
119 memcpy(&addr_bytes[RTE_ETHER_ADDR_LEN], old_addr->addr_bytes,
122 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST,
123 HNS3_MBX_MAC_VLAN_UC_MODIFY, addr_bytes,
124 HNS3_TWO_ETHER_ADDR_LEN, false, NULL, 0);
126 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
128 hns3_err(hw, "Failed to set mac addr(%s) for vf: %d", mac_str,
132 rte_ether_addr_copy(mac_addr,
133 (struct rte_ether_addr *)hw->mac.mac_addr);
134 rte_spinlock_unlock(&hw->lock);
140 hns3vf_configure_mac_addr(struct hns3_adapter *hns, bool del)
142 struct hns3_hw *hw = &hns->hw;
143 struct rte_ether_addr *addr;
144 enum hns3_mbx_mac_vlan_subcode opcode;
145 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
150 opcode = HNS3_MBX_MAC_VLAN_UC_REMOVE;
152 opcode = HNS3_MBX_MAC_VLAN_UC_ADD;
153 for (i = 0; i < HNS3_VF_UC_MACADDR_NUM; i++) {
154 addr = &hw->data->mac_addrs[i];
155 if (!rte_is_valid_assigned_ether_addr(addr))
157 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE, addr);
158 hns3_dbg(hw, "rm mac addr: %s", mac_str);
159 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_UNICAST, opcode,
160 addr->addr_bytes, RTE_ETHER_ADDR_LEN,
163 hns3_err(hw, "Failed to remove mac addr for vf: %d",
172 hns3vf_add_mc_mac_addr(struct hns3_adapter *hns,
173 struct rte_ether_addr *mac_addr)
175 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
176 struct hns3_hw *hw = &hns->hw;
179 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
180 HNS3_MBX_MAC_VLAN_MC_ADD,
181 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
184 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
186 hns3_err(hw, "Failed to add mc mac addr(%s) for vf: %d",
195 hns3vf_remove_mc_mac_addr(struct hns3_adapter *hns,
196 struct rte_ether_addr *mac_addr)
198 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
199 struct hns3_hw *hw = &hns->hw;
202 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MULTICAST,
203 HNS3_MBX_MAC_VLAN_MC_REMOVE,
204 mac_addr->addr_bytes, RTE_ETHER_ADDR_LEN, false,
207 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
209 hns3_err(hw, "Failed to remove mc mac addr(%s) for vf: %d",
218 hns3vf_set_mc_mac_addr_list(struct rte_eth_dev *dev,
219 struct rte_ether_addr *mc_addr_set,
222 struct hns3_adapter *hns = dev->data->dev_private;
223 struct hns3_hw *hw = &hns->hw;
224 struct rte_ether_addr *addr;
225 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
232 if (nb_mc_addr > HNS3_MC_MACADDR_NUM) {
233 hns3_err(hw, "Failed to set mc mac addr, nb_mc_addr(%d) "
234 "invalid. valid range: 0~%d",
235 nb_mc_addr, HNS3_MC_MACADDR_NUM);
239 set_addr_num = (int)nb_mc_addr;
240 for (i = 0; i < set_addr_num; i++) {
241 addr = &mc_addr_set[i];
242 if (!rte_is_multicast_ether_addr(addr)) {
243 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
246 "Failed to set mc mac addr, addr(%s) invalid.",
251 rte_spinlock_lock(&hw->lock);
252 cur_addr_num = hw->mc_addrs_num;
253 for (i = 0; i < cur_addr_num; i++) {
254 num = cur_addr_num - i - 1;
255 addr = &hw->mc_addrs[num];
256 ret = hns3vf_remove_mc_mac_addr(hns, addr);
258 rte_spinlock_unlock(&hw->lock);
265 for (i = 0; i < set_addr_num; i++) {
266 addr = &mc_addr_set[i];
267 ret = hns3vf_add_mc_mac_addr(hns, addr);
269 rte_spinlock_unlock(&hw->lock);
273 rte_ether_addr_copy(addr, &hw->mc_addrs[hw->mc_addrs_num]);
276 rte_spinlock_unlock(&hw->lock);
282 hns3vf_configure_all_mc_mac_addr(struct hns3_adapter *hns, bool del)
284 char mac_str[RTE_ETHER_ADDR_FMT_SIZE];
285 struct hns3_hw *hw = &hns->hw;
286 struct rte_ether_addr *addr;
291 for (i = 0; i < hw->mc_addrs_num; i++) {
292 addr = &hw->mc_addrs[i];
293 if (!rte_is_multicast_ether_addr(addr))
296 ret = hns3vf_remove_mc_mac_addr(hns, addr);
298 ret = hns3vf_add_mc_mac_addr(hns, addr);
301 rte_ether_format_addr(mac_str, RTE_ETHER_ADDR_FMT_SIZE,
303 hns3_err(hw, "Failed to %s mc mac addr: %s for vf: %d",
304 del ? "Remove" : "Restore", mac_str, ret);
311 hns3vf_set_promisc_mode(struct hns3_hw *hw, bool en_bc_pmc)
313 struct hns3_mbx_vf_to_pf_cmd *req;
314 struct hns3_cmd_desc desc;
317 req = (struct hns3_mbx_vf_to_pf_cmd *)desc.data;
319 hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_MBX_VF_TO_PF, false);
320 req->msg[0] = HNS3_MBX_SET_PROMISC_MODE;
321 req->msg[1] = en_bc_pmc ? 1 : 0;
323 ret = hns3_cmd_send(hw, &desc, 1);
325 hns3_err(hw, "Set promisc mode fail, status is %d", ret);
331 hns3vf_dev_configure(struct rte_eth_dev *dev)
333 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
334 struct hns3_rss_conf *rss_cfg = &hw->rss_info;
335 struct rte_eth_conf *conf = &dev->data->dev_conf;
336 enum rte_eth_rx_mq_mode mq_mode = conf->rxmode.mq_mode;
337 uint16_t nb_rx_q = dev->data->nb_rx_queues;
338 uint16_t nb_tx_q = dev->data->nb_tx_queues;
339 struct rte_eth_rss_conf rss_conf;
344 * Hardware does not support where the number of rx and tx queues is
345 * not equal in hip08.
347 if (nb_rx_q != nb_tx_q) {
349 "nb_rx_queues(%u) not equal with nb_tx_queues(%u)! "
350 "Hardware does not support this configuration!",
355 if (conf->link_speeds & ETH_LINK_SPEED_FIXED) {
356 hns3_err(hw, "setting link speed/duplex not supported");
360 hw->adapter_state = HNS3_NIC_CONFIGURING;
362 /* When RSS is not configured, redirect the packet queue 0 */
363 if ((uint32_t)mq_mode & ETH_MQ_RX_RSS_FLAG) {
364 rss_conf = conf->rx_adv_conf.rss_conf;
365 if (rss_conf.rss_key == NULL) {
366 rss_conf.rss_key = rss_cfg->key;
367 rss_conf.rss_key_len = HNS3_RSS_KEY_SIZE;
370 ret = hns3_dev_rss_hash_update(dev, &rss_conf);
376 * If jumbo frames are enabled, MTU needs to be refreshed
377 * according to the maximum RX packet length.
379 if (conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
381 * Security of max_rx_pkt_len is guaranteed in dpdk frame.
382 * Maximum value of max_rx_pkt_len is HNS3_MAX_FRAME_LEN, so it
383 * can safely assign to "uint16_t" type variable.
385 mtu = (uint16_t)HNS3_PKTLEN_TO_MTU(conf->rxmode.max_rx_pkt_len);
386 ret = hns3vf_dev_mtu_set(dev, mtu);
389 dev->data->mtu = mtu;
392 ret = hns3vf_dev_configure_vlan(dev);
396 hw->adapter_state = HNS3_NIC_CONFIGURED;
400 hw->adapter_state = HNS3_NIC_INITIALIZED;
405 hns3vf_config_mtu(struct hns3_hw *hw, uint16_t mtu)
409 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_MTU, 0, (const uint8_t *)&mtu,
410 sizeof(mtu), true, NULL, 0);
412 hns3_err(hw, "Failed to set mtu (%u) for vf: %d", mtu, ret);
418 hns3vf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
420 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
421 uint32_t frame_size = mtu + HNS3_ETH_OVERHEAD;
424 if (dev->data->dev_started) {
425 hns3_err(hw, "Failed to set mtu, port %u must be stopped "
426 "before configuration", dev->data->port_id);
430 rte_spinlock_lock(&hw->lock);
431 ret = hns3vf_config_mtu(hw, mtu);
433 rte_spinlock_unlock(&hw->lock);
436 if (frame_size > RTE_ETHER_MAX_LEN)
437 dev->data->dev_conf.rxmode.offloads |=
438 DEV_RX_OFFLOAD_JUMBO_FRAME;
440 dev->data->dev_conf.rxmode.offloads &=
441 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
442 dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
443 rte_spinlock_unlock(&hw->lock);
449 hns3vf_dev_infos_get(struct rte_eth_dev *eth_dev, struct rte_eth_dev_info *info)
451 struct hns3_adapter *hns = eth_dev->data->dev_private;
452 struct hns3_hw *hw = &hns->hw;
454 info->max_rx_queues = hw->tqps_num;
455 info->max_tx_queues = hw->tqps_num;
456 info->max_rx_pktlen = HNS3_MAX_FRAME_LEN; /* CRC included */
457 info->min_rx_bufsize = hw->rx_buf_len;
458 info->max_mac_addrs = HNS3_VF_UC_MACADDR_NUM;
459 info->max_mtu = info->max_rx_pktlen - HNS3_ETH_OVERHEAD;
461 info->rx_offload_capa = (DEV_RX_OFFLOAD_IPV4_CKSUM |
462 DEV_RX_OFFLOAD_UDP_CKSUM |
463 DEV_RX_OFFLOAD_TCP_CKSUM |
464 DEV_RX_OFFLOAD_SCTP_CKSUM |
465 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
466 DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
467 DEV_RX_OFFLOAD_KEEP_CRC |
468 DEV_RX_OFFLOAD_SCATTER |
469 DEV_RX_OFFLOAD_VLAN_STRIP |
470 DEV_RX_OFFLOAD_QINQ_STRIP |
471 DEV_RX_OFFLOAD_VLAN_FILTER |
472 DEV_RX_OFFLOAD_JUMBO_FRAME);
473 info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
474 info->tx_offload_capa = (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
475 DEV_TX_OFFLOAD_IPV4_CKSUM |
476 DEV_TX_OFFLOAD_TCP_CKSUM |
477 DEV_TX_OFFLOAD_UDP_CKSUM |
478 DEV_TX_OFFLOAD_SCTP_CKSUM |
479 DEV_TX_OFFLOAD_VLAN_INSERT |
480 DEV_TX_OFFLOAD_QINQ_INSERT |
481 DEV_TX_OFFLOAD_MULTI_SEGS |
482 info->tx_queue_offload_capa);
484 info->rx_desc_lim = (struct rte_eth_desc_lim) {
485 .nb_max = HNS3_MAX_RING_DESC,
486 .nb_min = HNS3_MIN_RING_DESC,
487 .nb_align = HNS3_ALIGN_RING_DESC,
490 info->tx_desc_lim = (struct rte_eth_desc_lim) {
491 .nb_max = HNS3_MAX_RING_DESC,
492 .nb_min = HNS3_MIN_RING_DESC,
493 .nb_align = HNS3_ALIGN_RING_DESC,
496 info->vmdq_queue_num = 0;
498 info->reta_size = HNS3_RSS_IND_TBL_SIZE;
499 info->hash_key_size = HNS3_RSS_KEY_SIZE;
500 info->flow_type_rss_offloads = HNS3_ETH_RSS_SUPPORT;
501 info->default_rxportconf.ring_size = HNS3_DEFAULT_RING_DESC;
502 info->default_txportconf.ring_size = HNS3_DEFAULT_RING_DESC;
508 hns3vf_clear_event_cause(struct hns3_hw *hw, uint32_t regclr)
510 hns3_write_dev(hw, HNS3_VECTOR0_CMDQ_SRC_REG, regclr);
514 hns3vf_disable_irq0(struct hns3_hw *hw)
516 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 0);
520 hns3vf_enable_irq0(struct hns3_hw *hw)
522 hns3_write_dev(hw, HNS3_MISC_VECTOR_REG_BASE, 1);
525 static enum hns3vf_evt_cause
526 hns3vf_check_event_cause(struct hns3_adapter *hns, uint32_t *clearval)
528 struct hns3_hw *hw = &hns->hw;
529 enum hns3vf_evt_cause ret;
530 uint32_t cmdq_stat_reg;
533 /* Fetch the events from their corresponding regs */
534 cmdq_stat_reg = hns3_read_dev(hw, HNS3_VECTOR0_CMDQ_STAT_REG);
536 /* Check for vector0 mailbox(=CMDQ RX) event source */
537 if (BIT(HNS3_VECTOR0_RX_CMDQ_INT_B) & cmdq_stat_reg) {
538 val = cmdq_stat_reg & ~BIT(HNS3_VECTOR0_RX_CMDQ_INT_B);
539 ret = HNS3VF_VECTOR0_EVENT_MBX;
544 ret = HNS3VF_VECTOR0_EVENT_OTHER;
552 hns3vf_interrupt_handler(void *param)
554 struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
555 struct hns3_adapter *hns = dev->data->dev_private;
556 struct hns3_hw *hw = &hns->hw;
557 enum hns3vf_evt_cause event_cause;
560 if (hw->irq_thread_id == 0)
561 hw->irq_thread_id = pthread_self();
563 /* Disable interrupt */
564 hns3vf_disable_irq0(hw);
566 /* Read out interrupt causes */
567 event_cause = hns3vf_check_event_cause(hns, &clearval);
569 switch (event_cause) {
570 case HNS3VF_VECTOR0_EVENT_MBX:
571 hns3_dev_handle_mbx_msg(hw);
577 /* Clear interrupt causes */
578 hns3vf_clear_event_cause(hw, clearval);
580 /* Enable interrupt */
581 hns3vf_enable_irq0(hw);
585 hns3vf_check_tqp_info(struct hns3_hw *hw)
589 tqps_num = hw->tqps_num;
590 if (tqps_num > HNS3_MAX_TQP_NUM_PER_FUNC || tqps_num == 0) {
591 PMD_INIT_LOG(ERR, "Get invalid tqps_num(%u) from PF. valid "
593 tqps_num, HNS3_MAX_TQP_NUM_PER_FUNC);
597 if (hw->rx_buf_len == 0)
598 hw->rx_buf_len = HNS3_DEFAULT_RX_BUF_LEN;
599 hw->alloc_rss_size = RTE_MIN(hw->rss_size_max, hw->tqps_num);
605 hns3vf_get_queue_info(struct hns3_hw *hw)
607 #define HNS3VF_TQPS_RSS_INFO_LEN 6
608 uint8_t resp_msg[HNS3VF_TQPS_RSS_INFO_LEN];
611 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QINFO, 0, NULL, 0, true,
612 resp_msg, HNS3VF_TQPS_RSS_INFO_LEN);
614 PMD_INIT_LOG(ERR, "Failed to get tqp info from PF: %d", ret);
618 memcpy(&hw->tqps_num, &resp_msg[0], sizeof(uint16_t));
619 memcpy(&hw->rss_size_max, &resp_msg[2], sizeof(uint16_t));
620 memcpy(&hw->rx_buf_len, &resp_msg[4], sizeof(uint16_t));
622 return hns3vf_check_tqp_info(hw);
626 hns3vf_get_queue_depth(struct hns3_hw *hw)
628 #define HNS3VF_TQPS_DEPTH_INFO_LEN 4
629 uint8_t resp_msg[HNS3VF_TQPS_DEPTH_INFO_LEN];
632 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_QDEPTH, 0, NULL, 0, true,
633 resp_msg, HNS3VF_TQPS_DEPTH_INFO_LEN);
635 PMD_INIT_LOG(ERR, "Failed to get tqp depth info from PF: %d",
640 memcpy(&hw->num_tx_desc, &resp_msg[0], sizeof(uint16_t));
641 memcpy(&hw->num_rx_desc, &resp_msg[2], sizeof(uint16_t));
647 hns3vf_get_tc_info(struct hns3_hw *hw)
652 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_TCINFO, 0, NULL, 0,
653 true, &resp_msg, sizeof(resp_msg));
655 hns3_err(hw, "VF request to get TC info from PF failed %d",
660 hw->hw_tc_map = resp_msg;
666 hns3vf_get_configuration(struct hns3_hw *hw)
670 hw->mac.media_type = HNS3_MEDIA_TYPE_NONE;
672 /* Get queue configuration from PF */
673 ret = hns3vf_get_queue_info(hw);
677 /* Get queue depth info from PF */
678 ret = hns3vf_get_queue_depth(hw);
682 /* Get tc configuration from PF */
683 return hns3vf_get_tc_info(hw);
687 hns3vf_set_tc_info(struct hns3_adapter *hns)
689 struct hns3_hw *hw = &hns->hw;
690 uint16_t nb_rx_q = hw->data->nb_rx_queues;
695 for (i = 0; i < HNS3_MAX_TC_NUM; i++)
696 if (hw->hw_tc_map & BIT(i))
699 new_tqps = RTE_MIN(hw->tqps_num, nb_rx_q);
700 hw->alloc_rss_size = RTE_MIN(hw->rss_size_max, new_tqps / hw->num_tc);
701 hw->alloc_tqps = hw->alloc_rss_size * hw->num_tc;
703 hns3_tc_queue_mapping_cfg(hw);
707 hns3vf_request_link_info(struct hns3_hw *hw)
712 if (rte_atomic16_read(&hw->reset.resetting))
714 ret = hns3_send_mbx_msg(hw, HNS3_MBX_GET_LINK_STATUS, 0, NULL, 0, false,
715 &resp_msg, sizeof(resp_msg));
717 hns3_err(hw, "Failed to fetch link status from PF: %d", ret);
721 hns3vf_vlan_filter_configure(struct hns3_adapter *hns, uint16_t vlan_id, int on)
723 #define HNS3VF_VLAN_MBX_MSG_LEN 5
724 struct hns3_hw *hw = &hns->hw;
725 uint8_t msg_data[HNS3VF_VLAN_MBX_MSG_LEN];
726 uint16_t proto = htons(RTE_ETHER_TYPE_VLAN);
727 uint8_t is_kill = on ? 0 : 1;
729 msg_data[0] = is_kill;
730 memcpy(&msg_data[1], &vlan_id, sizeof(vlan_id));
731 memcpy(&msg_data[3], &proto, sizeof(proto));
733 return hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_FILTER,
734 msg_data, HNS3VF_VLAN_MBX_MSG_LEN, true, NULL,
739 hns3vf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
741 struct hns3_adapter *hns = dev->data->dev_private;
742 struct hns3_hw *hw = &hns->hw;
745 rte_spinlock_lock(&hw->lock);
746 ret = hns3vf_vlan_filter_configure(hns, vlan_id, on);
747 rte_spinlock_unlock(&hw->lock);
749 hns3_err(hw, "vf set vlan id failed, vlan_id =%u, ret =%d",
756 hns3vf_en_hw_strip_rxvtag(struct hns3_hw *hw, bool enable)
761 msg_data = enable ? 1 : 0;
762 ret = hns3_send_mbx_msg(hw, HNS3_MBX_SET_VLAN, HNS3_MBX_VLAN_RX_OFF_CFG,
763 &msg_data, sizeof(msg_data), false, NULL, 0);
765 hns3_err(hw, "vf enable strip failed, ret =%d", ret);
771 hns3vf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
773 struct hns3_hw *hw = HNS3_DEV_PRIVATE_TO_HW(dev->data->dev_private);
774 struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
775 unsigned int tmp_mask;
777 tmp_mask = (unsigned int)mask;
778 /* Vlan stripping setting */
779 if (tmp_mask & ETH_VLAN_STRIP_MASK) {
780 rte_spinlock_lock(&hw->lock);
781 /* Enable or disable VLAN stripping */
782 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
783 hns3vf_en_hw_strip_rxvtag(hw, true);
785 hns3vf_en_hw_strip_rxvtag(hw, false);
786 rte_spinlock_unlock(&hw->lock);
793 hns3vf_dev_configure_vlan(struct rte_eth_dev *dev)
795 struct hns3_adapter *hns = dev->data->dev_private;
796 struct rte_eth_dev_data *data = dev->data;
797 struct hns3_hw *hw = &hns->hw;
800 if (data->dev_conf.txmode.hw_vlan_reject_tagged ||
801 data->dev_conf.txmode.hw_vlan_reject_untagged ||
802 data->dev_conf.txmode.hw_vlan_insert_pvid) {
803 hns3_warn(hw, "hw_vlan_reject_tagged, hw_vlan_reject_untagged "
804 "or hw_vlan_insert_pvid is not support!");
807 /* Apply vlan offload setting */
808 ret = hns3vf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
810 hns3_err(hw, "dev config vlan offload failed, ret =%d", ret);
816 hns3vf_set_alive(struct hns3_hw *hw, bool alive)
820 msg_data = alive ? 1 : 0;
821 return hns3_send_mbx_msg(hw, HNS3_MBX_SET_ALIVE, 0, &msg_data,
822 sizeof(msg_data), false, NULL, 0);
826 hns3vf_keep_alive_handler(void *param)
828 struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
829 struct hns3_adapter *hns = eth_dev->data->dev_private;
830 struct hns3_hw *hw = &hns->hw;
834 ret = hns3_send_mbx_msg(hw, HNS3_MBX_KEEP_ALIVE, 0, NULL, 0,
835 false, &respmsg, sizeof(uint8_t));
837 hns3_err(hw, "VF sends keeping alive cmd failed(=%d)",
840 rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
845 hns3vf_service_handler(void *param)
847 struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
848 struct hns3_adapter *hns = eth_dev->data->dev_private;
849 struct hns3_hw *hw = &hns->hw;
851 hns3vf_request_link_info(hw);
853 rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler,
858 hns3vf_init_hardware(struct hns3_adapter *hns)
860 struct hns3_hw *hw = &hns->hw;
861 uint16_t mtu = hw->data->mtu;
864 ret = hns3vf_set_promisc_mode(hw, true);
868 ret = hns3vf_config_mtu(hw, mtu);
870 goto err_init_hardware;
872 ret = hns3vf_vlan_filter_configure(hns, 0, 1);
874 PMD_INIT_LOG(ERR, "Failed to initialize VLAN config: %d", ret);
875 goto err_init_hardware;
878 ret = hns3_config_gro(hw, false);
880 PMD_INIT_LOG(ERR, "Failed to config gro: %d", ret);
881 goto err_init_hardware;
884 ret = hns3vf_set_alive(hw, true);
886 PMD_INIT_LOG(ERR, "Failed to VF send alive to PF: %d", ret);
887 goto err_init_hardware;
890 hns3vf_request_link_info(hw);
894 (void)hns3vf_set_promisc_mode(hw, false);
899 hns3vf_init_vf(struct rte_eth_dev *eth_dev)
901 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
902 struct hns3_adapter *hns = eth_dev->data->dev_private;
903 struct hns3_hw *hw = &hns->hw;
906 PMD_INIT_FUNC_TRACE();
908 /* Get hardware io base address from pcie BAR2 IO space */
909 hw->io_base = pci_dev->mem_resource[2].addr;
911 /* Firmware command queue initialize */
912 ret = hns3_cmd_init_queue(hw);
914 PMD_INIT_LOG(ERR, "Failed to init cmd queue: %d", ret);
915 goto err_cmd_init_queue;
918 /* Firmware command initialize */
919 ret = hns3_cmd_init(hw);
921 PMD_INIT_LOG(ERR, "Failed to init cmd: %d", ret);
925 rte_spinlock_init(&hw->mbx_resp.lock);
927 hns3vf_clear_event_cause(hw, 0);
929 ret = rte_intr_callback_register(&pci_dev->intr_handle,
930 hns3vf_interrupt_handler, eth_dev);
932 PMD_INIT_LOG(ERR, "Failed to register intr: %d", ret);
933 goto err_intr_callback_register;
936 /* Enable interrupt */
937 rte_intr_enable(&pci_dev->intr_handle);
938 hns3vf_enable_irq0(hw);
940 /* Get configuration from PF */
941 ret = hns3vf_get_configuration(hw);
943 PMD_INIT_LOG(ERR, "Failed to fetch configuration: %d", ret);
947 rte_eth_random_addr(hw->mac.mac_addr); /* Generate a random mac addr */
949 ret = hns3vf_init_hardware(hns);
953 hns3_set_default_rss_args(hw);
958 hns3vf_disable_irq0(hw);
959 rte_intr_disable(&pci_dev->intr_handle);
960 hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
962 err_intr_callback_register:
966 hns3_cmd_destroy_queue(hw);
975 hns3vf_uninit_vf(struct rte_eth_dev *eth_dev)
977 struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
978 struct hns3_adapter *hns = eth_dev->data->dev_private;
979 struct hns3_hw *hw = &hns->hw;
981 PMD_INIT_FUNC_TRACE();
983 hns3_rss_uninit(hns);
984 (void)hns3vf_set_alive(hw, false);
985 (void)hns3vf_set_promisc_mode(hw, false);
986 hns3vf_disable_irq0(hw);
987 rte_intr_disable(&pci_dev->intr_handle);
988 hns3_intr_unregister(&pci_dev->intr_handle, hns3vf_interrupt_handler,
991 hns3_cmd_destroy_queue(hw);
996 hns3vf_do_stop(struct hns3_adapter *hns)
998 struct hns3_hw *hw = &hns->hw;
1000 hw->mac.link_status = ETH_LINK_DOWN;
1002 hns3vf_configure_mac_addr(hns, true);
1008 hns3vf_dev_stop(struct rte_eth_dev *eth_dev)
1010 struct hns3_adapter *hns = eth_dev->data->dev_private;
1011 struct hns3_hw *hw = &hns->hw;
1013 PMD_INIT_FUNC_TRACE();
1015 hw->adapter_state = HNS3_NIC_STOPPING;
1016 hns3_set_rxtx_function(eth_dev);
1018 rte_spinlock_lock(&hw->lock);
1019 hns3vf_do_stop(hns);
1020 hns3_dev_release_mbufs(hns);
1021 hw->adapter_state = HNS3_NIC_CONFIGURED;
1022 rte_spinlock_unlock(&hw->lock);
1026 hns3vf_dev_close(struct rte_eth_dev *eth_dev)
1028 struct hns3_adapter *hns = eth_dev->data->dev_private;
1029 struct hns3_hw *hw = &hns->hw;
1031 if (hw->adapter_state == HNS3_NIC_STARTED)
1032 hns3vf_dev_stop(eth_dev);
1034 hw->adapter_state = HNS3_NIC_CLOSING;
1035 rte_eal_alarm_cancel(hns3vf_keep_alive_handler, eth_dev);
1036 rte_eal_alarm_cancel(hns3vf_service_handler, eth_dev);
1037 hns3vf_configure_all_mc_mac_addr(hns, true);
1038 hns3vf_uninit_vf(eth_dev);
1039 hns3_free_all_queues(eth_dev);
1040 rte_free(eth_dev->process_private);
1041 eth_dev->process_private = NULL;
1042 hw->adapter_state = HNS3_NIC_CLOSED;
1043 hns3_warn(hw, "Close port %d finished", hw->data->port_id);
1047 hns3vf_dev_link_update(struct rte_eth_dev *eth_dev,
1048 __rte_unused int wait_to_complete)
1050 struct hns3_adapter *hns = eth_dev->data->dev_private;
1051 struct hns3_hw *hw = &hns->hw;
1052 struct hns3_mac *mac = &hw->mac;
1053 struct rte_eth_link new_link;
1055 hns3vf_request_link_info(hw);
1057 memset(&new_link, 0, sizeof(new_link));
1058 switch (mac->link_speed) {
1059 case ETH_SPEED_NUM_10M:
1060 case ETH_SPEED_NUM_100M:
1061 case ETH_SPEED_NUM_1G:
1062 case ETH_SPEED_NUM_10G:
1063 case ETH_SPEED_NUM_25G:
1064 case ETH_SPEED_NUM_40G:
1065 case ETH_SPEED_NUM_50G:
1066 case ETH_SPEED_NUM_100G:
1067 new_link.link_speed = mac->link_speed;
1070 new_link.link_speed = ETH_SPEED_NUM_100M;
1074 new_link.link_duplex = mac->link_duplex;
1075 new_link.link_status = mac->link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
1076 new_link.link_autoneg =
1077 !(eth_dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED);
1079 return rte_eth_linkstatus_set(eth_dev, &new_link);
1083 hns3vf_do_start(struct hns3_adapter *hns, bool reset_queue)
1085 struct hns3_hw *hw = &hns->hw;
1088 hns3vf_set_tc_info(hns);
1090 ret = hns3_start_queues(hns, reset_queue);
1092 hns3_err(hw, "Failed to start queues: %d", ret);
1100 hns3vf_dev_start(struct rte_eth_dev *eth_dev)
1102 struct hns3_adapter *hns = eth_dev->data->dev_private;
1103 struct hns3_hw *hw = &hns->hw;
1106 PMD_INIT_FUNC_TRACE();
1107 rte_spinlock_lock(&hw->lock);
1108 hw->adapter_state = HNS3_NIC_STARTING;
1109 ret = hns3vf_do_start(hns, true);
1111 hw->adapter_state = HNS3_NIC_CONFIGURED;
1112 rte_spinlock_unlock(&hw->lock);
1115 hw->adapter_state = HNS3_NIC_STARTED;
1116 rte_spinlock_unlock(&hw->lock);
1117 hns3_set_rxtx_function(eth_dev);
1121 static const struct eth_dev_ops hns3vf_eth_dev_ops = {
1122 .dev_start = hns3vf_dev_start,
1123 .dev_stop = hns3vf_dev_stop,
1124 .dev_close = hns3vf_dev_close,
1125 .mtu_set = hns3vf_dev_mtu_set,
1126 .dev_infos_get = hns3vf_dev_infos_get,
1127 .rx_queue_setup = hns3_rx_queue_setup,
1128 .tx_queue_setup = hns3_tx_queue_setup,
1129 .rx_queue_release = hns3_dev_rx_queue_release,
1130 .tx_queue_release = hns3_dev_tx_queue_release,
1131 .dev_configure = hns3vf_dev_configure,
1132 .mac_addr_add = hns3vf_add_mac_addr,
1133 .mac_addr_remove = hns3vf_remove_mac_addr,
1134 .mac_addr_set = hns3vf_set_default_mac_addr,
1135 .set_mc_addr_list = hns3vf_set_mc_mac_addr_list,
1136 .link_update = hns3vf_dev_link_update,
1137 .rss_hash_update = hns3_dev_rss_hash_update,
1138 .rss_hash_conf_get = hns3_dev_rss_hash_conf_get,
1139 .reta_update = hns3_dev_rss_reta_update,
1140 .reta_query = hns3_dev_rss_reta_query,
1141 .filter_ctrl = hns3_dev_filter_ctrl,
1142 .vlan_filter_set = hns3vf_vlan_filter_set,
1143 .vlan_offload_set = hns3vf_vlan_offload_set,
1144 .get_reg = hns3_get_regs,
1145 .dev_supported_ptypes_get = hns3_dev_supported_ptypes_get,
1149 hns3vf_dev_init(struct rte_eth_dev *eth_dev)
1151 struct hns3_adapter *hns = eth_dev->data->dev_private;
1152 struct hns3_hw *hw = &hns->hw;
1155 PMD_INIT_FUNC_TRACE();
1157 eth_dev->process_private = (struct hns3_process_private *)
1158 rte_zmalloc_socket("hns3_filter_list",
1159 sizeof(struct hns3_process_private),
1160 RTE_CACHE_LINE_SIZE, eth_dev->device->numa_node);
1161 if (eth_dev->process_private == NULL) {
1162 PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
1166 /* initialize flow filter lists */
1167 hns3_filterlist_init(eth_dev);
1169 hns3_set_rxtx_function(eth_dev);
1170 eth_dev->dev_ops = &hns3vf_eth_dev_ops;
1171 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1174 hw->adapter_state = HNS3_NIC_UNINITIALIZED;
1176 hw->data = eth_dev->data;
1178 ret = hns3vf_init_vf(eth_dev);
1180 PMD_INIT_LOG(ERR, "Failed to init vf: %d", ret);
1184 /* Allocate memory for storing MAC addresses */
1185 eth_dev->data->mac_addrs = rte_zmalloc("hns3vf-mac",
1186 sizeof(struct rte_ether_addr) *
1187 HNS3_VF_UC_MACADDR_NUM, 0);
1188 if (eth_dev->data->mac_addrs == NULL) {
1189 PMD_INIT_LOG(ERR, "Failed to allocate %zx bytes needed "
1190 "to store MAC addresses",
1191 sizeof(struct rte_ether_addr) *
1192 HNS3_VF_UC_MACADDR_NUM);
1194 goto err_rte_zmalloc;
1197 rte_ether_addr_copy((struct rte_ether_addr *)hw->mac.mac_addr,
1198 ð_dev->data->mac_addrs[0]);
1199 hw->adapter_state = HNS3_NIC_INITIALIZED;
1201 * Pass the information to the rte_eth_dev_close() that it should also
1202 * release the private port resources.
1204 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1206 rte_eal_alarm_set(HNS3VF_KEEP_ALIVE_INTERVAL, hns3vf_keep_alive_handler,
1208 rte_eal_alarm_set(HNS3VF_SERVICE_INTERVAL, hns3vf_service_handler,
1213 hns3vf_uninit_vf(eth_dev);
1216 eth_dev->dev_ops = NULL;
1217 eth_dev->rx_pkt_burst = NULL;
1218 eth_dev->tx_pkt_burst = NULL;
1219 eth_dev->tx_pkt_prepare = NULL;
1220 rte_free(eth_dev->process_private);
1221 eth_dev->process_private = NULL;
1227 hns3vf_dev_uninit(struct rte_eth_dev *eth_dev)
1229 struct hns3_adapter *hns = eth_dev->data->dev_private;
1230 struct hns3_hw *hw = &hns->hw;
1232 PMD_INIT_FUNC_TRACE();
1234 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1237 eth_dev->dev_ops = NULL;
1238 eth_dev->rx_pkt_burst = NULL;
1239 eth_dev->tx_pkt_burst = NULL;
1240 eth_dev->tx_pkt_prepare = NULL;
1242 if (hw->adapter_state < HNS3_NIC_CLOSING)
1243 hns3vf_dev_close(eth_dev);
1245 hw->adapter_state = HNS3_NIC_REMOVED;
1250 eth_hns3vf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1251 struct rte_pci_device *pci_dev)
1253 return rte_eth_dev_pci_generic_probe(pci_dev,
1254 sizeof(struct hns3_adapter),
1259 eth_hns3vf_pci_remove(struct rte_pci_device *pci_dev)
1261 return rte_eth_dev_pci_generic_remove(pci_dev, hns3vf_dev_uninit);
1264 static const struct rte_pci_id pci_id_hns3vf_map[] = {
1265 { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_VF) },
1266 { RTE_PCI_DEVICE(PCI_VENDOR_ID_HUAWEI, HNS3_DEV_ID_100G_RDMA_PFC_VF) },
1267 { .vendor_id = 0, /* sentinel */ },
1270 static struct rte_pci_driver rte_hns3vf_pmd = {
1271 .id_table = pci_id_hns3vf_map,
1272 .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
1273 .probe = eth_hns3vf_pci_probe,
1274 .remove = eth_hns3vf_pci_remove,
1277 RTE_PMD_REGISTER_PCI(net_hns3_vf, rte_hns3vf_pmd);
1278 RTE_PMD_REGISTER_PCI_TABLE(net_hns3_vf, pci_id_hns3vf_map);
1279 RTE_PMD_REGISTER_KMOD_DEP(net_hns3_vf, "* igb_uio | vfio-pci");