4 * Copyright 2012-2017 6WIND S.A.
5 * Copyright 2012-2017 Mellanox.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of 6WIND S.A. nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * - RSS hash key and options cannot be modified.
37 * - Hardware counters aren't implemented.
51 #include <arpa/inet.h>
54 #include <sys/ioctl.h>
55 #include <sys/socket.h>
56 #include <netinet/in.h>
57 #include <linux/ethtool.h>
58 #include <linux/sockios.h>
61 #include <rte_ether.h>
62 #include <rte_ethdev.h>
65 #include <rte_errno.h>
66 #include <rte_mempool.h>
67 #include <rte_prefetch.h>
68 #include <rte_malloc.h>
69 #include <rte_spinlock.h>
70 #include <rte_atomic.h>
71 #include <rte_version.h>
73 #include <rte_alarm.h>
74 #include <rte_memory.h>
77 /* Generated configuration header. */
78 #include "mlx4_autoconf.h"
82 #include "mlx4_flow.h"
84 /* Convenience macros for accessing mbuf fields. */
85 #define NEXT(m) ((m)->next)
86 #define DATA_LEN(m) ((m)->data_len)
87 #define PKT_LEN(m) ((m)->pkt_len)
88 #define DATA_OFF(m) ((m)->data_off)
89 #define SET_DATA_OFF(m, o) ((m)->data_off = (o))
90 #define NB_SEGS(m) ((m)->nb_segs)
91 #define PORT(m) ((m)->port)
93 /* Work Request ID data type (64 bit). */
102 #define WR_ID(o) (((wr_id_t *)&(o))->data)
104 /* Transpose flags. Useful to convert IBV to DPDK flags. */
105 #define TRANSPOSE(val, from, to) \
106 (((from) >= (to)) ? \
107 (((val) & (from)) / ((from) / (to))) : \
108 (((val) & (from)) * ((to) / (from))))
110 /* Local storage for secondary process data. */
111 struct mlx4_secondary_data {
112 struct rte_eth_dev_data data; /* Local device data. */
113 struct priv *primary_priv; /* Private structure from primary. */
114 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
115 rte_spinlock_t lock; /* Port configuration lock. */
116 } mlx4_secondary_data[RTE_MAX_ETHPORTS];
119 * Check if running as a secondary process.
122 * Nonzero if running as a secondary process.
125 mlx4_is_secondary(void)
127 return rte_eal_process_type() != RTE_PROC_PRIMARY;
131 * Return private structure associated with an Ethernet device.
134 * Pointer to Ethernet device structure.
137 * Pointer to private structure.
140 mlx4_get_priv(struct rte_eth_dev *dev)
142 struct mlx4_secondary_data *sd;
144 if (!mlx4_is_secondary())
145 return dev->data->dev_private;
146 sd = &mlx4_secondary_data[dev->data->port_id];
147 return sd->data.dev_private;
151 * Lock private structure to protect it from concurrent access in the
155 * Pointer to private structure.
157 void priv_lock(struct priv *priv)
159 rte_spinlock_lock(&priv->lock);
163 * Unlock private structure.
166 * Pointer to private structure.
168 void priv_unlock(struct priv *priv)
170 rte_spinlock_unlock(&priv->lock);
173 /* Allocate a buffer on the stack and fill it with a printf format string. */
174 #define MKSTR(name, ...) \
175 char name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \
177 snprintf(name, sizeof(name), __VA_ARGS__)
180 * Get interface name from private structure.
183 * Pointer to private structure.
185 * Interface name output buffer.
188 * 0 on success, -1 on failure and errno is set.
191 priv_get_ifname(const struct priv *priv, char (*ifname)[IF_NAMESIZE])
195 unsigned int dev_type = 0;
196 unsigned int dev_port_prev = ~0u;
197 char match[IF_NAMESIZE] = "";
200 MKSTR(path, "%s/device/net", priv->ctx->device->ibdev_path);
206 while ((dent = readdir(dir)) != NULL) {
207 char *name = dent->d_name;
209 unsigned int dev_port;
212 if ((name[0] == '.') &&
213 ((name[1] == '\0') ||
214 ((name[1] == '.') && (name[2] == '\0'))))
217 MKSTR(path, "%s/device/net/%s/%s",
218 priv->ctx->device->ibdev_path, name,
219 (dev_type ? "dev_id" : "dev_port"));
221 file = fopen(path, "rb");
226 * Switch to dev_id when dev_port does not exist as
227 * is the case with Linux kernel versions < 3.15.
238 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
243 * Switch to dev_id when dev_port returns the same value for
244 * all ports. May happen when using a MOFED release older than
245 * 3.0 with a Linux kernel >= 3.15.
247 if (dev_port == dev_port_prev)
249 dev_port_prev = dev_port;
250 if (dev_port == (priv->port - 1u))
251 snprintf(match, sizeof(match), "%s", name);
254 if (match[0] == '\0')
256 strncpy(*ifname, match, sizeof(*ifname));
261 * Read from sysfs entry.
264 * Pointer to private structure.
266 * Entry name relative to sysfs path.
268 * Data output buffer.
273 * 0 on success, -1 on failure and errno is set.
276 priv_sysfs_read(const struct priv *priv, const char *entry,
277 char *buf, size_t size)
279 char ifname[IF_NAMESIZE];
284 if (priv_get_ifname(priv, &ifname))
287 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
290 file = fopen(path, "rb");
293 ret = fread(buf, 1, size, file);
295 if (((size_t)ret < size) && (ferror(file)))
305 * Write to sysfs entry.
308 * Pointer to private structure.
310 * Entry name relative to sysfs path.
317 * 0 on success, -1 on failure and errno is set.
320 priv_sysfs_write(const struct priv *priv, const char *entry,
321 char *buf, size_t size)
323 char ifname[IF_NAMESIZE];
328 if (priv_get_ifname(priv, &ifname))
331 MKSTR(path, "%s/device/net/%s/%s", priv->ctx->device->ibdev_path,
334 file = fopen(path, "wb");
337 ret = fwrite(buf, 1, size, file);
339 if (((size_t)ret < size) || (ferror(file)))
349 * Get unsigned long sysfs property.
352 * Pointer to private structure.
354 * Entry name relative to sysfs path.
356 * Value output buffer.
359 * 0 on success, -1 on failure and errno is set.
362 priv_get_sysfs_ulong(struct priv *priv, const char *name, unsigned long *value)
365 unsigned long value_ret;
368 ret = priv_sysfs_read(priv, name, value_str, (sizeof(value_str) - 1));
370 DEBUG("cannot read %s value from sysfs: %s",
371 name, strerror(errno));
374 value_str[ret] = '\0';
376 value_ret = strtoul(value_str, NULL, 0);
378 DEBUG("invalid %s value `%s': %s", name, value_str,
387 * Set unsigned long sysfs property.
390 * Pointer to private structure.
392 * Entry name relative to sysfs path.
397 * 0 on success, -1 on failure and errno is set.
400 priv_set_sysfs_ulong(struct priv *priv, const char *name, unsigned long value)
403 MKSTR(value_str, "%lu", value);
405 ret = priv_sysfs_write(priv, name, value_str, (sizeof(value_str) - 1));
407 DEBUG("cannot write %s `%s' (%lu) to sysfs: %s",
408 name, value_str, value, strerror(errno));
415 * Perform ifreq ioctl() on associated Ethernet device.
418 * Pointer to private structure.
420 * Request number to pass to ioctl().
422 * Interface request structure output buffer.
425 * 0 on success, -1 on failure and errno is set.
428 priv_ifreq(const struct priv *priv, int req, struct ifreq *ifr)
430 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
435 if (priv_get_ifname(priv, &ifr->ifr_name) == 0)
436 ret = ioctl(sock, req, ifr);
445 * Pointer to private structure.
447 * MTU value output buffer.
450 * 0 on success, -1 on failure and errno is set.
453 priv_get_mtu(struct priv *priv, uint16_t *mtu)
455 unsigned long ulong_mtu;
457 if (priv_get_sysfs_ulong(priv, "mtu", &ulong_mtu) == -1)
467 * Pointer to private structure.
472 * 0 on success, -1 on failure and errno is set.
475 priv_set_mtu(struct priv *priv, uint16_t mtu)
479 if (priv_set_sysfs_ulong(priv, "mtu", mtu) ||
480 priv_get_mtu(priv, &new_mtu))
492 * Pointer to private structure.
494 * Bitmask for flags that must remain untouched.
496 * Bitmask for flags to modify.
499 * 0 on success, -1 on failure and errno is set.
502 priv_set_flags(struct priv *priv, unsigned int keep, unsigned int flags)
506 if (priv_get_sysfs_ulong(priv, "flags", &tmp) == -1)
509 tmp |= (flags & (~keep));
510 return priv_set_sysfs_ulong(priv, "flags", tmp);
513 /* Device configuration. */
516 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
517 unsigned int socket, const struct rte_eth_txconf *conf);
520 txq_cleanup(struct txq *txq);
523 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
524 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
525 struct rte_mempool *mp);
528 rxq_cleanup(struct rxq *rxq);
531 * Ethernet device configuration.
533 * Prepare the driver for a given number of TX and RX queues.
534 * Allocate parent RSS queue when several RX queues are requested.
537 * Pointer to Ethernet device structure.
540 * 0 on success, errno value on failure.
543 dev_configure(struct rte_eth_dev *dev)
545 struct priv *priv = dev->data->dev_private;
546 unsigned int rxqs_n = dev->data->nb_rx_queues;
547 unsigned int txqs_n = dev->data->nb_tx_queues;
551 priv->rxqs = (void *)dev->data->rx_queues;
552 priv->txqs = (void *)dev->data->tx_queues;
553 if (txqs_n != priv->txqs_n) {
554 INFO("%p: TX queues number update: %u -> %u",
555 (void *)dev, priv->txqs_n, txqs_n);
556 priv->txqs_n = txqs_n;
558 if (rxqs_n == priv->rxqs_n)
560 if (!rte_is_power_of_2(rxqs_n)) {
563 n_active = rte_align32pow2(rxqs_n + 1) >> 1;
564 WARN("%p: number of RX queues must be a power"
565 " of 2: %u queues among %u will be active",
566 (void *)dev, n_active, rxqs_n);
569 INFO("%p: RX queues number update: %u -> %u",
570 (void *)dev, priv->rxqs_n, rxqs_n);
571 /* If RSS is enabled, disable it first. */
575 /* Only if there are no remaining child RX queues. */
576 for (i = 0; (i != priv->rxqs_n); ++i)
577 if ((*priv->rxqs)[i] != NULL)
579 rxq_cleanup(&priv->rxq_parent);
584 /* Nothing else to do. */
585 priv->rxqs_n = rxqs_n;
588 /* Allocate a new RSS parent queue if supported by hardware. */
590 ERROR("%p: only a single RX queue can be configured when"
591 " hardware doesn't support RSS",
595 /* Fail if hardware doesn't support that many RSS queues. */
596 if (rxqs_n >= priv->max_rss_tbl_sz) {
597 ERROR("%p: only %u RX queues can be configured for RSS",
598 (void *)dev, priv->max_rss_tbl_sz);
603 priv->rxqs_n = rxqs_n;
604 ret = rxq_setup(dev, &priv->rxq_parent, 0, 0, 0, NULL, NULL);
607 /* Failure, rollback. */
615 * DPDK callback for Ethernet device configuration.
618 * Pointer to Ethernet device structure.
621 * 0 on success, negative errno value on failure.
624 mlx4_dev_configure(struct rte_eth_dev *dev)
626 struct priv *priv = dev->data->dev_private;
629 if (mlx4_is_secondary())
630 return -E_RTE_SECONDARY;
632 ret = dev_configure(dev);
638 static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);
639 static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);
642 * Configure secondary process queues from a private data pointer (primary
643 * or secondary) and update burst callbacks. Can take place only once.
645 * All queues must have been previously created by the primary process to
646 * avoid undefined behavior.
649 * Private data pointer from either primary or secondary process.
652 * Private data pointer from secondary process, NULL in case of error.
655 mlx4_secondary_data_setup(struct priv *priv)
657 unsigned int port_id = 0;
658 struct mlx4_secondary_data *sd;
661 unsigned int nb_tx_queues;
662 unsigned int nb_rx_queues;
665 /* priv must be valid at this point. */
666 assert(priv != NULL);
667 /* priv->dev must also be valid but may point to local memory from
668 * another process, possibly with the same address and must not
669 * be dereferenced yet. */
670 assert(priv->dev != NULL);
671 /* Determine port ID by finding out where priv comes from. */
673 sd = &mlx4_secondary_data[port_id];
674 rte_spinlock_lock(&sd->lock);
675 /* Primary process? */
676 if (sd->primary_priv == priv)
678 /* Secondary process? */
679 if (sd->data.dev_private == priv)
681 rte_spinlock_unlock(&sd->lock);
682 if (++port_id == RTE_DIM(mlx4_secondary_data))
685 /* Switch to secondary private structure. If private data has already
686 * been updated by another thread, there is nothing else to do. */
687 priv = sd->data.dev_private;
688 if (priv->dev->data == &sd->data)
690 /* Sanity checks. Secondary private structure is supposed to point
691 * to local eth_dev, itself still pointing to the shared device data
692 * structure allocated by the primary process. */
693 assert(sd->shared_dev_data != &sd->data);
694 assert(sd->data.nb_tx_queues == 0);
695 assert(sd->data.tx_queues == NULL);
696 assert(sd->data.nb_rx_queues == 0);
697 assert(sd->data.rx_queues == NULL);
698 assert(priv != sd->primary_priv);
699 assert(priv->dev->data == sd->shared_dev_data);
700 assert(priv->txqs_n == 0);
701 assert(priv->txqs == NULL);
702 assert(priv->rxqs_n == 0);
703 assert(priv->rxqs == NULL);
704 nb_tx_queues = sd->shared_dev_data->nb_tx_queues;
705 nb_rx_queues = sd->shared_dev_data->nb_rx_queues;
706 /* Allocate local storage for queues. */
707 tx_queues = rte_zmalloc("secondary ethdev->tx_queues",
708 sizeof(sd->data.tx_queues[0]) * nb_tx_queues,
709 RTE_CACHE_LINE_SIZE);
710 rx_queues = rte_zmalloc("secondary ethdev->rx_queues",
711 sizeof(sd->data.rx_queues[0]) * nb_rx_queues,
712 RTE_CACHE_LINE_SIZE);
713 if (tx_queues == NULL || rx_queues == NULL)
715 /* Lock to prevent control operations during setup. */
718 for (i = 0; i != nb_tx_queues; ++i) {
719 struct txq *primary_txq = (*sd->primary_priv->txqs)[i];
722 if (primary_txq == NULL)
724 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0,
725 primary_txq->socket);
727 if (txq_setup(priv->dev,
729 primary_txq->elts_n * MLX4_PMD_SGE_WR_N,
732 txq->stats.idx = primary_txq->stats.idx;
739 txq = tx_queues[--i];
746 for (i = 0; i != nb_rx_queues; ++i) {
747 struct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];
749 if (primary_rxq == NULL)
751 /* Not supported yet. */
754 /* Update everything. */
755 priv->txqs = (void *)tx_queues;
756 priv->txqs_n = nb_tx_queues;
757 priv->rxqs = (void *)rx_queues;
758 priv->rxqs_n = nb_rx_queues;
759 sd->data.rx_queues = rx_queues;
760 sd->data.tx_queues = tx_queues;
761 sd->data.nb_rx_queues = nb_rx_queues;
762 sd->data.nb_tx_queues = nb_tx_queues;
763 sd->data.dev_link = sd->shared_dev_data->dev_link;
764 sd->data.mtu = sd->shared_dev_data->mtu;
765 memcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,
766 sizeof(sd->data.rx_queue_state));
767 memcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,
768 sizeof(sd->data.tx_queue_state));
769 sd->data.dev_flags = sd->shared_dev_data->dev_flags;
770 /* Use local data from now on. */
772 priv->dev->data = &sd->data;
774 priv->dev->tx_pkt_burst = mlx4_tx_burst;
775 priv->dev->rx_pkt_burst = removed_rx_burst;
778 /* More sanity checks. */
779 assert(priv->dev->tx_pkt_burst == mlx4_tx_burst);
780 assert(priv->dev->rx_pkt_burst == removed_rx_burst);
781 assert(priv->dev->data == &sd->data);
782 rte_spinlock_unlock(&sd->lock);
788 rte_spinlock_unlock(&sd->lock);
792 /* TX queues handling. */
795 * Allocate TX queue elements.
798 * Pointer to TX queue structure.
800 * Number of elements to allocate.
803 * 0 on success, errno value on failure.
806 txq_alloc_elts(struct txq *txq, unsigned int elts_n)
809 struct txq_elt (*elts)[elts_n] =
810 rte_calloc_socket("TXQ", 1, sizeof(*elts), 0, txq->socket);
811 linear_t (*elts_linear)[elts_n] =
812 rte_calloc_socket("TXQ", 1, sizeof(*elts_linear), 0,
814 struct ibv_mr *mr_linear = NULL;
817 if ((elts == NULL) || (elts_linear == NULL)) {
818 ERROR("%p: can't allocate packets array", (void *)txq);
823 ibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),
824 IBV_ACCESS_LOCAL_WRITE);
825 if (mr_linear == NULL) {
826 ERROR("%p: unable to configure MR, ibv_reg_mr() failed",
831 for (i = 0; (i != elts_n); ++i) {
832 struct txq_elt *elt = &(*elts)[i];
836 DEBUG("%p: allocated and configured %u WRs", (void *)txq, elts_n);
837 txq->elts_n = elts_n;
842 /* Request send completion every MLX4_PMD_TX_PER_COMP_REQ packets or
843 * at least 4 times per ring. */
844 txq->elts_comp_cd_init =
845 ((MLX4_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?
846 MLX4_PMD_TX_PER_COMP_REQ : (elts_n / 4));
847 txq->elts_comp_cd = txq->elts_comp_cd_init;
848 txq->elts_linear = elts_linear;
849 txq->mr_linear = mr_linear;
853 if (mr_linear != NULL)
854 claim_zero(ibv_dereg_mr(mr_linear));
856 rte_free(elts_linear);
859 DEBUG("%p: failed, freed everything", (void *)txq);
865 * Free TX queue elements.
868 * Pointer to TX queue structure.
871 txq_free_elts(struct txq *txq)
873 unsigned int elts_n = txq->elts_n;
874 unsigned int elts_head = txq->elts_head;
875 unsigned int elts_tail = txq->elts_tail;
876 struct txq_elt (*elts)[elts_n] = txq->elts;
877 linear_t (*elts_linear)[elts_n] = txq->elts_linear;
878 struct ibv_mr *mr_linear = txq->mr_linear;
880 DEBUG("%p: freeing WRs", (void *)txq);
885 txq->elts_comp_cd = 0;
886 txq->elts_comp_cd_init = 0;
888 txq->elts_linear = NULL;
889 txq->mr_linear = NULL;
890 if (mr_linear != NULL)
891 claim_zero(ibv_dereg_mr(mr_linear));
893 rte_free(elts_linear);
896 while (elts_tail != elts_head) {
897 struct txq_elt *elt = &(*elts)[elts_tail];
899 assert(elt->buf != NULL);
900 rte_pktmbuf_free(elt->buf);
903 memset(elt, 0x77, sizeof(*elt));
905 if (++elts_tail == elts_n)
913 * Clean up a TX queue.
915 * Destroy objects, free allocated memory and reset the structure for reuse.
918 * Pointer to TX queue structure.
921 txq_cleanup(struct txq *txq)
923 struct ibv_exp_release_intf_params params;
926 DEBUG("cleaning up %p", (void *)txq);
928 if (txq->if_qp != NULL) {
929 assert(txq->priv != NULL);
930 assert(txq->priv->ctx != NULL);
931 assert(txq->qp != NULL);
932 params = (struct ibv_exp_release_intf_params){
935 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
939 if (txq->if_cq != NULL) {
940 assert(txq->priv != NULL);
941 assert(txq->priv->ctx != NULL);
942 assert(txq->cq != NULL);
943 params = (struct ibv_exp_release_intf_params){
946 claim_zero(ibv_exp_release_intf(txq->priv->ctx,
951 claim_zero(ibv_destroy_qp(txq->qp));
953 claim_zero(ibv_destroy_cq(txq->cq));
954 if (txq->rd != NULL) {
955 struct ibv_exp_destroy_res_domain_attr attr = {
959 assert(txq->priv != NULL);
960 assert(txq->priv->ctx != NULL);
961 claim_zero(ibv_exp_destroy_res_domain(txq->priv->ctx,
965 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
966 if (txq->mp2mr[i].mp == NULL)
968 assert(txq->mp2mr[i].mr != NULL);
969 claim_zero(ibv_dereg_mr(txq->mp2mr[i].mr));
971 memset(txq, 0, sizeof(*txq));
975 * Manage TX completions.
977 * When sending a burst, mlx4_tx_burst() posts several WRs.
978 * To improve performance, a completion event is only required once every
979 * MLX4_PMD_TX_PER_COMP_REQ sends. Doing so discards completion information
980 * for other WRs, but this information would not be used anyway.
983 * Pointer to TX queue structure.
986 * 0 on success, -1 on failure.
989 txq_complete(struct txq *txq)
991 unsigned int elts_comp = txq->elts_comp;
992 unsigned int elts_tail = txq->elts_tail;
993 const unsigned int elts_n = txq->elts_n;
996 if (unlikely(elts_comp == 0))
999 DEBUG("%p: processing %u work requests completions",
1000 (void *)txq, elts_comp);
1002 wcs_n = txq->if_cq->poll_cnt(txq->cq, elts_comp);
1003 if (unlikely(wcs_n == 0))
1005 if (unlikely(wcs_n < 0)) {
1006 DEBUG("%p: ibv_poll_cq() failed (wcs_n=%d)",
1007 (void *)txq, wcs_n);
1011 assert(elts_comp <= txq->elts_comp);
1013 * Assume WC status is successful as nothing can be done about it
1016 elts_tail += wcs_n * txq->elts_comp_cd_init;
1017 if (elts_tail >= elts_n)
1018 elts_tail -= elts_n;
1019 txq->elts_tail = elts_tail;
1020 txq->elts_comp = elts_comp;
1024 struct mlx4_check_mempool_data {
1030 /* Called by mlx4_check_mempool() when iterating the memory chunks. */
1031 static void mlx4_check_mempool_cb(struct rte_mempool *mp,
1032 void *opaque, struct rte_mempool_memhdr *memhdr,
1035 struct mlx4_check_mempool_data *data = opaque;
1040 /* It already failed, skip the next chunks. */
1043 /* It is the first chunk. */
1044 if (data->start == NULL && data->end == NULL) {
1045 data->start = memhdr->addr;
1046 data->end = data->start + memhdr->len;
1049 if (data->end == memhdr->addr) {
1050 data->end += memhdr->len;
1053 if (data->start == (char *)memhdr->addr + memhdr->len) {
1054 data->start -= memhdr->len;
1057 /* Error, mempool is not virtually contigous. */
1062 * Check if a mempool can be used: it must be virtually contiguous.
1065 * Pointer to memory pool.
1067 * Pointer to the start address of the mempool virtual memory area
1069 * Pointer to the end address of the mempool virtual memory area
1072 * 0 on success (mempool is virtually contiguous), -1 on error.
1074 static int mlx4_check_mempool(struct rte_mempool *mp, uintptr_t *start,
1077 struct mlx4_check_mempool_data data;
1079 memset(&data, 0, sizeof(data));
1080 rte_mempool_mem_iter(mp, mlx4_check_mempool_cb, &data);
1081 *start = (uintptr_t)data.start;
1082 *end = (uintptr_t)data.end;
1087 /* For best performance, this function should not be inlined. */
1088 static struct ibv_mr *mlx4_mp2mr(struct ibv_pd *, struct rte_mempool *)
1089 __attribute__((noinline));
1092 * Register mempool as a memory region.
1095 * Pointer to protection domain.
1097 * Pointer to memory pool.
1100 * Memory region pointer, NULL in case of error.
1102 static struct ibv_mr *
1103 mlx4_mp2mr(struct ibv_pd *pd, struct rte_mempool *mp)
1105 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
1110 if (mlx4_check_mempool(mp, &start, &end) != 0) {
1111 ERROR("mempool %p: not virtually contiguous",
1116 DEBUG("mempool %p area start=%p end=%p size=%zu",
1117 (void *)mp, (void *)start, (void *)end,
1118 (size_t)(end - start));
1119 /* Round start and end to page boundary if found in memory segments. */
1120 for (i = 0; (i < RTE_MAX_MEMSEG) && (ms[i].addr != NULL); ++i) {
1121 uintptr_t addr = (uintptr_t)ms[i].addr;
1122 size_t len = ms[i].len;
1123 unsigned int align = ms[i].hugepage_sz;
1125 if ((start > addr) && (start < addr + len))
1126 start = RTE_ALIGN_FLOOR(start, align);
1127 if ((end > addr) && (end < addr + len))
1128 end = RTE_ALIGN_CEIL(end, align);
1130 DEBUG("mempool %p using start=%p end=%p size=%zu for MR",
1131 (void *)mp, (void *)start, (void *)end,
1132 (size_t)(end - start));
1133 return ibv_reg_mr(pd,
1136 IBV_ACCESS_LOCAL_WRITE);
1140 * Get Memory Pool (MP) from mbuf. If mbuf is indirect, the pool from which
1141 * the cloned mbuf is allocated is returned instead.
1147 * Memory pool where data is located for given mbuf.
1149 static struct rte_mempool *
1150 txq_mb2mp(struct rte_mbuf *buf)
1152 if (unlikely(RTE_MBUF_INDIRECT(buf)))
1153 return rte_mbuf_from_indirect(buf)->pool;
1158 * Get Memory Region (MR) <-> Memory Pool (MP) association from txq->mp2mr[].
1159 * Add MP to txq->mp2mr[] if it's not registered yet. If mp2mr[] is full,
1160 * remove an entry first.
1163 * Pointer to TX queue structure.
1165 * Memory Pool for which a Memory Region lkey must be returned.
1168 * mr->lkey on success, (uint32_t)-1 on failure.
1171 txq_mp2mr(struct txq *txq, struct rte_mempool *mp)
1176 for (i = 0; (i != elemof(txq->mp2mr)); ++i) {
1177 if (unlikely(txq->mp2mr[i].mp == NULL)) {
1178 /* Unknown MP, add a new MR for it. */
1181 if (txq->mp2mr[i].mp == mp) {
1182 assert(txq->mp2mr[i].lkey != (uint32_t)-1);
1183 assert(txq->mp2mr[i].mr->lkey == txq->mp2mr[i].lkey);
1184 return txq->mp2mr[i].lkey;
1187 /* Add a new entry, register MR first. */
1188 DEBUG("%p: discovered new memory pool \"%s\" (%p)",
1189 (void *)txq, mp->name, (void *)mp);
1190 mr = mlx4_mp2mr(txq->priv->pd, mp);
1191 if (unlikely(mr == NULL)) {
1192 DEBUG("%p: unable to configure MR, ibv_reg_mr() failed.",
1194 return (uint32_t)-1;
1196 if (unlikely(i == elemof(txq->mp2mr))) {
1197 /* Table is full, remove oldest entry. */
1198 DEBUG("%p: MR <-> MP table full, dropping oldest entry.",
1201 claim_zero(ibv_dereg_mr(txq->mp2mr[0].mr));
1202 memmove(&txq->mp2mr[0], &txq->mp2mr[1],
1203 (sizeof(txq->mp2mr) - sizeof(txq->mp2mr[0])));
1205 /* Store the new entry. */
1206 txq->mp2mr[i].mp = mp;
1207 txq->mp2mr[i].mr = mr;
1208 txq->mp2mr[i].lkey = mr->lkey;
1209 DEBUG("%p: new MR lkey for MP \"%s\" (%p): 0x%08" PRIu32,
1210 (void *)txq, mp->name, (void *)mp, txq->mp2mr[i].lkey);
1211 return txq->mp2mr[i].lkey;
1214 struct txq_mp2mr_mbuf_check_data {
1219 * Callback function for rte_mempool_obj_iter() to check whether a given
1220 * mempool object looks like a mbuf.
1223 * The mempool pointer
1225 * Context data (struct txq_mp2mr_mbuf_check_data). Contains the
1230 * Object index, unused.
1233 txq_mp2mr_mbuf_check(struct rte_mempool *mp, void *arg, void *obj,
1234 uint32_t index __rte_unused)
1236 struct txq_mp2mr_mbuf_check_data *data = arg;
1237 struct rte_mbuf *buf = obj;
1239 /* Check whether mbuf structure fits element size and whether mempool
1240 * pointer is valid. */
1241 if (sizeof(*buf) > mp->elt_size || buf->pool != mp)
1246 * Iterator function for rte_mempool_walk() to register existing mempools and
1247 * fill the MP to MR cache of a TX queue.
1250 * Memory Pool to register.
1252 * Pointer to TX queue structure.
1255 txq_mp2mr_iter(struct rte_mempool *mp, void *arg)
1257 struct txq *txq = arg;
1258 struct txq_mp2mr_mbuf_check_data data = {
1262 /* Register mempool only if the first element looks like a mbuf. */
1263 if (rte_mempool_obj_iter(mp, txq_mp2mr_mbuf_check, &data) == 0 ||
1269 #if MLX4_PMD_SGE_WR_N > 1
1272 * Copy scattered mbuf contents to a single linear buffer.
1274 * @param[out] linear
1275 * Linear output buffer.
1277 * Scattered input buffer.
1280 * Number of bytes copied to the output buffer or 0 if not large enough.
1283 linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)
1285 unsigned int size = 0;
1286 unsigned int offset;
1289 unsigned int len = DATA_LEN(buf);
1293 if (unlikely(size > sizeof(*linear)))
1295 memcpy(&(*linear)[offset],
1296 rte_pktmbuf_mtod(buf, uint8_t *),
1299 } while (buf != NULL);
1304 * Handle scattered buffers for mlx4_tx_burst().
1307 * TX queue structure.
1309 * Number of segments in buf.
1311 * TX queue element to fill.
1313 * Buffer to process.
1315 * Index of the linear buffer to use if necessary (normally txq->elts_head).
1317 * Array filled with SGEs on success.
1320 * A structure containing the processed packet size in bytes and the
1321 * number of SGEs. Both fields are set to (unsigned int)-1 in case of
1324 static struct tx_burst_sg_ret {
1325 unsigned int length;
1328 tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,
1329 struct rte_mbuf *buf, unsigned int elts_head,
1330 struct ibv_sge (*sges)[MLX4_PMD_SGE_WR_N])
1332 unsigned int sent_size = 0;
1336 /* When there are too many segments, extra segments are
1337 * linearized in the last SGE. */
1338 if (unlikely(segs > elemof(*sges))) {
1339 segs = (elemof(*sges) - 1);
1342 /* Update element. */
1344 /* Register segments as SGEs. */
1345 for (j = 0; (j != segs); ++j) {
1346 struct ibv_sge *sge = &(*sges)[j];
1349 /* Retrieve Memory Region key for this memory pool. */
1350 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1351 if (unlikely(lkey == (uint32_t)-1)) {
1352 /* MR does not exist. */
1353 DEBUG("%p: unable to get MP <-> MR association",
1355 /* Clean up TX element. */
1360 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
1362 rte_prefetch0((volatile void *)
1363 (uintptr_t)sge->addr);
1364 sge->length = DATA_LEN(buf);
1366 sent_size += sge->length;
1369 /* If buf is not NULL here and is not going to be linearized,
1370 * nb_segs is not valid. */
1372 assert((buf == NULL) || (linearize));
1373 /* Linearize extra segments. */
1375 struct ibv_sge *sge = &(*sges)[segs];
1376 linear_t *linear = &(*txq->elts_linear)[elts_head];
1377 unsigned int size = linearize_mbuf(linear, buf);
1379 assert(segs == (elemof(*sges) - 1));
1381 /* Invalid packet. */
1382 DEBUG("%p: packet too large to be linearized.",
1384 /* Clean up TX element. */
1388 /* If MLX4_PMD_SGE_WR_N is 1, free mbuf immediately. */
1389 if (elemof(*sges) == 1) {
1391 struct rte_mbuf *next = NEXT(buf);
1393 rte_pktmbuf_free_seg(buf);
1395 } while (buf != NULL);
1399 sge->addr = (uintptr_t)&(*linear)[0];
1401 sge->lkey = txq->mr_linear->lkey;
1403 /* Include last segment. */
1406 return (struct tx_burst_sg_ret){
1407 .length = sent_size,
1411 return (struct tx_burst_sg_ret){
1417 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1420 * DPDK callback for TX.
1423 * Generic pointer to TX queue structure.
1425 * Packets to transmit.
1427 * Number of packets in array.
1430 * Number of packets successfully transmitted (<= pkts_n).
1433 mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
1435 struct txq *txq = (struct txq *)dpdk_txq;
1436 unsigned int elts_head = txq->elts_head;
1437 const unsigned int elts_n = txq->elts_n;
1438 unsigned int elts_comp_cd = txq->elts_comp_cd;
1439 unsigned int elts_comp = 0;
1444 assert(elts_comp_cd != 0);
1446 max = (elts_n - (elts_head - txq->elts_tail));
1450 assert(max <= elts_n);
1451 /* Always leave one free entry in the ring. */
1457 for (i = 0; (i != max); ++i) {
1458 struct rte_mbuf *buf = pkts[i];
1459 unsigned int elts_head_next =
1460 (((elts_head + 1) == elts_n) ? 0 : elts_head + 1);
1461 struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
1462 struct txq_elt *elt = &(*txq->elts)[elts_head];
1463 unsigned int segs = NB_SEGS(buf);
1464 #ifdef MLX4_PMD_SOFT_COUNTERS
1465 unsigned int sent_size = 0;
1467 uint32_t send_flags = 0;
1469 /* Clean up old buffer. */
1470 if (likely(elt->buf != NULL)) {
1471 struct rte_mbuf *tmp = elt->buf;
1475 memset(elt, 0x66, sizeof(*elt));
1477 /* Faster than rte_pktmbuf_free(). */
1479 struct rte_mbuf *next = NEXT(tmp);
1481 rte_pktmbuf_free_seg(tmp);
1483 } while (tmp != NULL);
1485 /* Request TX completion. */
1486 if (unlikely(--elts_comp_cd == 0)) {
1487 elts_comp_cd = txq->elts_comp_cd_init;
1489 send_flags |= IBV_EXP_QP_BURST_SIGNALED;
1491 /* Should we enable HW CKSUM offload */
1493 (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {
1494 send_flags |= IBV_EXP_QP_BURST_IP_CSUM;
1495 /* HW does not support checksum offloads at arbitrary
1496 * offsets but automatically recognizes the packet
1497 * type. For inner L3/L4 checksums, only VXLAN (UDP)
1498 * tunnels are currently supported. */
1499 if (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))
1500 send_flags |= IBV_EXP_QP_BURST_TUNNEL;
1502 if (likely(segs == 1)) {
1507 /* Retrieve buffer information. */
1508 addr = rte_pktmbuf_mtod(buf, uintptr_t);
1509 length = DATA_LEN(buf);
1510 /* Retrieve Memory Region key for this memory pool. */
1511 lkey = txq_mp2mr(txq, txq_mb2mp(buf));
1512 if (unlikely(lkey == (uint32_t)-1)) {
1513 /* MR does not exist. */
1514 DEBUG("%p: unable to get MP <-> MR"
1515 " association", (void *)txq);
1516 /* Clean up TX element. */
1520 /* Update element. */
1523 rte_prefetch0((volatile void *)
1525 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1526 /* Put packet into send queue. */
1527 #if MLX4_PMD_MAX_INLINE > 0
1528 if (length <= txq->max_inline)
1529 err = txq->if_qp->send_pending_inline
1536 err = txq->if_qp->send_pending
1544 #ifdef MLX4_PMD_SOFT_COUNTERS
1545 sent_size += length;
1548 #if MLX4_PMD_SGE_WR_N > 1
1549 struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
1550 struct tx_burst_sg_ret ret;
1552 ret = tx_burst_sg(txq, segs, elt, buf, elts_head,
1554 if (ret.length == (unsigned int)-1)
1556 RTE_MBUF_PREFETCH_TO_FREE(elt_next->buf);
1557 /* Put SG list into send queue. */
1558 err = txq->if_qp->send_pending_sg_list
1565 #ifdef MLX4_PMD_SOFT_COUNTERS
1566 sent_size += ret.length;
1568 #else /* MLX4_PMD_SGE_WR_N > 1 */
1569 DEBUG("%p: TX scattered buffers support not"
1570 " compiled in", (void *)txq);
1572 #endif /* MLX4_PMD_SGE_WR_N > 1 */
1574 elts_head = elts_head_next;
1575 #ifdef MLX4_PMD_SOFT_COUNTERS
1576 /* Increment sent bytes counter. */
1577 txq->stats.obytes += sent_size;
1581 /* Take a shortcut if nothing must be sent. */
1582 if (unlikely(i == 0))
1584 #ifdef MLX4_PMD_SOFT_COUNTERS
1585 /* Increment sent packets counter. */
1586 txq->stats.opackets += i;
1588 /* Ring QP doorbell. */
1589 err = txq->if_qp->send_flush(txq->qp);
1590 if (unlikely(err)) {
1591 /* A nonzero value is not supposed to be returned.
1592 * Nothing can be done about it. */
1593 DEBUG("%p: send_flush() failed with error %d",
1596 txq->elts_head = elts_head;
1597 txq->elts_comp += elts_comp;
1598 txq->elts_comp_cd = elts_comp_cd;
1603 * DPDK callback for TX in secondary processes.
1605 * This function configures all queues from primary process information
1606 * if necessary before reverting to the normal TX burst callback.
1609 * Generic pointer to TX queue structure.
1611 * Packets to transmit.
1613 * Number of packets in array.
1616 * Number of packets successfully transmitted (<= pkts_n).
1619 mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,
1622 struct txq *txq = dpdk_txq;
1623 struct priv *priv = mlx4_secondary_data_setup(txq->priv);
1624 struct priv *primary_priv;
1630 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
1631 /* Look for queue index in both private structures. */
1632 for (index = 0; index != priv->txqs_n; ++index)
1633 if (((*primary_priv->txqs)[index] == txq) ||
1634 ((*priv->txqs)[index] == txq))
1636 if (index == priv->txqs_n)
1638 txq = (*priv->txqs)[index];
1639 return priv->dev->tx_pkt_burst(txq, pkts, pkts_n);
1643 * Configure a TX queue.
1646 * Pointer to Ethernet device structure.
1648 * Pointer to TX queue structure.
1650 * Number of descriptors to configure in queue.
1652 * NUMA socket on which memory must be allocated.
1654 * Thresholds parameters.
1657 * 0 on success, errno value on failure.
1660 txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,
1661 unsigned int socket, const struct rte_eth_txconf *conf)
1663 struct priv *priv = mlx4_get_priv(dev);
1669 struct ibv_exp_query_intf_params params;
1670 struct ibv_exp_qp_init_attr init;
1671 struct ibv_exp_res_domain_init_attr rd;
1672 struct ibv_exp_cq_init_attr cq;
1673 struct ibv_exp_qp_attr mod;
1675 enum ibv_exp_query_intf_status status;
1678 (void)conf; /* Thresholds configuration (ignored). */
1681 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
1682 ERROR("%p: invalid number of TX descriptors (must be a"
1683 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
1686 desc /= MLX4_PMD_SGE_WR_N;
1687 /* MRs will be registered in mp2mr[] later. */
1688 attr.rd = (struct ibv_exp_res_domain_init_attr){
1689 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
1690 IBV_EXP_RES_DOMAIN_MSG_MODEL),
1691 .thread_model = IBV_EXP_THREAD_SINGLE,
1692 .msg_model = IBV_EXP_MSG_HIGH_BW,
1694 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
1695 if (tmpl.rd == NULL) {
1697 ERROR("%p: RD creation failure: %s",
1698 (void *)dev, strerror(ret));
1701 attr.cq = (struct ibv_exp_cq_init_attr){
1702 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
1703 .res_domain = tmpl.rd,
1705 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
1706 if (tmpl.cq == NULL) {
1708 ERROR("%p: CQ creation failure: %s",
1709 (void *)dev, strerror(ret));
1712 DEBUG("priv->device_attr.max_qp_wr is %d",
1713 priv->device_attr.max_qp_wr);
1714 DEBUG("priv->device_attr.max_sge is %d",
1715 priv->device_attr.max_sge);
1716 attr.init = (struct ibv_exp_qp_init_attr){
1717 /* CQ to be associated with the send queue. */
1719 /* CQ to be associated with the receive queue. */
1722 /* Max number of outstanding WRs. */
1723 .max_send_wr = ((priv->device_attr.max_qp_wr < desc) ?
1724 priv->device_attr.max_qp_wr :
1726 /* Max number of scatter/gather elements in a WR. */
1727 .max_send_sge = ((priv->device_attr.max_sge <
1728 MLX4_PMD_SGE_WR_N) ?
1729 priv->device_attr.max_sge :
1731 #if MLX4_PMD_MAX_INLINE > 0
1732 .max_inline_data = MLX4_PMD_MAX_INLINE,
1735 .qp_type = IBV_QPT_RAW_PACKET,
1736 /* Do *NOT* enable this, completions events are managed per
1740 .res_domain = tmpl.rd,
1741 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
1742 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
1744 tmpl.qp = ibv_exp_create_qp(priv->ctx, &attr.init);
1745 if (tmpl.qp == NULL) {
1746 ret = (errno ? errno : EINVAL);
1747 ERROR("%p: QP creation failure: %s",
1748 (void *)dev, strerror(ret));
1751 #if MLX4_PMD_MAX_INLINE > 0
1752 /* ibv_create_qp() updates this value. */
1753 tmpl.max_inline = attr.init.cap.max_inline_data;
1755 attr.mod = (struct ibv_exp_qp_attr){
1756 /* Move the QP to this state. */
1757 .qp_state = IBV_QPS_INIT,
1758 /* Primary port number. */
1759 .port_num = priv->port
1761 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod,
1762 (IBV_EXP_QP_STATE | IBV_EXP_QP_PORT));
1764 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
1765 (void *)dev, strerror(ret));
1768 ret = txq_alloc_elts(&tmpl, desc);
1770 ERROR("%p: TXQ allocation failed: %s",
1771 (void *)dev, strerror(ret));
1774 attr.mod = (struct ibv_exp_qp_attr){
1775 .qp_state = IBV_QPS_RTR
1777 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1779 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
1780 (void *)dev, strerror(ret));
1783 attr.mod.qp_state = IBV_QPS_RTS;
1784 ret = ibv_exp_modify_qp(tmpl.qp, &attr.mod, IBV_EXP_QP_STATE);
1786 ERROR("%p: QP state to IBV_QPS_RTS failed: %s",
1787 (void *)dev, strerror(ret));
1790 attr.params = (struct ibv_exp_query_intf_params){
1791 .intf_scope = IBV_EXP_INTF_GLOBAL,
1792 .intf = IBV_EXP_INTF_CQ,
1795 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1796 if (tmpl.if_cq == NULL) {
1797 ERROR("%p: CQ interface family query failed with status %d",
1798 (void *)dev, status);
1801 attr.params = (struct ibv_exp_query_intf_params){
1802 .intf_scope = IBV_EXP_INTF_GLOBAL,
1803 .intf = IBV_EXP_INTF_QP_BURST,
1805 #ifdef HAVE_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK
1806 /* MC loopback must be disabled when not using a VF. */
1809 IBV_EXP_QP_BURST_CREATE_DISABLE_ETH_LOOPBACK :
1813 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
1814 if (tmpl.if_qp == NULL) {
1815 ERROR("%p: QP interface family query failed with status %d",
1816 (void *)dev, status);
1819 /* Clean up txq in case we're reinitializing it. */
1820 DEBUG("%p: cleaning-up old txq just in case", (void *)txq);
1823 DEBUG("%p: txq updated with %p", (void *)txq, (void *)&tmpl);
1824 /* Pre-register known mempools. */
1825 rte_mempool_walk(txq_mp2mr_iter, txq);
1835 * DPDK callback to configure a TX queue.
1838 * Pointer to Ethernet device structure.
1842 * Number of descriptors to configure in queue.
1844 * NUMA socket on which memory must be allocated.
1846 * Thresholds parameters.
1849 * 0 on success, negative errno value on failure.
1852 mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
1853 unsigned int socket, const struct rte_eth_txconf *conf)
1855 struct priv *priv = dev->data->dev_private;
1856 struct txq *txq = (*priv->txqs)[idx];
1859 if (mlx4_is_secondary())
1860 return -E_RTE_SECONDARY;
1862 DEBUG("%p: configuring queue %u for %u descriptors",
1863 (void *)dev, idx, desc);
1864 if (idx >= priv->txqs_n) {
1865 ERROR("%p: queue index out of range (%u >= %u)",
1866 (void *)dev, idx, priv->txqs_n);
1871 DEBUG("%p: reusing already allocated queue index %u (%p)",
1872 (void *)dev, idx, (void *)txq);
1873 if (priv->started) {
1877 (*priv->txqs)[idx] = NULL;
1880 txq = rte_calloc_socket("TXQ", 1, sizeof(*txq), 0, socket);
1882 ERROR("%p: unable to allocate queue index %u",
1888 ret = txq_setup(dev, txq, desc, socket, conf);
1892 txq->stats.idx = idx;
1893 DEBUG("%p: adding TX queue %p to list",
1894 (void *)dev, (void *)txq);
1895 (*priv->txqs)[idx] = txq;
1896 /* Update send callback. */
1897 dev->tx_pkt_burst = mlx4_tx_burst;
1904 * DPDK callback to release a TX queue.
1907 * Generic TX queue pointer.
1910 mlx4_tx_queue_release(void *dpdk_txq)
1912 struct txq *txq = (struct txq *)dpdk_txq;
1916 if (mlx4_is_secondary())
1922 for (i = 0; (i != priv->txqs_n); ++i)
1923 if ((*priv->txqs)[i] == txq) {
1924 DEBUG("%p: removing TX queue %p from list",
1925 (void *)priv->dev, (void *)txq);
1926 (*priv->txqs)[i] = NULL;
1934 /* RX queues handling. */
1937 * Allocate RX queue elements with scattered packets support.
1940 * Pointer to RX queue structure.
1942 * Number of elements to allocate.
1944 * If not NULL, fetch buffers from this array instead of allocating them
1945 * with rte_pktmbuf_alloc().
1948 * 0 on success, errno value on failure.
1951 rxq_alloc_elts_sp(struct rxq *rxq, unsigned int elts_n,
1952 struct rte_mbuf **pool)
1955 struct rxq_elt_sp (*elts)[elts_n] =
1956 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
1961 ERROR("%p: can't allocate packets array", (void *)rxq);
1965 /* For each WR (packet). */
1966 for (i = 0; (i != elts_n); ++i) {
1968 struct rxq_elt_sp *elt = &(*elts)[i];
1969 struct ibv_recv_wr *wr = &elt->wr;
1970 struct ibv_sge (*sges)[(elemof(elt->sges))] = &elt->sges;
1972 /* These two arrays must have the same size. */
1973 assert(elemof(elt->sges) == elemof(elt->bufs));
1976 wr->next = &(*elts)[(i + 1)].wr;
1977 wr->sg_list = &(*sges)[0];
1978 wr->num_sge = elemof(*sges);
1979 /* For each SGE (segment). */
1980 for (j = 0; (j != elemof(elt->bufs)); ++j) {
1981 struct ibv_sge *sge = &(*sges)[j];
1982 struct rte_mbuf *buf;
1986 assert(buf != NULL);
1987 rte_pktmbuf_reset(buf);
1989 buf = rte_pktmbuf_alloc(rxq->mp);
1991 assert(pool == NULL);
1992 ERROR("%p: empty mbuf pool", (void *)rxq);
1997 /* Headroom is reserved by rte_pktmbuf_alloc(). */
1998 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
1999 /* Buffer is supposed to be empty. */
2000 assert(rte_pktmbuf_data_len(buf) == 0);
2001 assert(rte_pktmbuf_pkt_len(buf) == 0);
2002 /* sge->addr must be able to store a pointer. */
2003 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2005 /* The first SGE keeps its headroom. */
2006 sge->addr = rte_pktmbuf_mtod(buf, uintptr_t);
2007 sge->length = (buf->buf_len -
2008 RTE_PKTMBUF_HEADROOM);
2010 /* Subsequent SGEs lose theirs. */
2011 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2012 SET_DATA_OFF(buf, 0);
2013 sge->addr = (uintptr_t)buf->buf_addr;
2014 sge->length = buf->buf_len;
2016 sge->lkey = rxq->mr->lkey;
2017 /* Redundant check for tailroom. */
2018 assert(sge->length == rte_pktmbuf_tailroom(buf));
2021 /* The last WR pointer must be NULL. */
2022 (*elts)[(i - 1)].wr.next = NULL;
2023 DEBUG("%p: allocated and configured %u WRs (%zu segments)",
2024 (void *)rxq, elts_n, (elts_n * elemof((*elts)[0].sges)));
2025 rxq->elts_n = elts_n;
2027 rxq->elts.sp = elts;
2032 assert(pool == NULL);
2033 for (i = 0; (i != elemof(*elts)); ++i) {
2035 struct rxq_elt_sp *elt = &(*elts)[i];
2037 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2038 struct rte_mbuf *buf = elt->bufs[j];
2041 rte_pktmbuf_free_seg(buf);
2046 DEBUG("%p: failed, freed everything", (void *)rxq);
2052 * Free RX queue elements with scattered packets support.
2055 * Pointer to RX queue structure.
2058 rxq_free_elts_sp(struct rxq *rxq)
2061 unsigned int elts_n = rxq->elts_n;
2062 struct rxq_elt_sp (*elts)[elts_n] = rxq->elts.sp;
2064 DEBUG("%p: freeing WRs", (void *)rxq);
2066 rxq->elts.sp = NULL;
2069 for (i = 0; (i != elemof(*elts)); ++i) {
2071 struct rxq_elt_sp *elt = &(*elts)[i];
2073 for (j = 0; (j != elemof(elt->bufs)); ++j) {
2074 struct rte_mbuf *buf = elt->bufs[j];
2077 rte_pktmbuf_free_seg(buf);
2084 * Allocate RX queue elements.
2087 * Pointer to RX queue structure.
2089 * Number of elements to allocate.
2091 * If not NULL, fetch buffers from this array instead of allocating them
2092 * with rte_pktmbuf_alloc().
2095 * 0 on success, errno value on failure.
2098 rxq_alloc_elts(struct rxq *rxq, unsigned int elts_n, struct rte_mbuf **pool)
2101 struct rxq_elt (*elts)[elts_n] =
2102 rte_calloc_socket("RXQ elements", 1, sizeof(*elts), 0,
2107 ERROR("%p: can't allocate packets array", (void *)rxq);
2111 /* For each WR (packet). */
2112 for (i = 0; (i != elts_n); ++i) {
2113 struct rxq_elt *elt = &(*elts)[i];
2114 struct ibv_recv_wr *wr = &elt->wr;
2115 struct ibv_sge *sge = &(*elts)[i].sge;
2116 struct rte_mbuf *buf;
2120 assert(buf != NULL);
2121 rte_pktmbuf_reset(buf);
2123 buf = rte_pktmbuf_alloc(rxq->mp);
2125 assert(pool == NULL);
2126 ERROR("%p: empty mbuf pool", (void *)rxq);
2130 /* Configure WR. Work request ID contains its own index in
2131 * the elts array and the offset between SGE buffer header and
2133 WR_ID(wr->wr_id).id = i;
2134 WR_ID(wr->wr_id).offset =
2135 (((uintptr_t)buf->buf_addr + RTE_PKTMBUF_HEADROOM) -
2137 wr->next = &(*elts)[(i + 1)].wr;
2140 /* Headroom is reserved by rte_pktmbuf_alloc(). */
2141 assert(DATA_OFF(buf) == RTE_PKTMBUF_HEADROOM);
2142 /* Buffer is supposed to be empty. */
2143 assert(rte_pktmbuf_data_len(buf) == 0);
2144 assert(rte_pktmbuf_pkt_len(buf) == 0);
2145 /* sge->addr must be able to store a pointer. */
2146 assert(sizeof(sge->addr) >= sizeof(uintptr_t));
2147 /* SGE keeps its headroom. */
2148 sge->addr = (uintptr_t)
2149 ((uint8_t *)buf->buf_addr + RTE_PKTMBUF_HEADROOM);
2150 sge->length = (buf->buf_len - RTE_PKTMBUF_HEADROOM);
2151 sge->lkey = rxq->mr->lkey;
2152 /* Redundant check for tailroom. */
2153 assert(sge->length == rte_pktmbuf_tailroom(buf));
2154 /* Make sure elts index and SGE mbuf pointer can be deduced
2156 if ((WR_ID(wr->wr_id).id != i) ||
2157 ((void *)((uintptr_t)sge->addr -
2158 WR_ID(wr->wr_id).offset) != buf)) {
2159 ERROR("%p: cannot store index and offset in WR ID",
2162 rte_pktmbuf_free(buf);
2167 /* The last WR pointer must be NULL. */
2168 (*elts)[(i - 1)].wr.next = NULL;
2169 DEBUG("%p: allocated and configured %u single-segment WRs",
2170 (void *)rxq, elts_n);
2171 rxq->elts_n = elts_n;
2173 rxq->elts.no_sp = elts;
2178 assert(pool == NULL);
2179 for (i = 0; (i != elemof(*elts)); ++i) {
2180 struct rxq_elt *elt = &(*elts)[i];
2181 struct rte_mbuf *buf;
2183 if (elt->sge.addr == 0)
2185 assert(WR_ID(elt->wr.wr_id).id == i);
2186 buf = (void *)((uintptr_t)elt->sge.addr -
2187 WR_ID(elt->wr.wr_id).offset);
2188 rte_pktmbuf_free_seg(buf);
2192 DEBUG("%p: failed, freed everything", (void *)rxq);
2198 * Free RX queue elements.
2201 * Pointer to RX queue structure.
2204 rxq_free_elts(struct rxq *rxq)
2207 unsigned int elts_n = rxq->elts_n;
2208 struct rxq_elt (*elts)[elts_n] = rxq->elts.no_sp;
2210 DEBUG("%p: freeing WRs", (void *)rxq);
2212 rxq->elts.no_sp = NULL;
2215 for (i = 0; (i != elemof(*elts)); ++i) {
2216 struct rxq_elt *elt = &(*elts)[i];
2217 struct rte_mbuf *buf;
2219 if (elt->sge.addr == 0)
2221 assert(WR_ID(elt->wr.wr_id).id == i);
2222 buf = (void *)((uintptr_t)elt->sge.addr -
2223 WR_ID(elt->wr.wr_id).offset);
2224 rte_pktmbuf_free_seg(buf);
2230 * Delete flow steering rule.
2233 * Pointer to RX queue structure.
2235 * MAC address index.
2240 rxq_del_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2243 struct priv *priv = rxq->priv;
2244 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2245 (const uint8_t (*)[ETHER_ADDR_LEN])
2246 priv->mac[mac_index].addr_bytes;
2248 assert(rxq->mac_flow[mac_index][vlan_index] != NULL);
2249 DEBUG("%p: removing MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2250 " (VLAN ID %" PRIu16 ")",
2252 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2253 mac_index, priv->vlan_filter[vlan_index].id);
2254 claim_zero(ibv_destroy_flow(rxq->mac_flow[mac_index][vlan_index]));
2255 rxq->mac_flow[mac_index][vlan_index] = NULL;
2259 * Unregister a MAC address from a RX queue.
2262 * Pointer to RX queue structure.
2264 * MAC address index.
2267 rxq_mac_addr_del(struct rxq *rxq, unsigned int mac_index)
2269 struct priv *priv = rxq->priv;
2271 unsigned int vlans = 0;
2273 assert(mac_index < elemof(priv->mac));
2274 if (!BITFIELD_ISSET(rxq->mac_configured, mac_index))
2276 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2277 if (!priv->vlan_filter[i].enabled)
2279 rxq_del_flow(rxq, mac_index, i);
2283 rxq_del_flow(rxq, mac_index, 0);
2285 BITFIELD_RESET(rxq->mac_configured, mac_index);
2289 * Unregister all MAC addresses from a RX queue.
2292 * Pointer to RX queue structure.
2295 rxq_mac_addrs_del(struct rxq *rxq)
2297 struct priv *priv = rxq->priv;
2300 for (i = 0; (i != elemof(priv->mac)); ++i)
2301 rxq_mac_addr_del(rxq, i);
2304 static int rxq_promiscuous_enable(struct rxq *);
2305 static void rxq_promiscuous_disable(struct rxq *);
2308 * Add single flow steering rule.
2311 * Pointer to RX queue structure.
2313 * MAC address index to register.
2315 * VLAN index. Use -1 for a flow without VLAN.
2318 * 0 on success, errno value on failure.
2321 rxq_add_flow(struct rxq *rxq, unsigned int mac_index, unsigned int vlan_index)
2323 struct ibv_flow *flow;
2324 struct priv *priv = rxq->priv;
2325 const uint8_t (*mac)[ETHER_ADDR_LEN] =
2326 (const uint8_t (*)[ETHER_ADDR_LEN])
2327 priv->mac[mac_index].addr_bytes;
2329 /* Allocate flow specification on the stack. */
2330 struct __attribute__((packed)) {
2331 struct ibv_flow_attr attr;
2332 struct ibv_flow_spec_eth spec;
2334 struct ibv_flow_attr *attr = &data.attr;
2335 struct ibv_flow_spec_eth *spec = &data.spec;
2337 assert(mac_index < elemof(priv->mac));
2338 assert((vlan_index < elemof(priv->vlan_filter)) || (vlan_index == -1u));
2340 * No padding must be inserted by the compiler between attr and spec.
2341 * This layout is expected by libibverbs.
2343 assert(((uint8_t *)attr + sizeof(*attr)) == (uint8_t *)spec);
2344 *attr = (struct ibv_flow_attr){
2345 .type = IBV_FLOW_ATTR_NORMAL,
2351 *spec = (struct ibv_flow_spec_eth){
2352 .type = IBV_FLOW_SPEC_ETH,
2353 .size = sizeof(*spec),
2356 (*mac)[0], (*mac)[1], (*mac)[2],
2357 (*mac)[3], (*mac)[4], (*mac)[5]
2359 .vlan_tag = ((vlan_index != -1u) ?
2360 htons(priv->vlan_filter[vlan_index].id) :
2364 .dst_mac = "\xff\xff\xff\xff\xff\xff",
2365 .vlan_tag = ((vlan_index != -1u) ? htons(0xfff) : 0),
2368 DEBUG("%p: adding MAC address %02x:%02x:%02x:%02x:%02x:%02x index %u"
2369 " (VLAN %s %" PRIu16 ")",
2371 (*mac)[0], (*mac)[1], (*mac)[2], (*mac)[3], (*mac)[4], (*mac)[5],
2373 ((vlan_index != -1u) ? "ID" : "index"),
2374 ((vlan_index != -1u) ? priv->vlan_filter[vlan_index].id : -1u));
2375 /* Create related flow. */
2377 flow = ibv_create_flow(rxq->qp, attr);
2379 /* It's not clear whether errno is always set in this case. */
2380 ERROR("%p: flow configuration failed, errno=%d: %s",
2382 (errno ? strerror(errno) : "Unknown error"));
2387 if (vlan_index == -1u)
2389 assert(rxq->mac_flow[mac_index][vlan_index] == NULL);
2390 rxq->mac_flow[mac_index][vlan_index] = flow;
2395 * Register a MAC address in a RX queue.
2398 * Pointer to RX queue structure.
2400 * MAC address index to register.
2403 * 0 on success, errno value on failure.
2406 rxq_mac_addr_add(struct rxq *rxq, unsigned int mac_index)
2408 struct priv *priv = rxq->priv;
2410 unsigned int vlans = 0;
2413 assert(mac_index < elemof(priv->mac));
2414 if (BITFIELD_ISSET(rxq->mac_configured, mac_index))
2415 rxq_mac_addr_del(rxq, mac_index);
2416 /* Fill VLAN specifications. */
2417 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
2418 if (!priv->vlan_filter[i].enabled)
2420 /* Create related flow. */
2421 ret = rxq_add_flow(rxq, mac_index, i);
2426 /* Failure, rollback. */
2428 if (priv->vlan_filter[--i].enabled)
2429 rxq_del_flow(rxq, mac_index, i);
2433 /* In case there is no VLAN filter. */
2435 ret = rxq_add_flow(rxq, mac_index, -1);
2439 BITFIELD_SET(rxq->mac_configured, mac_index);
2444 * Register all MAC addresses in a RX queue.
2447 * Pointer to RX queue structure.
2450 * 0 on success, errno value on failure.
2453 rxq_mac_addrs_add(struct rxq *rxq)
2455 struct priv *priv = rxq->priv;
2459 for (i = 0; (i != elemof(priv->mac)); ++i) {
2460 if (!BITFIELD_ISSET(priv->mac_configured, i))
2462 ret = rxq_mac_addr_add(rxq, i);
2465 /* Failure, rollback. */
2467 rxq_mac_addr_del(rxq, --i);
2475 * Unregister a MAC address.
2477 * In RSS mode, the MAC address is unregistered from the parent queue,
2478 * otherwise it is unregistered from each queue directly.
2481 * Pointer to private structure.
2483 * MAC address index.
2486 priv_mac_addr_del(struct priv *priv, unsigned int mac_index)
2490 assert(mac_index < elemof(priv->mac));
2491 if (!BITFIELD_ISSET(priv->mac_configured, mac_index))
2494 rxq_mac_addr_del(&priv->rxq_parent, mac_index);
2497 for (i = 0; (i != priv->dev->data->nb_rx_queues); ++i)
2498 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2500 BITFIELD_RESET(priv->mac_configured, mac_index);
2504 * Register a MAC address.
2506 * In RSS mode, the MAC address is registered in the parent queue,
2507 * otherwise it is registered in each queue directly.
2510 * Pointer to private structure.
2512 * MAC address index to use.
2514 * MAC address to register.
2517 * 0 on success, errno value on failure.
2520 priv_mac_addr_add(struct priv *priv, unsigned int mac_index,
2521 const uint8_t (*mac)[ETHER_ADDR_LEN])
2526 assert(mac_index < elemof(priv->mac));
2527 /* First, make sure this address isn't already configured. */
2528 for (i = 0; (i != elemof(priv->mac)); ++i) {
2529 /* Skip this index, it's going to be reconfigured. */
2532 if (!BITFIELD_ISSET(priv->mac_configured, i))
2534 if (memcmp(priv->mac[i].addr_bytes, *mac, sizeof(*mac)))
2536 /* Address already configured elsewhere, return with error. */
2539 if (BITFIELD_ISSET(priv->mac_configured, mac_index))
2540 priv_mac_addr_del(priv, mac_index);
2541 priv->mac[mac_index] = (struct ether_addr){
2543 (*mac)[0], (*mac)[1], (*mac)[2],
2544 (*mac)[3], (*mac)[4], (*mac)[5]
2547 /* If device isn't started, this is all we need to do. */
2548 if (!priv->started) {
2550 /* Verify that all queues have this index disabled. */
2551 for (i = 0; (i != priv->rxqs_n); ++i) {
2552 if ((*priv->rxqs)[i] == NULL)
2554 assert(!BITFIELD_ISSET
2555 ((*priv->rxqs)[i]->mac_configured, mac_index));
2561 ret = rxq_mac_addr_add(&priv->rxq_parent, mac_index);
2566 for (i = 0; (i != priv->rxqs_n); ++i) {
2567 if ((*priv->rxqs)[i] == NULL)
2569 ret = rxq_mac_addr_add((*priv->rxqs)[i], mac_index);
2572 /* Failure, rollback. */
2574 if ((*priv->rxqs)[(--i)] != NULL)
2575 rxq_mac_addr_del((*priv->rxqs)[i], mac_index);
2579 BITFIELD_SET(priv->mac_configured, mac_index);
2584 * Enable allmulti mode in a RX queue.
2587 * Pointer to RX queue structure.
2590 * 0 on success, errno value on failure.
2593 rxq_allmulticast_enable(struct rxq *rxq)
2595 struct ibv_flow *flow;
2596 struct ibv_flow_attr attr = {
2597 .type = IBV_FLOW_ATTR_MC_DEFAULT,
2599 .port = rxq->priv->port,
2603 DEBUG("%p: enabling allmulticast mode", (void *)rxq);
2604 if (rxq->allmulti_flow != NULL)
2607 flow = ibv_create_flow(rxq->qp, &attr);
2609 /* It's not clear whether errno is always set in this case. */
2610 ERROR("%p: flow configuration failed, errno=%d: %s",
2612 (errno ? strerror(errno) : "Unknown error"));
2617 rxq->allmulti_flow = flow;
2618 DEBUG("%p: allmulticast mode enabled", (void *)rxq);
2623 * Disable allmulti mode in a RX queue.
2626 * Pointer to RX queue structure.
2629 rxq_allmulticast_disable(struct rxq *rxq)
2631 DEBUG("%p: disabling allmulticast mode", (void *)rxq);
2632 if (rxq->allmulti_flow == NULL)
2634 claim_zero(ibv_destroy_flow(rxq->allmulti_flow));
2635 rxq->allmulti_flow = NULL;
2636 DEBUG("%p: allmulticast mode disabled", (void *)rxq);
2640 * Enable promiscuous mode in a RX queue.
2643 * Pointer to RX queue structure.
2646 * 0 on success, errno value on failure.
2649 rxq_promiscuous_enable(struct rxq *rxq)
2651 struct ibv_flow *flow;
2652 struct ibv_flow_attr attr = {
2653 .type = IBV_FLOW_ATTR_ALL_DEFAULT,
2655 .port = rxq->priv->port,
2661 DEBUG("%p: enabling promiscuous mode", (void *)rxq);
2662 if (rxq->promisc_flow != NULL)
2665 flow = ibv_create_flow(rxq->qp, &attr);
2667 /* It's not clear whether errno is always set in this case. */
2668 ERROR("%p: flow configuration failed, errno=%d: %s",
2670 (errno ? strerror(errno) : "Unknown error"));
2675 rxq->promisc_flow = flow;
2676 DEBUG("%p: promiscuous mode enabled", (void *)rxq);
2681 * Disable promiscuous mode in a RX queue.
2684 * Pointer to RX queue structure.
2687 rxq_promiscuous_disable(struct rxq *rxq)
2691 DEBUG("%p: disabling promiscuous mode", (void *)rxq);
2692 if (rxq->promisc_flow == NULL)
2694 claim_zero(ibv_destroy_flow(rxq->promisc_flow));
2695 rxq->promisc_flow = NULL;
2696 DEBUG("%p: promiscuous mode disabled", (void *)rxq);
2700 * Clean up a RX queue.
2702 * Destroy objects, free allocated memory and reset the structure for reuse.
2705 * Pointer to RX queue structure.
2708 rxq_cleanup(struct rxq *rxq)
2710 struct ibv_exp_release_intf_params params;
2712 DEBUG("cleaning up %p", (void *)rxq);
2714 rxq_free_elts_sp(rxq);
2717 if (rxq->if_qp != NULL) {
2718 assert(rxq->priv != NULL);
2719 assert(rxq->priv->ctx != NULL);
2720 assert(rxq->qp != NULL);
2721 params = (struct ibv_exp_release_intf_params){
2724 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2728 if (rxq->if_cq != NULL) {
2729 assert(rxq->priv != NULL);
2730 assert(rxq->priv->ctx != NULL);
2731 assert(rxq->cq != NULL);
2732 params = (struct ibv_exp_release_intf_params){
2735 claim_zero(ibv_exp_release_intf(rxq->priv->ctx,
2739 if (rxq->qp != NULL) {
2740 rxq_promiscuous_disable(rxq);
2741 rxq_allmulticast_disable(rxq);
2742 rxq_mac_addrs_del(rxq);
2743 claim_zero(ibv_destroy_qp(rxq->qp));
2745 if (rxq->cq != NULL)
2746 claim_zero(ibv_destroy_cq(rxq->cq));
2747 if (rxq->rd != NULL) {
2748 struct ibv_exp_destroy_res_domain_attr attr = {
2752 assert(rxq->priv != NULL);
2753 assert(rxq->priv->ctx != NULL);
2754 claim_zero(ibv_exp_destroy_res_domain(rxq->priv->ctx,
2758 if (rxq->mr != NULL)
2759 claim_zero(ibv_dereg_mr(rxq->mr));
2760 memset(rxq, 0, sizeof(*rxq));
2764 * Translate RX completion flags to packet type.
2767 * RX completion flags returned by poll_length_flags().
2769 * @note: fix mlx4_dev_supported_ptypes_get() if any change here.
2772 * Packet type for struct rte_mbuf.
2774 static inline uint32_t
2775 rxq_cq_to_pkt_type(uint32_t flags)
2779 if (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)
2782 IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,
2783 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2785 IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,
2786 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN) |
2788 IBV_EXP_CQ_RX_IPV4_PACKET,
2789 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN) |
2791 IBV_EXP_CQ_RX_IPV6_PACKET,
2792 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN);
2796 IBV_EXP_CQ_RX_IPV4_PACKET,
2797 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN) |
2799 IBV_EXP_CQ_RX_IPV6_PACKET,
2800 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN);
2805 * Translate RX completion flags to offload flags.
2808 * Pointer to RX queue structure.
2810 * RX completion flags returned by poll_length_flags().
2813 * Offload flags (ol_flags) for struct rte_mbuf.
2815 static inline uint32_t
2816 rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
2818 uint32_t ol_flags = 0;
2823 IBV_EXP_CQ_RX_IP_CSUM_OK,
2824 PKT_RX_IP_CKSUM_GOOD) |
2826 IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
2827 PKT_RX_L4_CKSUM_GOOD);
2828 if ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))
2831 IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,
2832 PKT_RX_IP_CKSUM_GOOD) |
2834 IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,
2835 PKT_RX_L4_CKSUM_GOOD);
2840 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n);
2843 * DPDK callback for RX with scattered packets support.
2846 * Generic pointer to RX queue structure.
2848 * Array to store received packets.
2850 * Maximum number of packets in array.
2853 * Number of packets successfully received (<= pkts_n).
2856 mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
2858 struct rxq *rxq = (struct rxq *)dpdk_rxq;
2859 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
2860 const unsigned int elts_n = rxq->elts_n;
2861 unsigned int elts_head = rxq->elts_head;
2862 struct ibv_recv_wr head;
2863 struct ibv_recv_wr **next = &head.next;
2864 struct ibv_recv_wr *bad_wr;
2866 unsigned int pkts_ret = 0;
2869 if (unlikely(!rxq->sp))
2870 return mlx4_rx_burst(dpdk_rxq, pkts, pkts_n);
2871 if (unlikely(elts == NULL)) /* See RTE_DEV_CMD_SET_MTU. */
2873 for (i = 0; (i != pkts_n); ++i) {
2874 struct rxq_elt_sp *elt = &(*elts)[elts_head];
2875 struct ibv_recv_wr *wr = &elt->wr;
2876 uint64_t wr_id = wr->wr_id;
2878 unsigned int pkt_buf_len;
2879 struct rte_mbuf *pkt_buf = NULL; /* Buffer returned in pkts. */
2880 struct rte_mbuf **pkt_buf_next = &pkt_buf;
2881 unsigned int seg_headroom = RTE_PKTMBUF_HEADROOM;
2885 /* Sanity checks. */
2889 assert(wr_id < rxq->elts_n);
2890 assert(wr->sg_list == elt->sges);
2891 assert(wr->num_sge == elemof(elt->sges));
2892 assert(elts_head < rxq->elts_n);
2893 assert(rxq->elts_head < rxq->elts_n);
2894 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
2896 if (unlikely(ret < 0)) {
2900 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
2902 /* ibv_poll_cq() must be used in case of failure. */
2903 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
2904 if (unlikely(wcs_n == 0))
2906 if (unlikely(wcs_n < 0)) {
2907 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
2908 (void *)rxq, wcs_n);
2912 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
2913 /* Whatever, just repost the offending WR. */
2914 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
2915 " completion status (%d): %s",
2916 (void *)rxq, wc.wr_id, wc.status,
2917 ibv_wc_status_str(wc.status));
2918 #ifdef MLX4_PMD_SOFT_COUNTERS
2919 /* Increment dropped packets counter. */
2920 ++rxq->stats.idropped;
2922 /* Link completed WRs together for repost. */
2933 /* Link completed WRs together for repost. */
2937 * Replace spent segments with new ones, concatenate and
2938 * return them as pkt_buf.
2941 struct ibv_sge *sge = &elt->sges[j];
2942 struct rte_mbuf *seg = elt->bufs[j];
2943 struct rte_mbuf *rep;
2944 unsigned int seg_tailroom;
2947 * Fetch initial bytes of packet descriptor into a
2948 * cacheline while allocating rep.
2951 rep = rte_mbuf_raw_alloc(rxq->mp);
2952 if (unlikely(rep == NULL)) {
2954 * Unable to allocate a replacement mbuf,
2957 DEBUG("rxq=%p, wr_id=%" PRIu64 ":"
2958 " can't allocate a new mbuf",
2959 (void *)rxq, wr_id);
2960 if (pkt_buf != NULL) {
2961 *pkt_buf_next = NULL;
2962 rte_pktmbuf_free(pkt_buf);
2964 /* Increase out of memory counters. */
2965 ++rxq->stats.rx_nombuf;
2966 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
2970 /* Poison user-modifiable fields in rep. */
2971 NEXT(rep) = (void *)((uintptr_t)-1);
2972 SET_DATA_OFF(rep, 0xdead);
2973 DATA_LEN(rep) = 0xd00d;
2974 PKT_LEN(rep) = 0xdeadd00d;
2975 NB_SEGS(rep) = 0x2a;
2979 assert(rep->buf_len == seg->buf_len);
2980 /* Reconfigure sge to use rep instead of seg. */
2981 assert(sge->lkey == rxq->mr->lkey);
2982 sge->addr = ((uintptr_t)rep->buf_addr + seg_headroom);
2985 /* Update pkt_buf if it's the first segment, or link
2986 * seg to the previous one and update pkt_buf_next. */
2987 *pkt_buf_next = seg;
2988 pkt_buf_next = &NEXT(seg);
2989 /* Update seg information. */
2990 seg_tailroom = (seg->buf_len - seg_headroom);
2991 assert(sge->length == seg_tailroom);
2992 SET_DATA_OFF(seg, seg_headroom);
2993 if (likely(len <= seg_tailroom)) {
2995 DATA_LEN(seg) = len;
2998 assert(rte_pktmbuf_headroom(seg) ==
3000 assert(rte_pktmbuf_tailroom(seg) ==
3001 (seg_tailroom - len));
3004 DATA_LEN(seg) = seg_tailroom;
3005 PKT_LEN(seg) = seg_tailroom;
3007 assert(rte_pktmbuf_headroom(seg) == seg_headroom);
3008 assert(rte_pktmbuf_tailroom(seg) == 0);
3009 /* Fix len and clear headroom for next segments. */
3010 len -= seg_tailroom;
3013 /* Update head and tail segments. */
3014 *pkt_buf_next = NULL;
3015 assert(pkt_buf != NULL);
3017 NB_SEGS(pkt_buf) = j;
3018 PORT(pkt_buf) = rxq->port_id;
3019 PKT_LEN(pkt_buf) = pkt_buf_len;
3020 pkt_buf->packet_type = rxq_cq_to_pkt_type(flags);
3021 pkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3023 /* Return packet. */
3024 *(pkts++) = pkt_buf;
3026 #ifdef MLX4_PMD_SOFT_COUNTERS
3027 /* Increase bytes counter. */
3028 rxq->stats.ibytes += pkt_buf_len;
3031 if (++elts_head >= elts_n)
3035 if (unlikely(i == 0))
3040 DEBUG("%p: reposting %d WRs", (void *)rxq, i);
3042 ret = ibv_post_recv(rxq->qp, head.next, &bad_wr);
3043 if (unlikely(ret)) {
3044 /* Inability to repost WRs is fatal. */
3045 DEBUG("%p: ibv_post_recv(): failed for WR %p: %s",
3051 rxq->elts_head = elts_head;
3052 #ifdef MLX4_PMD_SOFT_COUNTERS
3053 /* Increase packets counter. */
3054 rxq->stats.ipackets += pkts_ret;
3060 * DPDK callback for RX.
3062 * The following function is the same as mlx4_rx_burst_sp(), except it doesn't
3063 * manage scattered packets. Improves performance when MRU is lower than the
3064 * size of the first segment.
3067 * Generic pointer to RX queue structure.
3069 * Array to store received packets.
3071 * Maximum number of packets in array.
3074 * Number of packets successfully received (<= pkts_n).
3077 mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
3079 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3080 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3081 const unsigned int elts_n = rxq->elts_n;
3082 unsigned int elts_head = rxq->elts_head;
3083 struct ibv_sge sges[pkts_n];
3085 unsigned int pkts_ret = 0;
3088 if (unlikely(rxq->sp))
3089 return mlx4_rx_burst_sp(dpdk_rxq, pkts, pkts_n);
3090 for (i = 0; (i != pkts_n); ++i) {
3091 struct rxq_elt *elt = &(*elts)[elts_head];
3092 struct ibv_recv_wr *wr = &elt->wr;
3093 uint64_t wr_id = wr->wr_id;
3095 struct rte_mbuf *seg = (void *)((uintptr_t)elt->sge.addr -
3096 WR_ID(wr_id).offset);
3097 struct rte_mbuf *rep;
3100 /* Sanity checks. */
3101 assert(WR_ID(wr_id).id < rxq->elts_n);
3102 assert(wr->sg_list == &elt->sge);
3103 assert(wr->num_sge == 1);
3104 assert(elts_head < rxq->elts_n);
3105 assert(rxq->elts_head < rxq->elts_n);
3107 * Fetch initial bytes of packet descriptor into a
3108 * cacheline while allocating rep.
3110 rte_mbuf_prefetch_part1(seg);
3111 rte_mbuf_prefetch_part2(seg);
3112 ret = rxq->if_cq->poll_length_flags(rxq->cq, NULL, NULL,
3114 if (unlikely(ret < 0)) {
3118 DEBUG("rxq=%p, poll_length() failed (ret=%d)",
3120 /* ibv_poll_cq() must be used in case of failure. */
3121 wcs_n = ibv_poll_cq(rxq->cq, 1, &wc);
3122 if (unlikely(wcs_n == 0))
3124 if (unlikely(wcs_n < 0)) {
3125 DEBUG("rxq=%p, ibv_poll_cq() failed (wcs_n=%d)",
3126 (void *)rxq, wcs_n);
3130 if (unlikely(wc.status != IBV_WC_SUCCESS)) {
3131 /* Whatever, just repost the offending WR. */
3132 DEBUG("rxq=%p, wr_id=%" PRIu64 ": bad work"
3133 " completion status (%d): %s",
3134 (void *)rxq, wc.wr_id, wc.status,
3135 ibv_wc_status_str(wc.status));
3136 #ifdef MLX4_PMD_SOFT_COUNTERS
3137 /* Increment dropped packets counter. */
3138 ++rxq->stats.idropped;
3140 /* Add SGE to array for repost. */
3149 rep = rte_mbuf_raw_alloc(rxq->mp);
3150 if (unlikely(rep == NULL)) {
3152 * Unable to allocate a replacement mbuf,
3155 DEBUG("rxq=%p, wr_id=%" PRIu32 ":"
3156 " can't allocate a new mbuf",
3157 (void *)rxq, WR_ID(wr_id).id);
3158 /* Increase out of memory counters. */
3159 ++rxq->stats.rx_nombuf;
3160 ++rxq->priv->dev->data->rx_mbuf_alloc_failed;
3164 /* Reconfigure sge to use rep instead of seg. */
3165 elt->sge.addr = (uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM;
3166 assert(elt->sge.lkey == rxq->mr->lkey);
3167 WR_ID(wr->wr_id).offset =
3168 (((uintptr_t)rep->buf_addr + RTE_PKTMBUF_HEADROOM) -
3170 assert(WR_ID(wr->wr_id).id == WR_ID(wr_id).id);
3172 /* Add SGE to array for repost. */
3175 /* Update seg information. */
3176 SET_DATA_OFF(seg, RTE_PKTMBUF_HEADROOM);
3178 PORT(seg) = rxq->port_id;
3181 DATA_LEN(seg) = len;
3182 seg->packet_type = rxq_cq_to_pkt_type(flags);
3183 seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
3185 /* Return packet. */
3188 #ifdef MLX4_PMD_SOFT_COUNTERS
3189 /* Increase bytes counter. */
3190 rxq->stats.ibytes += len;
3193 if (++elts_head >= elts_n)
3197 if (unlikely(i == 0))
3201 DEBUG("%p: reposting %u WRs", (void *)rxq, i);
3203 ret = rxq->if_qp->recv_burst(rxq->qp, sges, i);
3204 if (unlikely(ret)) {
3205 /* Inability to repost WRs is fatal. */
3206 DEBUG("%p: recv_burst(): failed (ret=%d)",
3211 rxq->elts_head = elts_head;
3212 #ifdef MLX4_PMD_SOFT_COUNTERS
3213 /* Increase packets counter. */
3214 rxq->stats.ipackets += pkts_ret;
3220 * DPDK callback for RX in secondary processes.
3222 * This function configures all queues from primary process information
3223 * if necessary before reverting to the normal RX burst callback.
3226 * Generic pointer to RX queue structure.
3228 * Array to store received packets.
3230 * Maximum number of packets in array.
3233 * Number of packets successfully received (<= pkts_n).
3236 mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,
3239 struct rxq *rxq = dpdk_rxq;
3240 struct priv *priv = mlx4_secondary_data_setup(rxq->priv);
3241 struct priv *primary_priv;
3247 mlx4_secondary_data[priv->dev->data->port_id].primary_priv;
3248 /* Look for queue index in both private structures. */
3249 for (index = 0; index != priv->rxqs_n; ++index)
3250 if (((*primary_priv->rxqs)[index] == rxq) ||
3251 ((*priv->rxqs)[index] == rxq))
3253 if (index == priv->rxqs_n)
3255 rxq = (*priv->rxqs)[index];
3256 return priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);
3260 * Allocate a Queue Pair.
3261 * Optionally setup inline receive if supported.
3264 * Pointer to private structure.
3266 * Completion queue to associate with QP.
3268 * Number of descriptors in QP (hint only).
3271 * QP pointer or NULL in case of error.
3273 static struct ibv_qp *
3274 rxq_setup_qp(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3275 struct ibv_exp_res_domain *rd)
3277 struct ibv_exp_qp_init_attr attr = {
3278 /* CQ to be associated with the send queue. */
3280 /* CQ to be associated with the receive queue. */
3283 /* Max number of outstanding WRs. */
3284 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3285 priv->device_attr.max_qp_wr :
3287 /* Max number of scatter/gather elements in a WR. */
3288 .max_recv_sge = ((priv->device_attr.max_sge <
3289 MLX4_PMD_SGE_WR_N) ?
3290 priv->device_attr.max_sge :
3293 .qp_type = IBV_QPT_RAW_PACKET,
3294 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3295 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN),
3301 attr.max_inl_recv = priv->inl_recv_size;
3302 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3304 return ibv_exp_create_qp(priv->ctx, &attr);
3310 * Allocate a RSS Queue Pair.
3311 * Optionally setup inline receive if supported.
3314 * Pointer to private structure.
3316 * Completion queue to associate with QP.
3318 * Number of descriptors in QP (hint only).
3320 * If nonzero, create a parent QP, otherwise a child.
3323 * QP pointer or NULL in case of error.
3325 static struct ibv_qp *
3326 rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,
3327 int parent, struct ibv_exp_res_domain *rd)
3329 struct ibv_exp_qp_init_attr attr = {
3330 /* CQ to be associated with the send queue. */
3332 /* CQ to be associated with the receive queue. */
3335 /* Max number of outstanding WRs. */
3336 .max_recv_wr = ((priv->device_attr.max_qp_wr < desc) ?
3337 priv->device_attr.max_qp_wr :
3339 /* Max number of scatter/gather elements in a WR. */
3340 .max_recv_sge = ((priv->device_attr.max_sge <
3341 MLX4_PMD_SGE_WR_N) ?
3342 priv->device_attr.max_sge :
3345 .qp_type = IBV_QPT_RAW_PACKET,
3346 .comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |
3347 IBV_EXP_QP_INIT_ATTR_RES_DOMAIN |
3348 IBV_EXP_QP_INIT_ATTR_QPG),
3354 attr.max_inl_recv = priv->inl_recv_size,
3355 attr.comp_mask |= IBV_EXP_QP_INIT_ATTR_INL_RECV;
3358 attr.qpg.qpg_type = IBV_EXP_QPG_PARENT;
3359 /* TSS isn't necessary. */
3360 attr.qpg.parent_attrib.tss_child_count = 0;
3361 attr.qpg.parent_attrib.rss_child_count =
3362 rte_align32pow2(priv->rxqs_n + 1) >> 1;
3363 DEBUG("initializing parent RSS queue");
3365 attr.qpg.qpg_type = IBV_EXP_QPG_CHILD_RX;
3366 attr.qpg.qpg_parent = priv->rxq_parent.qp;
3367 DEBUG("initializing child RSS queue");
3369 return ibv_exp_create_qp(priv->ctx, &attr);
3372 #endif /* RSS_SUPPORT */
3375 * Reconfigure a RX queue with new parameters.
3377 * rxq_rehash() does not allocate mbufs, which, if not done from the right
3378 * thread (such as a control thread), may corrupt the pool.
3379 * In case of failure, the queue is left untouched.
3382 * Pointer to Ethernet device structure.
3387 * 0 on success, errno value on failure.
3390 rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)
3392 struct priv *priv = rxq->priv;
3393 struct rxq tmpl = *rxq;
3394 unsigned int mbuf_n;
3395 unsigned int desc_n;
3396 struct rte_mbuf **pool;
3398 struct ibv_exp_qp_attr mod;
3399 struct ibv_recv_wr *bad_wr;
3400 unsigned int mb_len;
3402 int parent = (rxq == &priv->rxq_parent);
3405 ERROR("%p: cannot rehash parent queue %p",
3406 (void *)dev, (void *)rxq);
3409 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
3410 DEBUG("%p: rehashing queue %p", (void *)dev, (void *)rxq);
3411 /* Number of descriptors and mbufs currently allocated. */
3412 desc_n = (tmpl.elts_n * (tmpl.sp ? MLX4_PMD_SGE_WR_N : 1));
3414 /* Toggle RX checksum offload if hardware supports it. */
3415 if (priv->hw_csum) {
3416 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3417 rxq->csum = tmpl.csum;
3419 if (priv->hw_csum_l2tun) {
3420 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3421 rxq->csum_l2tun = tmpl.csum_l2tun;
3423 /* Enable scattered packets support for this queue if necessary. */
3424 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3425 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3426 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3427 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3429 desc_n /= MLX4_PMD_SGE_WR_N;
3432 DEBUG("%p: %s scattered packets support (%u WRs)",
3433 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc_n);
3434 /* If scatter mode is the same as before, nothing to do. */
3435 if (tmpl.sp == rxq->sp) {
3436 DEBUG("%p: nothing to do", (void *)dev);
3439 /* Remove attached flows if RSS is disabled (no parent queue). */
3441 rxq_allmulticast_disable(&tmpl);
3442 rxq_promiscuous_disable(&tmpl);
3443 rxq_mac_addrs_del(&tmpl);
3444 /* Update original queue in case of failure. */
3445 rxq->allmulti_flow = tmpl.allmulti_flow;
3446 rxq->promisc_flow = tmpl.promisc_flow;
3447 memcpy(rxq->mac_configured, tmpl.mac_configured,
3448 sizeof(rxq->mac_configured));
3449 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3451 /* From now on, any failure will render the queue unusable.
3452 * Reinitialize QP. */
3453 mod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };
3454 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3456 ERROR("%p: cannot reset QP: %s", (void *)dev, strerror(err));
3460 err = ibv_resize_cq(tmpl.cq, desc_n);
3462 ERROR("%p: cannot resize CQ: %s", (void *)dev, strerror(err));
3466 mod = (struct ibv_exp_qp_attr){
3467 /* Move the QP to this state. */
3468 .qp_state = IBV_QPS_INIT,
3469 /* Primary port number. */
3470 .port_num = priv->port
3472 err = ibv_exp_modify_qp(tmpl.qp, &mod,
3475 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3476 #endif /* RSS_SUPPORT */
3479 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3480 (void *)dev, strerror(err));
3484 /* Reconfigure flows. Do not care for errors. */
3486 rxq_mac_addrs_add(&tmpl);
3488 rxq_promiscuous_enable(&tmpl);
3490 rxq_allmulticast_enable(&tmpl);
3491 /* Update original queue in case of failure. */
3492 rxq->allmulti_flow = tmpl.allmulti_flow;
3493 rxq->promisc_flow = tmpl.promisc_flow;
3494 memcpy(rxq->mac_configured, tmpl.mac_configured,
3495 sizeof(rxq->mac_configured));
3496 memcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));
3498 /* Allocate pool. */
3499 pool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);
3501 ERROR("%p: cannot allocate memory", (void *)dev);
3504 /* Snatch mbufs from original queue. */
3507 struct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;
3509 for (i = 0; (i != elemof(*elts)); ++i) {
3510 struct rxq_elt_sp *elt = &(*elts)[i];
3513 for (j = 0; (j != elemof(elt->bufs)); ++j) {
3514 assert(elt->bufs[j] != NULL);
3515 pool[k++] = elt->bufs[j];
3519 struct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;
3521 for (i = 0; (i != elemof(*elts)); ++i) {
3522 struct rxq_elt *elt = &(*elts)[i];
3523 struct rte_mbuf *buf = (void *)
3524 ((uintptr_t)elt->sge.addr -
3525 WR_ID(elt->wr.wr_id).offset);
3527 assert(WR_ID(elt->wr.wr_id).id == i);
3531 assert(k == mbuf_n);
3533 tmpl.elts.sp = NULL;
3534 assert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);
3536 rxq_alloc_elts_sp(&tmpl, desc_n, pool) :
3537 rxq_alloc_elts(&tmpl, desc_n, pool));
3539 ERROR("%p: cannot reallocate WRs, aborting", (void *)dev);
3544 assert(tmpl.elts_n == desc_n);
3545 assert(tmpl.elts.sp != NULL);
3547 /* Clean up original data. */
3549 rte_free(rxq->elts.sp);
3550 rxq->elts.sp = NULL;
3552 err = ibv_post_recv(tmpl.qp,
3554 &(*tmpl.elts.sp)[0].wr :
3555 &(*tmpl.elts.no_sp)[0].wr),
3558 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3564 mod = (struct ibv_exp_qp_attr){
3565 .qp_state = IBV_QPS_RTR
3567 err = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3569 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3570 (void *)dev, strerror(err));
3578 * Configure a RX queue.
3581 * Pointer to Ethernet device structure.
3583 * Pointer to RX queue structure.
3585 * Number of descriptors to configure in queue.
3587 * NUMA socket on which memory must be allocated.
3589 * If true, the queue is disabled because its index is higher or
3590 * equal to the real number of queues, which must be a power of 2.
3592 * Thresholds parameters.
3594 * Memory pool for buffer allocations.
3597 * 0 on success, errno value on failure.
3600 rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,
3601 unsigned int socket, int inactive, const struct rte_eth_rxconf *conf,
3602 struct rte_mempool *mp)
3604 struct priv *priv = dev->data->dev_private;
3610 struct ibv_exp_qp_attr mod;
3612 struct ibv_exp_query_intf_params params;
3613 struct ibv_exp_cq_init_attr cq;
3614 struct ibv_exp_res_domain_init_attr rd;
3616 enum ibv_exp_query_intf_status status;
3617 struct ibv_recv_wr *bad_wr;
3618 unsigned int mb_len;
3620 int parent = (rxq == &priv->rxq_parent);
3622 (void)conf; /* Thresholds configuration (ignored). */
3624 * If this is a parent queue, hardware must support RSS and
3625 * RSS must be enabled.
3627 assert((!parent) || ((priv->hw_rss) && (priv->rss)));
3629 /* Even if unused, ibv_create_cq() requires at least one
3634 mb_len = rte_pktmbuf_data_room_size(mp);
3635 if ((desc == 0) || (desc % MLX4_PMD_SGE_WR_N)) {
3636 ERROR("%p: invalid number of RX descriptors (must be a"
3637 " multiple of %d)", (void *)dev, MLX4_PMD_SGE_WR_N);
3640 /* Toggle RX checksum offload if hardware supports it. */
3642 tmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3643 if (priv->hw_csum_l2tun)
3644 tmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;
3645 /* Enable scattered packets support for this queue if necessary. */
3646 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
3647 if ((dev->data->dev_conf.rxmode.jumbo_frame) &&
3648 (dev->data->dev_conf.rxmode.max_rx_pkt_len >
3649 (mb_len - RTE_PKTMBUF_HEADROOM))) {
3651 desc /= MLX4_PMD_SGE_WR_N;
3653 DEBUG("%p: %s scattered packets support (%u WRs)",
3654 (void *)dev, (tmpl.sp ? "enabling" : "disabling"), desc);
3655 /* Use the entire RX mempool as the memory region. */
3656 tmpl.mr = mlx4_mp2mr(priv->pd, mp);
3657 if (tmpl.mr == NULL) {
3659 ERROR("%p: MR creation failure: %s",
3660 (void *)dev, strerror(ret));
3664 attr.rd = (struct ibv_exp_res_domain_init_attr){
3665 .comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |
3666 IBV_EXP_RES_DOMAIN_MSG_MODEL),
3667 .thread_model = IBV_EXP_THREAD_SINGLE,
3668 .msg_model = IBV_EXP_MSG_HIGH_BW,
3670 tmpl.rd = ibv_exp_create_res_domain(priv->ctx, &attr.rd);
3671 if (tmpl.rd == NULL) {
3673 ERROR("%p: RD creation failure: %s",
3674 (void *)dev, strerror(ret));
3677 attr.cq = (struct ibv_exp_cq_init_attr){
3678 .comp_mask = IBV_EXP_CQ_INIT_ATTR_RES_DOMAIN,
3679 .res_domain = tmpl.rd,
3681 tmpl.cq = ibv_exp_create_cq(priv->ctx, desc, NULL, NULL, 0, &attr.cq);
3682 if (tmpl.cq == NULL) {
3684 ERROR("%p: CQ creation failure: %s",
3685 (void *)dev, strerror(ret));
3688 DEBUG("priv->device_attr.max_qp_wr is %d",
3689 priv->device_attr.max_qp_wr);
3690 DEBUG("priv->device_attr.max_sge is %d",
3691 priv->device_attr.max_sge);
3693 if (priv->rss && !inactive)
3694 tmpl.qp = rxq_setup_qp_rss(priv, tmpl.cq, desc, parent,
3697 #endif /* RSS_SUPPORT */
3698 tmpl.qp = rxq_setup_qp(priv, tmpl.cq, desc, tmpl.rd);
3699 if (tmpl.qp == NULL) {
3700 ret = (errno ? errno : EINVAL);
3701 ERROR("%p: QP creation failure: %s",
3702 (void *)dev, strerror(ret));
3705 mod = (struct ibv_exp_qp_attr){
3706 /* Move the QP to this state. */
3707 .qp_state = IBV_QPS_INIT,
3708 /* Primary port number. */
3709 .port_num = priv->port
3711 ret = ibv_exp_modify_qp(tmpl.qp, &mod,
3714 (parent ? IBV_EXP_QP_GROUP_RSS : 0) |
3715 #endif /* RSS_SUPPORT */
3718 ERROR("%p: QP state to IBV_QPS_INIT failed: %s",
3719 (void *)dev, strerror(ret));
3722 if ((parent) || (!priv->rss)) {
3723 /* Configure MAC and broadcast addresses. */
3724 ret = rxq_mac_addrs_add(&tmpl);
3726 ERROR("%p: QP flow attachment failed: %s",
3727 (void *)dev, strerror(ret));
3731 /* Allocate descriptors for RX queues, except for the RSS parent. */
3735 ret = rxq_alloc_elts_sp(&tmpl, desc, NULL);
3737 ret = rxq_alloc_elts(&tmpl, desc, NULL);
3739 ERROR("%p: RXQ allocation failed: %s",
3740 (void *)dev, strerror(ret));
3743 ret = ibv_post_recv(tmpl.qp,
3745 &(*tmpl.elts.sp)[0].wr :
3746 &(*tmpl.elts.no_sp)[0].wr),
3749 ERROR("%p: ibv_post_recv() failed for WR %p: %s",
3756 mod = (struct ibv_exp_qp_attr){
3757 .qp_state = IBV_QPS_RTR
3759 ret = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);
3761 ERROR("%p: QP state to IBV_QPS_RTR failed: %s",
3762 (void *)dev, strerror(ret));
3766 tmpl.port_id = dev->data->port_id;
3767 DEBUG("%p: RTE port ID: %u", (void *)rxq, tmpl.port_id);
3768 attr.params = (struct ibv_exp_query_intf_params){
3769 .intf_scope = IBV_EXP_INTF_GLOBAL,
3770 .intf = IBV_EXP_INTF_CQ,
3773 tmpl.if_cq = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3774 if (tmpl.if_cq == NULL) {
3775 ERROR("%p: CQ interface family query failed with status %d",
3776 (void *)dev, status);
3779 attr.params = (struct ibv_exp_query_intf_params){
3780 .intf_scope = IBV_EXP_INTF_GLOBAL,
3781 .intf = IBV_EXP_INTF_QP_BURST,
3784 tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
3785 if (tmpl.if_qp == NULL) {
3786 ERROR("%p: QP interface family query failed with status %d",
3787 (void *)dev, status);
3790 /* Clean up rxq in case we're reinitializing it. */
3791 DEBUG("%p: cleaning-up old rxq just in case", (void *)rxq);
3794 DEBUG("%p: rxq updated with %p", (void *)rxq, (void *)&tmpl);
3804 * DPDK callback to configure a RX queue.
3807 * Pointer to Ethernet device structure.
3811 * Number of descriptors to configure in queue.
3813 * NUMA socket on which memory must be allocated.
3815 * Thresholds parameters.
3817 * Memory pool for buffer allocations.
3820 * 0 on success, negative errno value on failure.
3823 mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
3824 unsigned int socket, const struct rte_eth_rxconf *conf,
3825 struct rte_mempool *mp)
3827 struct priv *priv = dev->data->dev_private;
3828 struct rxq *rxq = (*priv->rxqs)[idx];
3832 if (mlx4_is_secondary())
3833 return -E_RTE_SECONDARY;
3835 DEBUG("%p: configuring queue %u for %u descriptors",
3836 (void *)dev, idx, desc);
3837 if (idx >= priv->rxqs_n) {
3838 ERROR("%p: queue index out of range (%u >= %u)",
3839 (void *)dev, idx, priv->rxqs_n);
3844 DEBUG("%p: reusing already allocated queue index %u (%p)",
3845 (void *)dev, idx, (void *)rxq);
3846 if (priv->started) {
3850 (*priv->rxqs)[idx] = NULL;
3853 rxq = rte_calloc_socket("RXQ", 1, sizeof(*rxq), 0, socket);
3855 ERROR("%p: unable to allocate queue index %u",
3861 if (idx >= rte_align32pow2(priv->rxqs_n + 1) >> 1)
3863 ret = rxq_setup(dev, rxq, desc, socket, inactive, conf, mp);
3867 rxq->stats.idx = idx;
3868 DEBUG("%p: adding RX queue %p to list",
3869 (void *)dev, (void *)rxq);
3870 (*priv->rxqs)[idx] = rxq;
3871 /* Update receive callback. */
3873 dev->rx_pkt_burst = mlx4_rx_burst_sp;
3875 dev->rx_pkt_burst = mlx4_rx_burst;
3882 * DPDK callback to release a RX queue.
3885 * Generic RX queue pointer.
3888 mlx4_rx_queue_release(void *dpdk_rxq)
3890 struct rxq *rxq = (struct rxq *)dpdk_rxq;
3894 if (mlx4_is_secondary())
3900 assert(rxq != &priv->rxq_parent);
3901 for (i = 0; (i != priv->rxqs_n); ++i)
3902 if ((*priv->rxqs)[i] == rxq) {
3903 DEBUG("%p: removing RX queue %p from list",
3904 (void *)priv->dev, (void *)rxq);
3905 (*priv->rxqs)[i] = NULL;
3914 priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
3917 * DPDK callback to start the device.
3919 * Simulate device start by attaching all configured flows.
3922 * Pointer to Ethernet device structure.
3925 * 0 on success, negative errno value on failure.
3928 mlx4_dev_start(struct rte_eth_dev *dev)
3930 struct priv *priv = dev->data->dev_private;
3936 if (mlx4_is_secondary())
3937 return -E_RTE_SECONDARY;
3939 if (priv->started) {
3943 DEBUG("%p: attaching configured flows to all RX queues", (void *)dev);
3946 rxq = &priv->rxq_parent;
3949 rxq = (*priv->rxqs)[0];
3952 /* Iterate only once when RSS is enabled. */
3954 /* Ignore nonexistent RX queues. */
3957 ret = rxq_mac_addrs_add(rxq);
3958 if (!ret && priv->promisc)
3959 ret = rxq_promiscuous_enable(rxq);
3960 if (!ret && priv->allmulti)
3961 ret = rxq_allmulticast_enable(rxq);
3964 WARN("%p: QP flow attachment failed: %s",
3965 (void *)dev, strerror(ret));
3967 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
3968 priv_dev_interrupt_handler_install(priv, dev);
3969 ret = mlx4_priv_flow_start(priv);
3971 ERROR("%p: flow start failed: %s",
3972 (void *)dev, strerror(ret));
3980 rxq = (*priv->rxqs)[i--];
3982 rxq_allmulticast_disable(rxq);
3983 rxq_promiscuous_disable(rxq);
3984 rxq_mac_addrs_del(rxq);
3993 * DPDK callback to stop the device.
3995 * Simulate device stop by detaching all configured flows.
3998 * Pointer to Ethernet device structure.
4001 mlx4_dev_stop(struct rte_eth_dev *dev)
4003 struct priv *priv = dev->data->dev_private;
4008 if (mlx4_is_secondary())
4011 if (!priv->started) {
4015 DEBUG("%p: detaching flows from all RX queues", (void *)dev);
4018 rxq = &priv->rxq_parent;
4021 rxq = (*priv->rxqs)[0];
4024 mlx4_priv_flow_stop(priv);
4025 /* Iterate only once when RSS is enabled. */
4027 /* Ignore nonexistent RX queues. */
4030 rxq_allmulticast_disable(rxq);
4031 rxq_promiscuous_disable(rxq);
4032 rxq_mac_addrs_del(rxq);
4033 } while ((--r) && ((rxq = (*priv->rxqs)[++i]), i));
4038 * Dummy DPDK callback for TX.
4040 * This function is used to temporarily replace the real callback during
4041 * unsafe control operations on the queue, or in case of error.
4044 * Generic pointer to TX queue structure.
4046 * Packets to transmit.
4048 * Number of packets in array.
4051 * Number of packets successfully transmitted (<= pkts_n).
4054 removed_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
4063 * Dummy DPDK callback for RX.
4065 * This function is used to temporarily replace the real callback during
4066 * unsafe control operations on the queue, or in case of error.
4069 * Generic pointer to RX queue structure.
4071 * Array to store received packets.
4073 * Maximum number of packets in array.
4076 * Number of packets successfully received (<= pkts_n).
4079 removed_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
4088 priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
4091 * DPDK callback to close the device.
4093 * Destroy all queues and objects, free memory.
4096 * Pointer to Ethernet device structure.
4099 mlx4_dev_close(struct rte_eth_dev *dev)
4101 struct priv *priv = mlx4_get_priv(dev);
4108 DEBUG("%p: closing device \"%s\"",
4110 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
4111 /* Prevent crashes when queues are still in use. This is unfortunately
4112 * still required for DPDK 1.3 because some programs (such as testpmd)
4113 * never release them before closing the device. */
4114 dev->rx_pkt_burst = removed_rx_burst;
4115 dev->tx_pkt_burst = removed_tx_burst;
4116 if (priv->rxqs != NULL) {
4117 /* XXX race condition if mlx4_rx_burst() is still running. */
4119 for (i = 0; (i != priv->rxqs_n); ++i) {
4120 tmp = (*priv->rxqs)[i];
4123 (*priv->rxqs)[i] = NULL;
4130 if (priv->txqs != NULL) {
4131 /* XXX race condition if mlx4_tx_burst() is still running. */
4133 for (i = 0; (i != priv->txqs_n); ++i) {
4134 tmp = (*priv->txqs)[i];
4137 (*priv->txqs)[i] = NULL;
4145 rxq_cleanup(&priv->rxq_parent);
4146 if (priv->pd != NULL) {
4147 assert(priv->ctx != NULL);
4148 claim_zero(ibv_dealloc_pd(priv->pd));
4149 claim_zero(ibv_close_device(priv->ctx));
4151 assert(priv->ctx == NULL);
4152 priv_dev_interrupt_handler_uninstall(priv, dev);
4154 memset(priv, 0, sizeof(*priv));
4158 * Change the link state (UP / DOWN).
4161 * Pointer to Ethernet device private data.
4163 * Nonzero for link up, otherwise link down.
4166 * 0 on success, errno value on failure.
4169 priv_set_link(struct priv *priv, int up)
4171 struct rte_eth_dev *dev = priv->dev;
4176 err = priv_set_flags(priv, ~IFF_UP, IFF_UP);
4179 for (i = 0; i < priv->rxqs_n; i++)
4180 if ((*priv->rxqs)[i]->sp)
4182 /* Check if an sp queue exists.
4183 * Note: Some old frames might be received.
4185 if (i == priv->rxqs_n)
4186 dev->rx_pkt_burst = mlx4_rx_burst;
4188 dev->rx_pkt_burst = mlx4_rx_burst_sp;
4189 dev->tx_pkt_burst = mlx4_tx_burst;
4191 err = priv_set_flags(priv, ~IFF_UP, ~IFF_UP);
4194 dev->rx_pkt_burst = removed_rx_burst;
4195 dev->tx_pkt_burst = removed_tx_burst;
4201 * DPDK callback to bring the link DOWN.
4204 * Pointer to Ethernet device structure.
4207 * 0 on success, errno value on failure.
4210 mlx4_set_link_down(struct rte_eth_dev *dev)
4212 struct priv *priv = dev->data->dev_private;
4216 err = priv_set_link(priv, 0);
4222 * DPDK callback to bring the link UP.
4225 * Pointer to Ethernet device structure.
4228 * 0 on success, errno value on failure.
4231 mlx4_set_link_up(struct rte_eth_dev *dev)
4233 struct priv *priv = dev->data->dev_private;
4237 err = priv_set_link(priv, 1);
4242 * DPDK callback to get information about the device.
4245 * Pointer to Ethernet device structure.
4247 * Info structure output buffer.
4250 mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
4252 struct priv *priv = mlx4_get_priv(dev);
4254 char ifname[IF_NAMESIZE];
4256 info->pci_dev = RTE_DEV_TO_PCI(dev->device);
4261 /* FIXME: we should ask the device for these values. */
4262 info->min_rx_bufsize = 32;
4263 info->max_rx_pktlen = 65536;
4265 * Since we need one CQ per QP, the limit is the minimum number
4266 * between the two values.
4268 max = ((priv->device_attr.max_cq > priv->device_attr.max_qp) ?
4269 priv->device_attr.max_qp : priv->device_attr.max_cq);
4270 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
4273 info->max_rx_queues = max;
4274 info->max_tx_queues = max;
4275 /* Last array entry is reserved for broadcast. */
4276 info->max_mac_addrs = (elemof(priv->mac) - 1);
4277 info->rx_offload_capa =
4279 (DEV_RX_OFFLOAD_IPV4_CKSUM |
4280 DEV_RX_OFFLOAD_UDP_CKSUM |
4281 DEV_RX_OFFLOAD_TCP_CKSUM) :
4283 info->tx_offload_capa =
4285 (DEV_TX_OFFLOAD_IPV4_CKSUM |
4286 DEV_TX_OFFLOAD_UDP_CKSUM |
4287 DEV_TX_OFFLOAD_TCP_CKSUM) :
4289 if (priv_get_ifname(priv, &ifname) == 0)
4290 info->if_index = if_nametoindex(ifname);
4293 ETH_LINK_SPEED_10G |
4294 ETH_LINK_SPEED_20G |
4295 ETH_LINK_SPEED_40G |
4300 static const uint32_t *
4301 mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
4303 static const uint32_t ptypes[] = {
4304 /* refers to rxq_cq_to_pkt_type() */
4307 RTE_PTYPE_INNER_L3_IPV4,
4308 RTE_PTYPE_INNER_L3_IPV6,
4312 if (dev->rx_pkt_burst == mlx4_rx_burst ||
4313 dev->rx_pkt_burst == mlx4_rx_burst_sp)
4319 * DPDK callback to get device statistics.
4322 * Pointer to Ethernet device structure.
4324 * Stats structure output buffer.
4327 mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
4329 struct priv *priv = mlx4_get_priv(dev);
4330 struct rte_eth_stats tmp = {0};
4337 /* Add software counters. */
4338 for (i = 0; (i != priv->rxqs_n); ++i) {
4339 struct rxq *rxq = (*priv->rxqs)[i];
4343 idx = rxq->stats.idx;
4344 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4345 #ifdef MLX4_PMD_SOFT_COUNTERS
4346 tmp.q_ipackets[idx] += rxq->stats.ipackets;
4347 tmp.q_ibytes[idx] += rxq->stats.ibytes;
4349 tmp.q_errors[idx] += (rxq->stats.idropped +
4350 rxq->stats.rx_nombuf);
4352 #ifdef MLX4_PMD_SOFT_COUNTERS
4353 tmp.ipackets += rxq->stats.ipackets;
4354 tmp.ibytes += rxq->stats.ibytes;
4356 tmp.ierrors += rxq->stats.idropped;
4357 tmp.rx_nombuf += rxq->stats.rx_nombuf;
4359 for (i = 0; (i != priv->txqs_n); ++i) {
4360 struct txq *txq = (*priv->txqs)[i];
4364 idx = txq->stats.idx;
4365 if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
4366 #ifdef MLX4_PMD_SOFT_COUNTERS
4367 tmp.q_opackets[idx] += txq->stats.opackets;
4368 tmp.q_obytes[idx] += txq->stats.obytes;
4370 tmp.q_errors[idx] += txq->stats.odropped;
4372 #ifdef MLX4_PMD_SOFT_COUNTERS
4373 tmp.opackets += txq->stats.opackets;
4374 tmp.obytes += txq->stats.obytes;
4376 tmp.oerrors += txq->stats.odropped;
4378 #ifndef MLX4_PMD_SOFT_COUNTERS
4379 /* FIXME: retrieve and add hardware counters. */
4386 * DPDK callback to clear device statistics.
4389 * Pointer to Ethernet device structure.
4392 mlx4_stats_reset(struct rte_eth_dev *dev)
4394 struct priv *priv = mlx4_get_priv(dev);
4401 for (i = 0; (i != priv->rxqs_n); ++i) {
4402 if ((*priv->rxqs)[i] == NULL)
4404 idx = (*priv->rxqs)[i]->stats.idx;
4405 (*priv->rxqs)[i]->stats =
4406 (struct mlx4_rxq_stats){ .idx = idx };
4408 for (i = 0; (i != priv->txqs_n); ++i) {
4409 if ((*priv->txqs)[i] == NULL)
4411 idx = (*priv->txqs)[i]->stats.idx;
4412 (*priv->txqs)[i]->stats =
4413 (struct mlx4_txq_stats){ .idx = idx };
4415 #ifndef MLX4_PMD_SOFT_COUNTERS
4416 /* FIXME: reset hardware counters. */
4422 * DPDK callback to remove a MAC address.
4425 * Pointer to Ethernet device structure.
4427 * MAC address index.
4430 mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
4432 struct priv *priv = dev->data->dev_private;
4434 if (mlx4_is_secondary())
4437 DEBUG("%p: removing MAC address from index %" PRIu32,
4438 (void *)dev, index);
4439 /* Last array entry is reserved for broadcast. */
4440 if (index >= (elemof(priv->mac) - 1))
4442 priv_mac_addr_del(priv, index);
4448 * DPDK callback to add a MAC address.
4451 * Pointer to Ethernet device structure.
4453 * MAC address to register.
4455 * MAC address index.
4457 * VMDq pool index to associate address with (ignored).
4460 mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,
4461 uint32_t index, uint32_t vmdq)
4463 struct priv *priv = dev->data->dev_private;
4465 if (mlx4_is_secondary())
4469 DEBUG("%p: adding MAC address at index %" PRIu32,
4470 (void *)dev, index);
4471 /* Last array entry is reserved for broadcast. */
4472 if (index >= (elemof(priv->mac) - 1))
4474 priv_mac_addr_add(priv, index,
4475 (const uint8_t (*)[ETHER_ADDR_LEN])
4476 mac_addr->addr_bytes);
4482 * DPDK callback to set the primary MAC address.
4485 * Pointer to Ethernet device structure.
4487 * MAC address to register.
4490 mlx4_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
4492 DEBUG("%p: setting primary MAC address", (void *)dev);
4493 mlx4_mac_addr_remove(dev, 0);
4494 mlx4_mac_addr_add(dev, mac_addr, 0, 0);
4498 * DPDK callback to enable promiscuous mode.
4501 * Pointer to Ethernet device structure.
4504 mlx4_promiscuous_enable(struct rte_eth_dev *dev)
4506 struct priv *priv = dev->data->dev_private;
4510 if (mlx4_is_secondary())
4513 if (priv->promisc) {
4517 /* If device isn't started, this is all we need to do. */
4521 ret = rxq_promiscuous_enable(&priv->rxq_parent);
4528 for (i = 0; (i != priv->rxqs_n); ++i) {
4529 if ((*priv->rxqs)[i] == NULL)
4531 ret = rxq_promiscuous_enable((*priv->rxqs)[i]);
4534 /* Failure, rollback. */
4536 if ((*priv->rxqs)[--i] != NULL)
4537 rxq_promiscuous_disable((*priv->rxqs)[i]);
4547 * DPDK callback to disable promiscuous mode.
4550 * Pointer to Ethernet device structure.
4553 mlx4_promiscuous_disable(struct rte_eth_dev *dev)
4555 struct priv *priv = dev->data->dev_private;
4558 if (mlx4_is_secondary())
4561 if (!priv->promisc) {
4566 rxq_promiscuous_disable(&priv->rxq_parent);
4569 for (i = 0; (i != priv->rxqs_n); ++i)
4570 if ((*priv->rxqs)[i] != NULL)
4571 rxq_promiscuous_disable((*priv->rxqs)[i]);
4578 * DPDK callback to enable allmulti mode.
4581 * Pointer to Ethernet device structure.
4584 mlx4_allmulticast_enable(struct rte_eth_dev *dev)
4586 struct priv *priv = dev->data->dev_private;
4590 if (mlx4_is_secondary())
4593 if (priv->allmulti) {
4597 /* If device isn't started, this is all we need to do. */
4601 ret = rxq_allmulticast_enable(&priv->rxq_parent);
4608 for (i = 0; (i != priv->rxqs_n); ++i) {
4609 if ((*priv->rxqs)[i] == NULL)
4611 ret = rxq_allmulticast_enable((*priv->rxqs)[i]);
4614 /* Failure, rollback. */
4616 if ((*priv->rxqs)[--i] != NULL)
4617 rxq_allmulticast_disable((*priv->rxqs)[i]);
4627 * DPDK callback to disable allmulti mode.
4630 * Pointer to Ethernet device structure.
4633 mlx4_allmulticast_disable(struct rte_eth_dev *dev)
4635 struct priv *priv = dev->data->dev_private;
4638 if (mlx4_is_secondary())
4641 if (!priv->allmulti) {
4646 rxq_allmulticast_disable(&priv->rxq_parent);
4649 for (i = 0; (i != priv->rxqs_n); ++i)
4650 if ((*priv->rxqs)[i] != NULL)
4651 rxq_allmulticast_disable((*priv->rxqs)[i]);
4658 * DPDK callback to retrieve physical link information.
4661 * Pointer to Ethernet device structure.
4662 * @param wait_to_complete
4663 * Wait for request completion (ignored).
4666 mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)
4668 const struct priv *priv = mlx4_get_priv(dev);
4669 struct ethtool_cmd edata = {
4673 struct rte_eth_link dev_link;
4676 /* priv_lock() is not taken to allow concurrent calls. */
4680 (void)wait_to_complete;
4681 if (priv_ifreq(priv, SIOCGIFFLAGS, &ifr)) {
4682 WARN("ioctl(SIOCGIFFLAGS) failed: %s", strerror(errno));
4685 memset(&dev_link, 0, sizeof(dev_link));
4686 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
4687 (ifr.ifr_flags & IFF_RUNNING));
4688 ifr.ifr_data = (void *)&edata;
4689 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4690 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
4694 link_speed = ethtool_cmd_speed(&edata);
4695 if (link_speed == -1)
4696 dev_link.link_speed = 0;
4698 dev_link.link_speed = link_speed;
4699 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
4700 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
4701 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
4702 ETH_LINK_SPEED_FIXED);
4703 if (memcmp(&dev_link, &dev->data->dev_link, sizeof(dev_link))) {
4704 /* Link status changed. */
4705 dev->data->dev_link = dev_link;
4708 /* Link status is still the same. */
4713 * DPDK callback to change the MTU.
4715 * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be
4716 * received). Use this as a hint to enable/disable scattered packets support
4717 * and improve performance when not needed.
4718 * Since failure is not an option, reconfiguring queues on the fly is not
4722 * Pointer to Ethernet device structure.
4727 * 0 on success, negative errno value on failure.
4730 mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
4732 struct priv *priv = dev->data->dev_private;
4735 uint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =
4738 if (mlx4_is_secondary())
4739 return -E_RTE_SECONDARY;
4741 /* Set kernel interface MTU first. */
4742 if (priv_set_mtu(priv, mtu)) {
4744 WARN("cannot set port %u MTU to %u: %s", priv->port, mtu,
4748 DEBUG("adapter port %u MTU set to %u", priv->port, mtu);
4750 /* Temporarily replace RX handler with a fake one, assuming it has not
4751 * been copied elsewhere. */
4752 dev->rx_pkt_burst = removed_rx_burst;
4753 /* Make sure everyone has left mlx4_rx_burst() and uses
4754 * removed_rx_burst() instead. */
4757 /* Reconfigure each RX queue. */
4758 for (i = 0; (i != priv->rxqs_n); ++i) {
4759 struct rxq *rxq = (*priv->rxqs)[i];
4760 unsigned int mb_len;
4761 unsigned int max_frame_len;
4766 /* Calculate new maximum frame length according to MTU and
4767 * toggle scattered support (sp) if necessary. */
4768 max_frame_len = (priv->mtu + ETHER_HDR_LEN +
4769 (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));
4770 mb_len = rte_pktmbuf_data_room_size(rxq->mp);
4771 assert(mb_len >= RTE_PKTMBUF_HEADROOM);
4772 sp = (max_frame_len > (mb_len - RTE_PKTMBUF_HEADROOM));
4773 /* Provide new values to rxq_setup(). */
4774 dev->data->dev_conf.rxmode.jumbo_frame = sp;
4775 dev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;
4776 ret = rxq_rehash(dev, rxq);
4778 /* Force SP RX if that queue requires it and abort. */
4780 rx_func = mlx4_rx_burst_sp;
4783 /* Reenable non-RSS queue attributes. No need to check
4784 * for errors at this stage. */
4786 rxq_mac_addrs_add(rxq);
4788 rxq_promiscuous_enable(rxq);
4790 rxq_allmulticast_enable(rxq);
4792 /* Scattered burst function takes priority. */
4794 rx_func = mlx4_rx_burst_sp;
4796 /* Burst functions can now be called again. */
4798 dev->rx_pkt_burst = rx_func;
4806 * DPDK callback to get flow control status.
4809 * Pointer to Ethernet device structure.
4810 * @param[out] fc_conf
4811 * Flow control output buffer.
4814 * 0 on success, negative errno value on failure.
4817 mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4819 struct priv *priv = dev->data->dev_private;
4821 struct ethtool_pauseparam ethpause = {
4822 .cmd = ETHTOOL_GPAUSEPARAM
4826 if (mlx4_is_secondary())
4827 return -E_RTE_SECONDARY;
4828 ifr.ifr_data = (void *)ðpause;
4830 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4832 WARN("ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM)"
4838 fc_conf->autoneg = ethpause.autoneg;
4839 if (ethpause.rx_pause && ethpause.tx_pause)
4840 fc_conf->mode = RTE_FC_FULL;
4841 else if (ethpause.rx_pause)
4842 fc_conf->mode = RTE_FC_RX_PAUSE;
4843 else if (ethpause.tx_pause)
4844 fc_conf->mode = RTE_FC_TX_PAUSE;
4846 fc_conf->mode = RTE_FC_NONE;
4856 * DPDK callback to modify flow control parameters.
4859 * Pointer to Ethernet device structure.
4860 * @param[in] fc_conf
4861 * Flow control parameters.
4864 * 0 on success, negative errno value on failure.
4867 mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
4869 struct priv *priv = dev->data->dev_private;
4871 struct ethtool_pauseparam ethpause = {
4872 .cmd = ETHTOOL_SPAUSEPARAM
4876 if (mlx4_is_secondary())
4877 return -E_RTE_SECONDARY;
4878 ifr.ifr_data = (void *)ðpause;
4879 ethpause.autoneg = fc_conf->autoneg;
4880 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4881 (fc_conf->mode & RTE_FC_RX_PAUSE))
4882 ethpause.rx_pause = 1;
4884 ethpause.rx_pause = 0;
4886 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
4887 (fc_conf->mode & RTE_FC_TX_PAUSE))
4888 ethpause.tx_pause = 1;
4890 ethpause.tx_pause = 0;
4893 if (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {
4895 WARN("ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
4909 * Configure a VLAN filter.
4912 * Pointer to Ethernet device structure.
4914 * VLAN ID to filter.
4919 * 0 on success, errno value on failure.
4922 vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
4924 struct priv *priv = dev->data->dev_private;
4926 unsigned int j = -1;
4928 DEBUG("%p: %s VLAN filter ID %" PRIu16,
4929 (void *)dev, (on ? "enable" : "disable"), vlan_id);
4930 for (i = 0; (i != elemof(priv->vlan_filter)); ++i) {
4931 if (!priv->vlan_filter[i].enabled) {
4932 /* Unused index, remember it. */
4936 if (priv->vlan_filter[i].id != vlan_id)
4938 /* This VLAN ID is already known, use its index. */
4942 /* Check if there's room for another VLAN filter. */
4943 if (j == (unsigned int)-1)
4946 * VLAN filters apply to all configured MAC addresses, flow
4947 * specifications must be reconfigured accordingly.
4949 priv->vlan_filter[j].id = vlan_id;
4950 if ((on) && (!priv->vlan_filter[j].enabled)) {
4952 * Filter is disabled, enable it.
4953 * Rehashing flows in all RX queues is necessary.
4956 rxq_mac_addrs_del(&priv->rxq_parent);
4958 for (i = 0; (i != priv->rxqs_n); ++i)
4959 if ((*priv->rxqs)[i] != NULL)
4960 rxq_mac_addrs_del((*priv->rxqs)[i]);
4961 priv->vlan_filter[j].enabled = 1;
4962 if (priv->started) {
4964 rxq_mac_addrs_add(&priv->rxq_parent);
4966 for (i = 0; (i != priv->rxqs_n); ++i) {
4967 if ((*priv->rxqs)[i] == NULL)
4969 rxq_mac_addrs_add((*priv->rxqs)[i]);
4972 } else if ((!on) && (priv->vlan_filter[j].enabled)) {
4974 * Filter is enabled, disable it.
4975 * Rehashing flows in all RX queues is necessary.
4978 rxq_mac_addrs_del(&priv->rxq_parent);
4980 for (i = 0; (i != priv->rxqs_n); ++i)
4981 if ((*priv->rxqs)[i] != NULL)
4982 rxq_mac_addrs_del((*priv->rxqs)[i]);
4983 priv->vlan_filter[j].enabled = 0;
4984 if (priv->started) {
4986 rxq_mac_addrs_add(&priv->rxq_parent);
4988 for (i = 0; (i != priv->rxqs_n); ++i) {
4989 if ((*priv->rxqs)[i] == NULL)
4991 rxq_mac_addrs_add((*priv->rxqs)[i]);
4999 * DPDK callback to configure a VLAN filter.
5002 * Pointer to Ethernet device structure.
5004 * VLAN ID to filter.
5009 * 0 on success, negative errno value on failure.
5012 mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
5014 struct priv *priv = dev->data->dev_private;
5017 if (mlx4_is_secondary())
5018 return -E_RTE_SECONDARY;
5020 ret = vlan_filter_set(dev, vlan_id, on);
5026 const struct rte_flow_ops mlx4_flow_ops = {
5027 .validate = mlx4_flow_validate,
5028 .create = mlx4_flow_create,
5029 .destroy = mlx4_flow_destroy,
5030 .flush = mlx4_flow_flush,
5035 * Manage filter operations.
5038 * Pointer to Ethernet device structure.
5039 * @param filter_type
5042 * Operation to perform.
5044 * Pointer to operation-specific structure.
5047 * 0 on success, negative errno value on failure.
5050 mlx4_dev_filter_ctrl(struct rte_eth_dev *dev,
5051 enum rte_filter_type filter_type,
5052 enum rte_filter_op filter_op,
5057 switch (filter_type) {
5058 case RTE_ETH_FILTER_GENERIC:
5059 if (filter_op != RTE_ETH_FILTER_GET)
5061 *(const void **)arg = &mlx4_flow_ops;
5063 case RTE_ETH_FILTER_FDIR:
5064 DEBUG("%p: filter type FDIR is not supported by this PMD",
5068 ERROR("%p: filter type (%d) not supported",
5069 (void *)dev, filter_type);
5075 static const struct eth_dev_ops mlx4_dev_ops = {
5076 .dev_configure = mlx4_dev_configure,
5077 .dev_start = mlx4_dev_start,
5078 .dev_stop = mlx4_dev_stop,
5079 .dev_set_link_down = mlx4_set_link_down,
5080 .dev_set_link_up = mlx4_set_link_up,
5081 .dev_close = mlx4_dev_close,
5082 .promiscuous_enable = mlx4_promiscuous_enable,
5083 .promiscuous_disable = mlx4_promiscuous_disable,
5084 .allmulticast_enable = mlx4_allmulticast_enable,
5085 .allmulticast_disable = mlx4_allmulticast_disable,
5086 .link_update = mlx4_link_update,
5087 .stats_get = mlx4_stats_get,
5088 .stats_reset = mlx4_stats_reset,
5089 .queue_stats_mapping_set = NULL,
5090 .dev_infos_get = mlx4_dev_infos_get,
5091 .dev_supported_ptypes_get = mlx4_dev_supported_ptypes_get,
5092 .vlan_filter_set = mlx4_vlan_filter_set,
5093 .vlan_tpid_set = NULL,
5094 .vlan_strip_queue_set = NULL,
5095 .vlan_offload_set = NULL,
5096 .rx_queue_setup = mlx4_rx_queue_setup,
5097 .tx_queue_setup = mlx4_tx_queue_setup,
5098 .rx_queue_release = mlx4_rx_queue_release,
5099 .tx_queue_release = mlx4_tx_queue_release,
5101 .dev_led_off = NULL,
5102 .flow_ctrl_get = mlx4_dev_get_flow_ctrl,
5103 .flow_ctrl_set = mlx4_dev_set_flow_ctrl,
5104 .priority_flow_ctrl_set = NULL,
5105 .mac_addr_remove = mlx4_mac_addr_remove,
5106 .mac_addr_add = mlx4_mac_addr_add,
5107 .mac_addr_set = mlx4_mac_addr_set,
5108 .mtu_set = mlx4_dev_set_mtu,
5109 .filter_ctrl = mlx4_dev_filter_ctrl,
5113 * Get PCI information from struct ibv_device.
5116 * Pointer to Ethernet device structure.
5117 * @param[out] pci_addr
5118 * PCI bus address output buffer.
5121 * 0 on success, -1 on failure and errno is set.
5124 mlx4_ibv_device_to_pci_addr(const struct ibv_device *device,
5125 struct rte_pci_addr *pci_addr)
5129 MKSTR(path, "%s/device/uevent", device->ibdev_path);
5131 file = fopen(path, "rb");
5134 while (fgets(line, sizeof(line), file) == line) {
5135 size_t len = strlen(line);
5138 /* Truncate long lines. */
5139 if (len == (sizeof(line) - 1))
5140 while (line[(len - 1)] != '\n') {
5144 line[(len - 1)] = ret;
5146 /* Extract information. */
5149 "%" SCNx16 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
5153 &pci_addr->function) == 4) {
5163 * Get MAC address by querying netdevice.
5166 * struct priv for the requested device.
5168 * MAC address output buffer.
5171 * 0 on success, -1 on failure and errno is set.
5174 priv_get_mac(struct priv *priv, uint8_t (*mac)[ETHER_ADDR_LEN])
5176 struct ifreq request;
5178 if (priv_ifreq(priv, SIOCGIFHWADDR, &request))
5180 memcpy(mac, request.ifr_hwaddr.sa_data, ETHER_ADDR_LEN);
5184 /* Support up to 32 adapters. */
5186 struct rte_pci_addr pci_addr; /* associated PCI address */
5187 uint32_t ports; /* physical ports bitfield. */
5191 * Get device index in mlx4_dev[] from PCI bus address.
5193 * @param[in] pci_addr
5194 * PCI bus address to look for.
5197 * mlx4_dev[] index on success, -1 on failure.
5200 mlx4_dev_idx(struct rte_pci_addr *pci_addr)
5205 assert(pci_addr != NULL);
5206 for (i = 0; (i != elemof(mlx4_dev)); ++i) {
5207 if ((mlx4_dev[i].pci_addr.domain == pci_addr->domain) &&
5208 (mlx4_dev[i].pci_addr.bus == pci_addr->bus) &&
5209 (mlx4_dev[i].pci_addr.devid == pci_addr->devid) &&
5210 (mlx4_dev[i].pci_addr.function == pci_addr->function))
5212 if ((mlx4_dev[i].ports == 0) && (ret == -1))
5219 * Retrieve integer value from environment variable.
5222 * Environment variable name.
5225 * Integer value, 0 if the variable is not set.
5228 mlx4_getenv_int(const char *name)
5230 const char *val = getenv(name);
5238 mlx4_dev_link_status_handler(void *);
5240 mlx4_dev_interrupt_handler(struct rte_intr_handle *, void *);
5243 * Link status handler.
5246 * Pointer to private structure.
5248 * Pointer to the rte_eth_dev structure.
5251 * Nonzero if the callback process can be called immediately.
5254 priv_dev_link_status_handler(struct priv *priv, struct rte_eth_dev *dev)
5256 struct ibv_async_event event;
5257 int port_change = 0;
5260 /* Read all message and acknowledge them. */
5262 if (ibv_get_async_event(priv->ctx, &event))
5265 if (event.event_type == IBV_EVENT_PORT_ACTIVE ||
5266 event.event_type == IBV_EVENT_PORT_ERR)
5269 DEBUG("event type %d on port %d not handled",
5270 event.event_type, event.element.port_num);
5271 ibv_ack_async_event(&event);
5274 if (port_change ^ priv->pending_alarm) {
5275 struct rte_eth_link *link = &dev->data->dev_link;
5277 priv->pending_alarm = 0;
5278 mlx4_link_update(dev, 0);
5279 if (((link->link_speed == 0) && link->link_status) ||
5280 ((link->link_speed != 0) && !link->link_status)) {
5281 /* Inconsistent status, check again later. */
5282 priv->pending_alarm = 1;
5283 rte_eal_alarm_set(MLX4_ALARM_TIMEOUT_US,
5284 mlx4_dev_link_status_handler,
5293 * Handle delayed link status event.
5296 * Registered argument.
5299 mlx4_dev_link_status_handler(void *arg)
5301 struct rte_eth_dev *dev = arg;
5302 struct priv *priv = dev->data->dev_private;
5306 assert(priv->pending_alarm == 1);
5307 ret = priv_dev_link_status_handler(priv, dev);
5310 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
5314 * Handle interrupts from the NIC.
5316 * @param[in] intr_handle
5317 * Interrupt handler.
5319 * Callback argument.
5322 mlx4_dev_interrupt_handler(struct rte_intr_handle *intr_handle, void *cb_arg)
5324 struct rte_eth_dev *dev = cb_arg;
5325 struct priv *priv = dev->data->dev_private;
5330 ret = priv_dev_link_status_handler(priv, dev);
5333 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL);
5337 * Uninstall interrupt handler.
5340 * Pointer to private structure.
5342 * Pointer to the rte_eth_dev structure.
5345 priv_dev_interrupt_handler_uninstall(struct priv *priv, struct rte_eth_dev *dev)
5347 if (!dev->data->dev_conf.intr_conf.lsc)
5349 rte_intr_callback_unregister(&priv->intr_handle,
5350 mlx4_dev_interrupt_handler,
5352 if (priv->pending_alarm)
5353 rte_eal_alarm_cancel(mlx4_dev_link_status_handler, dev);
5354 priv->pending_alarm = 0;
5355 priv->intr_handle.fd = 0;
5356 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
5360 * Install interrupt handler.
5363 * Pointer to private structure.
5365 * Pointer to the rte_eth_dev structure.
5368 priv_dev_interrupt_handler_install(struct priv *priv, struct rte_eth_dev *dev)
5372 if (!dev->data->dev_conf.intr_conf.lsc)
5374 assert(priv->ctx->async_fd > 0);
5375 flags = fcntl(priv->ctx->async_fd, F_GETFL);
5376 rc = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
5378 INFO("failed to change file descriptor async event queue");
5379 dev->data->dev_conf.intr_conf.lsc = 0;
5381 priv->intr_handle.fd = priv->ctx->async_fd;
5382 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
5383 rte_intr_callback_register(&priv->intr_handle,
5384 mlx4_dev_interrupt_handler,
5389 static struct eth_driver mlx4_driver;
5392 * DPDK callback to register a PCI device.
5394 * This function creates an Ethernet device for each port of a given
5397 * @param[in] pci_drv
5398 * PCI driver structure (mlx4_driver).
5399 * @param[in] pci_dev
5400 * PCI device information.
5403 * 0 on success, negative errno value on failure.
5406 mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
5408 struct ibv_device **list;
5409 struct ibv_device *ibv_dev;
5411 struct ibv_context *attr_ctx = NULL;
5412 struct ibv_device_attr device_attr;
5418 assert(pci_drv == &mlx4_driver.pci_drv);
5419 /* Get mlx4_dev[] index. */
5420 idx = mlx4_dev_idx(&pci_dev->addr);
5422 ERROR("this driver cannot support any more adapters");
5425 DEBUG("using driver device index %d", idx);
5427 /* Save PCI address. */
5428 mlx4_dev[idx].pci_addr = pci_dev->addr;
5429 list = ibv_get_device_list(&i);
5432 if (errno == ENOSYS) {
5433 WARN("cannot list devices, is ib_uverbs loaded?");
5440 * For each listed device, check related sysfs entry against
5441 * the provided PCI ID.
5444 struct rte_pci_addr pci_addr;
5447 DEBUG("checking device \"%s\"", list[i]->name);
5448 if (mlx4_ibv_device_to_pci_addr(list[i], &pci_addr))
5450 if ((pci_dev->addr.domain != pci_addr.domain) ||
5451 (pci_dev->addr.bus != pci_addr.bus) ||
5452 (pci_dev->addr.devid != pci_addr.devid) ||
5453 (pci_dev->addr.function != pci_addr.function))
5455 vf = (pci_dev->id.device_id ==
5456 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF);
5457 INFO("PCI information matches, using device \"%s\" (VF: %s)",
5458 list[i]->name, (vf ? "true" : "false"));
5459 attr_ctx = ibv_open_device(list[i]);
5463 if (attr_ctx == NULL) {
5464 ibv_free_device_list(list);
5467 WARN("cannot access device, is mlx4_ib loaded?");
5470 WARN("cannot use device, are drivers up to date?");
5478 DEBUG("device opened");
5479 if (ibv_query_device(attr_ctx, &device_attr))
5481 INFO("%u port(s) detected", device_attr.phys_port_cnt);
5483 for (i = 0; i < device_attr.phys_port_cnt; i++) {
5484 uint32_t port = i + 1; /* ports are indexed from one */
5485 uint32_t test = (1 << i);
5486 struct ibv_context *ctx = NULL;
5487 struct ibv_port_attr port_attr;
5488 struct ibv_pd *pd = NULL;
5489 struct priv *priv = NULL;
5490 struct rte_eth_dev *eth_dev = NULL;
5491 #ifdef HAVE_EXP_QUERY_DEVICE
5492 struct ibv_exp_device_attr exp_device_attr;
5493 #endif /* HAVE_EXP_QUERY_DEVICE */
5494 struct ether_addr mac;
5496 #ifdef HAVE_EXP_QUERY_DEVICE
5497 exp_device_attr.comp_mask = IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS;
5499 exp_device_attr.comp_mask |= IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ;
5500 #endif /* RSS_SUPPORT */
5501 #endif /* HAVE_EXP_QUERY_DEVICE */
5503 DEBUG("using port %u (%08" PRIx32 ")", port, test);
5505 ctx = ibv_open_device(ibv_dev);
5509 /* Check port status. */
5510 err = ibv_query_port(ctx, port, &port_attr);
5512 ERROR("port query failed: %s", strerror(err));
5516 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
5517 ERROR("port %d is not configured in Ethernet mode",
5522 if (port_attr.state != IBV_PORT_ACTIVE)
5523 DEBUG("port %d is not active: \"%s\" (%d)",
5524 port, ibv_port_state_str(port_attr.state),
5527 /* Allocate protection domain. */
5528 pd = ibv_alloc_pd(ctx);
5530 ERROR("PD allocation failure");
5535 mlx4_dev[idx].ports |= test;
5537 /* from rte_ethdev.c */
5538 priv = rte_zmalloc("ethdev private structure",
5540 RTE_CACHE_LINE_SIZE);
5542 ERROR("priv allocation failure");
5548 priv->device_attr = device_attr;
5551 priv->mtu = ETHER_MTU;
5552 #ifdef HAVE_EXP_QUERY_DEVICE
5553 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5554 ERROR("ibv_exp_query_device() failed");
5558 if ((exp_device_attr.exp_device_cap_flags &
5559 IBV_EXP_DEVICE_QPG) &&
5560 (exp_device_attr.exp_device_cap_flags &
5561 IBV_EXP_DEVICE_UD_RSS) &&
5562 (exp_device_attr.comp_mask &
5563 IBV_EXP_DEVICE_ATTR_RSS_TBL_SZ) &&
5564 (exp_device_attr.max_rss_tbl_sz > 0)) {
5567 priv->max_rss_tbl_sz = exp_device_attr.max_rss_tbl_sz;
5571 priv->max_rss_tbl_sz = 0;
5573 priv->hw_tss = !!(exp_device_attr.exp_device_cap_flags &
5574 IBV_EXP_DEVICE_UD_TSS);
5575 DEBUG("device flags: %s%s%s",
5576 (priv->hw_qpg ? "IBV_DEVICE_QPG " : ""),
5577 (priv->hw_tss ? "IBV_DEVICE_TSS " : ""),
5578 (priv->hw_rss ? "IBV_DEVICE_RSS " : ""));
5580 DEBUG("maximum RSS indirection table size: %u",
5581 exp_device_attr.max_rss_tbl_sz);
5582 #endif /* RSS_SUPPORT */
5585 ((exp_device_attr.exp_device_cap_flags &
5586 IBV_EXP_DEVICE_RX_CSUM_TCP_UDP_PKT) &&
5587 (exp_device_attr.exp_device_cap_flags &
5588 IBV_EXP_DEVICE_RX_CSUM_IP_PKT));
5589 DEBUG("checksum offloading is %ssupported",
5590 (priv->hw_csum ? "" : "not "));
5592 priv->hw_csum_l2tun = !!(exp_device_attr.exp_device_cap_flags &
5593 IBV_EXP_DEVICE_VXLAN_SUPPORT);
5594 DEBUG("L2 tunnel checksum offloads are %ssupported",
5595 (priv->hw_csum_l2tun ? "" : "not "));
5598 priv->inl_recv_size = mlx4_getenv_int("MLX4_INLINE_RECV_SIZE");
5600 if (priv->inl_recv_size) {
5601 exp_device_attr.comp_mask =
5602 IBV_EXP_DEVICE_ATTR_INLINE_RECV_SZ;
5603 if (ibv_exp_query_device(ctx, &exp_device_attr)) {
5604 INFO("Couldn't query device for inline-receive"
5606 priv->inl_recv_size = 0;
5608 if ((unsigned)exp_device_attr.inline_recv_sz <
5609 priv->inl_recv_size) {
5610 INFO("Max inline-receive (%d) <"
5611 " requested inline-receive (%u)",
5612 exp_device_attr.inline_recv_sz,
5613 priv->inl_recv_size);
5614 priv->inl_recv_size =
5615 exp_device_attr.inline_recv_sz;
5618 INFO("Set inline receive size to %u",
5619 priv->inl_recv_size);
5621 #endif /* INLINE_RECV */
5622 #endif /* HAVE_EXP_QUERY_DEVICE */
5624 (void)mlx4_getenv_int;
5626 /* Configure the first MAC address by default. */
5627 if (priv_get_mac(priv, &mac.addr_bytes)) {
5628 ERROR("cannot get MAC address, is mlx4_en loaded?"
5629 " (errno: %s)", strerror(errno));
5632 INFO("port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
5634 mac.addr_bytes[0], mac.addr_bytes[1],
5635 mac.addr_bytes[2], mac.addr_bytes[3],
5636 mac.addr_bytes[4], mac.addr_bytes[5]);
5637 /* Register MAC and broadcast addresses. */
5638 claim_zero(priv_mac_addr_add(priv, 0,
5639 (const uint8_t (*)[ETHER_ADDR_LEN])
5641 claim_zero(priv_mac_addr_add(priv, (elemof(priv->mac) - 1),
5642 &(const uint8_t [ETHER_ADDR_LEN])
5643 { "\xff\xff\xff\xff\xff\xff" }));
5646 char ifname[IF_NAMESIZE];
5648 if (priv_get_ifname(priv, &ifname) == 0)
5649 DEBUG("port %u ifname is \"%s\"",
5650 priv->port, ifname);
5652 DEBUG("port %u ifname is unknown", priv->port);
5655 /* Get actual MTU if possible. */
5656 priv_get_mtu(priv, &priv->mtu);
5657 DEBUG("port %u MTU is %u", priv->port, priv->mtu);
5659 /* from rte_ethdev.c */
5661 char name[RTE_ETH_NAME_MAX_LEN];
5663 snprintf(name, sizeof(name), "%s port %u",
5664 ibv_get_device_name(ibv_dev), port);
5665 eth_dev = rte_eth_dev_allocate(name);
5667 if (eth_dev == NULL) {
5668 ERROR("can not allocate rte ethdev");
5673 /* Secondary processes have to use local storage for their
5674 * private data as well as a copy of eth_dev->data, but this
5675 * pointer must not be modified before burst functions are
5676 * actually called. */
5677 if (mlx4_is_secondary()) {
5678 struct mlx4_secondary_data *sd =
5679 &mlx4_secondary_data[eth_dev->data->port_id];
5681 sd->primary_priv = eth_dev->data->dev_private;
5682 if (sd->primary_priv == NULL) {
5683 ERROR("no private data for port %u",
5684 eth_dev->data->port_id);
5688 sd->shared_dev_data = eth_dev->data;
5689 rte_spinlock_init(&sd->lock);
5690 memcpy(sd->data.name, sd->shared_dev_data->name,
5691 sizeof(sd->data.name));
5692 sd->data.dev_private = priv;
5693 sd->data.rx_mbuf_alloc_failed = 0;
5694 sd->data.mtu = ETHER_MTU;
5695 sd->data.port_id = sd->shared_dev_data->port_id;
5696 sd->data.mac_addrs = priv->mac;
5697 eth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;
5698 eth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;
5700 eth_dev->data->dev_private = priv;
5701 eth_dev->data->mac_addrs = priv->mac;
5703 eth_dev->device = &pci_dev->device;
5705 rte_eth_copy_pci_info(eth_dev, pci_dev);
5707 eth_dev->driver = &mlx4_driver;
5709 priv->dev = eth_dev;
5710 eth_dev->dev_ops = &mlx4_dev_ops;
5712 /* Bring Ethernet device up. */
5713 DEBUG("forcing Ethernet interface up");
5714 priv_set_flags(priv, ~IFF_UP, IFF_UP);
5715 /* Update link status once if waiting for LSC. */
5716 if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
5717 mlx4_link_update(eth_dev, 0);
5723 claim_zero(ibv_dealloc_pd(pd));
5725 claim_zero(ibv_close_device(ctx));
5727 rte_eth_dev_release_port(eth_dev);
5732 * XXX if something went wrong in the loop above, there is a resource
5733 * leak (ctx, pd, priv, dpdk ethdev) but we can do nothing about it as
5734 * long as the dpdk does not provide a way to deallocate a ethdev and a
5735 * way to enumerate the registered ethdevs to free the previous ones.
5738 /* no port found, complain */
5739 if (!mlx4_dev[idx].ports) {
5746 claim_zero(ibv_close_device(attr_ctx));
5748 ibv_free_device_list(list);
5753 static const struct rte_pci_id mlx4_pci_id_map[] = {
5755 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5756 PCI_DEVICE_ID_MELLANOX_CONNECTX3)
5759 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5760 PCI_DEVICE_ID_MELLANOX_CONNECTX3PRO)
5763 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
5764 PCI_DEVICE_ID_MELLANOX_CONNECTX3VF)
5771 static struct eth_driver mlx4_driver = {
5774 .name = MLX4_DRIVER_NAME
5776 .id_table = mlx4_pci_id_map,
5777 .probe = mlx4_pci_probe,
5778 .drv_flags = RTE_PCI_DRV_INTR_LSC,
5780 .dev_private_size = sizeof(struct priv)
5784 * Driver initialization routine.
5786 RTE_INIT(rte_mlx4_pmd_init);
5788 rte_mlx4_pmd_init(void)
5790 RTE_BUILD_BUG_ON(sizeof(wr_id_t) != sizeof(uint64_t));
5792 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
5793 * huge pages. Calling ibv_fork_init() during init allows
5794 * applications to use fork() safely for purposes other than
5795 * using this PMD, which is not supported in forked processes.
5797 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
5799 rte_eal_pci_register(&mlx4_driver.pci_drv);
5802 RTE_PMD_EXPORT_NAME(net_mlx4, __COUNTER__);
5803 RTE_PMD_REGISTER_PCI_TABLE(net_mlx4, mlx4_pci_id_map);
5804 RTE_PMD_REGISTER_KMOD_DEP(net_mlx4,
5805 "* ib_uverbs & mlx4_en & mlx4_core & mlx4_ib");