1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. */
72 #define MLX5_TXQ_INLINE "txq_inline"
75 * Device parameter to configure the number of TX queues threshold for
76 * enabling inline send.
78 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
81 * Device parameter to configure the number of TX queues threshold for
82 * enabling vectorized Tx.
84 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
86 /* Device parameter to enable multi-packet send WQEs. */
87 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
89 /* Device parameter to include 2 dsegs in the title WQEBB. */
90 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
92 /* Device parameter to limit the size of inlining packet. */
93 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
95 /* Device parameter to enable hardware Tx vector. */
96 #define MLX5_TX_VEC_EN "tx_vec_en"
98 /* Device parameter to enable hardware Rx vector. */
99 #define MLX5_RX_VEC_EN "rx_vec_en"
101 /* Allow L3 VXLAN flow creation. */
102 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
104 /* Activate DV flow steering. */
105 #define MLX5_DV_FLOW_EN "dv_flow_en"
107 /* Activate Netlink support in VF mode. */
108 #define MLX5_VF_NL_EN "vf_nl_en"
110 /* Select port representors to instantiate. */
111 #define MLX5_REPRESENTOR "representor"
113 #ifndef HAVE_IBV_MLX5_MOD_MPW
114 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
115 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
118 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
119 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
122 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
124 /* Shared memory between primary and secondary processes. */
125 struct mlx5_shared_data *mlx5_shared_data;
127 /* Spinlock for mlx5_shared_data allocation. */
128 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
130 /** Driver-specific log messages type. */
133 /** Data associated with devices to spawn. */
134 struct mlx5_dev_spawn_data {
135 uint32_t ifindex; /**< Network interface index. */
136 uint32_t max_port; /**< IB device maximal port index. */
137 uint32_t ibv_port; /**< IB device physical port index. */
138 struct mlx5_switch_info info; /**< Switch information. */
139 struct ibv_device *ibv_dev; /**< Associated IB device. */
140 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
144 * Prepare shared data between primary and secondary process.
147 mlx5_prepare_shared_data(void)
149 const struct rte_memzone *mz;
151 rte_spinlock_lock(&mlx5_shared_data_lock);
152 if (mlx5_shared_data == NULL) {
153 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
154 /* Allocate shared memory. */
155 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
156 sizeof(*mlx5_shared_data),
159 /* Lookup allocated shared memory. */
160 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
163 rte_panic("Cannot allocate mlx5 shared data\n");
164 mlx5_shared_data = mz->addr;
165 /* Initialize shared data. */
166 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
167 LIST_INIT(&mlx5_shared_data->mem_event_cb_list);
168 rte_rwlock_init(&mlx5_shared_data->mem_event_rwlock);
170 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
171 mlx5_mr_mem_event_cb, NULL);
173 rte_spinlock_unlock(&mlx5_shared_data_lock);
177 * Retrieve integer value from environment variable.
180 * Environment variable name.
183 * Integer value, 0 if the variable is not set.
186 mlx5_getenv_int(const char *name)
188 const char *val = getenv(name);
196 * Verbs callback to allocate a memory. This function should allocate the space
197 * according to the size provided residing inside a huge page.
198 * Please note that all allocation must respect the alignment from libmlx5
199 * (i.e. currently sysconf(_SC_PAGESIZE)).
202 * The size in bytes of the memory to allocate.
204 * A pointer to the callback data.
207 * Allocated buffer, NULL otherwise and rte_errno is set.
210 mlx5_alloc_verbs_buf(size_t size, void *data)
212 struct mlx5_priv *priv = data;
214 size_t alignment = sysconf(_SC_PAGESIZE);
215 unsigned int socket = SOCKET_ID_ANY;
217 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
218 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
220 socket = ctrl->socket;
221 } else if (priv->verbs_alloc_ctx.type ==
222 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
223 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
225 socket = ctrl->socket;
227 assert(data != NULL);
228 ret = rte_malloc_socket(__func__, size, alignment, socket);
235 * Verbs callback to free a memory.
238 * A pointer to the memory to free.
240 * A pointer to the callback data.
243 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
245 assert(data != NULL);
250 * DPDK callback to close the device.
252 * Destroy all queues and objects, free memory.
255 * Pointer to Ethernet device structure.
258 mlx5_dev_close(struct rte_eth_dev *dev)
260 struct mlx5_priv *priv = dev->data->dev_private;
264 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
266 ((priv->ctx != NULL) ? priv->ctx->device->name : ""));
267 /* In case mlx5_dev_stop() has not been called. */
268 mlx5_dev_interrupt_handler_uninstall(dev);
269 mlx5_traffic_disable(dev);
270 mlx5_flow_flush(dev, NULL);
271 /* Prevent crashes when queues are still in use. */
272 dev->rx_pkt_burst = removed_rx_burst;
273 dev->tx_pkt_burst = removed_tx_burst;
274 if (priv->rxqs != NULL) {
275 /* XXX race condition if mlx5_rx_burst() is still running. */
277 for (i = 0; (i != priv->rxqs_n); ++i)
278 mlx5_rxq_release(dev, i);
282 if (priv->txqs != NULL) {
283 /* XXX race condition if mlx5_tx_burst() is still running. */
285 for (i = 0; (i != priv->txqs_n); ++i)
286 mlx5_txq_release(dev, i);
290 mlx5_mprq_free_mp(dev);
291 mlx5_mr_release(dev);
292 if (priv->pd != NULL) {
293 assert(priv->ctx != NULL);
294 claim_zero(mlx5_glue->dealloc_pd(priv->pd));
295 claim_zero(mlx5_glue->close_device(priv->ctx));
297 assert(priv->ctx == NULL);
298 if (priv->rss_conf.rss_key != NULL)
299 rte_free(priv->rss_conf.rss_key);
300 if (priv->reta_idx != NULL)
301 rte_free(priv->reta_idx);
302 if (priv->primary_socket)
303 mlx5_socket_uninit(dev);
305 mlx5_nl_mac_addr_flush(dev);
306 if (priv->nl_socket_route >= 0)
307 close(priv->nl_socket_route);
308 if (priv->nl_socket_rdma >= 0)
309 close(priv->nl_socket_rdma);
310 if (priv->tcf_context)
311 mlx5_flow_tcf_context_destroy(priv->tcf_context);
312 ret = mlx5_hrxq_ibv_verify(dev);
314 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
316 ret = mlx5_ind_table_ibv_verify(dev);
318 DRV_LOG(WARNING, "port %u some indirection table still remain",
320 ret = mlx5_rxq_ibv_verify(dev);
322 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
324 ret = mlx5_rxq_verify(dev);
326 DRV_LOG(WARNING, "port %u some Rx queues still remain",
328 ret = mlx5_txq_ibv_verify(dev);
330 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
332 ret = mlx5_txq_verify(dev);
334 DRV_LOG(WARNING, "port %u some Tx queues still remain",
336 ret = mlx5_flow_verify(dev);
338 DRV_LOG(WARNING, "port %u some flows still remain",
340 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
342 unsigned int i = mlx5_dev_to_port_id(dev->device, NULL, 0);
345 i = RTE_MIN(mlx5_dev_to_port_id(dev->device, port_id, i), i);
347 struct mlx5_priv *opriv =
348 rte_eth_devices[port_id[i]].data->dev_private;
351 opriv->domain_id != priv->domain_id ||
352 &rte_eth_devices[port_id[i]] == dev)
357 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
359 memset(priv, 0, sizeof(*priv));
360 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
362 * Reset mac_addrs to NULL such that it is not freed as part of
363 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
364 * it is freed when dev_private is freed.
366 dev->data->mac_addrs = NULL;
369 const struct eth_dev_ops mlx5_dev_ops = {
370 .dev_configure = mlx5_dev_configure,
371 .dev_start = mlx5_dev_start,
372 .dev_stop = mlx5_dev_stop,
373 .dev_set_link_down = mlx5_set_link_down,
374 .dev_set_link_up = mlx5_set_link_up,
375 .dev_close = mlx5_dev_close,
376 .promiscuous_enable = mlx5_promiscuous_enable,
377 .promiscuous_disable = mlx5_promiscuous_disable,
378 .allmulticast_enable = mlx5_allmulticast_enable,
379 .allmulticast_disable = mlx5_allmulticast_disable,
380 .link_update = mlx5_link_update,
381 .stats_get = mlx5_stats_get,
382 .stats_reset = mlx5_stats_reset,
383 .xstats_get = mlx5_xstats_get,
384 .xstats_reset = mlx5_xstats_reset,
385 .xstats_get_names = mlx5_xstats_get_names,
386 .fw_version_get = mlx5_fw_version_get,
387 .dev_infos_get = mlx5_dev_infos_get,
388 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
389 .vlan_filter_set = mlx5_vlan_filter_set,
390 .rx_queue_setup = mlx5_rx_queue_setup,
391 .tx_queue_setup = mlx5_tx_queue_setup,
392 .rx_queue_release = mlx5_rx_queue_release,
393 .tx_queue_release = mlx5_tx_queue_release,
394 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
395 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
396 .mac_addr_remove = mlx5_mac_addr_remove,
397 .mac_addr_add = mlx5_mac_addr_add,
398 .mac_addr_set = mlx5_mac_addr_set,
399 .set_mc_addr_list = mlx5_set_mc_addr_list,
400 .mtu_set = mlx5_dev_set_mtu,
401 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
402 .vlan_offload_set = mlx5_vlan_offload_set,
403 .reta_update = mlx5_dev_rss_reta_update,
404 .reta_query = mlx5_dev_rss_reta_query,
405 .rss_hash_update = mlx5_rss_hash_update,
406 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
407 .filter_ctrl = mlx5_dev_filter_ctrl,
408 .rx_descriptor_status = mlx5_rx_descriptor_status,
409 .tx_descriptor_status = mlx5_tx_descriptor_status,
410 .rx_queue_count = mlx5_rx_queue_count,
411 .rx_queue_intr_enable = mlx5_rx_intr_enable,
412 .rx_queue_intr_disable = mlx5_rx_intr_disable,
413 .is_removed = mlx5_is_removed,
416 /* Available operations from secondary process. */
417 static const struct eth_dev_ops mlx5_dev_sec_ops = {
418 .stats_get = mlx5_stats_get,
419 .stats_reset = mlx5_stats_reset,
420 .xstats_get = mlx5_xstats_get,
421 .xstats_reset = mlx5_xstats_reset,
422 .xstats_get_names = mlx5_xstats_get_names,
423 .fw_version_get = mlx5_fw_version_get,
424 .dev_infos_get = mlx5_dev_infos_get,
425 .rx_descriptor_status = mlx5_rx_descriptor_status,
426 .tx_descriptor_status = mlx5_tx_descriptor_status,
429 /* Available operations in flow isolated mode. */
430 const struct eth_dev_ops mlx5_dev_ops_isolate = {
431 .dev_configure = mlx5_dev_configure,
432 .dev_start = mlx5_dev_start,
433 .dev_stop = mlx5_dev_stop,
434 .dev_set_link_down = mlx5_set_link_down,
435 .dev_set_link_up = mlx5_set_link_up,
436 .dev_close = mlx5_dev_close,
437 .promiscuous_enable = mlx5_promiscuous_enable,
438 .promiscuous_disable = mlx5_promiscuous_disable,
439 .allmulticast_enable = mlx5_allmulticast_enable,
440 .allmulticast_disable = mlx5_allmulticast_disable,
441 .link_update = mlx5_link_update,
442 .stats_get = mlx5_stats_get,
443 .stats_reset = mlx5_stats_reset,
444 .xstats_get = mlx5_xstats_get,
445 .xstats_reset = mlx5_xstats_reset,
446 .xstats_get_names = mlx5_xstats_get_names,
447 .fw_version_get = mlx5_fw_version_get,
448 .dev_infos_get = mlx5_dev_infos_get,
449 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
450 .vlan_filter_set = mlx5_vlan_filter_set,
451 .rx_queue_setup = mlx5_rx_queue_setup,
452 .tx_queue_setup = mlx5_tx_queue_setup,
453 .rx_queue_release = mlx5_rx_queue_release,
454 .tx_queue_release = mlx5_tx_queue_release,
455 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
456 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
457 .mac_addr_remove = mlx5_mac_addr_remove,
458 .mac_addr_add = mlx5_mac_addr_add,
459 .mac_addr_set = mlx5_mac_addr_set,
460 .set_mc_addr_list = mlx5_set_mc_addr_list,
461 .mtu_set = mlx5_dev_set_mtu,
462 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
463 .vlan_offload_set = mlx5_vlan_offload_set,
464 .filter_ctrl = mlx5_dev_filter_ctrl,
465 .rx_descriptor_status = mlx5_rx_descriptor_status,
466 .tx_descriptor_status = mlx5_tx_descriptor_status,
467 .rx_queue_intr_enable = mlx5_rx_intr_enable,
468 .rx_queue_intr_disable = mlx5_rx_intr_disable,
469 .is_removed = mlx5_is_removed,
473 * Verify and store value for device argument.
476 * Key argument to verify.
478 * Value associated with key.
483 * 0 on success, a negative errno value otherwise and rte_errno is set.
486 mlx5_args_check(const char *key, const char *val, void *opaque)
488 struct mlx5_dev_config *config = opaque;
491 /* No-op, port representors are processed in mlx5_dev_spawn(). */
492 if (!strcmp(MLX5_REPRESENTOR, key))
495 tmp = strtoul(val, NULL, 0);
498 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
501 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
502 config->cqe_comp = !!tmp;
503 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
504 config->cqe_pad = !!tmp;
505 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
506 config->hw_padding = !!tmp;
507 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
508 config->mprq.enabled = !!tmp;
509 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
510 config->mprq.stride_num_n = tmp;
511 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
512 config->mprq.max_memcpy_len = tmp;
513 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
514 config->mprq.min_rxqs_num = tmp;
515 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
516 config->txq_inline = tmp;
517 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
518 config->txqs_inline = tmp;
519 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
520 config->txqs_vec = tmp;
521 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
523 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
524 config->mpw_hdr_dseg = !!tmp;
525 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
526 config->inline_max_packet_sz = tmp;
527 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
528 config->tx_vec_en = !!tmp;
529 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
530 config->rx_vec_en = !!tmp;
531 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
532 config->l3_vxlan_en = !!tmp;
533 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
534 config->vf_nl_en = !!tmp;
535 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
536 config->dv_flow_en = !!tmp;
538 DRV_LOG(WARNING, "%s: unknown parameter", key);
546 * Parse device parameters.
549 * Pointer to device configuration structure.
551 * Device arguments structure.
554 * 0 on success, a negative errno value otherwise and rte_errno is set.
557 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
559 const char **params = (const char *[]){
560 MLX5_RXQ_CQE_COMP_EN,
564 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
565 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
568 MLX5_TXQS_MIN_INLINE,
571 MLX5_TXQ_MPW_HDR_DSEG_EN,
572 MLX5_TXQ_MAX_INLINE_LEN,
581 struct rte_kvargs *kvlist;
587 /* Following UGLY cast is done to pass checkpatch. */
588 kvlist = rte_kvargs_parse(devargs->args, params);
591 /* Process parameters. */
592 for (i = 0; (params[i] != NULL); ++i) {
593 if (rte_kvargs_count(kvlist, params[i])) {
594 ret = rte_kvargs_process(kvlist, params[i],
595 mlx5_args_check, config);
598 rte_kvargs_free(kvlist);
603 rte_kvargs_free(kvlist);
607 static struct rte_pci_driver mlx5_driver;
610 * Reserved UAR address space for TXQ UAR(hw doorbell) mapping, process
611 * local resource used by both primary and secondary to avoid duplicate
613 * The space has to be available on both primary and secondary process,
614 * TXQ UAR maps to this area using fixed mmap w/o double check.
616 static void *uar_base;
619 find_lower_va_bound(const struct rte_memseg_list *msl,
620 const struct rte_memseg *ms, void *arg)
629 *addr = RTE_MIN(*addr, ms->addr);
635 * Reserve UAR address space for primary process.
638 * Pointer to Ethernet device.
641 * 0 on success, a negative errno value otherwise and rte_errno is set.
644 mlx5_uar_init_primary(struct rte_eth_dev *dev)
646 struct mlx5_priv *priv = dev->data->dev_private;
647 void *addr = (void *)0;
649 if (uar_base) { /* UAR address space mapped. */
650 priv->uar_base = uar_base;
653 /* find out lower bound of hugepage segments */
654 rte_memseg_walk(find_lower_va_bound, &addr);
656 /* keep distance to hugepages to minimize potential conflicts. */
657 addr = RTE_PTR_SUB(addr, (uintptr_t)(MLX5_UAR_OFFSET + MLX5_UAR_SIZE));
658 /* anonymous mmap, no real memory consumption. */
659 addr = mmap(addr, MLX5_UAR_SIZE,
660 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
661 if (addr == MAP_FAILED) {
663 "port %u failed to reserve UAR address space, please"
664 " adjust MLX5_UAR_SIZE or try --base-virtaddr",
669 /* Accept either same addr or a new addr returned from mmap if target
672 DRV_LOG(INFO, "port %u reserved UAR address space: %p",
673 dev->data->port_id, addr);
674 priv->uar_base = addr; /* for primary and secondary UAR re-mmap. */
675 uar_base = addr; /* process local, don't reserve again. */
680 * Reserve UAR address space for secondary process, align with
684 * Pointer to Ethernet device.
687 * 0 on success, a negative errno value otherwise and rte_errno is set.
690 mlx5_uar_init_secondary(struct rte_eth_dev *dev)
692 struct mlx5_priv *priv = dev->data->dev_private;
695 assert(priv->uar_base);
696 if (uar_base) { /* already reserved. */
697 assert(uar_base == priv->uar_base);
700 /* anonymous mmap, no real memory consumption. */
701 addr = mmap(priv->uar_base, MLX5_UAR_SIZE,
702 PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
703 if (addr == MAP_FAILED) {
704 DRV_LOG(ERR, "port %u UAR mmap failed: %p size: %llu",
705 dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
709 if (priv->uar_base != addr) {
711 "port %u UAR address %p size %llu occupied, please"
712 " adjust MLX5_UAR_OFFSET or try EAL parameter"
714 dev->data->port_id, priv->uar_base, MLX5_UAR_SIZE);
718 uar_base = addr; /* process local, don't reserve again */
719 DRV_LOG(INFO, "port %u reserved UAR address space: %p",
720 dev->data->port_id, addr);
725 * Spawn an Ethernet device from Verbs information.
728 * Backing DPDK device.
730 * Verbs device parameters (name, port, switch_info) to spawn.
732 * Device configuration parameters.
735 * A valid Ethernet device object on success, NULL otherwise and rte_errno
736 * is set. The following errors are defined:
738 * EBUSY: device is not supposed to be spawned.
739 * EEXIST: device is already spawned
741 static struct rte_eth_dev *
742 mlx5_dev_spawn(struct rte_device *dpdk_dev,
743 struct mlx5_dev_spawn_data *spawn,
744 struct mlx5_dev_config config)
746 const struct mlx5_switch_info *switch_info = &spawn->info;
747 struct ibv_device *ibv_dev = spawn->ibv_dev;
748 struct ibv_context *ctx = NULL;
749 struct ibv_device_attr_ex attr;
750 struct ibv_port_attr port_attr;
751 struct ibv_pd *pd = NULL;
752 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
753 struct rte_eth_dev *eth_dev = NULL;
754 struct mlx5_priv *priv = NULL;
756 unsigned int hw_padding = 0;
758 unsigned int cqe_comp;
759 unsigned int cqe_pad = 0;
760 unsigned int tunnel_en = 0;
761 unsigned int mpls_en = 0;
762 unsigned int swp = 0;
763 unsigned int mprq = 0;
764 unsigned int mprq_min_stride_size_n = 0;
765 unsigned int mprq_max_stride_size_n = 0;
766 unsigned int mprq_min_stride_num_n = 0;
767 unsigned int mprq_max_stride_num_n = 0;
768 struct ether_addr mac;
769 char name[RTE_ETH_NAME_MAX_LEN];
770 int own_domain_id = 0;
774 /* Determine if this port representor is supposed to be spawned. */
775 if (switch_info->representor && dpdk_dev->devargs) {
776 struct rte_eth_devargs eth_da;
778 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
781 DRV_LOG(ERR, "failed to process device arguments: %s",
782 strerror(rte_errno));
785 for (i = 0; i < eth_da.nb_representor_ports; ++i)
786 if (eth_da.representor_ports[i] ==
787 (uint16_t)switch_info->port_name)
789 if (i == eth_da.nb_representor_ports) {
794 /* Build device name. */
795 if (!switch_info->representor)
796 strlcpy(name, dpdk_dev->name, sizeof(name));
798 snprintf(name, sizeof(name), "%s_representor_%u",
799 dpdk_dev->name, switch_info->port_name);
800 /* check if the device is already spawned */
801 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
805 /* Prepare shared data between primary and secondary process. */
806 mlx5_prepare_shared_data();
808 ctx = mlx5_glue->dv_open_device(ibv_dev);
811 DRV_LOG(DEBUG, "DEVX is supported");
813 ctx = mlx5_glue->open_device(ibv_dev);
815 rte_errno = errno ? errno : ENODEV;
819 #ifdef HAVE_IBV_MLX5_MOD_SWP
820 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
823 * Multi-packet send is supported by ConnectX-4 Lx PF as well
824 * as all ConnectX-5 devices.
826 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
827 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
829 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
830 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
832 mlx5_glue->dv_query_device(ctx, &dv_attr);
833 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
834 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
835 DRV_LOG(DEBUG, "enhanced MPW is supported");
836 mps = MLX5_MPW_ENHANCED;
838 DRV_LOG(DEBUG, "MPW is supported");
842 DRV_LOG(DEBUG, "MPW isn't supported");
843 mps = MLX5_MPW_DISABLED;
845 #ifdef HAVE_IBV_MLX5_MOD_SWP
846 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
847 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
848 DRV_LOG(DEBUG, "SWP support: %u", swp);
851 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
852 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
853 struct mlx5dv_striding_rq_caps mprq_caps =
854 dv_attr.striding_rq_caps;
856 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
857 mprq_caps.min_single_stride_log_num_of_bytes);
858 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
859 mprq_caps.max_single_stride_log_num_of_bytes);
860 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
861 mprq_caps.min_single_wqe_log_num_of_strides);
862 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
863 mprq_caps.max_single_wqe_log_num_of_strides);
864 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
865 mprq_caps.supported_qpts);
866 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
868 mprq_min_stride_size_n =
869 mprq_caps.min_single_stride_log_num_of_bytes;
870 mprq_max_stride_size_n =
871 mprq_caps.max_single_stride_log_num_of_bytes;
872 mprq_min_stride_num_n =
873 mprq_caps.min_single_wqe_log_num_of_strides;
874 mprq_max_stride_num_n =
875 mprq_caps.max_single_wqe_log_num_of_strides;
876 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
877 mprq_min_stride_num_n);
880 if (RTE_CACHE_LINE_SIZE == 128 &&
881 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
885 config.cqe_comp = cqe_comp;
886 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
887 /* Whether device supports 128B Rx CQE padding. */
888 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
889 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
891 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
892 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
893 tunnel_en = ((dv_attr.tunnel_offloads_caps &
894 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
895 (dv_attr.tunnel_offloads_caps &
896 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
898 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
899 tunnel_en ? "" : "not ");
902 "tunnel offloading disabled due to old OFED/rdma-core version");
904 config.tunnel_en = tunnel_en;
905 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
906 mpls_en = ((dv_attr.tunnel_offloads_caps &
907 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
908 (dv_attr.tunnel_offloads_caps &
909 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
910 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
911 mpls_en ? "" : "not ");
913 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
914 " old OFED/rdma-core version or firmware configuration");
916 config.mpls_en = mpls_en;
917 err = mlx5_glue->query_device_ex(ctx, NULL, &attr);
919 DEBUG("ibv_query_device_ex() failed");
922 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
923 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
924 eth_dev = rte_eth_dev_attach_secondary(name);
925 if (eth_dev == NULL) {
926 DRV_LOG(ERR, "can not attach rte ethdev");
931 eth_dev->device = dpdk_dev;
932 eth_dev->dev_ops = &mlx5_dev_sec_ops;
933 err = mlx5_uar_init_secondary(eth_dev);
938 /* Receive command fd from primary process */
939 err = mlx5_socket_connect(eth_dev);
944 /* Remap UAR for Tx queues. */
945 err = mlx5_tx_uar_remap(eth_dev, err);
951 * Ethdev pointer is still required as input since
952 * the primary device is not accessible from the
955 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
956 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
957 claim_zero(mlx5_glue->close_device(ctx));
960 /* Check port status. */
961 err = mlx5_glue->query_port(ctx, spawn->ibv_port, &port_attr);
963 DRV_LOG(ERR, "port query failed: %s", strerror(err));
966 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
967 DRV_LOG(ERR, "port is not configured in Ethernet mode");
971 if (port_attr.state != IBV_PORT_ACTIVE)
972 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
973 mlx5_glue->port_state_str(port_attr.state),
975 /* Allocate protection domain. */
976 pd = mlx5_glue->alloc_pd(ctx);
978 DRV_LOG(ERR, "PD allocation failure");
982 priv = rte_zmalloc("ethdev private structure",
984 RTE_CACHE_LINE_SIZE);
986 DRV_LOG(ERR, "priv allocation failure");
991 strncpy(priv->ibdev_name, priv->ctx->device->name,
992 sizeof(priv->ibdev_name));
993 strncpy(priv->ibdev_path, priv->ctx->device->ibdev_path,
994 sizeof(priv->ibdev_path));
995 priv->device_attr = attr;
997 priv->mtu = ETHER_MTU;
999 /* Initialize UAR access locks for 32bit implementations. */
1000 rte_spinlock_init(&priv->uar_lock_cq);
1001 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1002 rte_spinlock_init(&priv->uar_lock[i]);
1004 /* Some internal functions rely on Netlink sockets, open them now. */
1005 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1006 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1008 priv->representor = !!switch_info->representor;
1009 priv->master = !!switch_info->master;
1010 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1012 * Currently we support single E-Switch per PF configurations
1013 * only and vport_id field contains the vport index for
1014 * associated VF, which is deduced from representor port name.
1015 * For exapmple, let's have the IB device port 10, it has
1016 * attached network device eth0, which has port name attribute
1017 * pf0vf2, we can deduce the VF number as 2, and set vport index
1018 * as 3 (2+1). This assigning schema should be changed if the
1019 * multiple E-Switch instances per PF configurations or/and PCI
1020 * subfunctions are added.
1022 priv->vport_id = switch_info->representor ?
1023 switch_info->port_name + 1 : -1;
1024 /* representor_id field keeps the unmodified port/VF index. */
1025 priv->representor_id = switch_info->representor ?
1026 switch_info->port_name : -1;
1028 * Look for sibling devices in order to reuse their switch domain
1029 * if any, otherwise allocate one.
1031 i = mlx5_dev_to_port_id(dpdk_dev, NULL, 0);
1033 uint16_t port_id[i];
1035 i = RTE_MIN(mlx5_dev_to_port_id(dpdk_dev, port_id, i), i);
1037 const struct mlx5_priv *opriv =
1038 rte_eth_devices[port_id[i]].data->dev_private;
1042 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1044 priv->domain_id = opriv->domain_id;
1048 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1049 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1052 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1053 strerror(rte_errno));
1058 err = mlx5_args(&config, dpdk_dev->devargs);
1061 DRV_LOG(ERR, "failed to process device arguments: %s",
1062 strerror(rte_errno));
1065 config.hw_csum = !!(attr.device_cap_flags_ex & IBV_DEVICE_RAW_IP_CSUM);
1066 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1067 (config.hw_csum ? "" : "not "));
1068 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1069 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1070 DRV_LOG(DEBUG, "counters are not supported");
1072 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1073 if (config.dv_flow_en) {
1074 DRV_LOG(WARNING, "DV flow is not supported");
1075 config.dv_flow_en = 0;
1078 config.ind_table_max_size =
1079 attr.rss_caps.max_rwq_indirection_table_size;
1081 * Remove this check once DPDK supports larger/variable
1082 * indirection tables.
1084 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1085 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1086 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1087 config.ind_table_max_size);
1088 config.hw_vlan_strip = !!(attr.raw_packet_caps &
1089 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1090 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1091 (config.hw_vlan_strip ? "" : "not "));
1092 config.hw_fcs_strip = !!(attr.raw_packet_caps &
1093 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1094 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1095 (config.hw_fcs_strip ? "" : "not "));
1096 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1097 hw_padding = !!attr.rx_pad_end_addr_align;
1098 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1099 hw_padding = !!(attr.device_cap_flags_ex &
1100 IBV_DEVICE_PCI_WRITE_END_PADDING);
1102 if (config.hw_padding && !hw_padding) {
1103 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1104 config.hw_padding = 0;
1105 } else if (config.hw_padding) {
1106 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1108 config.tso = (attr.tso_caps.max_tso > 0 &&
1109 (attr.tso_caps.supported_qpts &
1110 (1 << IBV_QPT_RAW_PACKET)));
1112 config.tso_max_payload_sz = attr.tso_caps.max_tso;
1114 * MPW is disabled by default, while the Enhanced MPW is enabled
1117 if (config.mps == MLX5_ARG_UNSET)
1118 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1121 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1122 DRV_LOG(INFO, "%sMPS is %s",
1123 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1124 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1125 if (config.cqe_comp && !cqe_comp) {
1126 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1127 config.cqe_comp = 0;
1129 if (config.cqe_pad && !cqe_pad) {
1130 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1132 } else if (config.cqe_pad) {
1133 DRV_LOG(INFO, "Rx CQE padding is enabled");
1135 if (config.mprq.enabled && mprq) {
1136 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1137 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1138 config.mprq.stride_num_n =
1139 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1140 mprq_min_stride_num_n);
1142 "the number of strides"
1143 " for Multi-Packet RQ is out of range,"
1144 " setting default value (%u)",
1145 1 << config.mprq.stride_num_n);
1147 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1148 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1149 } else if (config.mprq.enabled && !mprq) {
1150 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1151 config.mprq.enabled = 0;
1153 eth_dev = rte_eth_dev_allocate(name);
1154 if (eth_dev == NULL) {
1155 DRV_LOG(ERR, "can not allocate rte ethdev");
1159 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1160 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1161 if (priv->representor) {
1162 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1163 eth_dev->data->representor_id = priv->representor_id;
1165 eth_dev->data->dev_private = priv;
1166 priv->dev_data = eth_dev->data;
1167 eth_dev->data->mac_addrs = priv->mac;
1168 eth_dev->device = dpdk_dev;
1169 err = mlx5_uar_init_primary(eth_dev);
1174 /* Configure the first MAC address by default. */
1175 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1177 "port %u cannot get MAC address, is mlx5_en"
1178 " loaded? (errno: %s)",
1179 eth_dev->data->port_id, strerror(rte_errno));
1184 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1185 eth_dev->data->port_id,
1186 mac.addr_bytes[0], mac.addr_bytes[1],
1187 mac.addr_bytes[2], mac.addr_bytes[3],
1188 mac.addr_bytes[4], mac.addr_bytes[5]);
1191 char ifname[IF_NAMESIZE];
1193 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1194 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1195 eth_dev->data->port_id, ifname);
1197 DRV_LOG(DEBUG, "port %u ifname is unknown",
1198 eth_dev->data->port_id);
1201 /* Get actual MTU if possible. */
1202 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1207 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1209 /* Initialize burst functions to prevent crashes before link-up. */
1210 eth_dev->rx_pkt_burst = removed_rx_burst;
1211 eth_dev->tx_pkt_burst = removed_tx_burst;
1212 eth_dev->dev_ops = &mlx5_dev_ops;
1213 /* Register MAC address. */
1214 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1215 if (config.vf && config.vf_nl_en)
1216 mlx5_nl_mac_addr_sync(eth_dev);
1217 priv->tcf_context = mlx5_flow_tcf_context_create();
1218 if (!priv->tcf_context) {
1221 "flow rules relying on switch offloads will not be"
1222 " supported: cannot open libmnl socket: %s",
1223 strerror(rte_errno));
1225 struct rte_flow_error error;
1226 unsigned int ifindex = mlx5_ifindex(eth_dev);
1231 "cannot retrieve network interface index";
1233 err = mlx5_flow_tcf_init(priv->tcf_context,
1238 "flow rules relying on switch offloads will"
1239 " not be supported: %s: %s",
1240 error.message, strerror(rte_errno));
1241 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1242 priv->tcf_context = NULL;
1245 TAILQ_INIT(&priv->flows);
1246 TAILQ_INIT(&priv->ctrl_flows);
1247 /* Hint libmlx5 to use PMD allocator for data plane resources */
1248 struct mlx5dv_ctx_allocators alctr = {
1249 .alloc = &mlx5_alloc_verbs_buf,
1250 .free = &mlx5_free_verbs_buf,
1253 mlx5_glue->dv_set_context_attr(ctx, MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1254 (void *)((uintptr_t)&alctr));
1255 /* Bring Ethernet device up. */
1256 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1257 eth_dev->data->port_id);
1258 mlx5_set_link_up(eth_dev);
1260 * Even though the interrupt handler is not installed yet,
1261 * interrupts will still trigger on the asyn_fd from
1262 * Verbs context returned by ibv_open_device().
1264 mlx5_link_update(eth_dev, 0);
1265 /* Store device configuration on private structure. */
1266 priv->config = config;
1267 /* Supported Verbs flow priority number detection. */
1268 err = mlx5_flow_discover_priorities(eth_dev);
1273 priv->config.flow_prio = err;
1275 * Once the device is added to the list of memory event
1276 * callback, its global MR cache table cannot be expanded
1277 * on the fly because of deadlock. If it overflows, lookup
1278 * should be done by searching MR list linearly, which is slow.
1280 err = mlx5_mr_btree_init(&priv->mr.cache,
1281 MLX5_MR_BTREE_CACHE_N * 2,
1282 eth_dev->device->numa_node);
1287 /* Add device to memory callback list. */
1288 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1289 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1290 priv, mem_event_cb);
1291 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1295 if (priv->nl_socket_route >= 0)
1296 close(priv->nl_socket_route);
1297 if (priv->nl_socket_rdma >= 0)
1298 close(priv->nl_socket_rdma);
1299 if (priv->tcf_context)
1300 mlx5_flow_tcf_context_destroy(priv->tcf_context);
1302 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1304 if (eth_dev != NULL)
1305 eth_dev->data->dev_private = NULL;
1308 claim_zero(mlx5_glue->dealloc_pd(pd));
1309 if (eth_dev != NULL) {
1310 /* mac_addrs must not be freed alone because part of dev_private */
1311 eth_dev->data->mac_addrs = NULL;
1312 rte_eth_dev_release_port(eth_dev);
1315 claim_zero(mlx5_glue->close_device(ctx));
1322 * Comparison callback to sort device data.
1324 * This is meant to be used with qsort().
1327 * Pointer to pointer to first data object.
1329 * Pointer to pointer to second data object.
1332 * 0 if both objects are equal, less than 0 if the first argument is less
1333 * than the second, greater than 0 otherwise.
1336 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1338 const struct mlx5_switch_info *si_a =
1339 &((const struct mlx5_dev_spawn_data *)a)->info;
1340 const struct mlx5_switch_info *si_b =
1341 &((const struct mlx5_dev_spawn_data *)b)->info;
1344 /* Master device first. */
1345 ret = si_b->master - si_a->master;
1348 /* Then representor devices. */
1349 ret = si_b->representor - si_a->representor;
1352 /* Unidentified devices come last in no specific order. */
1353 if (!si_a->representor)
1355 /* Order representors by name. */
1356 return si_a->port_name - si_b->port_name;
1360 * DPDK callback to register a PCI device.
1362 * This function spawns Ethernet devices out of a given PCI device.
1364 * @param[in] pci_drv
1365 * PCI driver structure (mlx5_driver).
1366 * @param[in] pci_dev
1367 * PCI device information.
1370 * 0 on success, a negative errno value otherwise and rte_errno is set.
1373 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1374 struct rte_pci_device *pci_dev)
1376 struct ibv_device **ibv_list;
1378 * Number of found IB Devices matching with requested PCI BDF.
1379 * nd != 1 means there are multiple IB devices over the same
1380 * PCI device and we have representors and master.
1382 unsigned int nd = 0;
1384 * Number of found IB device Ports. nd = 1 and np = 1..n means
1385 * we have the single multiport IB device, and there may be
1386 * representors attached to some of found ports.
1388 unsigned int np = 0;
1390 * Number of DPDK ethernet devices to Spawn - either over
1391 * multiple IB devices or multiple ports of single IB device.
1392 * Actually this is the number of iterations to spawn.
1394 unsigned int ns = 0;
1395 struct mlx5_dev_config dev_config;
1398 assert(pci_drv == &mlx5_driver);
1400 ibv_list = mlx5_glue->get_device_list(&ret);
1402 rte_errno = errno ? errno : ENOSYS;
1403 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1407 * First scan the list of all Infiniband devices to find
1408 * matching ones, gathering into the list.
1410 struct ibv_device *ibv_match[ret + 1];
1416 struct rte_pci_addr pci_addr;
1418 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1419 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1421 if (pci_dev->addr.domain != pci_addr.domain ||
1422 pci_dev->addr.bus != pci_addr.bus ||
1423 pci_dev->addr.devid != pci_addr.devid ||
1424 pci_dev->addr.function != pci_addr.function)
1426 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1427 ibv_list[ret]->name);
1428 ibv_match[nd++] = ibv_list[ret];
1430 ibv_match[nd] = NULL;
1432 /* No device macthes, just complain and bail out. */
1433 mlx5_glue->free_device_list(ibv_list);
1435 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1436 " are kernel drivers loaded?",
1437 pci_dev->addr.domain, pci_dev->addr.bus,
1438 pci_dev->addr.devid, pci_dev->addr.function);
1443 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1444 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1447 * Found single matching device may have multiple ports.
1448 * Each port may be representor, we have to check the port
1449 * number and check the representors existence.
1452 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1454 DRV_LOG(WARNING, "can not get IB device \"%s\""
1455 " ports number", ibv_match[0]->name);
1458 * Now we can determine the maximal
1459 * amount of devices to be spawned.
1461 struct mlx5_dev_spawn_data list[np ? np : nd];
1465 * Signle IB device with multiple ports found,
1466 * it may be E-Switch master device and representors.
1467 * We have to perform identification trough the ports.
1469 assert(nl_rdma >= 0);
1472 for (i = 1; i <= np; ++i) {
1473 list[ns].max_port = np;
1474 list[ns].ibv_port = i;
1475 list[ns].ibv_dev = ibv_match[0];
1476 list[ns].eth_dev = NULL;
1477 list[ns].ifindex = mlx5_nl_ifindex
1478 (nl_rdma, list[ns].ibv_dev->name, i);
1479 if (!list[ns].ifindex) {
1481 * No network interface index found for the
1482 * specified port, it means there is no
1483 * representor on this port. It's OK,
1484 * there can be disabled ports, for example
1485 * if sriov_numvfs < sriov_totalvfs.
1491 ret = mlx5_nl_switch_info
1495 if (ret || (!list[ns].info.representor &&
1496 !list[ns].info.master)) {
1498 * We failed to recognize representors with
1499 * Netlink, let's try to perform the task
1502 ret = mlx5_sysfs_switch_info
1506 if (!ret && (list[ns].info.representor ^
1507 list[ns].info.master))
1512 "unable to recognize master/representors"
1513 " on the IB device with multiple ports");
1520 * The existence of several matching entries (nd > 1) means
1521 * port representors have been instantiated. No existing Verbs
1522 * call nor sysfs entries can tell them apart, this can only
1523 * be done through Netlink calls assuming kernel drivers are
1524 * recent enough to support them.
1526 * In the event of identification failure through Netlink,
1527 * try again through sysfs, then:
1529 * 1. A single IB device matches (nd == 1) with single
1530 * port (np=0/1) and is not a representor, assume
1531 * no switch support.
1533 * 2. Otherwise no safe assumptions can be made;
1534 * complain louder and bail out.
1537 for (i = 0; i != nd; ++i) {
1538 memset(&list[ns].info, 0, sizeof(list[ns].info));
1539 list[ns].max_port = 1;
1540 list[ns].ibv_port = 1;
1541 list[ns].ibv_dev = ibv_match[i];
1542 list[ns].eth_dev = NULL;
1543 list[ns].ifindex = 0;
1545 list[ns].ifindex = mlx5_nl_ifindex
1546 (nl_rdma, list[ns].ibv_dev->name, 1);
1547 if (!list[ns].ifindex) {
1549 * No network interface index found for the
1550 * specified device, it means there it is not
1551 * a representor/master.
1557 ret = mlx5_nl_switch_info
1561 if (ret || (!list[ns].info.representor &&
1562 !list[ns].info.master)) {
1564 * We failed to recognize representors with
1565 * Netlink, let's try to perform the task
1568 ret = mlx5_sysfs_switch_info
1572 if (!ret && (list[ns].info.representor ^
1573 list[ns].info.master)) {
1575 } else if ((nd == 1) &&
1576 !list[ns].info.representor &&
1577 !list[ns].info.master) {
1579 * Single IB device with
1580 * one physical port and
1581 * attached network device.
1582 * May be SRIOV is not enabled
1583 * or there is no representors.
1585 DRV_LOG(INFO, "no E-Switch support detected");
1592 "unable to recognize master/representors"
1593 " on the multiple IB devices");
1601 * Sort list to probe devices in natural order for users convenience
1602 * (i.e. master first, then representors from lowest to highest ID).
1604 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
1605 /* Default configuration. */
1606 dev_config = (struct mlx5_dev_config){
1608 .mps = MLX5_ARG_UNSET,
1611 .txq_inline = MLX5_ARG_UNSET,
1612 .txqs_inline = MLX5_ARG_UNSET,
1613 .txqs_vec = MLX5_ARG_UNSET,
1614 .inline_max_packet_sz = MLX5_ARG_UNSET,
1617 .enabled = 0, /* Disabled by default. */
1618 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
1619 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
1620 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
1623 /* Device specific configuration. */
1624 switch (pci_dev->id.device_id) {
1625 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
1626 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
1628 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1629 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1630 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1631 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1637 /* Set architecture-dependent default value if unset. */
1638 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
1639 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
1640 for (i = 0; i != ns; ++i) {
1643 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
1646 if (!list[i].eth_dev) {
1647 if (rte_errno != EBUSY && rte_errno != EEXIST)
1649 /* Device is disabled or already spawned. Ignore it. */
1652 restore = list[i].eth_dev->data->dev_flags;
1653 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
1654 /* Restore non-PCI flags cleared by the above call. */
1655 list[i].eth_dev->data->dev_flags |= restore;
1656 rte_eth_dev_probing_finish(list[i].eth_dev);
1660 "probe of PCI device " PCI_PRI_FMT " aborted after"
1661 " encountering an error: %s",
1662 pci_dev->addr.domain, pci_dev->addr.bus,
1663 pci_dev->addr.devid, pci_dev->addr.function,
1664 strerror(rte_errno));
1668 if (!list[i].eth_dev)
1670 mlx5_dev_close(list[i].eth_dev);
1671 /* mac_addrs must not be freed because in dev_private */
1672 list[i].eth_dev->data->mac_addrs = NULL;
1673 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
1675 /* Restore original error. */
1682 * Do the routine cleanup:
1683 * - close opened Netlink sockets
1684 * - free the Infiniband device list
1691 mlx5_glue->free_device_list(ibv_list);
1696 * DPDK callback to remove a PCI device.
1698 * This function removes all Ethernet devices belong to a given PCI device.
1700 * @param[in] pci_dev
1701 * Pointer to the PCI device.
1704 * 0 on success, the function cannot fail.
1707 mlx5_pci_remove(struct rte_pci_device *pci_dev)
1710 struct rte_eth_dev *port;
1712 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
1713 port = &rte_eth_devices[port_id];
1714 if (port->state != RTE_ETH_DEV_UNUSED &&
1715 port->device == &pci_dev->device)
1716 rte_eth_dev_close(port_id);
1721 static const struct rte_pci_id mlx5_pci_id_map[] = {
1723 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1724 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
1727 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1728 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
1731 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1732 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
1735 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1736 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
1739 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1740 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
1743 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1744 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
1747 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1748 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
1751 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1752 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
1755 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1756 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
1759 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1760 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
1763 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1764 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
1767 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
1768 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
1775 static struct rte_pci_driver mlx5_driver = {
1777 .name = MLX5_DRIVER_NAME
1779 .id_table = mlx5_pci_id_map,
1780 .probe = mlx5_pci_probe,
1781 .remove = mlx5_pci_remove,
1782 .dma_map = mlx5_dma_map,
1783 .dma_unmap = mlx5_dma_unmap,
1784 .drv_flags = (RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
1785 RTE_PCI_DRV_PROBE_AGAIN),
1788 #ifdef RTE_IBVERBS_LINK_DLOPEN
1791 * Suffix RTE_EAL_PMD_PATH with "-glue".
1793 * This function performs a sanity check on RTE_EAL_PMD_PATH before
1794 * suffixing its last component.
1797 * Output buffer, should be large enough otherwise NULL is returned.
1802 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
1805 mlx5_glue_path(char *buf, size_t size)
1807 static const char *const bad[] = { "/", ".", "..", NULL };
1808 const char *path = RTE_EAL_PMD_PATH;
1809 size_t len = strlen(path);
1813 while (len && path[len - 1] == '/')
1815 for (off = len; off && path[off - 1] != '/'; --off)
1817 for (i = 0; bad[i]; ++i)
1818 if (!strncmp(path + off, bad[i], (int)(len - off)))
1820 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
1821 if (i == -1 || (size_t)i >= size)
1826 "unable to append \"-glue\" to last component of"
1827 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
1828 " please re-configure DPDK");
1833 * Initialization routine for run-time dependency on rdma-core.
1836 mlx5_glue_init(void)
1838 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
1839 const char *path[] = {
1841 * A basic security check is necessary before trusting
1842 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
1844 (geteuid() == getuid() && getegid() == getgid() ?
1845 getenv("MLX5_GLUE_PATH") : NULL),
1847 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
1848 * variant, otherwise let dlopen() look up libraries on its
1851 (*RTE_EAL_PMD_PATH ?
1852 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
1855 void *handle = NULL;
1859 while (!handle && i != RTE_DIM(path)) {
1868 end = strpbrk(path[i], ":;");
1870 end = path[i] + strlen(path[i]);
1871 len = end - path[i];
1876 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
1878 (!len || *(end - 1) == '/') ? "" : "/");
1881 if (sizeof(name) != (size_t)ret + 1)
1883 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
1885 handle = dlopen(name, RTLD_LAZY);
1896 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
1899 sym = dlsym(handle, "mlx5_glue");
1900 if (!sym || !*sym) {
1904 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
1913 "cannot initialize PMD due to missing run-time dependency on"
1914 " rdma-core libraries (libibverbs, libmlx5)");
1921 * Driver initialization routine.
1923 RTE_INIT(rte_mlx5_pmd_init)
1925 /* Initialize driver log type. */
1926 mlx5_logtype = rte_log_register("pmd.net.mlx5");
1927 if (mlx5_logtype >= 0)
1928 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
1930 /* Build the static tables for Verbs conversion. */
1931 mlx5_set_ptype_table();
1932 mlx5_set_cksum_table();
1933 mlx5_set_swp_types_table();
1935 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
1936 * huge pages. Calling ibv_fork_init() during init allows
1937 * applications to use fork() safely for purposes other than
1938 * using this PMD, which is not supported in forked processes.
1940 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
1941 /* Match the size of Rx completion entry to the size of a cacheline. */
1942 if (RTE_CACHE_LINE_SIZE == 128)
1943 setenv("MLX5_CQE_SIZE", "128", 0);
1945 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
1946 * cleanup all the Verbs resources even when the device was removed.
1948 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
1949 #ifdef RTE_IBVERBS_LINK_DLOPEN
1950 if (mlx5_glue_init())
1955 /* Glue structure must not contain any NULL pointers. */
1959 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
1960 assert(((const void *const *)mlx5_glue)[i]);
1963 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
1965 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
1966 mlx5_glue->version, MLX5_GLUE_VERSION);
1969 mlx5_glue->fork_init();
1970 rte_pci_register(&mlx5_driver);
1973 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
1974 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
1975 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");