1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_kvargs.h>
36 #include <rte_rwlock.h>
37 #include <rte_spinlock.h>
38 #include <rte_string_fns.h>
39 #include <rte_alarm.h>
42 #include "mlx5_utils.h"
43 #include "mlx5_rxtx.h"
44 #include "mlx5_autoconf.h"
45 #include "mlx5_defs.h"
46 #include "mlx5_glue.h"
48 #include "mlx5_flow.h"
50 /* Device parameter to enable RX completion queue compression. */
51 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
53 /* Device parameter to enable RX completion entry padding to 128B. */
54 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
56 /* Device parameter to enable padding Rx packet to cacheline size. */
57 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
59 /* Device parameter to enable Multi-Packet Rx queue. */
60 #define MLX5_RX_MPRQ_EN "mprq_en"
62 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
63 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
65 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
66 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
68 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
69 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
71 /* Device parameter to configure inline send. Deprecated, ignored.*/
72 #define MLX5_TXQ_INLINE "txq_inline"
74 /* Device parameter to limit packet size to inline with ordinary SEND. */
75 #define MLX5_TXQ_INLINE_MAX "txq_inline_max"
77 /* Device parameter to configure minimal data size to inline. */
78 #define MLX5_TXQ_INLINE_MIN "txq_inline_min"
80 /* Device parameter to limit packet size to inline with Enhanced MPW. */
81 #define MLX5_TXQ_INLINE_MPW "txq_inline_mpw"
84 * Device parameter to configure the number of TX queues threshold for
85 * enabling inline send.
87 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
90 * Device parameter to configure the number of TX queues threshold for
91 * enabling vectorized Tx, deprecated, ignored (no vectorized Tx routines).
93 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
95 /* Device parameter to enable multi-packet send WQEs. */
96 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
99 * Device parameter to include 2 dsegs in the title WQEBB.
100 * Deprecated, ignored.
102 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
105 * Device parameter to limit the size of inlining packet.
106 * Deprecated, ignored.
108 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
111 * Device parameter to enable hardware Tx vector.
112 * Deprecated, ignored (no vectorized Tx routines anymore).
114 #define MLX5_TX_VEC_EN "tx_vec_en"
116 /* Device parameter to enable hardware Rx vector. */
117 #define MLX5_RX_VEC_EN "rx_vec_en"
119 /* Allow L3 VXLAN flow creation. */
120 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
122 /* Activate DV E-Switch flow steering. */
123 #define MLX5_DV_ESW_EN "dv_esw_en"
125 /* Activate DV flow steering. */
126 #define MLX5_DV_FLOW_EN "dv_flow_en"
128 /* Activate Netlink support in VF mode. */
129 #define MLX5_VF_NL_EN "vf_nl_en"
131 /* Enable extending memsegs when creating a MR. */
132 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
134 /* Select port representors to instantiate. */
135 #define MLX5_REPRESENTOR "representor"
137 /* Device parameter to configure the maximum number of dump files per queue. */
138 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
140 /* Configure timeout of LRO session (in microseconds). */
141 #define MLX5_LRO_TIMEOUT_USEC "lro_timeout_usec"
143 #ifndef HAVE_IBV_MLX5_MOD_MPW
144 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
145 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
148 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
149 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
152 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
154 /* Shared memory between primary and secondary processes. */
155 struct mlx5_shared_data *mlx5_shared_data;
157 /* Spinlock for mlx5_shared_data allocation. */
158 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
160 /* Process local data for secondary processes. */
161 static struct mlx5_local_data mlx5_local_data;
163 /** Driver-specific log messages type. */
166 /** Data associated with devices to spawn. */
167 struct mlx5_dev_spawn_data {
168 uint32_t ifindex; /**< Network interface index. */
169 uint32_t max_port; /**< IB device maximal port index. */
170 uint32_t ibv_port; /**< IB device physical port index. */
171 struct mlx5_switch_info info; /**< Switch information. */
172 struct ibv_device *ibv_dev; /**< Associated IB device. */
173 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
174 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
177 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
178 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
181 * Initialize the counters management structure.
184 * Pointer to mlx5_ibv_shared object to free
187 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
191 TAILQ_INIT(&sh->cmng.flow_counters);
192 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
193 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
197 * Destroy all the resources allocated for a counter memory management.
200 * Pointer to the memory management structure.
203 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
205 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
207 LIST_REMOVE(mng, next);
208 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
209 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
214 * Close and release all the resources of the counters management.
217 * Pointer to mlx5_ibv_shared object to free.
220 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
222 struct mlx5_counter_stats_mem_mng *mng;
229 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
230 if (rte_errno != EINPROGRESS)
234 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
235 struct mlx5_flow_counter_pool *pool;
236 uint32_t batch = !!(i % 2);
238 if (!sh->cmng.ccont[i].pools)
240 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
245 (mlx5_devx_cmd_destroy(pool->min_dcs));
247 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
248 if (pool->counters_raw[j].action)
250 (mlx5_glue->destroy_flow_action
251 (pool->counters_raw[j].action));
252 if (!batch && pool->counters_raw[j].dcs)
253 claim_zero(mlx5_devx_cmd_destroy
254 (pool->counters_raw[j].dcs));
256 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
259 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
261 rte_free(sh->cmng.ccont[i].pools);
263 mng = LIST_FIRST(&sh->cmng.mem_mngs);
265 mlx5_flow_destroy_counter_stat_mem_mng(mng);
266 mng = LIST_FIRST(&sh->cmng.mem_mngs);
268 memset(&sh->cmng, 0, sizeof(sh->cmng));
272 * Extract pdn of PD object using DV API.
275 * Pointer to the verbs PD object.
277 * Pointer to the PD object number variable.
280 * 0 on success, error value otherwise.
282 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
284 mlx5_get_pdn(struct ibv_pd *pd __rte_unused, uint32_t *pdn __rte_unused)
286 struct mlx5dv_obj obj;
287 struct mlx5dv_pd pd_info;
291 obj.pd.out = &pd_info;
292 ret = mlx5_glue->dv_init_obj(&obj, MLX5DV_OBJ_PD);
294 DRV_LOG(DEBUG, "Fail to get PD object info");
300 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
303 * Allocate shared IB device context. If there is multiport device the
304 * master and representors will share this context, if there is single
305 * port dedicated IB device, the context will be used by only given
306 * port due to unification.
308 * Routine first searches the context for the specified IB device name,
309 * if found the shared context assumed and reference counter is incremented.
310 * If no context found the new one is created and initialized with specified
311 * IB device context and parameters.
314 * Pointer to the IB device attributes (name, port, etc).
317 * Pointer to mlx5_ibv_shared object on success,
318 * otherwise NULL and rte_errno is set.
320 static struct mlx5_ibv_shared *
321 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
323 struct mlx5_ibv_shared *sh;
328 /* Secondary process should not create the shared context. */
329 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
330 pthread_mutex_lock(&mlx5_ibv_list_mutex);
331 /* Search for IB context by device name. */
332 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
333 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
338 /* No device found, we have to create new shared context. */
339 assert(spawn->max_port);
340 sh = rte_zmalloc("ethdev shared ib context",
341 sizeof(struct mlx5_ibv_shared) +
343 sizeof(struct mlx5_ibv_shared_port),
344 RTE_CACHE_LINE_SIZE);
346 DRV_LOG(ERR, "shared context allocation failure");
350 /* Try to open IB device with DV first, then usual Verbs. */
352 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
355 DRV_LOG(DEBUG, "DevX is supported");
357 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
359 err = errno ? errno : ENODEV;
362 DRV_LOG(DEBUG, "DevX is NOT supported");
364 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
366 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
370 sh->max_port = spawn->max_port;
371 strncpy(sh->ibdev_name, sh->ctx->device->name,
372 sizeof(sh->ibdev_name));
373 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
374 sizeof(sh->ibdev_path));
375 pthread_mutex_init(&sh->intr_mutex, NULL);
377 * Setting port_id to max unallowed value means
378 * there is no interrupt subhandler installed for
379 * the given port index i.
381 for (i = 0; i < sh->max_port; i++)
382 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
383 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
384 if (sh->pd == NULL) {
385 DRV_LOG(ERR, "PD allocation failure");
389 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
390 err = mlx5_get_pdn(sh->pd, &sh->pdn);
392 DRV_LOG(ERR, "Fail to extract pdn from PD");
395 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
397 * Once the device is added to the list of memory event
398 * callback, its global MR cache table cannot be expanded
399 * on the fly because of deadlock. If it overflows, lookup
400 * should be done by searching MR list linearly, which is slow.
402 * At this point the device is not added to the memory
403 * event list yet, context is just being created.
405 err = mlx5_mr_btree_init(&sh->mr.cache,
406 MLX5_MR_BTREE_CACHE_N * 2,
407 spawn->pci_dev->device.numa_node);
412 mlx5_flow_counters_mng_init(sh);
413 /* Add device to memory callback list. */
414 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
415 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
417 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
418 /* Add context to the global device list. */
419 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
421 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
424 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
427 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
429 claim_zero(mlx5_glue->close_device(sh->ctx));
437 * Free shared IB device context. Decrement counter and if zero free
438 * all allocated resources and close handles.
441 * Pointer to mlx5_ibv_shared object to free
444 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
446 pthread_mutex_lock(&mlx5_ibv_list_mutex);
448 /* Check the object presence in the list. */
449 struct mlx5_ibv_shared *lctx;
451 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
456 DRV_LOG(ERR, "Freeing non-existing shared IB context");
462 /* Secondary process should not free the shared context. */
463 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
466 /* Release created Memory Regions. */
468 /* Remove from memory callback device list. */
469 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
470 LIST_REMOVE(sh, mem_event_cb);
471 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
472 /* Remove context from the global device list. */
473 LIST_REMOVE(sh, next);
475 * Ensure there is no async event handler installed.
476 * Only primary process handles async device events.
478 mlx5_flow_counters_mng_close(sh);
479 assert(!sh->intr_cnt);
481 mlx5_intr_callback_unregister
482 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
483 pthread_mutex_destroy(&sh->intr_mutex);
485 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
487 claim_zero(mlx5_glue->close_device(sh->ctx));
490 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
494 * Initialize DR related data within private structure.
495 * Routine checks the reference counter and does actual
496 * resources creation/initialization only if counter is zero.
499 * Pointer to the private device data structure.
502 * Zero on success, positive error code otherwise.
505 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
507 #ifdef HAVE_MLX5DV_DR
508 struct mlx5_ibv_shared *sh = priv->sh;
514 /* Shared DV/DR structures is already initialized. */
519 /* Reference counter is zero, we should initialize structures. */
520 domain = mlx5_glue->dr_create_domain(sh->ctx,
521 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
523 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
527 sh->rx_domain = domain;
528 domain = mlx5_glue->dr_create_domain(sh->ctx,
529 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
531 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
535 pthread_mutex_init(&sh->dv_mutex, NULL);
536 sh->tx_domain = domain;
537 #ifdef HAVE_MLX5DV_DR_ESWITCH
538 if (priv->config.dv_esw_en) {
539 domain = mlx5_glue->dr_create_domain
540 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
542 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
546 sh->fdb_domain = domain;
547 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
550 sh->pop_vlan_action = mlx5_glue->dr_create_flow_action_pop_vlan();
556 /* Rollback the created objects. */
558 mlx5_glue->dr_destroy_domain(sh->rx_domain);
559 sh->rx_domain = NULL;
562 mlx5_glue->dr_destroy_domain(sh->tx_domain);
563 sh->tx_domain = NULL;
565 if (sh->fdb_domain) {
566 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
567 sh->fdb_domain = NULL;
569 if (sh->esw_drop_action) {
570 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
571 sh->esw_drop_action = NULL;
573 if (sh->pop_vlan_action) {
574 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
575 sh->pop_vlan_action = NULL;
585 * Destroy DR related data within private structure.
588 * Pointer to the private device data structure.
591 mlx5_free_shared_dr(struct mlx5_priv *priv)
593 #ifdef HAVE_MLX5DV_DR
594 struct mlx5_ibv_shared *sh;
596 if (!priv->dr_shared)
601 assert(sh->dv_refcnt);
602 if (sh->dv_refcnt && --sh->dv_refcnt)
605 mlx5_glue->dr_destroy_domain(sh->rx_domain);
606 sh->rx_domain = NULL;
609 mlx5_glue->dr_destroy_domain(sh->tx_domain);
610 sh->tx_domain = NULL;
612 #ifdef HAVE_MLX5DV_DR_ESWITCH
613 if (sh->fdb_domain) {
614 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
615 sh->fdb_domain = NULL;
617 if (sh->esw_drop_action) {
618 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
619 sh->esw_drop_action = NULL;
622 if (sh->pop_vlan_action) {
623 mlx5_glue->destroy_flow_action(sh->pop_vlan_action);
624 sh->pop_vlan_action = NULL;
626 pthread_mutex_destroy(&sh->dv_mutex);
633 * Initialize shared data between primary and secondary process.
635 * A memzone is reserved by primary process and secondary processes attach to
639 * 0 on success, a negative errno value otherwise and rte_errno is set.
642 mlx5_init_shared_data(void)
644 const struct rte_memzone *mz;
647 rte_spinlock_lock(&mlx5_shared_data_lock);
648 if (mlx5_shared_data == NULL) {
649 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
650 /* Allocate shared memory. */
651 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
652 sizeof(*mlx5_shared_data),
656 "Cannot allocate mlx5 shared data\n");
660 mlx5_shared_data = mz->addr;
661 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
662 rte_spinlock_init(&mlx5_shared_data->lock);
664 /* Lookup allocated shared memory. */
665 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
668 "Cannot attach mlx5 shared data\n");
672 mlx5_shared_data = mz->addr;
673 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
677 rte_spinlock_unlock(&mlx5_shared_data_lock);
682 * Retrieve integer value from environment variable.
685 * Environment variable name.
688 * Integer value, 0 if the variable is not set.
691 mlx5_getenv_int(const char *name)
693 const char *val = getenv(name);
701 * Verbs callback to allocate a memory. This function should allocate the space
702 * according to the size provided residing inside a huge page.
703 * Please note that all allocation must respect the alignment from libmlx5
704 * (i.e. currently sysconf(_SC_PAGESIZE)).
707 * The size in bytes of the memory to allocate.
709 * A pointer to the callback data.
712 * Allocated buffer, NULL otherwise and rte_errno is set.
715 mlx5_alloc_verbs_buf(size_t size, void *data)
717 struct mlx5_priv *priv = data;
719 size_t alignment = sysconf(_SC_PAGESIZE);
720 unsigned int socket = SOCKET_ID_ANY;
722 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
723 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
725 socket = ctrl->socket;
726 } else if (priv->verbs_alloc_ctx.type ==
727 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
728 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
730 socket = ctrl->socket;
732 assert(data != NULL);
733 ret = rte_malloc_socket(__func__, size, alignment, socket);
740 * Verbs callback to free a memory.
743 * A pointer to the memory to free.
745 * A pointer to the callback data.
748 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
750 assert(data != NULL);
755 * DPDK callback to add udp tunnel port
758 * A pointer to eth_dev
759 * @param[in] udp_tunnel
760 * A pointer to udp tunnel
763 * 0 on valid udp ports and tunnels, -ENOTSUP otherwise.
766 mlx5_udp_tunnel_port_add(struct rte_eth_dev *dev __rte_unused,
767 struct rte_eth_udp_tunnel *udp_tunnel)
769 assert(udp_tunnel != NULL);
770 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN &&
771 udp_tunnel->udp_port == 4789)
773 if (udp_tunnel->prot_type == RTE_TUNNEL_TYPE_VXLAN_GPE &&
774 udp_tunnel->udp_port == 4790)
780 * Initialize process private data structure.
783 * Pointer to Ethernet device structure.
786 * 0 on success, a negative errno value otherwise and rte_errno is set.
789 mlx5_proc_priv_init(struct rte_eth_dev *dev)
791 struct mlx5_priv *priv = dev->data->dev_private;
792 struct mlx5_proc_priv *ppriv;
796 * UAR register table follows the process private structure. BlueFlame
797 * registers for Tx queues are stored in the table.
800 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
801 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
802 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
807 ppriv->uar_table_sz = ppriv_size;
808 dev->process_private = ppriv;
813 * Un-initialize process private data structure.
816 * Pointer to Ethernet device structure.
819 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
821 if (!dev->process_private)
823 rte_free(dev->process_private);
824 dev->process_private = NULL;
828 * DPDK callback to close the device.
830 * Destroy all queues and objects, free memory.
833 * Pointer to Ethernet device structure.
836 mlx5_dev_close(struct rte_eth_dev *dev)
838 struct mlx5_priv *priv = dev->data->dev_private;
842 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
844 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
845 /* In case mlx5_dev_stop() has not been called. */
846 mlx5_dev_interrupt_handler_uninstall(dev);
847 mlx5_traffic_disable(dev);
848 mlx5_flow_flush(dev, NULL);
849 /* Prevent crashes when queues are still in use. */
850 dev->rx_pkt_burst = removed_rx_burst;
851 dev->tx_pkt_burst = removed_tx_burst;
853 /* Disable datapath on secondary process. */
854 mlx5_mp_req_stop_rxtx(dev);
855 if (priv->rxqs != NULL) {
856 /* XXX race condition if mlx5_rx_burst() is still running. */
858 for (i = 0; (i != priv->rxqs_n); ++i)
859 mlx5_rxq_release(dev, i);
863 if (priv->txqs != NULL) {
864 /* XXX race condition if mlx5_tx_burst() is still running. */
866 for (i = 0; (i != priv->txqs_n); ++i)
867 mlx5_txq_release(dev, i);
871 mlx5_proc_priv_uninit(dev);
872 mlx5_mprq_free_mp(dev);
873 mlx5_free_shared_dr(priv);
874 if (priv->rss_conf.rss_key != NULL)
875 rte_free(priv->rss_conf.rss_key);
876 if (priv->reta_idx != NULL)
877 rte_free(priv->reta_idx);
879 mlx5_nl_mac_addr_flush(dev);
880 if (priv->nl_socket_route >= 0)
881 close(priv->nl_socket_route);
882 if (priv->nl_socket_rdma >= 0)
883 close(priv->nl_socket_rdma);
884 if (priv->vmwa_context)
885 mlx5_vlan_vmwa_exit(priv->vmwa_context);
888 * Free the shared context in last turn, because the cleanup
889 * routines above may use some shared fields, like
890 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
891 * ifindex if Netlink fails.
893 mlx5_free_shared_ibctx(priv->sh);
896 ret = mlx5_hrxq_verify(dev);
898 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
900 ret = mlx5_ind_table_obj_verify(dev);
902 DRV_LOG(WARNING, "port %u some indirection table still remain",
904 ret = mlx5_rxq_obj_verify(dev);
906 DRV_LOG(WARNING, "port %u some Rx queue objects still remain",
908 ret = mlx5_rxq_verify(dev);
910 DRV_LOG(WARNING, "port %u some Rx queues still remain",
912 ret = mlx5_txq_ibv_verify(dev);
914 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
916 ret = mlx5_txq_verify(dev);
918 DRV_LOG(WARNING, "port %u some Tx queues still remain",
920 ret = mlx5_flow_verify(dev);
922 DRV_LOG(WARNING, "port %u some flows still remain",
924 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
928 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
929 struct mlx5_priv *opriv =
930 rte_eth_devices[port_id].data->dev_private;
933 opriv->domain_id != priv->domain_id ||
934 &rte_eth_devices[port_id] == dev)
939 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
941 memset(priv, 0, sizeof(*priv));
942 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
944 * Reset mac_addrs to NULL such that it is not freed as part of
945 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
946 * it is freed when dev_private is freed.
948 dev->data->mac_addrs = NULL;
951 const struct eth_dev_ops mlx5_dev_ops = {
952 .dev_configure = mlx5_dev_configure,
953 .dev_start = mlx5_dev_start,
954 .dev_stop = mlx5_dev_stop,
955 .dev_set_link_down = mlx5_set_link_down,
956 .dev_set_link_up = mlx5_set_link_up,
957 .dev_close = mlx5_dev_close,
958 .promiscuous_enable = mlx5_promiscuous_enable,
959 .promiscuous_disable = mlx5_promiscuous_disable,
960 .allmulticast_enable = mlx5_allmulticast_enable,
961 .allmulticast_disable = mlx5_allmulticast_disable,
962 .link_update = mlx5_link_update,
963 .stats_get = mlx5_stats_get,
964 .stats_reset = mlx5_stats_reset,
965 .xstats_get = mlx5_xstats_get,
966 .xstats_reset = mlx5_xstats_reset,
967 .xstats_get_names = mlx5_xstats_get_names,
968 .fw_version_get = mlx5_fw_version_get,
969 .dev_infos_get = mlx5_dev_infos_get,
970 .read_clock = mlx5_read_clock,
971 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
972 .vlan_filter_set = mlx5_vlan_filter_set,
973 .rx_queue_setup = mlx5_rx_queue_setup,
974 .tx_queue_setup = mlx5_tx_queue_setup,
975 .rx_queue_release = mlx5_rx_queue_release,
976 .tx_queue_release = mlx5_tx_queue_release,
977 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
978 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
979 .mac_addr_remove = mlx5_mac_addr_remove,
980 .mac_addr_add = mlx5_mac_addr_add,
981 .mac_addr_set = mlx5_mac_addr_set,
982 .set_mc_addr_list = mlx5_set_mc_addr_list,
983 .mtu_set = mlx5_dev_set_mtu,
984 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
985 .vlan_offload_set = mlx5_vlan_offload_set,
986 .reta_update = mlx5_dev_rss_reta_update,
987 .reta_query = mlx5_dev_rss_reta_query,
988 .rss_hash_update = mlx5_rss_hash_update,
989 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
990 .filter_ctrl = mlx5_dev_filter_ctrl,
991 .rx_descriptor_status = mlx5_rx_descriptor_status,
992 .tx_descriptor_status = mlx5_tx_descriptor_status,
993 .rx_queue_count = mlx5_rx_queue_count,
994 .rx_queue_intr_enable = mlx5_rx_intr_enable,
995 .rx_queue_intr_disable = mlx5_rx_intr_disable,
996 .is_removed = mlx5_is_removed,
997 .udp_tunnel_port_add = mlx5_udp_tunnel_port_add,
998 .get_module_info = mlx5_get_module_info,
999 .get_module_eeprom = mlx5_get_module_eeprom,
1002 /* Available operations from secondary process. */
1003 static const struct eth_dev_ops mlx5_dev_sec_ops = {
1004 .stats_get = mlx5_stats_get,
1005 .stats_reset = mlx5_stats_reset,
1006 .xstats_get = mlx5_xstats_get,
1007 .xstats_reset = mlx5_xstats_reset,
1008 .xstats_get_names = mlx5_xstats_get_names,
1009 .fw_version_get = mlx5_fw_version_get,
1010 .dev_infos_get = mlx5_dev_infos_get,
1011 .rx_descriptor_status = mlx5_rx_descriptor_status,
1012 .tx_descriptor_status = mlx5_tx_descriptor_status,
1013 .get_module_info = mlx5_get_module_info,
1014 .get_module_eeprom = mlx5_get_module_eeprom,
1017 /* Available operations in flow isolated mode. */
1018 const struct eth_dev_ops mlx5_dev_ops_isolate = {
1019 .dev_configure = mlx5_dev_configure,
1020 .dev_start = mlx5_dev_start,
1021 .dev_stop = mlx5_dev_stop,
1022 .dev_set_link_down = mlx5_set_link_down,
1023 .dev_set_link_up = mlx5_set_link_up,
1024 .dev_close = mlx5_dev_close,
1025 .promiscuous_enable = mlx5_promiscuous_enable,
1026 .promiscuous_disable = mlx5_promiscuous_disable,
1027 .allmulticast_enable = mlx5_allmulticast_enable,
1028 .allmulticast_disable = mlx5_allmulticast_disable,
1029 .link_update = mlx5_link_update,
1030 .stats_get = mlx5_stats_get,
1031 .stats_reset = mlx5_stats_reset,
1032 .xstats_get = mlx5_xstats_get,
1033 .xstats_reset = mlx5_xstats_reset,
1034 .xstats_get_names = mlx5_xstats_get_names,
1035 .fw_version_get = mlx5_fw_version_get,
1036 .dev_infos_get = mlx5_dev_infos_get,
1037 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
1038 .vlan_filter_set = mlx5_vlan_filter_set,
1039 .rx_queue_setup = mlx5_rx_queue_setup,
1040 .tx_queue_setup = mlx5_tx_queue_setup,
1041 .rx_queue_release = mlx5_rx_queue_release,
1042 .tx_queue_release = mlx5_tx_queue_release,
1043 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
1044 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
1045 .mac_addr_remove = mlx5_mac_addr_remove,
1046 .mac_addr_add = mlx5_mac_addr_add,
1047 .mac_addr_set = mlx5_mac_addr_set,
1048 .set_mc_addr_list = mlx5_set_mc_addr_list,
1049 .mtu_set = mlx5_dev_set_mtu,
1050 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
1051 .vlan_offload_set = mlx5_vlan_offload_set,
1052 .filter_ctrl = mlx5_dev_filter_ctrl,
1053 .rx_descriptor_status = mlx5_rx_descriptor_status,
1054 .tx_descriptor_status = mlx5_tx_descriptor_status,
1055 .rx_queue_intr_enable = mlx5_rx_intr_enable,
1056 .rx_queue_intr_disable = mlx5_rx_intr_disable,
1057 .is_removed = mlx5_is_removed,
1058 .get_module_info = mlx5_get_module_info,
1059 .get_module_eeprom = mlx5_get_module_eeprom,
1063 * Verify and store value for device argument.
1066 * Key argument to verify.
1068 * Value associated with key.
1073 * 0 on success, a negative errno value otherwise and rte_errno is set.
1076 mlx5_args_check(const char *key, const char *val, void *opaque)
1078 struct mlx5_dev_config *config = opaque;
1081 /* No-op, port representors are processed in mlx5_dev_spawn(). */
1082 if (!strcmp(MLX5_REPRESENTOR, key))
1085 tmp = strtoul(val, NULL, 0);
1088 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
1091 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
1092 config->cqe_comp = !!tmp;
1093 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
1094 config->cqe_pad = !!tmp;
1095 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
1096 config->hw_padding = !!tmp;
1097 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
1098 config->mprq.enabled = !!tmp;
1099 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
1100 config->mprq.stride_num_n = tmp;
1101 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
1102 config->mprq.max_memcpy_len = tmp;
1103 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
1104 config->mprq.min_rxqs_num = tmp;
1105 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1106 DRV_LOG(WARNING, "%s: deprecated parameter,"
1107 " converted to txq_inline_max", key);
1108 config->txq_inline_max = tmp;
1109 } else if (strcmp(MLX5_TXQ_INLINE_MAX, key) == 0) {
1110 config->txq_inline_max = tmp;
1111 } else if (strcmp(MLX5_TXQ_INLINE_MIN, key) == 0) {
1112 config->txq_inline_min = tmp;
1113 } else if (strcmp(MLX5_TXQ_INLINE_MPW, key) == 0) {
1114 config->txq_inline_mpw = tmp;
1115 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1116 config->txqs_inline = tmp;
1117 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1118 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1119 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1120 config->mps = !!tmp;
1121 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1122 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1123 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1124 DRV_LOG(WARNING, "%s: deprecated parameter,"
1125 " converted to txq_inline_mpw", key);
1126 config->txq_inline_mpw = tmp;
1127 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1128 DRV_LOG(WARNING, "%s: deprecated parameter, ignored", key);
1129 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1130 config->rx_vec_en = !!tmp;
1131 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1132 config->l3_vxlan_en = !!tmp;
1133 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1134 config->vf_nl_en = !!tmp;
1135 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1136 config->dv_esw_en = !!tmp;
1137 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1138 config->dv_flow_en = !!tmp;
1139 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1140 config->mr_ext_memseg_en = !!tmp;
1141 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1142 config->max_dump_files_num = tmp;
1143 } else if (strcmp(MLX5_LRO_TIMEOUT_USEC, key) == 0) {
1144 config->lro.timeout = tmp;
1146 DRV_LOG(WARNING, "%s: unknown parameter", key);
1154 * Parse device parameters.
1157 * Pointer to device configuration structure.
1159 * Device arguments structure.
1162 * 0 on success, a negative errno value otherwise and rte_errno is set.
1165 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1167 const char **params = (const char *[]){
1168 MLX5_RXQ_CQE_COMP_EN,
1169 MLX5_RXQ_CQE_PAD_EN,
1170 MLX5_RXQ_PKT_PAD_EN,
1172 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1173 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1176 MLX5_TXQ_INLINE_MIN,
1177 MLX5_TXQ_INLINE_MAX,
1178 MLX5_TXQ_INLINE_MPW,
1179 MLX5_TXQS_MIN_INLINE,
1182 MLX5_TXQ_MPW_HDR_DSEG_EN,
1183 MLX5_TXQ_MAX_INLINE_LEN,
1190 MLX5_MR_EXT_MEMSEG_EN,
1192 MLX5_MAX_DUMP_FILES_NUM,
1193 MLX5_LRO_TIMEOUT_USEC,
1196 struct rte_kvargs *kvlist;
1200 if (devargs == NULL)
1202 /* Following UGLY cast is done to pass checkpatch. */
1203 kvlist = rte_kvargs_parse(devargs->args, params);
1204 if (kvlist == NULL) {
1208 /* Process parameters. */
1209 for (i = 0; (params[i] != NULL); ++i) {
1210 if (rte_kvargs_count(kvlist, params[i])) {
1211 ret = rte_kvargs_process(kvlist, params[i],
1212 mlx5_args_check, config);
1215 rte_kvargs_free(kvlist);
1220 rte_kvargs_free(kvlist);
1224 static struct rte_pci_driver mlx5_driver;
1227 * PMD global initialization.
1229 * Independent from individual device, this function initializes global
1230 * per-PMD data structures distinguishing primary and secondary processes.
1231 * Hence, each initialization is called once per a process.
1234 * 0 on success, a negative errno value otherwise and rte_errno is set.
1237 mlx5_init_once(void)
1239 struct mlx5_shared_data *sd;
1240 struct mlx5_local_data *ld = &mlx5_local_data;
1243 if (mlx5_init_shared_data())
1245 sd = mlx5_shared_data;
1247 rte_spinlock_lock(&sd->lock);
1248 switch (rte_eal_process_type()) {
1249 case RTE_PROC_PRIMARY:
1252 LIST_INIT(&sd->mem_event_cb_list);
1253 rte_rwlock_init(&sd->mem_event_rwlock);
1254 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1255 mlx5_mr_mem_event_cb, NULL);
1256 ret = mlx5_mp_init_primary();
1259 sd->init_done = true;
1261 case RTE_PROC_SECONDARY:
1264 ret = mlx5_mp_init_secondary();
1267 ++sd->secondary_cnt;
1268 ld->init_done = true;
1274 rte_spinlock_unlock(&sd->lock);
1279 * Configures the minimal amount of data to inline into WQE
1280 * while sending packets.
1282 * - the txq_inline_min has the maximal priority, if this
1283 * key is specified in devargs
1284 * - if DevX is enabled the inline mode is queried from the
1285 * device (HCA attributes and NIC vport context if needed).
1286 * - otherwise L2 mode (18 bytes) is assumed for ConnectX-4/4LX
1287 * and none (0 bytes) for other NICs
1290 * Verbs device parameters (name, port, switch_info) to spawn.
1292 * Device configuration parameters.
1295 mlx5_set_min_inline(struct mlx5_dev_spawn_data *spawn,
1296 struct mlx5_dev_config *config)
1298 if (config->txq_inline_min != MLX5_ARG_UNSET) {
1299 /* Application defines size of inlined data explicitly. */
1300 switch (spawn->pci_dev->id.device_id) {
1301 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1302 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1303 if (config->txq_inline_min <
1304 (int)MLX5_INLINE_HSIZE_L2) {
1306 "txq_inline_mix aligned to minimal"
1307 " ConnectX-4 required value %d",
1308 (int)MLX5_INLINE_HSIZE_L2);
1309 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1315 if (config->hca_attr.eth_net_offloads) {
1316 /* We have DevX enabled, inline mode queried successfully. */
1317 switch (config->hca_attr.wqe_inline_mode) {
1318 case MLX5_CAP_INLINE_MODE_L2:
1319 /* outer L2 header must be inlined. */
1320 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1322 case MLX5_CAP_INLINE_MODE_NOT_REQUIRED:
1323 /* No inline data are required by NIC. */
1324 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1325 config->hw_vlan_insert =
1326 config->hca_attr.wqe_vlan_insert;
1327 DRV_LOG(DEBUG, "Tx VLAN insertion is supported");
1329 case MLX5_CAP_INLINE_MODE_VPORT_CONTEXT:
1330 /* inline mode is defined by NIC vport context. */
1331 if (!config->hca_attr.eth_virt)
1333 switch (config->hca_attr.vport_inline_mode) {
1334 case MLX5_INLINE_MODE_NONE:
1335 config->txq_inline_min =
1336 MLX5_INLINE_HSIZE_NONE;
1338 case MLX5_INLINE_MODE_L2:
1339 config->txq_inline_min =
1340 MLX5_INLINE_HSIZE_L2;
1342 case MLX5_INLINE_MODE_IP:
1343 config->txq_inline_min =
1344 MLX5_INLINE_HSIZE_L3;
1346 case MLX5_INLINE_MODE_TCP_UDP:
1347 config->txq_inline_min =
1348 MLX5_INLINE_HSIZE_L4;
1350 case MLX5_INLINE_MODE_INNER_L2:
1351 config->txq_inline_min =
1352 MLX5_INLINE_HSIZE_INNER_L2;
1354 case MLX5_INLINE_MODE_INNER_IP:
1355 config->txq_inline_min =
1356 MLX5_INLINE_HSIZE_INNER_L3;
1358 case MLX5_INLINE_MODE_INNER_TCP_UDP:
1359 config->txq_inline_min =
1360 MLX5_INLINE_HSIZE_INNER_L4;
1366 * We get here if we are unable to deduce
1367 * inline data size with DevX. Try PCI ID
1368 * to determine old NICs.
1370 switch (spawn->pci_dev->id.device_id) {
1371 case PCI_DEVICE_ID_MELLANOX_CONNECTX4:
1372 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
1373 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LX:
1374 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
1375 config->txq_inline_min = MLX5_INLINE_HSIZE_L2;
1376 config->hw_vlan_insert = 0;
1378 case PCI_DEVICE_ID_MELLANOX_CONNECTX5:
1379 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
1380 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EX:
1381 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
1383 * These NICs support VLAN insertion from WQE and
1384 * report the wqe_vlan_insert flag. But there is the bug
1385 * and PFC control may be broken, so disable feature.
1387 config->hw_vlan_insert = 0;
1388 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1391 config->txq_inline_min = MLX5_INLINE_HSIZE_NONE;
1395 DRV_LOG(DEBUG, "min tx inline configured: %d", config->txq_inline_min);
1399 * Allocate page of door-bells and register it using DevX API.
1402 * Pointer to Ethernet device.
1405 * Pointer to new page on success, NULL otherwise.
1407 static struct mlx5_devx_dbr_page *
1408 mlx5_alloc_dbr_page(struct rte_eth_dev *dev)
1410 struct mlx5_priv *priv = dev->data->dev_private;
1411 struct mlx5_devx_dbr_page *page;
1413 /* Allocate space for door-bell page and management data. */
1414 page = rte_calloc_socket(__func__, 1, sizeof(struct mlx5_devx_dbr_page),
1415 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
1417 DRV_LOG(ERR, "port %u cannot allocate dbr page",
1418 dev->data->port_id);
1421 /* Register allocated memory. */
1422 page->umem = mlx5_glue->devx_umem_reg(priv->sh->ctx, page->dbrs,
1423 MLX5_DBR_PAGE_SIZE, 0);
1425 DRV_LOG(ERR, "port %u cannot umem reg dbr page",
1426 dev->data->port_id);
1434 * Find the next available door-bell, allocate new page if needed.
1437 * Pointer to Ethernet device.
1438 * @param [out] dbr_page
1439 * Door-bell page containing the page data.
1442 * Door-bell address offset on success, a negative error value otherwise.
1445 mlx5_get_dbr(struct rte_eth_dev *dev, struct mlx5_devx_dbr_page **dbr_page)
1447 struct mlx5_priv *priv = dev->data->dev_private;
1448 struct mlx5_devx_dbr_page *page = NULL;
1451 LIST_FOREACH(page, &priv->dbrpgs, next)
1452 if (page->dbr_count < MLX5_DBR_PER_PAGE)
1454 if (!page) { /* No page with free door-bell exists. */
1455 page = mlx5_alloc_dbr_page(dev);
1456 if (!page) /* Failed to allocate new page. */
1458 LIST_INSERT_HEAD(&priv->dbrpgs, page, next);
1460 /* Loop to find bitmap part with clear bit. */
1462 i < MLX5_DBR_BITMAP_SIZE && page->dbr_bitmap[i] == UINT64_MAX;
1465 /* Find the first clear bit. */
1466 j = rte_bsf64(~page->dbr_bitmap[i]);
1467 assert(i < (MLX5_DBR_PER_PAGE / 64));
1468 page->dbr_bitmap[i] |= (1 << j);
1471 return (((i * 64) + j) * sizeof(uint64_t));
1475 * Release a door-bell record.
1478 * Pointer to Ethernet device.
1479 * @param [in] umem_id
1480 * UMEM ID of page containing the door-bell record to release.
1481 * @param [in] offset
1482 * Offset of door-bell record in page.
1485 * 0 on success, a negative error value otherwise.
1488 mlx5_release_dbr(struct rte_eth_dev *dev, uint32_t umem_id, uint64_t offset)
1490 struct mlx5_priv *priv = dev->data->dev_private;
1491 struct mlx5_devx_dbr_page *page = NULL;
1494 LIST_FOREACH(page, &priv->dbrpgs, next)
1495 /* Find the page this address belongs to. */
1496 if (page->umem->umem_id == umem_id)
1501 if (!page->dbr_count) {
1502 /* Page not used, free it and remove from list. */
1503 LIST_REMOVE(page, next);
1505 ret = -mlx5_glue->devx_umem_dereg(page->umem);
1508 /* Mark in bitmap that this door-bell is not in use. */
1509 offset /= MLX5_DBR_SIZE;
1510 int i = offset / 64;
1511 int j = offset % 64;
1513 page->dbr_bitmap[i] &= ~(1 << j);
1519 * Spawn an Ethernet device from Verbs information.
1522 * Backing DPDK device.
1524 * Verbs device parameters (name, port, switch_info) to spawn.
1526 * Device configuration parameters.
1529 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1530 * is set. The following errors are defined:
1532 * EBUSY: device is not supposed to be spawned.
1533 * EEXIST: device is already spawned
1535 static struct rte_eth_dev *
1536 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1537 struct mlx5_dev_spawn_data *spawn,
1538 struct mlx5_dev_config config)
1540 const struct mlx5_switch_info *switch_info = &spawn->info;
1541 struct mlx5_ibv_shared *sh = NULL;
1542 struct ibv_port_attr port_attr;
1543 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1544 struct rte_eth_dev *eth_dev = NULL;
1545 struct mlx5_priv *priv = NULL;
1547 unsigned int hw_padding = 0;
1549 unsigned int cqe_comp;
1550 unsigned int cqe_pad = 0;
1551 unsigned int tunnel_en = 0;
1552 unsigned int mpls_en = 0;
1553 unsigned int swp = 0;
1554 unsigned int mprq = 0;
1555 unsigned int mprq_min_stride_size_n = 0;
1556 unsigned int mprq_max_stride_size_n = 0;
1557 unsigned int mprq_min_stride_num_n = 0;
1558 unsigned int mprq_max_stride_num_n = 0;
1559 struct rte_ether_addr mac;
1560 char name[RTE_ETH_NAME_MAX_LEN];
1561 int own_domain_id = 0;
1565 /* Determine if this port representor is supposed to be spawned. */
1566 if (switch_info->representor && dpdk_dev->devargs) {
1567 struct rte_eth_devargs eth_da;
1569 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1572 DRV_LOG(ERR, "failed to process device arguments: %s",
1573 strerror(rte_errno));
1576 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1577 if (eth_da.representor_ports[i] ==
1578 (uint16_t)switch_info->port_name)
1580 if (i == eth_da.nb_representor_ports) {
1585 /* Build device name. */
1586 if (!switch_info->representor)
1587 strlcpy(name, dpdk_dev->name, sizeof(name));
1589 snprintf(name, sizeof(name), "%s_representor_%u",
1590 dpdk_dev->name, switch_info->port_name);
1591 /* check if the device is already spawned */
1592 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1596 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1597 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1598 eth_dev = rte_eth_dev_attach_secondary(name);
1599 if (eth_dev == NULL) {
1600 DRV_LOG(ERR, "can not attach rte ethdev");
1604 eth_dev->device = dpdk_dev;
1605 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1606 err = mlx5_proc_priv_init(eth_dev);
1609 /* Receive command fd from primary process */
1610 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1613 /* Remap UAR for Tx queues. */
1614 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1618 * Ethdev pointer is still required as input since
1619 * the primary device is not accessible from the
1620 * secondary process.
1622 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1623 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1626 sh = mlx5_alloc_shared_ibctx(spawn);
1629 config.devx = sh->devx;
1630 #ifdef HAVE_MLX5DV_DR_ACTION_DEST_DEVX_TIR
1631 config.dest_tir = 1;
1633 #ifdef HAVE_IBV_MLX5_MOD_SWP
1634 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1637 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1638 * as all ConnectX-5 devices.
1640 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1641 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1643 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1644 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1646 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1647 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1648 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1649 DRV_LOG(DEBUG, "enhanced MPW is supported");
1650 mps = MLX5_MPW_ENHANCED;
1652 DRV_LOG(DEBUG, "MPW is supported");
1656 DRV_LOG(DEBUG, "MPW isn't supported");
1657 mps = MLX5_MPW_DISABLED;
1659 #ifdef HAVE_IBV_MLX5_MOD_SWP
1660 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1661 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1662 DRV_LOG(DEBUG, "SWP support: %u", swp);
1665 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1666 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1667 struct mlx5dv_striding_rq_caps mprq_caps =
1668 dv_attr.striding_rq_caps;
1670 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1671 mprq_caps.min_single_stride_log_num_of_bytes);
1672 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1673 mprq_caps.max_single_stride_log_num_of_bytes);
1674 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1675 mprq_caps.min_single_wqe_log_num_of_strides);
1676 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1677 mprq_caps.max_single_wqe_log_num_of_strides);
1678 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1679 mprq_caps.supported_qpts);
1680 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1682 mprq_min_stride_size_n =
1683 mprq_caps.min_single_stride_log_num_of_bytes;
1684 mprq_max_stride_size_n =
1685 mprq_caps.max_single_stride_log_num_of_bytes;
1686 mprq_min_stride_num_n =
1687 mprq_caps.min_single_wqe_log_num_of_strides;
1688 mprq_max_stride_num_n =
1689 mprq_caps.max_single_wqe_log_num_of_strides;
1690 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1691 mprq_min_stride_num_n);
1694 if (RTE_CACHE_LINE_SIZE == 128 &&
1695 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1699 config.cqe_comp = cqe_comp;
1700 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1701 /* Whether device supports 128B Rx CQE padding. */
1702 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1703 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1705 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1706 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1707 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1708 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1709 (dv_attr.tunnel_offloads_caps &
1710 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1712 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1713 tunnel_en ? "" : "not ");
1716 "tunnel offloading disabled due to old OFED/rdma-core version");
1718 config.tunnel_en = tunnel_en;
1719 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1720 mpls_en = ((dv_attr.tunnel_offloads_caps &
1721 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1722 (dv_attr.tunnel_offloads_caps &
1723 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1724 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1725 mpls_en ? "" : "not ");
1727 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1728 " old OFED/rdma-core version or firmware configuration");
1730 config.mpls_en = mpls_en;
1731 /* Check port status. */
1732 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1734 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1737 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1738 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1742 if (port_attr.state != IBV_PORT_ACTIVE)
1743 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1744 mlx5_glue->port_state_str(port_attr.state),
1746 /* Allocate private eth device data. */
1747 priv = rte_zmalloc("ethdev private structure",
1749 RTE_CACHE_LINE_SIZE);
1751 DRV_LOG(ERR, "priv allocation failure");
1756 priv->ibv_port = spawn->ibv_port;
1757 priv->pci_dev = spawn->pci_dev;
1758 priv->mtu = RTE_ETHER_MTU;
1760 /* Initialize UAR access locks for 32bit implementations. */
1761 rte_spinlock_init(&priv->uar_lock_cq);
1762 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1763 rte_spinlock_init(&priv->uar_lock[i]);
1765 /* Some internal functions rely on Netlink sockets, open them now. */
1766 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1767 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1769 priv->representor = !!switch_info->representor;
1770 priv->master = !!switch_info->master;
1771 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1773 * Currently we support single E-Switch per PF configurations
1774 * only and vport_id field contains the vport index for
1775 * associated VF, which is deduced from representor port name.
1776 * For example, let's have the IB device port 10, it has
1777 * attached network device eth0, which has port name attribute
1778 * pf0vf2, we can deduce the VF number as 2, and set vport index
1779 * as 3 (2+1). This assigning schema should be changed if the
1780 * multiple E-Switch instances per PF configurations or/and PCI
1781 * subfunctions are added.
1783 priv->vport_id = switch_info->representor ?
1784 switch_info->port_name + 1 : -1;
1785 /* representor_id field keeps the unmodified port/VF index. */
1786 priv->representor_id = switch_info->representor ?
1787 switch_info->port_name : -1;
1789 * Look for sibling devices in order to reuse their switch domain
1790 * if any, otherwise allocate one.
1792 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1793 const struct mlx5_priv *opriv =
1794 rte_eth_devices[port_id].data->dev_private;
1798 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1800 priv->domain_id = opriv->domain_id;
1803 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1804 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1807 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1808 strerror(rte_errno));
1813 err = mlx5_args(&config, dpdk_dev->devargs);
1816 DRV_LOG(ERR, "failed to process device arguments: %s",
1817 strerror(rte_errno));
1820 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1821 IBV_DEVICE_RAW_IP_CSUM);
1822 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1823 (config.hw_csum ? "" : "not "));
1824 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1825 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1826 DRV_LOG(DEBUG, "counters are not supported");
1828 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1829 if (config.dv_flow_en) {
1830 DRV_LOG(WARNING, "DV flow is not supported");
1831 config.dv_flow_en = 0;
1834 config.ind_table_max_size =
1835 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1837 * Remove this check once DPDK supports larger/variable
1838 * indirection tables.
1840 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1841 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1842 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1843 config.ind_table_max_size);
1844 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1845 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1846 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1847 (config.hw_vlan_strip ? "" : "not "));
1848 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1849 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1850 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1851 (config.hw_fcs_strip ? "" : "not "));
1852 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1853 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1854 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1855 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1856 IBV_DEVICE_PCI_WRITE_END_PADDING);
1858 if (config.hw_padding && !hw_padding) {
1859 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1860 config.hw_padding = 0;
1861 } else if (config.hw_padding) {
1862 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1864 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1865 (sh->device_attr.tso_caps.supported_qpts &
1866 (1 << IBV_QPT_RAW_PACKET)));
1868 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1870 * MPW is disabled by default, while the Enhanced MPW is enabled
1873 if (config.mps == MLX5_ARG_UNSET)
1874 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1877 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1878 DRV_LOG(INFO, "%sMPS is %s",
1879 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1880 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1881 if (config.cqe_comp && !cqe_comp) {
1882 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1883 config.cqe_comp = 0;
1885 if (config.cqe_pad && !cqe_pad) {
1886 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1888 } else if (config.cqe_pad) {
1889 DRV_LOG(INFO, "Rx CQE padding is enabled");
1892 priv->counter_fallback = 0;
1893 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1898 if (!config.hca_attr.flow_counters_dump)
1899 priv->counter_fallback = 1;
1900 #ifndef HAVE_IBV_DEVX_ASYNC
1901 priv->counter_fallback = 1;
1903 if (priv->counter_fallback)
1904 DRV_LOG(INFO, "Use fall-back DV counter management\n");
1905 /* Check for LRO support. */
1906 if (config.dest_tir && config.hca_attr.lro_cap) {
1907 /* TBD check tunnel lro caps. */
1908 config.lro.supported = config.hca_attr.lro_cap;
1909 DRV_LOG(DEBUG, "Device supports LRO");
1911 * If LRO timeout is not configured by application,
1912 * use the minimal supported value.
1914 if (!config.lro.timeout)
1915 config.lro.timeout =
1916 config.hca_attr.lro_timer_supported_periods[0];
1917 DRV_LOG(DEBUG, "LRO session timeout set to %d usec",
1918 config.lro.timeout);
1921 if (config.mprq.enabled && mprq) {
1922 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1923 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1924 config.mprq.stride_num_n =
1925 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1926 mprq_min_stride_num_n);
1928 "the number of strides"
1929 " for Multi-Packet RQ is out of range,"
1930 " setting default value (%u)",
1931 1 << config.mprq.stride_num_n);
1933 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1934 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1935 } else if (config.mprq.enabled && !mprq) {
1936 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1937 config.mprq.enabled = 0;
1939 if (config.max_dump_files_num == 0)
1940 config.max_dump_files_num = 128;
1941 eth_dev = rte_eth_dev_allocate(name);
1942 if (eth_dev == NULL) {
1943 DRV_LOG(ERR, "can not allocate rte ethdev");
1947 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1948 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1949 if (priv->representor) {
1950 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1951 eth_dev->data->representor_id = priv->representor_id;
1954 * Store associated network device interface index. This index
1955 * is permanent throughout the lifetime of device. So, we may store
1956 * the ifindex here and use the cached value further.
1958 assert(spawn->ifindex);
1959 priv->if_index = spawn->ifindex;
1960 eth_dev->data->dev_private = priv;
1961 priv->dev_data = eth_dev->data;
1962 eth_dev->data->mac_addrs = priv->mac;
1963 eth_dev->device = dpdk_dev;
1964 /* Configure the first MAC address by default. */
1965 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1967 "port %u cannot get MAC address, is mlx5_en"
1968 " loaded? (errno: %s)",
1969 eth_dev->data->port_id, strerror(rte_errno));
1974 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1975 eth_dev->data->port_id,
1976 mac.addr_bytes[0], mac.addr_bytes[1],
1977 mac.addr_bytes[2], mac.addr_bytes[3],
1978 mac.addr_bytes[4], mac.addr_bytes[5]);
1981 char ifname[IF_NAMESIZE];
1983 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1984 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1985 eth_dev->data->port_id, ifname);
1987 DRV_LOG(DEBUG, "port %u ifname is unknown",
1988 eth_dev->data->port_id);
1991 /* Get actual MTU if possible. */
1992 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1997 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1999 /* Initialize burst functions to prevent crashes before link-up. */
2000 eth_dev->rx_pkt_burst = removed_rx_burst;
2001 eth_dev->tx_pkt_burst = removed_tx_burst;
2002 eth_dev->dev_ops = &mlx5_dev_ops;
2003 /* Register MAC address. */
2004 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
2005 if (config.vf && config.vf_nl_en)
2006 mlx5_nl_mac_addr_sync(eth_dev);
2007 TAILQ_INIT(&priv->flows);
2008 TAILQ_INIT(&priv->ctrl_flows);
2009 /* Hint libmlx5 to use PMD allocator for data plane resources */
2010 struct mlx5dv_ctx_allocators alctr = {
2011 .alloc = &mlx5_alloc_verbs_buf,
2012 .free = &mlx5_free_verbs_buf,
2015 mlx5_glue->dv_set_context_attr(sh->ctx,
2016 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
2017 (void *)((uintptr_t)&alctr));
2018 /* Bring Ethernet device up. */
2019 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
2020 eth_dev->data->port_id);
2021 mlx5_set_link_up(eth_dev);
2023 * Even though the interrupt handler is not installed yet,
2024 * interrupts will still trigger on the async_fd from
2025 * Verbs context returned by ibv_open_device().
2027 mlx5_link_update(eth_dev, 0);
2028 #ifdef HAVE_MLX5DV_DR_ESWITCH
2029 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
2030 (switch_info->representor || switch_info->master)))
2031 config.dv_esw_en = 0;
2033 config.dv_esw_en = 0;
2035 /* Detect minimal data bytes to inline. */
2036 mlx5_set_min_inline(spawn, &config);
2037 /* Store device configuration on private structure. */
2038 priv->config = config;
2039 /* Create context for virtual machine VLAN workaround. */
2040 priv->vmwa_context = mlx5_vlan_vmwa_init(eth_dev, spawn->ifindex);
2041 if (config.dv_flow_en) {
2042 err = mlx5_alloc_shared_dr(priv);
2046 /* Supported Verbs flow priority number detection. */
2047 err = mlx5_flow_discover_priorities(eth_dev);
2052 priv->config.flow_prio = err;
2057 mlx5_free_shared_dr(priv);
2058 if (priv->nl_socket_route >= 0)
2059 close(priv->nl_socket_route);
2060 if (priv->nl_socket_rdma >= 0)
2061 close(priv->nl_socket_rdma);
2062 if (priv->vmwa_context)
2063 mlx5_vlan_vmwa_exit(priv->vmwa_context);
2065 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
2067 if (eth_dev != NULL)
2068 eth_dev->data->dev_private = NULL;
2070 if (eth_dev != NULL) {
2071 /* mac_addrs must not be freed alone because part of dev_private */
2072 eth_dev->data->mac_addrs = NULL;
2073 rte_eth_dev_release_port(eth_dev);
2076 mlx5_free_shared_ibctx(sh);
2083 * Comparison callback to sort device data.
2085 * This is meant to be used with qsort().
2088 * Pointer to pointer to first data object.
2090 * Pointer to pointer to second data object.
2093 * 0 if both objects are equal, less than 0 if the first argument is less
2094 * than the second, greater than 0 otherwise.
2097 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
2099 const struct mlx5_switch_info *si_a =
2100 &((const struct mlx5_dev_spawn_data *)a)->info;
2101 const struct mlx5_switch_info *si_b =
2102 &((const struct mlx5_dev_spawn_data *)b)->info;
2105 /* Master device first. */
2106 ret = si_b->master - si_a->master;
2109 /* Then representor devices. */
2110 ret = si_b->representor - si_a->representor;
2113 /* Unidentified devices come last in no specific order. */
2114 if (!si_a->representor)
2116 /* Order representors by name. */
2117 return si_a->port_name - si_b->port_name;
2121 * DPDK callback to register a PCI device.
2123 * This function spawns Ethernet devices out of a given PCI device.
2125 * @param[in] pci_drv
2126 * PCI driver structure (mlx5_driver).
2127 * @param[in] pci_dev
2128 * PCI device information.
2131 * 0 on success, a negative errno value otherwise and rte_errno is set.
2134 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
2135 struct rte_pci_device *pci_dev)
2137 struct ibv_device **ibv_list;
2139 * Number of found IB Devices matching with requested PCI BDF.
2140 * nd != 1 means there are multiple IB devices over the same
2141 * PCI device and we have representors and master.
2143 unsigned int nd = 0;
2145 * Number of found IB device Ports. nd = 1 and np = 1..n means
2146 * we have the single multiport IB device, and there may be
2147 * representors attached to some of found ports.
2149 unsigned int np = 0;
2151 * Number of DPDK ethernet devices to Spawn - either over
2152 * multiple IB devices or multiple ports of single IB device.
2153 * Actually this is the number of iterations to spawn.
2155 unsigned int ns = 0;
2156 struct mlx5_dev_spawn_data *list = NULL;
2157 struct mlx5_dev_config dev_config;
2160 ret = mlx5_init_once();
2162 DRV_LOG(ERR, "unable to init PMD global data: %s",
2163 strerror(rte_errno));
2166 assert(pci_drv == &mlx5_driver);
2168 ibv_list = mlx5_glue->get_device_list(&ret);
2170 rte_errno = errno ? errno : ENOSYS;
2171 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
2175 * First scan the list of all Infiniband devices to find
2176 * matching ones, gathering into the list.
2178 struct ibv_device *ibv_match[ret + 1];
2179 int nl_route = mlx5_nl_init(NETLINK_ROUTE);
2180 int nl_rdma = mlx5_nl_init(NETLINK_RDMA);
2184 struct rte_pci_addr pci_addr;
2186 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
2187 if (mlx5_dev_to_pci_addr
2188 (ibv_list[ret]->ibdev_path, &pci_addr))
2190 if (pci_dev->addr.domain != pci_addr.domain ||
2191 pci_dev->addr.bus != pci_addr.bus ||
2192 pci_dev->addr.devid != pci_addr.devid ||
2193 pci_dev->addr.function != pci_addr.function)
2195 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
2196 ibv_list[ret]->name);
2197 ibv_match[nd++] = ibv_list[ret];
2199 ibv_match[nd] = NULL;
2201 /* No device matches, just complain and bail out. */
2203 "no Verbs device matches PCI device " PCI_PRI_FMT ","
2204 " are kernel drivers loaded?",
2205 pci_dev->addr.domain, pci_dev->addr.bus,
2206 pci_dev->addr.devid, pci_dev->addr.function);
2213 * Found single matching device may have multiple ports.
2214 * Each port may be representor, we have to check the port
2215 * number and check the representors existence.
2218 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
2220 DRV_LOG(WARNING, "can not get IB device \"%s\""
2221 " ports number", ibv_match[0]->name);
2224 * Now we can determine the maximal
2225 * amount of devices to be spawned.
2227 list = rte_zmalloc("device spawn data",
2228 sizeof(struct mlx5_dev_spawn_data) *
2230 RTE_CACHE_LINE_SIZE);
2232 DRV_LOG(ERR, "spawn data array allocation failure");
2239 * Single IB device with multiple ports found,
2240 * it may be E-Switch master device and representors.
2241 * We have to perform identification trough the ports.
2243 assert(nl_rdma >= 0);
2246 for (i = 1; i <= np; ++i) {
2247 list[ns].max_port = np;
2248 list[ns].ibv_port = i;
2249 list[ns].ibv_dev = ibv_match[0];
2250 list[ns].eth_dev = NULL;
2251 list[ns].pci_dev = pci_dev;
2252 list[ns].ifindex = mlx5_nl_ifindex
2253 (nl_rdma, list[ns].ibv_dev->name, i);
2254 if (!list[ns].ifindex) {
2256 * No network interface index found for the
2257 * specified port, it means there is no
2258 * representor on this port. It's OK,
2259 * there can be disabled ports, for example
2260 * if sriov_numvfs < sriov_totalvfs.
2266 ret = mlx5_nl_switch_info
2270 if (ret || (!list[ns].info.representor &&
2271 !list[ns].info.master)) {
2273 * We failed to recognize representors with
2274 * Netlink, let's try to perform the task
2277 ret = mlx5_sysfs_switch_info
2281 if (!ret && (list[ns].info.representor ^
2282 list[ns].info.master))
2287 "unable to recognize master/representors"
2288 " on the IB device with multiple ports");
2295 * The existence of several matching entries (nd > 1) means
2296 * port representors have been instantiated. No existing Verbs
2297 * call nor sysfs entries can tell them apart, this can only
2298 * be done through Netlink calls assuming kernel drivers are
2299 * recent enough to support them.
2301 * In the event of identification failure through Netlink,
2302 * try again through sysfs, then:
2304 * 1. A single IB device matches (nd == 1) with single
2305 * port (np=0/1) and is not a representor, assume
2306 * no switch support.
2308 * 2. Otherwise no safe assumptions can be made;
2309 * complain louder and bail out.
2312 for (i = 0; i != nd; ++i) {
2313 memset(&list[ns].info, 0, sizeof(list[ns].info));
2314 list[ns].max_port = 1;
2315 list[ns].ibv_port = 1;
2316 list[ns].ibv_dev = ibv_match[i];
2317 list[ns].eth_dev = NULL;
2318 list[ns].pci_dev = pci_dev;
2319 list[ns].ifindex = 0;
2321 list[ns].ifindex = mlx5_nl_ifindex
2322 (nl_rdma, list[ns].ibv_dev->name, 1);
2323 if (!list[ns].ifindex) {
2324 char ifname[IF_NAMESIZE];
2327 * Netlink failed, it may happen with old
2328 * ib_core kernel driver (before 4.16).
2329 * We can assume there is old driver because
2330 * here we are processing single ports IB
2331 * devices. Let's try sysfs to retrieve
2332 * the ifindex. The method works for
2333 * master device only.
2337 * Multiple devices found, assume
2338 * representors, can not distinguish
2339 * master/representor and retrieve
2340 * ifindex via sysfs.
2344 ret = mlx5_get_master_ifname
2345 (ibv_match[i]->ibdev_path, &ifname);
2348 if_nametoindex(ifname);
2349 if (!list[ns].ifindex) {
2351 * No network interface index found
2352 * for the specified device, it means
2353 * there it is neither representor
2361 ret = mlx5_nl_switch_info
2365 if (ret || (!list[ns].info.representor &&
2366 !list[ns].info.master)) {
2368 * We failed to recognize representors with
2369 * Netlink, let's try to perform the task
2372 ret = mlx5_sysfs_switch_info
2376 if (!ret && (list[ns].info.representor ^
2377 list[ns].info.master)) {
2379 } else if ((nd == 1) &&
2380 !list[ns].info.representor &&
2381 !list[ns].info.master) {
2383 * Single IB device with
2384 * one physical port and
2385 * attached network device.
2386 * May be SRIOV is not enabled
2387 * or there is no representors.
2389 DRV_LOG(INFO, "no E-Switch support detected");
2396 "unable to recognize master/representors"
2397 " on the multiple IB devices");
2405 * Sort list to probe devices in natural order for users convenience
2406 * (i.e. master first, then representors from lowest to highest ID).
2408 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2409 /* Default configuration. */
2410 dev_config = (struct mlx5_dev_config){
2412 .mps = MLX5_ARG_UNSET,
2414 .txq_inline_max = MLX5_ARG_UNSET,
2415 .txq_inline_min = MLX5_ARG_UNSET,
2416 .txq_inline_mpw = MLX5_ARG_UNSET,
2417 .txqs_inline = MLX5_ARG_UNSET,
2419 .mr_ext_memseg_en = 1,
2421 .enabled = 0, /* Disabled by default. */
2422 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2423 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2424 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2428 /* Device specific configuration. */
2429 switch (pci_dev->id.device_id) {
2430 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2431 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2432 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2433 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2434 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF:
2435 case PCI_DEVICE_ID_MELLANOX_CONNECTX6VF:
2441 for (i = 0; i != ns; ++i) {
2444 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2447 if (!list[i].eth_dev) {
2448 if (rte_errno != EBUSY && rte_errno != EEXIST)
2450 /* Device is disabled or already spawned. Ignore it. */
2453 restore = list[i].eth_dev->data->dev_flags;
2454 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2455 /* Restore non-PCI flags cleared by the above call. */
2456 list[i].eth_dev->data->dev_flags |= restore;
2457 rte_eth_dev_probing_finish(list[i].eth_dev);
2461 "probe of PCI device " PCI_PRI_FMT " aborted after"
2462 " encountering an error: %s",
2463 pci_dev->addr.domain, pci_dev->addr.bus,
2464 pci_dev->addr.devid, pci_dev->addr.function,
2465 strerror(rte_errno));
2469 if (!list[i].eth_dev)
2471 mlx5_dev_close(list[i].eth_dev);
2472 /* mac_addrs must not be freed because in dev_private */
2473 list[i].eth_dev->data->mac_addrs = NULL;
2474 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2476 /* Restore original error. */
2483 * Do the routine cleanup:
2484 * - close opened Netlink sockets
2485 * - free allocated spawn data array
2486 * - free the Infiniband device list
2495 mlx5_glue->free_device_list(ibv_list);
2500 * DPDK callback to remove a PCI device.
2502 * This function removes all Ethernet devices belong to a given PCI device.
2504 * @param[in] pci_dev
2505 * Pointer to the PCI device.
2508 * 0 on success, the function cannot fail.
2511 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2515 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2516 rte_eth_dev_close(port_id);
2520 static const struct rte_pci_id mlx5_pci_id_map[] = {
2522 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2523 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2526 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2527 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2530 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2531 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2534 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2535 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2538 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2539 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2542 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2543 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2546 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2547 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2550 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2551 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2554 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2555 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2558 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2559 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2562 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2563 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2566 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2567 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2574 static struct rte_pci_driver mlx5_driver = {
2576 .name = MLX5_DRIVER_NAME
2578 .id_table = mlx5_pci_id_map,
2579 .probe = mlx5_pci_probe,
2580 .remove = mlx5_pci_remove,
2581 .dma_map = mlx5_dma_map,
2582 .dma_unmap = mlx5_dma_unmap,
2583 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2584 RTE_PCI_DRV_PROBE_AGAIN,
2587 #ifdef RTE_IBVERBS_LINK_DLOPEN
2590 * Suffix RTE_EAL_PMD_PATH with "-glue".
2592 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2593 * suffixing its last component.
2596 * Output buffer, should be large enough otherwise NULL is returned.
2601 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2604 mlx5_glue_path(char *buf, size_t size)
2606 static const char *const bad[] = { "/", ".", "..", NULL };
2607 const char *path = RTE_EAL_PMD_PATH;
2608 size_t len = strlen(path);
2612 while (len && path[len - 1] == '/')
2614 for (off = len; off && path[off - 1] != '/'; --off)
2616 for (i = 0; bad[i]; ++i)
2617 if (!strncmp(path + off, bad[i], (int)(len - off)))
2619 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2620 if (i == -1 || (size_t)i >= size)
2625 "unable to append \"-glue\" to last component of"
2626 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2627 " please re-configure DPDK");
2632 * Initialization routine for run-time dependency on rdma-core.
2635 mlx5_glue_init(void)
2637 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2638 const char *path[] = {
2640 * A basic security check is necessary before trusting
2641 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2643 (geteuid() == getuid() && getegid() == getgid() ?
2644 getenv("MLX5_GLUE_PATH") : NULL),
2646 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2647 * variant, otherwise let dlopen() look up libraries on its
2650 (*RTE_EAL_PMD_PATH ?
2651 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2654 void *handle = NULL;
2658 while (!handle && i != RTE_DIM(path)) {
2667 end = strpbrk(path[i], ":;");
2669 end = path[i] + strlen(path[i]);
2670 len = end - path[i];
2675 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2677 (!len || *(end - 1) == '/') ? "" : "/");
2680 if (sizeof(name) != (size_t)ret + 1)
2682 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2684 handle = dlopen(name, RTLD_LAZY);
2695 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2698 sym = dlsym(handle, "mlx5_glue");
2699 if (!sym || !*sym) {
2703 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2712 "cannot initialize PMD due to missing run-time dependency on"
2713 " rdma-core libraries (libibverbs, libmlx5)");
2720 * Driver initialization routine.
2722 RTE_INIT(rte_mlx5_pmd_init)
2724 /* Initialize driver log type. */
2725 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2726 if (mlx5_logtype >= 0)
2727 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2729 /* Build the static tables for Verbs conversion. */
2730 mlx5_set_ptype_table();
2731 mlx5_set_cksum_table();
2732 mlx5_set_swp_types_table();
2734 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2735 * huge pages. Calling ibv_fork_init() during init allows
2736 * applications to use fork() safely for purposes other than
2737 * using this PMD, which is not supported in forked processes.
2739 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2740 /* Match the size of Rx completion entry to the size of a cacheline. */
2741 if (RTE_CACHE_LINE_SIZE == 128)
2742 setenv("MLX5_CQE_SIZE", "128", 0);
2744 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2745 * cleanup all the Verbs resources even when the device was removed.
2747 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2748 #ifdef RTE_IBVERBS_LINK_DLOPEN
2749 if (mlx5_glue_init())
2754 /* Glue structure must not contain any NULL pointers. */
2758 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2759 assert(((const void *const *)mlx5_glue)[i]);
2762 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2764 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2765 mlx5_glue->version, MLX5_GLUE_VERSION);
2768 mlx5_glue->fork_init();
2769 rte_pci_register(&mlx5_driver);
2772 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2773 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2774 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");