1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2015 6WIND S.A.
3 * Copyright 2015 Mellanox Technologies, Ltd
16 #include <linux/rtnetlink.h>
19 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
21 #pragma GCC diagnostic ignored "-Wpedantic"
23 #include <infiniband/verbs.h>
25 #pragma GCC diagnostic error "-Wpedantic"
28 #include <rte_malloc.h>
29 #include <rte_ethdev_driver.h>
30 #include <rte_ethdev_pci.h>
32 #include <rte_bus_pci.h>
33 #include <rte_common.h>
34 #include <rte_config.h>
35 #include <rte_eal_memconfig.h>
36 #include <rte_kvargs.h>
37 #include <rte_rwlock.h>
38 #include <rte_spinlock.h>
39 #include <rte_string_fns.h>
40 #include <rte_alarm.h>
43 #include "mlx5_utils.h"
44 #include "mlx5_rxtx.h"
45 #include "mlx5_autoconf.h"
46 #include "mlx5_defs.h"
47 #include "mlx5_glue.h"
49 #include "mlx5_flow.h"
51 /* Device parameter to enable RX completion queue compression. */
52 #define MLX5_RXQ_CQE_COMP_EN "rxq_cqe_comp_en"
54 /* Device parameter to enable RX completion entry padding to 128B. */
55 #define MLX5_RXQ_CQE_PAD_EN "rxq_cqe_pad_en"
57 /* Device parameter to enable padding Rx packet to cacheline size. */
58 #define MLX5_RXQ_PKT_PAD_EN "rxq_pkt_pad_en"
60 /* Device parameter to enable Multi-Packet Rx queue. */
61 #define MLX5_RX_MPRQ_EN "mprq_en"
63 /* Device parameter to configure log 2 of the number of strides for MPRQ. */
64 #define MLX5_RX_MPRQ_LOG_STRIDE_NUM "mprq_log_stride_num"
66 /* Device parameter to limit the size of memcpy'd packet for MPRQ. */
67 #define MLX5_RX_MPRQ_MAX_MEMCPY_LEN "mprq_max_memcpy_len"
69 /* Device parameter to set the minimum number of Rx queues to enable MPRQ. */
70 #define MLX5_RXQS_MIN_MPRQ "rxqs_min_mprq"
72 /* Device parameter to configure inline send. */
73 #define MLX5_TXQ_INLINE "txq_inline"
76 * Device parameter to configure the number of TX queues threshold for
77 * enabling inline send.
79 #define MLX5_TXQS_MIN_INLINE "txqs_min_inline"
82 * Device parameter to configure the number of TX queues threshold for
83 * enabling vectorized Tx.
85 #define MLX5_TXQS_MAX_VEC "txqs_max_vec"
87 /* Device parameter to enable multi-packet send WQEs. */
88 #define MLX5_TXQ_MPW_EN "txq_mpw_en"
90 /* Device parameter to include 2 dsegs in the title WQEBB. */
91 #define MLX5_TXQ_MPW_HDR_DSEG_EN "txq_mpw_hdr_dseg_en"
93 /* Device parameter to limit the size of inlining packet. */
94 #define MLX5_TXQ_MAX_INLINE_LEN "txq_max_inline_len"
96 /* Device parameter to enable hardware Tx vector. */
97 #define MLX5_TX_VEC_EN "tx_vec_en"
99 /* Device parameter to enable hardware Rx vector. */
100 #define MLX5_RX_VEC_EN "rx_vec_en"
102 /* Allow L3 VXLAN flow creation. */
103 #define MLX5_L3_VXLAN_EN "l3_vxlan_en"
105 /* Activate DV E-Switch flow steering. */
106 #define MLX5_DV_ESW_EN "dv_esw_en"
108 /* Activate DV flow steering. */
109 #define MLX5_DV_FLOW_EN "dv_flow_en"
111 /* Activate Netlink support in VF mode. */
112 #define MLX5_VF_NL_EN "vf_nl_en"
114 /* Enable extending memsegs when creating a MR. */
115 #define MLX5_MR_EXT_MEMSEG_EN "mr_ext_memseg_en"
117 /* Select port representors to instantiate. */
118 #define MLX5_REPRESENTOR "representor"
120 /* Device parameter to configure the maximum number of dump files per queue. */
121 #define MLX5_MAX_DUMP_FILES_NUM "max_dump_files_num"
123 #ifndef HAVE_IBV_MLX5_MOD_MPW
124 #define MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED (1 << 2)
125 #define MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW (1 << 3)
128 #ifndef HAVE_IBV_MLX5_MOD_CQE_128B_COMP
129 #define MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP (1 << 4)
132 static const char *MZ_MLX5_PMD_SHARED_DATA = "mlx5_pmd_shared_data";
134 /* Shared memory between primary and secondary processes. */
135 struct mlx5_shared_data *mlx5_shared_data;
137 /* Spinlock for mlx5_shared_data allocation. */
138 static rte_spinlock_t mlx5_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
140 /* Process local data for secondary processes. */
141 static struct mlx5_local_data mlx5_local_data;
143 /** Driver-specific log messages type. */
146 /** Data associated with devices to spawn. */
147 struct mlx5_dev_spawn_data {
148 uint32_t ifindex; /**< Network interface index. */
149 uint32_t max_port; /**< IB device maximal port index. */
150 uint32_t ibv_port; /**< IB device physical port index. */
151 struct mlx5_switch_info info; /**< Switch information. */
152 struct ibv_device *ibv_dev; /**< Associated IB device. */
153 struct rte_eth_dev *eth_dev; /**< Associated Ethernet device. */
154 struct rte_pci_device *pci_dev; /**< Backend PCI device. */
157 static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER();
158 static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER;
161 * Initialize the counters management structure.
164 * Pointer to mlx5_ibv_shared object to free
167 mlx5_flow_counters_mng_init(struct mlx5_ibv_shared *sh)
171 TAILQ_INIT(&sh->cmng.flow_counters);
172 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i)
173 TAILQ_INIT(&sh->cmng.ccont[i].pool_list);
177 * Destroy all the resources allocated for a counter memory management.
180 * Pointer to the memory management structure.
183 mlx5_flow_destroy_counter_stat_mem_mng(struct mlx5_counter_stats_mem_mng *mng)
185 uint8_t *mem = (uint8_t *)(uintptr_t)mng->raws[0].data;
187 LIST_REMOVE(mng, next);
188 claim_zero(mlx5_devx_cmd_destroy(mng->dm));
189 claim_zero(mlx5_glue->devx_umem_dereg(mng->umem));
194 * Close and release all the resources of the counters management.
197 * Pointer to mlx5_ibv_shared object to free.
200 mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh)
202 struct mlx5_counter_stats_mem_mng *mng;
209 rte_eal_alarm_cancel(mlx5_flow_query_alarm, sh);
210 if (rte_errno != EINPROGRESS)
214 for (i = 0; i < RTE_DIM(sh->cmng.ccont); ++i) {
215 struct mlx5_flow_counter_pool *pool;
216 uint32_t batch = !!(i % 2);
218 if (!sh->cmng.ccont[i].pools)
220 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
225 (mlx5_devx_cmd_destroy(pool->min_dcs));
227 for (j = 0; j < MLX5_COUNTERS_PER_POOL; ++j) {
228 if (pool->counters_raw[j].action)
230 (mlx5_glue->destroy_flow_action
231 (pool->counters_raw[j].action));
232 if (!batch && pool->counters_raw[j].dcs)
233 claim_zero(mlx5_devx_cmd_destroy
234 (pool->counters_raw[j].dcs));
236 TAILQ_REMOVE(&sh->cmng.ccont[i].pool_list, pool,
239 pool = TAILQ_FIRST(&sh->cmng.ccont[i].pool_list);
241 rte_free(sh->cmng.ccont[i].pools);
243 mng = LIST_FIRST(&sh->cmng.mem_mngs);
245 mlx5_flow_destroy_counter_stat_mem_mng(mng);
246 mng = LIST_FIRST(&sh->cmng.mem_mngs);
248 memset(&sh->cmng, 0, sizeof(sh->cmng));
252 * Allocate shared IB device context. If there is multiport device the
253 * master and representors will share this context, if there is single
254 * port dedicated IB device, the context will be used by only given
255 * port due to unification.
257 * Routine first searches the context for the specified IB device name,
258 * if found the shared context assumed and reference counter is incremented.
259 * If no context found the new one is created and initialized with specified
260 * IB device context and parameters.
263 * Pointer to the IB device attributes (name, port, etc).
266 * Pointer to mlx5_ibv_shared object on success,
267 * otherwise NULL and rte_errno is set.
269 static struct mlx5_ibv_shared *
270 mlx5_alloc_shared_ibctx(const struct mlx5_dev_spawn_data *spawn)
272 struct mlx5_ibv_shared *sh;
277 /* Secondary process should not create the shared context. */
278 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
279 pthread_mutex_lock(&mlx5_ibv_list_mutex);
280 /* Search for IB context by device name. */
281 LIST_FOREACH(sh, &mlx5_ibv_list, next) {
282 if (!strcmp(sh->ibdev_name, spawn->ibv_dev->name)) {
287 /* No device found, we have to create new shared context. */
288 assert(spawn->max_port);
289 sh = rte_zmalloc("ethdev shared ib context",
290 sizeof(struct mlx5_ibv_shared) +
292 sizeof(struct mlx5_ibv_shared_port),
293 RTE_CACHE_LINE_SIZE);
295 DRV_LOG(ERR, "shared context allocation failure");
299 /* Try to open IB device with DV first, then usual Verbs. */
301 sh->ctx = mlx5_glue->dv_open_device(spawn->ibv_dev);
304 DRV_LOG(DEBUG, "DevX is supported");
306 sh->ctx = mlx5_glue->open_device(spawn->ibv_dev);
308 err = errno ? errno : ENODEV;
311 DRV_LOG(DEBUG, "DevX is NOT supported");
313 err = mlx5_glue->query_device_ex(sh->ctx, NULL, &sh->device_attr);
315 DRV_LOG(DEBUG, "ibv_query_device_ex() failed");
319 sh->max_port = spawn->max_port;
320 strncpy(sh->ibdev_name, sh->ctx->device->name,
321 sizeof(sh->ibdev_name));
322 strncpy(sh->ibdev_path, sh->ctx->device->ibdev_path,
323 sizeof(sh->ibdev_path));
324 sh->pci_dev = spawn->pci_dev;
325 pthread_mutex_init(&sh->intr_mutex, NULL);
327 * Setting port_id to max unallowed value means
328 * there is no interrupt subhandler installed for
329 * the given port index i.
331 for (i = 0; i < sh->max_port; i++)
332 sh->port[i].ih_port_id = RTE_MAX_ETHPORTS;
333 sh->pd = mlx5_glue->alloc_pd(sh->ctx);
334 if (sh->pd == NULL) {
335 DRV_LOG(ERR, "PD allocation failure");
340 * Once the device is added to the list of memory event
341 * callback, its global MR cache table cannot be expanded
342 * on the fly because of deadlock. If it overflows, lookup
343 * should be done by searching MR list linearly, which is slow.
345 * At this point the device is not added to the memory
346 * event list yet, context is just being created.
348 err = mlx5_mr_btree_init(&sh->mr.cache,
349 MLX5_MR_BTREE_CACHE_N * 2,
350 sh->pci_dev->device.numa_node);
355 mlx5_flow_counters_mng_init(sh);
356 LIST_INSERT_HEAD(&mlx5_ibv_list, sh, next);
358 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
361 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
364 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
366 claim_zero(mlx5_glue->close_device(sh->ctx));
374 * Free shared IB device context. Decrement counter and if zero free
375 * all allocated resources and close handles.
378 * Pointer to mlx5_ibv_shared object to free
381 mlx5_free_shared_ibctx(struct mlx5_ibv_shared *sh)
383 pthread_mutex_lock(&mlx5_ibv_list_mutex);
385 /* Check the object presence in the list. */
386 struct mlx5_ibv_shared *lctx;
388 LIST_FOREACH(lctx, &mlx5_ibv_list, next)
393 DRV_LOG(ERR, "Freeing non-existing shared IB context");
399 /* Secondary process should not free the shared context. */
400 assert(rte_eal_process_type() == RTE_PROC_PRIMARY);
403 /* Release created Memory Regions. */
405 LIST_REMOVE(sh, next);
407 * Ensure there is no async event handler installed.
408 * Only primary process handles async device events.
410 mlx5_flow_counters_mng_close(sh);
411 assert(!sh->intr_cnt);
413 mlx5_intr_callback_unregister
414 (&sh->intr_handle, mlx5_dev_interrupt_handler, sh);
415 pthread_mutex_destroy(&sh->intr_mutex);
417 claim_zero(mlx5_glue->dealloc_pd(sh->pd));
419 claim_zero(mlx5_glue->close_device(sh->ctx));
422 pthread_mutex_unlock(&mlx5_ibv_list_mutex);
426 * Initialize DR related data within private structure.
427 * Routine checks the reference counter and does actual
428 * resources creation/initialization only if counter is zero.
431 * Pointer to the private device data structure.
434 * Zero on success, positive error code otherwise.
437 mlx5_alloc_shared_dr(struct mlx5_priv *priv)
439 #ifdef HAVE_MLX5DV_DR
440 struct mlx5_ibv_shared *sh = priv->sh;
446 /* Shared DV/DR structures is already initialized. */
451 /* Reference counter is zero, we should initialize structures. */
452 domain = mlx5_glue->dr_create_domain(sh->ctx,
453 MLX5DV_DR_DOMAIN_TYPE_NIC_RX);
455 DRV_LOG(ERR, "ingress mlx5dv_dr_create_domain failed");
459 sh->rx_domain = domain;
460 domain = mlx5_glue->dr_create_domain(sh->ctx,
461 MLX5DV_DR_DOMAIN_TYPE_NIC_TX);
463 DRV_LOG(ERR, "egress mlx5dv_dr_create_domain failed");
467 pthread_mutex_init(&sh->dv_mutex, NULL);
468 sh->tx_domain = domain;
469 #ifdef HAVE_MLX5DV_DR_ESWITCH
470 if (priv->config.dv_esw_en) {
471 domain = mlx5_glue->dr_create_domain
472 (sh->ctx, MLX5DV_DR_DOMAIN_TYPE_FDB);
474 DRV_LOG(ERR, "FDB mlx5dv_dr_create_domain failed");
478 sh->fdb_domain = domain;
479 sh->esw_drop_action = mlx5_glue->dr_create_flow_action_drop();
487 /* Rollback the created objects. */
489 mlx5_glue->dr_destroy_domain(sh->rx_domain);
490 sh->rx_domain = NULL;
493 mlx5_glue->dr_destroy_domain(sh->tx_domain);
494 sh->tx_domain = NULL;
496 if (sh->fdb_domain) {
497 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
498 sh->fdb_domain = NULL;
500 if (sh->esw_drop_action) {
501 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
502 sh->esw_drop_action = NULL;
512 * Destroy DR related data within private structure.
515 * Pointer to the private device data structure.
518 mlx5_free_shared_dr(struct mlx5_priv *priv)
520 #ifdef HAVE_MLX5DV_DR
521 struct mlx5_ibv_shared *sh;
523 if (!priv->dr_shared)
528 assert(sh->dv_refcnt);
529 if (sh->dv_refcnt && --sh->dv_refcnt)
532 mlx5_glue->dr_destroy_domain(sh->rx_domain);
533 sh->rx_domain = NULL;
536 mlx5_glue->dr_destroy_domain(sh->tx_domain);
537 sh->tx_domain = NULL;
539 #ifdef HAVE_MLX5DV_DR_ESWITCH
540 if (sh->fdb_domain) {
541 mlx5_glue->dr_destroy_domain(sh->fdb_domain);
542 sh->fdb_domain = NULL;
544 if (sh->esw_drop_action) {
545 mlx5_glue->destroy_flow_action(sh->esw_drop_action);
546 sh->esw_drop_action = NULL;
549 pthread_mutex_destroy(&sh->dv_mutex);
556 * Initialize shared data between primary and secondary process.
558 * A memzone is reserved by primary process and secondary processes attach to
562 * 0 on success, a negative errno value otherwise and rte_errno is set.
565 mlx5_init_shared_data(void)
567 const struct rte_memzone *mz;
570 rte_spinlock_lock(&mlx5_shared_data_lock);
571 if (mlx5_shared_data == NULL) {
572 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
573 /* Allocate shared memory. */
574 mz = rte_memzone_reserve(MZ_MLX5_PMD_SHARED_DATA,
575 sizeof(*mlx5_shared_data),
579 "Cannot allocate mlx5 shared data\n");
583 mlx5_shared_data = mz->addr;
584 memset(mlx5_shared_data, 0, sizeof(*mlx5_shared_data));
585 rte_spinlock_init(&mlx5_shared_data->lock);
587 /* Lookup allocated shared memory. */
588 mz = rte_memzone_lookup(MZ_MLX5_PMD_SHARED_DATA);
591 "Cannot attach mlx5 shared data\n");
595 mlx5_shared_data = mz->addr;
596 memset(&mlx5_local_data, 0, sizeof(mlx5_local_data));
600 rte_spinlock_unlock(&mlx5_shared_data_lock);
605 * Retrieve integer value from environment variable.
608 * Environment variable name.
611 * Integer value, 0 if the variable is not set.
614 mlx5_getenv_int(const char *name)
616 const char *val = getenv(name);
624 * Verbs callback to allocate a memory. This function should allocate the space
625 * according to the size provided residing inside a huge page.
626 * Please note that all allocation must respect the alignment from libmlx5
627 * (i.e. currently sysconf(_SC_PAGESIZE)).
630 * The size in bytes of the memory to allocate.
632 * A pointer to the callback data.
635 * Allocated buffer, NULL otherwise and rte_errno is set.
638 mlx5_alloc_verbs_buf(size_t size, void *data)
640 struct mlx5_priv *priv = data;
642 size_t alignment = sysconf(_SC_PAGESIZE);
643 unsigned int socket = SOCKET_ID_ANY;
645 if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) {
646 const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
648 socket = ctrl->socket;
649 } else if (priv->verbs_alloc_ctx.type ==
650 MLX5_VERBS_ALLOC_TYPE_RX_QUEUE) {
651 const struct mlx5_rxq_ctrl *ctrl = priv->verbs_alloc_ctx.obj;
653 socket = ctrl->socket;
655 assert(data != NULL);
656 ret = rte_malloc_socket(__func__, size, alignment, socket);
663 * Verbs callback to free a memory.
666 * A pointer to the memory to free.
668 * A pointer to the callback data.
671 mlx5_free_verbs_buf(void *ptr, void *data __rte_unused)
673 assert(data != NULL);
678 * Initialize process private data structure.
681 * Pointer to Ethernet device structure.
684 * 0 on success, a negative errno value otherwise and rte_errno is set.
687 mlx5_proc_priv_init(struct rte_eth_dev *dev)
689 struct mlx5_priv *priv = dev->data->dev_private;
690 struct mlx5_proc_priv *ppriv;
694 * UAR register table follows the process private structure. BlueFlame
695 * registers for Tx queues are stored in the table.
698 sizeof(struct mlx5_proc_priv) + priv->txqs_n * sizeof(void *);
699 ppriv = rte_malloc_socket("mlx5_proc_priv", ppriv_size,
700 RTE_CACHE_LINE_SIZE, dev->device->numa_node);
705 ppriv->uar_table_sz = ppriv_size;
706 dev->process_private = ppriv;
711 * Un-initialize process private data structure.
714 * Pointer to Ethernet device structure.
717 mlx5_proc_priv_uninit(struct rte_eth_dev *dev)
719 if (!dev->process_private)
721 rte_free(dev->process_private);
722 dev->process_private = NULL;
726 * DPDK callback to close the device.
728 * Destroy all queues and objects, free memory.
731 * Pointer to Ethernet device structure.
734 mlx5_dev_close(struct rte_eth_dev *dev)
736 struct mlx5_priv *priv = dev->data->dev_private;
740 DRV_LOG(DEBUG, "port %u closing device \"%s\"",
742 ((priv->sh->ctx != NULL) ? priv->sh->ctx->device->name : ""));
743 /* In case mlx5_dev_stop() has not been called. */
744 mlx5_dev_interrupt_handler_uninstall(dev);
745 mlx5_traffic_disable(dev);
746 mlx5_flow_flush(dev, NULL);
747 /* Prevent crashes when queues are still in use. */
748 dev->rx_pkt_burst = removed_rx_burst;
749 dev->tx_pkt_burst = removed_tx_burst;
751 /* Disable datapath on secondary process. */
752 mlx5_mp_req_stop_rxtx(dev);
753 if (priv->rxqs != NULL) {
754 /* XXX race condition if mlx5_rx_burst() is still running. */
756 for (i = 0; (i != priv->rxqs_n); ++i)
757 mlx5_rxq_release(dev, i);
761 if (priv->txqs != NULL) {
762 /* XXX race condition if mlx5_tx_burst() is still running. */
764 for (i = 0; (i != priv->txqs_n); ++i)
765 mlx5_txq_release(dev, i);
769 mlx5_proc_priv_uninit(dev);
770 mlx5_mprq_free_mp(dev);
771 /* Remove from memory callback device list. */
772 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
774 LIST_REMOVE(priv->sh, mem_event_cb);
775 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
776 mlx5_free_shared_dr(priv);
777 if (priv->rss_conf.rss_key != NULL)
778 rte_free(priv->rss_conf.rss_key);
779 if (priv->reta_idx != NULL)
780 rte_free(priv->reta_idx);
782 mlx5_nl_mac_addr_flush(dev);
783 if (priv->nl_socket_route >= 0)
784 close(priv->nl_socket_route);
785 if (priv->nl_socket_rdma >= 0)
786 close(priv->nl_socket_rdma);
789 * Free the shared context in last turn, because the cleanup
790 * routines above may use some shared fields, like
791 * mlx5_nl_mac_addr_flush() uses ibdev_path for retrieveing
792 * ifindex if Netlink fails.
794 mlx5_free_shared_ibctx(priv->sh);
797 ret = mlx5_hrxq_ibv_verify(dev);
799 DRV_LOG(WARNING, "port %u some hash Rx queue still remain",
801 ret = mlx5_ind_table_ibv_verify(dev);
803 DRV_LOG(WARNING, "port %u some indirection table still remain",
805 ret = mlx5_rxq_ibv_verify(dev);
807 DRV_LOG(WARNING, "port %u some Verbs Rx queue still remain",
809 ret = mlx5_rxq_verify(dev);
811 DRV_LOG(WARNING, "port %u some Rx queues still remain",
813 ret = mlx5_txq_ibv_verify(dev);
815 DRV_LOG(WARNING, "port %u some Verbs Tx queue still remain",
817 ret = mlx5_txq_verify(dev);
819 DRV_LOG(WARNING, "port %u some Tx queues still remain",
821 ret = mlx5_flow_verify(dev);
823 DRV_LOG(WARNING, "port %u some flows still remain",
825 if (priv->domain_id != RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
829 RTE_ETH_FOREACH_DEV_OF(port_id, dev->device) {
830 struct mlx5_priv *opriv =
831 rte_eth_devices[port_id].data->dev_private;
834 opriv->domain_id != priv->domain_id ||
835 &rte_eth_devices[port_id] == dev)
840 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
842 memset(priv, 0, sizeof(*priv));
843 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
845 * Reset mac_addrs to NULL such that it is not freed as part of
846 * rte_eth_dev_release_port(). mac_addrs is part of dev_private so
847 * it is freed when dev_private is freed.
849 dev->data->mac_addrs = NULL;
852 const struct eth_dev_ops mlx5_dev_ops = {
853 .dev_configure = mlx5_dev_configure,
854 .dev_start = mlx5_dev_start,
855 .dev_stop = mlx5_dev_stop,
856 .dev_set_link_down = mlx5_set_link_down,
857 .dev_set_link_up = mlx5_set_link_up,
858 .dev_close = mlx5_dev_close,
859 .promiscuous_enable = mlx5_promiscuous_enable,
860 .promiscuous_disable = mlx5_promiscuous_disable,
861 .allmulticast_enable = mlx5_allmulticast_enable,
862 .allmulticast_disable = mlx5_allmulticast_disable,
863 .link_update = mlx5_link_update,
864 .stats_get = mlx5_stats_get,
865 .stats_reset = mlx5_stats_reset,
866 .xstats_get = mlx5_xstats_get,
867 .xstats_reset = mlx5_xstats_reset,
868 .xstats_get_names = mlx5_xstats_get_names,
869 .fw_version_get = mlx5_fw_version_get,
870 .dev_infos_get = mlx5_dev_infos_get,
871 .read_clock = mlx5_read_clock,
872 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
873 .vlan_filter_set = mlx5_vlan_filter_set,
874 .rx_queue_setup = mlx5_rx_queue_setup,
875 .tx_queue_setup = mlx5_tx_queue_setup,
876 .rx_queue_release = mlx5_rx_queue_release,
877 .tx_queue_release = mlx5_tx_queue_release,
878 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
879 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
880 .mac_addr_remove = mlx5_mac_addr_remove,
881 .mac_addr_add = mlx5_mac_addr_add,
882 .mac_addr_set = mlx5_mac_addr_set,
883 .set_mc_addr_list = mlx5_set_mc_addr_list,
884 .mtu_set = mlx5_dev_set_mtu,
885 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
886 .vlan_offload_set = mlx5_vlan_offload_set,
887 .reta_update = mlx5_dev_rss_reta_update,
888 .reta_query = mlx5_dev_rss_reta_query,
889 .rss_hash_update = mlx5_rss_hash_update,
890 .rss_hash_conf_get = mlx5_rss_hash_conf_get,
891 .filter_ctrl = mlx5_dev_filter_ctrl,
892 .rx_descriptor_status = mlx5_rx_descriptor_status,
893 .tx_descriptor_status = mlx5_tx_descriptor_status,
894 .rx_queue_count = mlx5_rx_queue_count,
895 .rx_queue_intr_enable = mlx5_rx_intr_enable,
896 .rx_queue_intr_disable = mlx5_rx_intr_disable,
897 .is_removed = mlx5_is_removed,
900 /* Available operations from secondary process. */
901 static const struct eth_dev_ops mlx5_dev_sec_ops = {
902 .stats_get = mlx5_stats_get,
903 .stats_reset = mlx5_stats_reset,
904 .xstats_get = mlx5_xstats_get,
905 .xstats_reset = mlx5_xstats_reset,
906 .xstats_get_names = mlx5_xstats_get_names,
907 .fw_version_get = mlx5_fw_version_get,
908 .dev_infos_get = mlx5_dev_infos_get,
909 .rx_descriptor_status = mlx5_rx_descriptor_status,
910 .tx_descriptor_status = mlx5_tx_descriptor_status,
913 /* Available operations in flow isolated mode. */
914 const struct eth_dev_ops mlx5_dev_ops_isolate = {
915 .dev_configure = mlx5_dev_configure,
916 .dev_start = mlx5_dev_start,
917 .dev_stop = mlx5_dev_stop,
918 .dev_set_link_down = mlx5_set_link_down,
919 .dev_set_link_up = mlx5_set_link_up,
920 .dev_close = mlx5_dev_close,
921 .promiscuous_enable = mlx5_promiscuous_enable,
922 .promiscuous_disable = mlx5_promiscuous_disable,
923 .allmulticast_enable = mlx5_allmulticast_enable,
924 .allmulticast_disable = mlx5_allmulticast_disable,
925 .link_update = mlx5_link_update,
926 .stats_get = mlx5_stats_get,
927 .stats_reset = mlx5_stats_reset,
928 .xstats_get = mlx5_xstats_get,
929 .xstats_reset = mlx5_xstats_reset,
930 .xstats_get_names = mlx5_xstats_get_names,
931 .fw_version_get = mlx5_fw_version_get,
932 .dev_infos_get = mlx5_dev_infos_get,
933 .dev_supported_ptypes_get = mlx5_dev_supported_ptypes_get,
934 .vlan_filter_set = mlx5_vlan_filter_set,
935 .rx_queue_setup = mlx5_rx_queue_setup,
936 .tx_queue_setup = mlx5_tx_queue_setup,
937 .rx_queue_release = mlx5_rx_queue_release,
938 .tx_queue_release = mlx5_tx_queue_release,
939 .flow_ctrl_get = mlx5_dev_get_flow_ctrl,
940 .flow_ctrl_set = mlx5_dev_set_flow_ctrl,
941 .mac_addr_remove = mlx5_mac_addr_remove,
942 .mac_addr_add = mlx5_mac_addr_add,
943 .mac_addr_set = mlx5_mac_addr_set,
944 .set_mc_addr_list = mlx5_set_mc_addr_list,
945 .mtu_set = mlx5_dev_set_mtu,
946 .vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
947 .vlan_offload_set = mlx5_vlan_offload_set,
948 .filter_ctrl = mlx5_dev_filter_ctrl,
949 .rx_descriptor_status = mlx5_rx_descriptor_status,
950 .tx_descriptor_status = mlx5_tx_descriptor_status,
951 .rx_queue_intr_enable = mlx5_rx_intr_enable,
952 .rx_queue_intr_disable = mlx5_rx_intr_disable,
953 .is_removed = mlx5_is_removed,
957 * Verify and store value for device argument.
960 * Key argument to verify.
962 * Value associated with key.
967 * 0 on success, a negative errno value otherwise and rte_errno is set.
970 mlx5_args_check(const char *key, const char *val, void *opaque)
972 struct mlx5_dev_config *config = opaque;
975 /* No-op, port representors are processed in mlx5_dev_spawn(). */
976 if (!strcmp(MLX5_REPRESENTOR, key))
979 tmp = strtoul(val, NULL, 0);
982 DRV_LOG(WARNING, "%s: \"%s\" is not a valid integer", key, val);
985 if (strcmp(MLX5_RXQ_CQE_COMP_EN, key) == 0) {
986 config->cqe_comp = !!tmp;
987 } else if (strcmp(MLX5_RXQ_CQE_PAD_EN, key) == 0) {
988 config->cqe_pad = !!tmp;
989 } else if (strcmp(MLX5_RXQ_PKT_PAD_EN, key) == 0) {
990 config->hw_padding = !!tmp;
991 } else if (strcmp(MLX5_RX_MPRQ_EN, key) == 0) {
992 config->mprq.enabled = !!tmp;
993 } else if (strcmp(MLX5_RX_MPRQ_LOG_STRIDE_NUM, key) == 0) {
994 config->mprq.stride_num_n = tmp;
995 } else if (strcmp(MLX5_RX_MPRQ_MAX_MEMCPY_LEN, key) == 0) {
996 config->mprq.max_memcpy_len = tmp;
997 } else if (strcmp(MLX5_RXQS_MIN_MPRQ, key) == 0) {
998 config->mprq.min_rxqs_num = tmp;
999 } else if (strcmp(MLX5_TXQ_INLINE, key) == 0) {
1000 config->txq_inline = tmp;
1001 } else if (strcmp(MLX5_TXQS_MIN_INLINE, key) == 0) {
1002 config->txqs_inline = tmp;
1003 } else if (strcmp(MLX5_TXQS_MAX_VEC, key) == 0) {
1004 config->txqs_vec = tmp;
1005 } else if (strcmp(MLX5_TXQ_MPW_EN, key) == 0) {
1006 config->mps = !!tmp;
1007 } else if (strcmp(MLX5_TXQ_MPW_HDR_DSEG_EN, key) == 0) {
1008 config->mpw_hdr_dseg = !!tmp;
1009 } else if (strcmp(MLX5_TXQ_MAX_INLINE_LEN, key) == 0) {
1010 config->inline_max_packet_sz = tmp;
1011 } else if (strcmp(MLX5_TX_VEC_EN, key) == 0) {
1012 config->tx_vec_en = !!tmp;
1013 } else if (strcmp(MLX5_RX_VEC_EN, key) == 0) {
1014 config->rx_vec_en = !!tmp;
1015 } else if (strcmp(MLX5_L3_VXLAN_EN, key) == 0) {
1016 config->l3_vxlan_en = !!tmp;
1017 } else if (strcmp(MLX5_VF_NL_EN, key) == 0) {
1018 config->vf_nl_en = !!tmp;
1019 } else if (strcmp(MLX5_DV_ESW_EN, key) == 0) {
1020 config->dv_esw_en = !!tmp;
1021 } else if (strcmp(MLX5_DV_FLOW_EN, key) == 0) {
1022 config->dv_flow_en = !!tmp;
1023 } else if (strcmp(MLX5_MR_EXT_MEMSEG_EN, key) == 0) {
1024 config->mr_ext_memseg_en = !!tmp;
1025 } else if (strcmp(MLX5_MAX_DUMP_FILES_NUM, key) == 0) {
1026 config->max_dump_files_num = tmp;
1028 DRV_LOG(WARNING, "%s: unknown parameter", key);
1036 * Parse device parameters.
1039 * Pointer to device configuration structure.
1041 * Device arguments structure.
1044 * 0 on success, a negative errno value otherwise and rte_errno is set.
1047 mlx5_args(struct mlx5_dev_config *config, struct rte_devargs *devargs)
1049 const char **params = (const char *[]){
1050 MLX5_RXQ_CQE_COMP_EN,
1051 MLX5_RXQ_CQE_PAD_EN,
1052 MLX5_RXQ_PKT_PAD_EN,
1054 MLX5_RX_MPRQ_LOG_STRIDE_NUM,
1055 MLX5_RX_MPRQ_MAX_MEMCPY_LEN,
1058 MLX5_TXQS_MIN_INLINE,
1061 MLX5_TXQ_MPW_HDR_DSEG_EN,
1062 MLX5_TXQ_MAX_INLINE_LEN,
1069 MLX5_MR_EXT_MEMSEG_EN,
1071 MLX5_MAX_DUMP_FILES_NUM,
1074 struct rte_kvargs *kvlist;
1078 if (devargs == NULL)
1080 /* Following UGLY cast is done to pass checkpatch. */
1081 kvlist = rte_kvargs_parse(devargs->args, params);
1082 if (kvlist == NULL) {
1086 /* Process parameters. */
1087 for (i = 0; (params[i] != NULL); ++i) {
1088 if (rte_kvargs_count(kvlist, params[i])) {
1089 ret = rte_kvargs_process(kvlist, params[i],
1090 mlx5_args_check, config);
1093 rte_kvargs_free(kvlist);
1098 rte_kvargs_free(kvlist);
1102 static struct rte_pci_driver mlx5_driver;
1105 * PMD global initialization.
1107 * Independent from individual device, this function initializes global
1108 * per-PMD data structures distinguishing primary and secondary processes.
1109 * Hence, each initialization is called once per a process.
1112 * 0 on success, a negative errno value otherwise and rte_errno is set.
1115 mlx5_init_once(void)
1117 struct mlx5_shared_data *sd;
1118 struct mlx5_local_data *ld = &mlx5_local_data;
1121 if (mlx5_init_shared_data())
1123 sd = mlx5_shared_data;
1125 rte_spinlock_lock(&sd->lock);
1126 switch (rte_eal_process_type()) {
1127 case RTE_PROC_PRIMARY:
1130 LIST_INIT(&sd->mem_event_cb_list);
1131 rte_rwlock_init(&sd->mem_event_rwlock);
1132 rte_mem_event_callback_register("MLX5_MEM_EVENT_CB",
1133 mlx5_mr_mem_event_cb, NULL);
1134 ret = mlx5_mp_init_primary();
1137 sd->init_done = true;
1139 case RTE_PROC_SECONDARY:
1142 ret = mlx5_mp_init_secondary();
1145 ++sd->secondary_cnt;
1146 ld->init_done = true;
1152 rte_spinlock_unlock(&sd->lock);
1157 * Spawn an Ethernet device from Verbs information.
1160 * Backing DPDK device.
1162 * Verbs device parameters (name, port, switch_info) to spawn.
1164 * Device configuration parameters.
1167 * A valid Ethernet device object on success, NULL otherwise and rte_errno
1168 * is set. The following errors are defined:
1170 * EBUSY: device is not supposed to be spawned.
1171 * EEXIST: device is already spawned
1173 static struct rte_eth_dev *
1174 mlx5_dev_spawn(struct rte_device *dpdk_dev,
1175 struct mlx5_dev_spawn_data *spawn,
1176 struct mlx5_dev_config config)
1178 const struct mlx5_switch_info *switch_info = &spawn->info;
1179 struct mlx5_ibv_shared *sh = NULL;
1180 struct ibv_port_attr port_attr;
1181 struct mlx5dv_context dv_attr = { .comp_mask = 0 };
1182 struct rte_eth_dev *eth_dev = NULL;
1183 struct mlx5_priv *priv = NULL;
1185 unsigned int hw_padding = 0;
1187 unsigned int cqe_comp;
1188 unsigned int cqe_pad = 0;
1189 unsigned int tunnel_en = 0;
1190 unsigned int mpls_en = 0;
1191 unsigned int swp = 0;
1192 unsigned int mprq = 0;
1193 unsigned int mprq_min_stride_size_n = 0;
1194 unsigned int mprq_max_stride_size_n = 0;
1195 unsigned int mprq_min_stride_num_n = 0;
1196 unsigned int mprq_max_stride_num_n = 0;
1197 struct rte_ether_addr mac;
1198 char name[RTE_ETH_NAME_MAX_LEN];
1199 int own_domain_id = 0;
1203 /* Determine if this port representor is supposed to be spawned. */
1204 if (switch_info->representor && dpdk_dev->devargs) {
1205 struct rte_eth_devargs eth_da;
1207 err = rte_eth_devargs_parse(dpdk_dev->devargs->args, ð_da);
1210 DRV_LOG(ERR, "failed to process device arguments: %s",
1211 strerror(rte_errno));
1214 for (i = 0; i < eth_da.nb_representor_ports; ++i)
1215 if (eth_da.representor_ports[i] ==
1216 (uint16_t)switch_info->port_name)
1218 if (i == eth_da.nb_representor_ports) {
1223 /* Build device name. */
1224 if (!switch_info->representor)
1225 strlcpy(name, dpdk_dev->name, sizeof(name));
1227 snprintf(name, sizeof(name), "%s_representor_%u",
1228 dpdk_dev->name, switch_info->port_name);
1229 /* check if the device is already spawned */
1230 if (rte_eth_dev_get_port_by_name(name, &port_id) == 0) {
1234 DRV_LOG(DEBUG, "naming Ethernet device \"%s\"", name);
1235 if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
1236 eth_dev = rte_eth_dev_attach_secondary(name);
1237 if (eth_dev == NULL) {
1238 DRV_LOG(ERR, "can not attach rte ethdev");
1242 eth_dev->device = dpdk_dev;
1243 eth_dev->dev_ops = &mlx5_dev_sec_ops;
1244 err = mlx5_proc_priv_init(eth_dev);
1247 /* Receive command fd from primary process */
1248 err = mlx5_mp_req_verbs_cmd_fd(eth_dev);
1251 /* Remap UAR for Tx queues. */
1252 err = mlx5_tx_uar_init_secondary(eth_dev, err);
1256 * Ethdev pointer is still required as input since
1257 * the primary device is not accessible from the
1258 * secondary process.
1260 eth_dev->rx_pkt_burst = mlx5_select_rx_function(eth_dev);
1261 eth_dev->tx_pkt_burst = mlx5_select_tx_function(eth_dev);
1264 sh = mlx5_alloc_shared_ibctx(spawn);
1267 config.devx = sh->devx;
1268 #ifdef HAVE_IBV_MLX5_MOD_SWP
1269 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_SWP;
1272 * Multi-packet send is supported by ConnectX-4 Lx PF as well
1273 * as all ConnectX-5 devices.
1275 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1276 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS;
1278 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1279 dv_attr.comp_mask |= MLX5DV_CONTEXT_MASK_STRIDING_RQ;
1281 mlx5_glue->dv_query_device(sh->ctx, &dv_attr);
1282 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_MPW_ALLOWED) {
1283 if (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_ENHANCED_MPW) {
1284 DRV_LOG(DEBUG, "enhanced MPW is supported");
1285 mps = MLX5_MPW_ENHANCED;
1287 DRV_LOG(DEBUG, "MPW is supported");
1291 DRV_LOG(DEBUG, "MPW isn't supported");
1292 mps = MLX5_MPW_DISABLED;
1294 #ifdef HAVE_IBV_MLX5_MOD_SWP
1295 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_SWP)
1296 swp = dv_attr.sw_parsing_caps.sw_parsing_offloads;
1297 DRV_LOG(DEBUG, "SWP support: %u", swp);
1300 #ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT
1301 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_STRIDING_RQ) {
1302 struct mlx5dv_striding_rq_caps mprq_caps =
1303 dv_attr.striding_rq_caps;
1305 DRV_LOG(DEBUG, "\tmin_single_stride_log_num_of_bytes: %d",
1306 mprq_caps.min_single_stride_log_num_of_bytes);
1307 DRV_LOG(DEBUG, "\tmax_single_stride_log_num_of_bytes: %d",
1308 mprq_caps.max_single_stride_log_num_of_bytes);
1309 DRV_LOG(DEBUG, "\tmin_single_wqe_log_num_of_strides: %d",
1310 mprq_caps.min_single_wqe_log_num_of_strides);
1311 DRV_LOG(DEBUG, "\tmax_single_wqe_log_num_of_strides: %d",
1312 mprq_caps.max_single_wqe_log_num_of_strides);
1313 DRV_LOG(DEBUG, "\tsupported_qpts: %d",
1314 mprq_caps.supported_qpts);
1315 DRV_LOG(DEBUG, "device supports Multi-Packet RQ");
1317 mprq_min_stride_size_n =
1318 mprq_caps.min_single_stride_log_num_of_bytes;
1319 mprq_max_stride_size_n =
1320 mprq_caps.max_single_stride_log_num_of_bytes;
1321 mprq_min_stride_num_n =
1322 mprq_caps.min_single_wqe_log_num_of_strides;
1323 mprq_max_stride_num_n =
1324 mprq_caps.max_single_wqe_log_num_of_strides;
1325 config.mprq.stride_num_n = RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1326 mprq_min_stride_num_n);
1329 if (RTE_CACHE_LINE_SIZE == 128 &&
1330 !(dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_COMP))
1334 config.cqe_comp = cqe_comp;
1335 #ifdef HAVE_IBV_MLX5_MOD_CQE_128B_PAD
1336 /* Whether device supports 128B Rx CQE padding. */
1337 cqe_pad = RTE_CACHE_LINE_SIZE == 128 &&
1338 (dv_attr.flags & MLX5DV_CONTEXT_FLAGS_CQE_128B_PAD);
1340 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1341 if (dv_attr.comp_mask & MLX5DV_CONTEXT_MASK_TUNNEL_OFFLOADS) {
1342 tunnel_en = ((dv_attr.tunnel_offloads_caps &
1343 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_VXLAN) &&
1344 (dv_attr.tunnel_offloads_caps &
1345 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_GRE));
1347 DRV_LOG(DEBUG, "tunnel offloading is %ssupported",
1348 tunnel_en ? "" : "not ");
1351 "tunnel offloading disabled due to old OFED/rdma-core version");
1353 config.tunnel_en = tunnel_en;
1354 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1355 mpls_en = ((dv_attr.tunnel_offloads_caps &
1356 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_GRE) &&
1357 (dv_attr.tunnel_offloads_caps &
1358 MLX5DV_RAW_PACKET_CAP_TUNNELED_OFFLOAD_CW_MPLS_OVER_UDP));
1359 DRV_LOG(DEBUG, "MPLS over GRE/UDP tunnel offloading is %ssupported",
1360 mpls_en ? "" : "not ");
1362 DRV_LOG(WARNING, "MPLS over GRE/UDP tunnel offloading disabled due to"
1363 " old OFED/rdma-core version or firmware configuration");
1365 config.mpls_en = mpls_en;
1366 /* Check port status. */
1367 err = mlx5_glue->query_port(sh->ctx, spawn->ibv_port, &port_attr);
1369 DRV_LOG(ERR, "port query failed: %s", strerror(err));
1372 if (port_attr.link_layer != IBV_LINK_LAYER_ETHERNET) {
1373 DRV_LOG(ERR, "port is not configured in Ethernet mode");
1377 if (port_attr.state != IBV_PORT_ACTIVE)
1378 DRV_LOG(DEBUG, "port is not active: \"%s\" (%d)",
1379 mlx5_glue->port_state_str(port_attr.state),
1381 /* Allocate private eth device data. */
1382 priv = rte_zmalloc("ethdev private structure",
1384 RTE_CACHE_LINE_SIZE);
1386 DRV_LOG(ERR, "priv allocation failure");
1391 priv->ibv_port = spawn->ibv_port;
1392 priv->mtu = RTE_ETHER_MTU;
1394 /* Initialize UAR access locks for 32bit implementations. */
1395 rte_spinlock_init(&priv->uar_lock_cq);
1396 for (i = 0; i < MLX5_UAR_PAGE_NUM_MAX; i++)
1397 rte_spinlock_init(&priv->uar_lock[i]);
1399 /* Some internal functions rely on Netlink sockets, open them now. */
1400 priv->nl_socket_rdma = mlx5_nl_init(NETLINK_RDMA);
1401 priv->nl_socket_route = mlx5_nl_init(NETLINK_ROUTE);
1403 priv->representor = !!switch_info->representor;
1404 priv->master = !!switch_info->master;
1405 priv->domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
1407 * Currently we support single E-Switch per PF configurations
1408 * only and vport_id field contains the vport index for
1409 * associated VF, which is deduced from representor port name.
1410 * For example, let's have the IB device port 10, it has
1411 * attached network device eth0, which has port name attribute
1412 * pf0vf2, we can deduce the VF number as 2, and set vport index
1413 * as 3 (2+1). This assigning schema should be changed if the
1414 * multiple E-Switch instances per PF configurations or/and PCI
1415 * subfunctions are added.
1417 priv->vport_id = switch_info->representor ?
1418 switch_info->port_name + 1 : -1;
1419 /* representor_id field keeps the unmodified port/VF index. */
1420 priv->representor_id = switch_info->representor ?
1421 switch_info->port_name : -1;
1423 * Look for sibling devices in order to reuse their switch domain
1424 * if any, otherwise allocate one.
1426 RTE_ETH_FOREACH_DEV_OF(port_id, dpdk_dev) {
1427 const struct mlx5_priv *opriv =
1428 rte_eth_devices[port_id].data->dev_private;
1432 RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID)
1434 priv->domain_id = opriv->domain_id;
1437 if (priv->domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID) {
1438 err = rte_eth_switch_domain_alloc(&priv->domain_id);
1441 DRV_LOG(ERR, "unable to allocate switch domain: %s",
1442 strerror(rte_errno));
1447 err = mlx5_args(&config, dpdk_dev->devargs);
1450 DRV_LOG(ERR, "failed to process device arguments: %s",
1451 strerror(rte_errno));
1454 config.hw_csum = !!(sh->device_attr.device_cap_flags_ex &
1455 IBV_DEVICE_RAW_IP_CSUM);
1456 DRV_LOG(DEBUG, "checksum offloading is %ssupported",
1457 (config.hw_csum ? "" : "not "));
1458 #if !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42) && \
1459 !defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
1460 DRV_LOG(DEBUG, "counters are not supported");
1462 #ifndef HAVE_IBV_FLOW_DV_SUPPORT
1463 if (config.dv_flow_en) {
1464 DRV_LOG(WARNING, "DV flow is not supported");
1465 config.dv_flow_en = 0;
1468 config.ind_table_max_size =
1469 sh->device_attr.rss_caps.max_rwq_indirection_table_size;
1471 * Remove this check once DPDK supports larger/variable
1472 * indirection tables.
1474 if (config.ind_table_max_size > (unsigned int)ETH_RSS_RETA_SIZE_512)
1475 config.ind_table_max_size = ETH_RSS_RETA_SIZE_512;
1476 DRV_LOG(DEBUG, "maximum Rx indirection table size is %u",
1477 config.ind_table_max_size);
1478 config.hw_vlan_strip = !!(sh->device_attr.raw_packet_caps &
1479 IBV_RAW_PACKET_CAP_CVLAN_STRIPPING);
1480 DRV_LOG(DEBUG, "VLAN stripping is %ssupported",
1481 (config.hw_vlan_strip ? "" : "not "));
1482 config.hw_fcs_strip = !!(sh->device_attr.raw_packet_caps &
1483 IBV_RAW_PACKET_CAP_SCATTER_FCS);
1484 DRV_LOG(DEBUG, "FCS stripping configuration is %ssupported",
1485 (config.hw_fcs_strip ? "" : "not "));
1486 #if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)
1487 hw_padding = !!sh->device_attr.rx_pad_end_addr_align;
1488 #elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)
1489 hw_padding = !!(sh->device_attr.device_cap_flags_ex &
1490 IBV_DEVICE_PCI_WRITE_END_PADDING);
1492 if (config.hw_padding && !hw_padding) {
1493 DRV_LOG(DEBUG, "Rx end alignment padding isn't supported");
1494 config.hw_padding = 0;
1495 } else if (config.hw_padding) {
1496 DRV_LOG(DEBUG, "Rx end alignment padding is enabled");
1498 config.tso = (sh->device_attr.tso_caps.max_tso > 0 &&
1499 (sh->device_attr.tso_caps.supported_qpts &
1500 (1 << IBV_QPT_RAW_PACKET)));
1502 config.tso_max_payload_sz = sh->device_attr.tso_caps.max_tso;
1504 * MPW is disabled by default, while the Enhanced MPW is enabled
1507 if (config.mps == MLX5_ARG_UNSET)
1508 config.mps = (mps == MLX5_MPW_ENHANCED) ? MLX5_MPW_ENHANCED :
1511 config.mps = config.mps ? mps : MLX5_MPW_DISABLED;
1512 DRV_LOG(INFO, "%sMPS is %s",
1513 config.mps == MLX5_MPW_ENHANCED ? "enhanced " : "",
1514 config.mps != MLX5_MPW_DISABLED ? "enabled" : "disabled");
1515 if (config.cqe_comp && !cqe_comp) {
1516 DRV_LOG(WARNING, "Rx CQE compression isn't supported");
1517 config.cqe_comp = 0;
1519 if (config.cqe_pad && !cqe_pad) {
1520 DRV_LOG(WARNING, "Rx CQE padding isn't supported");
1522 } else if (config.cqe_pad) {
1523 DRV_LOG(INFO, "Rx CQE padding is enabled");
1525 if (config.mprq.enabled && mprq) {
1526 if (config.mprq.stride_num_n > mprq_max_stride_num_n ||
1527 config.mprq.stride_num_n < mprq_min_stride_num_n) {
1528 config.mprq.stride_num_n =
1529 RTE_MAX(MLX5_MPRQ_STRIDE_NUM_N,
1530 mprq_min_stride_num_n);
1532 "the number of strides"
1533 " for Multi-Packet RQ is out of range,"
1534 " setting default value (%u)",
1535 1 << config.mprq.stride_num_n);
1537 config.mprq.min_stride_size_n = mprq_min_stride_size_n;
1538 config.mprq.max_stride_size_n = mprq_max_stride_size_n;
1539 } else if (config.mprq.enabled && !mprq) {
1540 DRV_LOG(WARNING, "Multi-Packet RQ isn't supported");
1541 config.mprq.enabled = 0;
1543 if (config.max_dump_files_num == 0)
1544 config.max_dump_files_num = 128;
1545 eth_dev = rte_eth_dev_allocate(name);
1546 if (eth_dev == NULL) {
1547 DRV_LOG(ERR, "can not allocate rte ethdev");
1551 /* Flag to call rte_eth_dev_release_port() in rte_eth_dev_close(). */
1552 eth_dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
1553 if (priv->representor) {
1554 eth_dev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR;
1555 eth_dev->data->representor_id = priv->representor_id;
1557 eth_dev->data->dev_private = priv;
1558 priv->dev_data = eth_dev->data;
1559 eth_dev->data->mac_addrs = priv->mac;
1560 eth_dev->device = dpdk_dev;
1561 /* Configure the first MAC address by default. */
1562 if (mlx5_get_mac(eth_dev, &mac.addr_bytes)) {
1564 "port %u cannot get MAC address, is mlx5_en"
1565 " loaded? (errno: %s)",
1566 eth_dev->data->port_id, strerror(rte_errno));
1571 "port %u MAC address is %02x:%02x:%02x:%02x:%02x:%02x",
1572 eth_dev->data->port_id,
1573 mac.addr_bytes[0], mac.addr_bytes[1],
1574 mac.addr_bytes[2], mac.addr_bytes[3],
1575 mac.addr_bytes[4], mac.addr_bytes[5]);
1578 char ifname[IF_NAMESIZE];
1580 if (mlx5_get_ifname(eth_dev, &ifname) == 0)
1581 DRV_LOG(DEBUG, "port %u ifname is \"%s\"",
1582 eth_dev->data->port_id, ifname);
1584 DRV_LOG(DEBUG, "port %u ifname is unknown",
1585 eth_dev->data->port_id);
1588 /* Get actual MTU if possible. */
1589 err = mlx5_get_mtu(eth_dev, &priv->mtu);
1594 DRV_LOG(DEBUG, "port %u MTU is %u", eth_dev->data->port_id,
1596 /* Initialize burst functions to prevent crashes before link-up. */
1597 eth_dev->rx_pkt_burst = removed_rx_burst;
1598 eth_dev->tx_pkt_burst = removed_tx_burst;
1599 eth_dev->dev_ops = &mlx5_dev_ops;
1600 /* Register MAC address. */
1601 claim_zero(mlx5_mac_addr_add(eth_dev, &mac, 0, 0));
1602 if (config.vf && config.vf_nl_en)
1603 mlx5_nl_mac_addr_sync(eth_dev);
1604 TAILQ_INIT(&priv->flows);
1605 TAILQ_INIT(&priv->ctrl_flows);
1606 /* Hint libmlx5 to use PMD allocator for data plane resources */
1607 struct mlx5dv_ctx_allocators alctr = {
1608 .alloc = &mlx5_alloc_verbs_buf,
1609 .free = &mlx5_free_verbs_buf,
1612 mlx5_glue->dv_set_context_attr(sh->ctx,
1613 MLX5DV_CTX_ATTR_BUF_ALLOCATORS,
1614 (void *)((uintptr_t)&alctr));
1615 /* Bring Ethernet device up. */
1616 DRV_LOG(DEBUG, "port %u forcing Ethernet interface up",
1617 eth_dev->data->port_id);
1618 mlx5_set_link_up(eth_dev);
1620 * Even though the interrupt handler is not installed yet,
1621 * interrupts will still trigger on the async_fd from
1622 * Verbs context returned by ibv_open_device().
1624 mlx5_link_update(eth_dev, 0);
1625 #ifdef HAVE_IBV_DEVX_OBJ
1627 err = mlx5_devx_cmd_query_hca_attr(sh->ctx, &config.hca_attr);
1634 #ifdef HAVE_MLX5DV_DR_ESWITCH
1635 if (!(config.hca_attr.eswitch_manager && config.dv_flow_en &&
1636 (switch_info->representor || switch_info->master)))
1637 config.dv_esw_en = 0;
1639 config.dv_esw_en = 0;
1641 /* Store device configuration on private structure. */
1642 priv->config = config;
1643 if (config.dv_flow_en) {
1644 err = mlx5_alloc_shared_dr(priv);
1648 /* Supported Verbs flow priority number detection. */
1649 err = mlx5_flow_discover_priorities(eth_dev);
1654 priv->config.flow_prio = err;
1655 /* Add device to memory callback list. */
1656 rte_rwlock_write_lock(&mlx5_shared_data->mem_event_rwlock);
1657 LIST_INSERT_HEAD(&mlx5_shared_data->mem_event_cb_list,
1659 rte_rwlock_write_unlock(&mlx5_shared_data->mem_event_rwlock);
1664 mlx5_free_shared_dr(priv);
1665 if (priv->nl_socket_route >= 0)
1666 close(priv->nl_socket_route);
1667 if (priv->nl_socket_rdma >= 0)
1668 close(priv->nl_socket_rdma);
1670 claim_zero(rte_eth_switch_domain_free(priv->domain_id));
1672 if (eth_dev != NULL)
1673 eth_dev->data->dev_private = NULL;
1675 if (eth_dev != NULL) {
1676 /* mac_addrs must not be freed alone because part of dev_private */
1677 eth_dev->data->mac_addrs = NULL;
1678 rte_eth_dev_release_port(eth_dev);
1681 mlx5_free_shared_ibctx(sh);
1688 * Comparison callback to sort device data.
1690 * This is meant to be used with qsort().
1693 * Pointer to pointer to first data object.
1695 * Pointer to pointer to second data object.
1698 * 0 if both objects are equal, less than 0 if the first argument is less
1699 * than the second, greater than 0 otherwise.
1702 mlx5_dev_spawn_data_cmp(const void *a, const void *b)
1704 const struct mlx5_switch_info *si_a =
1705 &((const struct mlx5_dev_spawn_data *)a)->info;
1706 const struct mlx5_switch_info *si_b =
1707 &((const struct mlx5_dev_spawn_data *)b)->info;
1710 /* Master device first. */
1711 ret = si_b->master - si_a->master;
1714 /* Then representor devices. */
1715 ret = si_b->representor - si_a->representor;
1718 /* Unidentified devices come last in no specific order. */
1719 if (!si_a->representor)
1721 /* Order representors by name. */
1722 return si_a->port_name - si_b->port_name;
1726 * DPDK callback to register a PCI device.
1728 * This function spawns Ethernet devices out of a given PCI device.
1730 * @param[in] pci_drv
1731 * PCI driver structure (mlx5_driver).
1732 * @param[in] pci_dev
1733 * PCI device information.
1736 * 0 on success, a negative errno value otherwise and rte_errno is set.
1739 mlx5_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1740 struct rte_pci_device *pci_dev)
1742 struct ibv_device **ibv_list;
1744 * Number of found IB Devices matching with requested PCI BDF.
1745 * nd != 1 means there are multiple IB devices over the same
1746 * PCI device and we have representors and master.
1748 unsigned int nd = 0;
1750 * Number of found IB device Ports. nd = 1 and np = 1..n means
1751 * we have the single multiport IB device, and there may be
1752 * representors attached to some of found ports.
1754 unsigned int np = 0;
1756 * Number of DPDK ethernet devices to Spawn - either over
1757 * multiple IB devices or multiple ports of single IB device.
1758 * Actually this is the number of iterations to spawn.
1760 unsigned int ns = 0;
1761 struct mlx5_dev_config dev_config;
1764 ret = mlx5_init_once();
1766 DRV_LOG(ERR, "unable to init PMD global data: %s",
1767 strerror(rte_errno));
1770 assert(pci_drv == &mlx5_driver);
1772 ibv_list = mlx5_glue->get_device_list(&ret);
1774 rte_errno = errno ? errno : ENOSYS;
1775 DRV_LOG(ERR, "cannot list devices, is ib_uverbs loaded?");
1779 * First scan the list of all Infiniband devices to find
1780 * matching ones, gathering into the list.
1782 struct ibv_device *ibv_match[ret + 1];
1788 struct rte_pci_addr pci_addr;
1790 DRV_LOG(DEBUG, "checking device \"%s\"", ibv_list[ret]->name);
1791 if (mlx5_ibv_device_to_pci_addr(ibv_list[ret], &pci_addr))
1793 if (pci_dev->addr.domain != pci_addr.domain ||
1794 pci_dev->addr.bus != pci_addr.bus ||
1795 pci_dev->addr.devid != pci_addr.devid ||
1796 pci_dev->addr.function != pci_addr.function)
1798 DRV_LOG(INFO, "PCI information matches for device \"%s\"",
1799 ibv_list[ret]->name);
1800 ibv_match[nd++] = ibv_list[ret];
1802 ibv_match[nd] = NULL;
1804 /* No device matches, just complain and bail out. */
1805 mlx5_glue->free_device_list(ibv_list);
1807 "no Verbs device matches PCI device " PCI_PRI_FMT ","
1808 " are kernel drivers loaded?",
1809 pci_dev->addr.domain, pci_dev->addr.bus,
1810 pci_dev->addr.devid, pci_dev->addr.function);
1815 nl_route = mlx5_nl_init(NETLINK_ROUTE);
1816 nl_rdma = mlx5_nl_init(NETLINK_RDMA);
1819 * Found single matching device may have multiple ports.
1820 * Each port may be representor, we have to check the port
1821 * number and check the representors existence.
1824 np = mlx5_nl_portnum(nl_rdma, ibv_match[0]->name);
1826 DRV_LOG(WARNING, "can not get IB device \"%s\""
1827 " ports number", ibv_match[0]->name);
1830 * Now we can determine the maximal
1831 * amount of devices to be spawned.
1833 struct mlx5_dev_spawn_data list[np ? np : nd];
1837 * Single IB device with multiple ports found,
1838 * it may be E-Switch master device and representors.
1839 * We have to perform identification trough the ports.
1841 assert(nl_rdma >= 0);
1844 for (i = 1; i <= np; ++i) {
1845 list[ns].max_port = np;
1846 list[ns].ibv_port = i;
1847 list[ns].ibv_dev = ibv_match[0];
1848 list[ns].eth_dev = NULL;
1849 list[ns].pci_dev = pci_dev;
1850 list[ns].ifindex = mlx5_nl_ifindex
1851 (nl_rdma, list[ns].ibv_dev->name, i);
1852 if (!list[ns].ifindex) {
1854 * No network interface index found for the
1855 * specified port, it means there is no
1856 * representor on this port. It's OK,
1857 * there can be disabled ports, for example
1858 * if sriov_numvfs < sriov_totalvfs.
1864 ret = mlx5_nl_switch_info
1868 if (ret || (!list[ns].info.representor &&
1869 !list[ns].info.master)) {
1871 * We failed to recognize representors with
1872 * Netlink, let's try to perform the task
1875 ret = mlx5_sysfs_switch_info
1879 if (!ret && (list[ns].info.representor ^
1880 list[ns].info.master))
1885 "unable to recognize master/representors"
1886 " on the IB device with multiple ports");
1893 * The existence of several matching entries (nd > 1) means
1894 * port representors have been instantiated. No existing Verbs
1895 * call nor sysfs entries can tell them apart, this can only
1896 * be done through Netlink calls assuming kernel drivers are
1897 * recent enough to support them.
1899 * In the event of identification failure through Netlink,
1900 * try again through sysfs, then:
1902 * 1. A single IB device matches (nd == 1) with single
1903 * port (np=0/1) and is not a representor, assume
1904 * no switch support.
1906 * 2. Otherwise no safe assumptions can be made;
1907 * complain louder and bail out.
1910 for (i = 0; i != nd; ++i) {
1911 memset(&list[ns].info, 0, sizeof(list[ns].info));
1912 list[ns].max_port = 1;
1913 list[ns].ibv_port = 1;
1914 list[ns].ibv_dev = ibv_match[i];
1915 list[ns].eth_dev = NULL;
1916 list[ns].pci_dev = pci_dev;
1917 list[ns].ifindex = 0;
1919 list[ns].ifindex = mlx5_nl_ifindex
1920 (nl_rdma, list[ns].ibv_dev->name, 1);
1921 if (!list[ns].ifindex) {
1922 char ifname[IF_NAMESIZE];
1925 * Netlink failed, it may happen with old
1926 * ib_core kernel driver (before 4.16).
1927 * We can assume there is old driver because
1928 * here we are processing single ports IB
1929 * devices. Let's try sysfs to retrieve
1930 * the ifindex. The method works for
1931 * master device only.
1935 * Multiple devices found, assume
1936 * representors, can not distinguish
1937 * master/representor and retrieve
1938 * ifindex via sysfs.
1942 ret = mlx5_get_master_ifname
1943 (ibv_match[i]->ibdev_path, &ifname);
1946 if_nametoindex(ifname);
1947 if (!list[ns].ifindex) {
1949 * No network interface index found
1950 * for the specified device, it means
1951 * there it is neither representor
1959 ret = mlx5_nl_switch_info
1963 if (ret || (!list[ns].info.representor &&
1964 !list[ns].info.master)) {
1966 * We failed to recognize representors with
1967 * Netlink, let's try to perform the task
1970 ret = mlx5_sysfs_switch_info
1974 if (!ret && (list[ns].info.representor ^
1975 list[ns].info.master)) {
1977 } else if ((nd == 1) &&
1978 !list[ns].info.representor &&
1979 !list[ns].info.master) {
1981 * Single IB device with
1982 * one physical port and
1983 * attached network device.
1984 * May be SRIOV is not enabled
1985 * or there is no representors.
1987 DRV_LOG(INFO, "no E-Switch support detected");
1994 "unable to recognize master/representors"
1995 " on the multiple IB devices");
2003 * Sort list to probe devices in natural order for users convenience
2004 * (i.e. master first, then representors from lowest to highest ID).
2006 qsort(list, ns, sizeof(*list), mlx5_dev_spawn_data_cmp);
2007 /* Default configuration. */
2008 dev_config = (struct mlx5_dev_config){
2010 .mps = MLX5_ARG_UNSET,
2013 .txq_inline = MLX5_ARG_UNSET,
2014 .txqs_inline = MLX5_ARG_UNSET,
2015 .txqs_vec = MLX5_ARG_UNSET,
2016 .inline_max_packet_sz = MLX5_ARG_UNSET,
2018 .mr_ext_memseg_en = 1,
2020 .enabled = 0, /* Disabled by default. */
2021 .stride_num_n = MLX5_MPRQ_STRIDE_NUM_N,
2022 .max_memcpy_len = MLX5_MPRQ_MEMCPY_DEFAULT_LEN,
2023 .min_rxqs_num = MLX5_MPRQ_MIN_RXQS,
2027 /* Device specific configuration. */
2028 switch (pci_dev->id.device_id) {
2029 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
2030 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS_BLUEFIELD;
2032 case PCI_DEVICE_ID_MELLANOX_CONNECTX4VF:
2033 case PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF:
2034 case PCI_DEVICE_ID_MELLANOX_CONNECTX5VF:
2035 case PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF:
2041 /* Set architecture-dependent default value if unset. */
2042 if (dev_config.txqs_vec == MLX5_ARG_UNSET)
2043 dev_config.txqs_vec = MLX5_VPMD_MAX_TXQS;
2044 for (i = 0; i != ns; ++i) {
2047 list[i].eth_dev = mlx5_dev_spawn(&pci_dev->device,
2050 if (!list[i].eth_dev) {
2051 if (rte_errno != EBUSY && rte_errno != EEXIST)
2053 /* Device is disabled or already spawned. Ignore it. */
2056 restore = list[i].eth_dev->data->dev_flags;
2057 rte_eth_copy_pci_info(list[i].eth_dev, pci_dev);
2058 /* Restore non-PCI flags cleared by the above call. */
2059 list[i].eth_dev->data->dev_flags |= restore;
2060 rte_eth_dev_probing_finish(list[i].eth_dev);
2064 "probe of PCI device " PCI_PRI_FMT " aborted after"
2065 " encountering an error: %s",
2066 pci_dev->addr.domain, pci_dev->addr.bus,
2067 pci_dev->addr.devid, pci_dev->addr.function,
2068 strerror(rte_errno));
2072 if (!list[i].eth_dev)
2074 mlx5_dev_close(list[i].eth_dev);
2075 /* mac_addrs must not be freed because in dev_private */
2076 list[i].eth_dev->data->mac_addrs = NULL;
2077 claim_zero(rte_eth_dev_release_port(list[i].eth_dev));
2079 /* Restore original error. */
2086 * Do the routine cleanup:
2087 * - close opened Netlink sockets
2088 * - free the Infiniband device list
2095 mlx5_glue->free_device_list(ibv_list);
2100 * DPDK callback to remove a PCI device.
2102 * This function removes all Ethernet devices belong to a given PCI device.
2104 * @param[in] pci_dev
2105 * Pointer to the PCI device.
2108 * 0 on success, the function cannot fail.
2111 mlx5_pci_remove(struct rte_pci_device *pci_dev)
2115 RTE_ETH_FOREACH_DEV_OF(port_id, &pci_dev->device)
2116 rte_eth_dev_close(port_id);
2120 static const struct rte_pci_id mlx5_pci_id_map[] = {
2122 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2123 PCI_DEVICE_ID_MELLANOX_CONNECTX4)
2126 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2127 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF)
2130 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2131 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX)
2134 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2135 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF)
2138 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2139 PCI_DEVICE_ID_MELLANOX_CONNECTX5)
2142 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2143 PCI_DEVICE_ID_MELLANOX_CONNECTX5VF)
2146 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2147 PCI_DEVICE_ID_MELLANOX_CONNECTX5EX)
2150 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2151 PCI_DEVICE_ID_MELLANOX_CONNECTX5EXVF)
2154 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2155 PCI_DEVICE_ID_MELLANOX_CONNECTX5BF)
2158 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2159 PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF)
2162 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2163 PCI_DEVICE_ID_MELLANOX_CONNECTX6)
2166 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
2167 PCI_DEVICE_ID_MELLANOX_CONNECTX6VF)
2174 static struct rte_pci_driver mlx5_driver = {
2176 .name = MLX5_DRIVER_NAME
2178 .id_table = mlx5_pci_id_map,
2179 .probe = mlx5_pci_probe,
2180 .remove = mlx5_pci_remove,
2181 .dma_map = mlx5_dma_map,
2182 .dma_unmap = mlx5_dma_unmap,
2183 .drv_flags = RTE_PCI_DRV_INTR_LSC | RTE_PCI_DRV_INTR_RMV |
2184 RTE_PCI_DRV_PROBE_AGAIN,
2187 #ifdef RTE_IBVERBS_LINK_DLOPEN
2190 * Suffix RTE_EAL_PMD_PATH with "-glue".
2192 * This function performs a sanity check on RTE_EAL_PMD_PATH before
2193 * suffixing its last component.
2196 * Output buffer, should be large enough otherwise NULL is returned.
2201 * Pointer to @p buf or @p NULL in case suffix cannot be appended.
2204 mlx5_glue_path(char *buf, size_t size)
2206 static const char *const bad[] = { "/", ".", "..", NULL };
2207 const char *path = RTE_EAL_PMD_PATH;
2208 size_t len = strlen(path);
2212 while (len && path[len - 1] == '/')
2214 for (off = len; off && path[off - 1] != '/'; --off)
2216 for (i = 0; bad[i]; ++i)
2217 if (!strncmp(path + off, bad[i], (int)(len - off)))
2219 i = snprintf(buf, size, "%.*s-glue", (int)len, path);
2220 if (i == -1 || (size_t)i >= size)
2225 "unable to append \"-glue\" to last component of"
2226 " RTE_EAL_PMD_PATH (\"" RTE_EAL_PMD_PATH "\"),"
2227 " please re-configure DPDK");
2232 * Initialization routine for run-time dependency on rdma-core.
2235 mlx5_glue_init(void)
2237 char glue_path[sizeof(RTE_EAL_PMD_PATH) - 1 + sizeof("-glue")];
2238 const char *path[] = {
2240 * A basic security check is necessary before trusting
2241 * MLX5_GLUE_PATH, which may override RTE_EAL_PMD_PATH.
2243 (geteuid() == getuid() && getegid() == getgid() ?
2244 getenv("MLX5_GLUE_PATH") : NULL),
2246 * When RTE_EAL_PMD_PATH is set, use its glue-suffixed
2247 * variant, otherwise let dlopen() look up libraries on its
2250 (*RTE_EAL_PMD_PATH ?
2251 mlx5_glue_path(glue_path, sizeof(glue_path)) : ""),
2254 void *handle = NULL;
2258 while (!handle && i != RTE_DIM(path)) {
2267 end = strpbrk(path[i], ":;");
2269 end = path[i] + strlen(path[i]);
2270 len = end - path[i];
2275 ret = snprintf(name, sizeof(name), "%.*s%s" MLX5_GLUE,
2277 (!len || *(end - 1) == '/') ? "" : "/");
2280 if (sizeof(name) != (size_t)ret + 1)
2282 DRV_LOG(DEBUG, "looking for rdma-core glue as \"%s\"",
2284 handle = dlopen(name, RTLD_LAZY);
2295 DRV_LOG(WARNING, "cannot load glue library: %s", dlmsg);
2298 sym = dlsym(handle, "mlx5_glue");
2299 if (!sym || !*sym) {
2303 DRV_LOG(ERR, "cannot resolve glue symbol: %s", dlmsg);
2312 "cannot initialize PMD due to missing run-time dependency on"
2313 " rdma-core libraries (libibverbs, libmlx5)");
2320 * Driver initialization routine.
2322 RTE_INIT(rte_mlx5_pmd_init)
2324 /* Initialize driver log type. */
2325 mlx5_logtype = rte_log_register("pmd.net.mlx5");
2326 if (mlx5_logtype >= 0)
2327 rte_log_set_level(mlx5_logtype, RTE_LOG_NOTICE);
2329 /* Build the static tables for Verbs conversion. */
2330 mlx5_set_ptype_table();
2331 mlx5_set_cksum_table();
2332 mlx5_set_swp_types_table();
2334 * RDMAV_HUGEPAGES_SAFE tells ibv_fork_init() we intend to use
2335 * huge pages. Calling ibv_fork_init() during init allows
2336 * applications to use fork() safely for purposes other than
2337 * using this PMD, which is not supported in forked processes.
2339 setenv("RDMAV_HUGEPAGES_SAFE", "1", 1);
2340 /* Match the size of Rx completion entry to the size of a cacheline. */
2341 if (RTE_CACHE_LINE_SIZE == 128)
2342 setenv("MLX5_CQE_SIZE", "128", 0);
2344 * MLX5_DEVICE_FATAL_CLEANUP tells ibv_destroy functions to
2345 * cleanup all the Verbs resources even when the device was removed.
2347 setenv("MLX5_DEVICE_FATAL_CLEANUP", "1", 1);
2348 #ifdef RTE_IBVERBS_LINK_DLOPEN
2349 if (mlx5_glue_init())
2354 /* Glue structure must not contain any NULL pointers. */
2358 for (i = 0; i != sizeof(*mlx5_glue) / sizeof(void *); ++i)
2359 assert(((const void *const *)mlx5_glue)[i]);
2362 if (strcmp(mlx5_glue->version, MLX5_GLUE_VERSION)) {
2364 "rdma-core glue \"%s\" mismatch: \"%s\" is required",
2365 mlx5_glue->version, MLX5_GLUE_VERSION);
2368 mlx5_glue->fork_init();
2369 rte_pci_register(&mlx5_driver);
2372 RTE_PMD_EXPORT_NAME(net_mlx5, __COUNTER__);
2373 RTE_PMD_REGISTER_PCI_TABLE(net_mlx5, mlx5_pci_id_map);
2374 RTE_PMD_REGISTER_KMOD_DEP(net_mlx5, "* ib_uverbs & mlx5_core & mlx5_ib");