4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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34 #ifndef RTE_PMD_MLX5_H_
35 #define RTE_PMD_MLX5_H_
41 #include <netinet/in.h>
45 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
47 #pragma GCC diagnostic ignored "-pedantic"
49 #include <infiniband/verbs.h>
51 #pragma GCC diagnostic error "-pedantic"
54 /* DPDK headers don't like -pedantic. */
56 #pragma GCC diagnostic ignored "-pedantic"
58 #include <rte_ether.h>
59 #include <rte_ethdev.h>
60 #include <rte_spinlock.h>
61 #include <rte_interrupts.h>
62 #include <rte_errno.h>
64 #pragma GCC diagnostic error "-pedantic"
67 #include "mlx5_utils.h"
68 #include "mlx5_rxtx.h"
69 #include "mlx5_autoconf.h"
70 #include "mlx5_defs.h"
73 PCI_VENDOR_ID_MELLANOX = 0x15b3,
77 PCI_DEVICE_ID_MELLANOX_CONNECTX4 = 0x1013,
78 PCI_DEVICE_ID_MELLANOX_CONNECTX4VF = 0x1014,
79 PCI_DEVICE_ID_MELLANOX_CONNECTX4LX = 0x1015,
80 PCI_DEVICE_ID_MELLANOX_CONNECTX4LXVF = 0x1016,
84 struct rte_eth_dev *dev; /* Ethernet device. */
85 struct ibv_context *ctx; /* Verbs context. */
86 struct ibv_device_attr device_attr; /* Device properties. */
87 struct ibv_pd *pd; /* Protection Domain. */
89 * MAC addresses array and configuration bit-field.
90 * An extra entry that cannot be modified by the DPDK is reserved
91 * for broadcast frames (destination MAC address ff:ff:ff:ff:ff:ff).
93 struct ether_addr mac[MLX5_MAX_MAC_ADDRESSES];
94 BITFIELD_DECLARE(mac_configured, uint32_t, MLX5_MAX_MAC_ADDRESSES);
95 uint16_t vlan_filter[MLX5_MAX_VLAN_IDS]; /* VLAN filters table. */
96 unsigned int vlan_filter_n; /* Number of configured VLAN filters. */
97 /* Device properties. */
98 uint16_t mtu; /* Configured MTU. */
99 uint8_t port; /* Physical port number. */
100 unsigned int started:1; /* Device started, flows enabled. */
101 unsigned int promisc_req:1; /* Promiscuous mode requested. */
102 unsigned int allmulti_req:1; /* All multicast mode requested. */
103 unsigned int hw_csum:1; /* Checksum offload is supported. */
104 unsigned int hw_csum_l2tun:1; /* Same for L2 tunnels. */
105 unsigned int hw_vlan_strip:1; /* VLAN stripping is supported. */
106 unsigned int hw_fcs_strip:1; /* FCS stripping is supported. */
107 unsigned int vf:1; /* This is a VF device. */
108 unsigned int pending_alarm:1; /* An alarm is pending. */
110 unsigned int rxqs_n; /* RX queues array size. */
111 unsigned int txqs_n; /* TX queues array size. */
112 struct rxq *(*rxqs)[]; /* RX queues. */
113 struct txq *(*txqs)[]; /* TX queues. */
114 /* Indirection tables referencing all RX WQs. */
115 struct ibv_exp_rwq_ind_table *(*ind_tables)[];
116 unsigned int ind_tables_n; /* Number of indirection tables. */
117 unsigned int ind_table_max_size; /* Maximum indirection table size. */
118 /* Hash RX QPs feeding the indirection table. */
119 struct hash_rxq (*hash_rxqs)[];
120 unsigned int hash_rxqs_n; /* Hash RX QPs array size. */
121 /* RSS configuration array indexed by hash RX queue type. */
122 struct rte_eth_rss_conf *(*rss_conf)[];
123 struct rte_intr_handle intr_handle; /* Interrupt handler. */
124 unsigned int (*reta_idx)[]; /* RETA index table. */
125 unsigned int reta_idx_n; /* RETA index size. */
126 struct fdir_filter_list *fdir_filter_list; /* Flow director rules. */
127 rte_spinlock_t lock; /* Lock for control functions. */
130 /* Local storage for secondary process data. */
131 struct mlx5_secondary_data {
132 struct rte_eth_dev_data data; /* Local device data. */
133 struct priv *primary_priv; /* Private structure from primary. */
134 struct rte_eth_dev_data *shared_dev_data; /* Shared device data. */
135 rte_spinlock_t lock; /* Port configuration lock. */
136 } mlx5_secondary_data[RTE_MAX_ETHPORTS];
139 * Lock private structure to protect it from concurrent access in the
143 * Pointer to private structure.
146 priv_lock(struct priv *priv)
148 rte_spinlock_lock(&priv->lock);
152 * Unlock private structure.
155 * Pointer to private structure.
158 priv_unlock(struct priv *priv)
160 rte_spinlock_unlock(&priv->lock);
165 struct priv *mlx5_get_priv(struct rte_eth_dev *dev);
166 int mlx5_is_secondary(void);
167 int priv_get_ifname(const struct priv *, char (*)[IF_NAMESIZE]);
168 int priv_ifreq(const struct priv *, int req, struct ifreq *);
169 int priv_get_mtu(struct priv *, uint16_t *);
170 int priv_set_flags(struct priv *, unsigned int, unsigned int);
171 int mlx5_dev_configure(struct rte_eth_dev *);
172 void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *);
173 const uint32_t *mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev);
174 int mlx5_link_update(struct rte_eth_dev *, int);
175 int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t);
176 int mlx5_dev_get_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
177 int mlx5_dev_set_flow_ctrl(struct rte_eth_dev *, struct rte_eth_fc_conf *);
178 int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,
179 struct rte_pci_addr *);
180 void mlx5_dev_link_status_handler(void *);
181 void mlx5_dev_interrupt_handler(struct rte_intr_handle *, void *);
182 void priv_dev_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);
183 void priv_dev_interrupt_handler_install(struct priv *, struct rte_eth_dev *);
184 int mlx5_set_link_down(struct rte_eth_dev *dev);
185 int mlx5_set_link_up(struct rte_eth_dev *dev);
186 struct priv *mlx5_secondary_data_setup(struct priv *priv);
190 int priv_get_mac(struct priv *, uint8_t (*)[ETHER_ADDR_LEN]);
191 void hash_rxq_mac_addrs_del(struct hash_rxq *);
192 void priv_mac_addrs_disable(struct priv *);
193 void mlx5_mac_addr_remove(struct rte_eth_dev *, uint32_t);
194 int hash_rxq_mac_addrs_add(struct hash_rxq *);
195 int priv_mac_addr_add(struct priv *, unsigned int,
196 const uint8_t (*)[ETHER_ADDR_LEN]);
197 int priv_mac_addrs_enable(struct priv *);
198 void mlx5_mac_addr_add(struct rte_eth_dev *, struct ether_addr *, uint32_t,
200 void mlx5_mac_addr_set(struct rte_eth_dev *, struct ether_addr *);
204 int rss_hash_rss_conf_new_key(struct priv *, const uint8_t *, unsigned int,
206 int mlx5_rss_hash_update(struct rte_eth_dev *, struct rte_eth_rss_conf *);
207 int mlx5_rss_hash_conf_get(struct rte_eth_dev *, struct rte_eth_rss_conf *);
208 int priv_rss_reta_index_resize(struct priv *, unsigned int);
209 int mlx5_dev_rss_reta_query(struct rte_eth_dev *,
210 struct rte_eth_rss_reta_entry64 *, uint16_t);
211 int mlx5_dev_rss_reta_update(struct rte_eth_dev *,
212 struct rte_eth_rss_reta_entry64 *, uint16_t);
216 int priv_special_flow_enable(struct priv *, enum hash_rxq_flow_type);
217 void priv_special_flow_disable(struct priv *, enum hash_rxq_flow_type);
218 int priv_special_flow_enable_all(struct priv *);
219 void priv_special_flow_disable_all(struct priv *);
220 void mlx5_promiscuous_enable(struct rte_eth_dev *);
221 void mlx5_promiscuous_disable(struct rte_eth_dev *);
222 void mlx5_allmulticast_enable(struct rte_eth_dev *);
223 void mlx5_allmulticast_disable(struct rte_eth_dev *);
227 void mlx5_stats_get(struct rte_eth_dev *, struct rte_eth_stats *);
228 void mlx5_stats_reset(struct rte_eth_dev *);
232 int mlx5_vlan_filter_set(struct rte_eth_dev *, uint16_t, int);
233 void mlx5_vlan_offload_set(struct rte_eth_dev *, int);
234 void mlx5_vlan_strip_queue_set(struct rte_eth_dev *, uint16_t, int);
238 int mlx5_dev_start(struct rte_eth_dev *);
239 void mlx5_dev_stop(struct rte_eth_dev *);
243 int fdir_init_filters_list(struct priv *);
244 void priv_fdir_delete_filters_list(struct priv *);
245 void priv_fdir_disable(struct priv *);
246 void priv_fdir_enable(struct priv *);
247 int mlx5_dev_filter_ctrl(struct rte_eth_dev *, enum rte_filter_type,
248 enum rte_filter_op, void *);
250 #endif /* RTE_PMD_MLX5_H_ */