1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_common.h>
23 #include <rte_ether.h>
24 #include <rte_ethdev_driver.h>
26 #include <rte_flow_driver.h>
27 #include <rte_malloc.h>
31 #include "mlx5_defs.h"
32 #include "mlx5_flow.h"
33 #include "mlx5_glue.h"
35 #include "mlx5_rxtx.h"
37 /* Dev ops structure defined in mlx5.c */
38 extern const struct eth_dev_ops mlx5_dev_ops;
39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
41 /** Device flow drivers. */
42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
60 MLX5_EXPANSION_ROOT_OUTER,
61 MLX5_EXPANSION_ROOT_ETH_VLAN,
62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
63 MLX5_EXPANSION_OUTER_ETH,
64 MLX5_EXPANSION_OUTER_ETH_VLAN,
65 MLX5_EXPANSION_OUTER_VLAN,
66 MLX5_EXPANSION_OUTER_IPV4,
67 MLX5_EXPANSION_OUTER_IPV4_UDP,
68 MLX5_EXPANSION_OUTER_IPV4_TCP,
69 MLX5_EXPANSION_OUTER_IPV6,
70 MLX5_EXPANSION_OUTER_IPV6_UDP,
71 MLX5_EXPANSION_OUTER_IPV6_TCP,
73 MLX5_EXPANSION_VXLAN_GPE,
77 MLX5_EXPANSION_ETH_VLAN,
80 MLX5_EXPANSION_IPV4_UDP,
81 MLX5_EXPANSION_IPV4_TCP,
83 MLX5_EXPANSION_IPV6_UDP,
84 MLX5_EXPANSION_IPV6_TCP,
87 /** Supported expansion of items. */
88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
89 [MLX5_EXPANSION_ROOT] = {
90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
93 .type = RTE_FLOW_ITEM_TYPE_END,
95 [MLX5_EXPANSION_ROOT_OUTER] = {
96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
97 MLX5_EXPANSION_OUTER_IPV4,
98 MLX5_EXPANSION_OUTER_IPV6),
99 .type = RTE_FLOW_ITEM_TYPE_END,
101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_OUTER_ETH] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
111 MLX5_EXPANSION_OUTER_IPV6,
112 MLX5_EXPANSION_MPLS),
113 .type = RTE_FLOW_ITEM_TYPE_ETH,
116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
118 .type = RTE_FLOW_ITEM_TYPE_ETH,
121 [MLX5_EXPANSION_OUTER_VLAN] = {
122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
123 MLX5_EXPANSION_OUTER_IPV6),
124 .type = RTE_FLOW_ITEM_TYPE_VLAN,
126 [MLX5_EXPANSION_OUTER_IPV4] = {
127 .next = RTE_FLOW_EXPAND_RSS_NEXT
128 (MLX5_EXPANSION_OUTER_IPV4_UDP,
129 MLX5_EXPANSION_OUTER_IPV4_TCP,
131 .type = RTE_FLOW_ITEM_TYPE_IPV4,
132 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
133 ETH_RSS_NONFRAG_IPV4_OTHER,
135 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
136 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
137 MLX5_EXPANSION_VXLAN_GPE),
138 .type = RTE_FLOW_ITEM_TYPE_UDP,
139 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
141 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
142 .type = RTE_FLOW_ITEM_TYPE_TCP,
143 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
145 [MLX5_EXPANSION_OUTER_IPV6] = {
146 .next = RTE_FLOW_EXPAND_RSS_NEXT
147 (MLX5_EXPANSION_OUTER_IPV6_UDP,
148 MLX5_EXPANSION_OUTER_IPV6_TCP),
149 .type = RTE_FLOW_ITEM_TYPE_IPV6,
150 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
151 ETH_RSS_NONFRAG_IPV6_OTHER,
153 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
154 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
155 MLX5_EXPANSION_VXLAN_GPE),
156 .type = RTE_FLOW_ITEM_TYPE_UDP,
157 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
159 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
160 .type = RTE_FLOW_ITEM_TYPE_TCP,
161 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
163 [MLX5_EXPANSION_VXLAN] = {
164 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
165 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
167 [MLX5_EXPANSION_VXLAN_GPE] = {
168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
170 MLX5_EXPANSION_IPV6),
171 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
173 [MLX5_EXPANSION_GRE] = {
174 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
175 .type = RTE_FLOW_ITEM_TYPE_GRE,
177 [MLX5_EXPANSION_MPLS] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
179 MLX5_EXPANSION_IPV6),
180 .type = RTE_FLOW_ITEM_TYPE_MPLS,
182 [MLX5_EXPANSION_ETH] = {
183 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
184 MLX5_EXPANSION_IPV6),
185 .type = RTE_FLOW_ITEM_TYPE_ETH,
187 [MLX5_EXPANSION_ETH_VLAN] = {
188 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
189 .type = RTE_FLOW_ITEM_TYPE_ETH,
191 [MLX5_EXPANSION_VLAN] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
193 MLX5_EXPANSION_IPV6),
194 .type = RTE_FLOW_ITEM_TYPE_VLAN,
196 [MLX5_EXPANSION_IPV4] = {
197 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
198 MLX5_EXPANSION_IPV4_TCP),
199 .type = RTE_FLOW_ITEM_TYPE_IPV4,
200 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
201 ETH_RSS_NONFRAG_IPV4_OTHER,
203 [MLX5_EXPANSION_IPV4_UDP] = {
204 .type = RTE_FLOW_ITEM_TYPE_UDP,
205 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
207 [MLX5_EXPANSION_IPV4_TCP] = {
208 .type = RTE_FLOW_ITEM_TYPE_TCP,
209 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
211 [MLX5_EXPANSION_IPV6] = {
212 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
213 MLX5_EXPANSION_IPV6_TCP),
214 .type = RTE_FLOW_ITEM_TYPE_IPV6,
215 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
216 ETH_RSS_NONFRAG_IPV6_OTHER,
218 [MLX5_EXPANSION_IPV6_UDP] = {
219 .type = RTE_FLOW_ITEM_TYPE_UDP,
220 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
222 [MLX5_EXPANSION_IPV6_TCP] = {
223 .type = RTE_FLOW_ITEM_TYPE_TCP,
224 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
228 static const struct rte_flow_ops mlx5_flow_ops = {
229 .validate = mlx5_flow_validate,
230 .create = mlx5_flow_create,
231 .destroy = mlx5_flow_destroy,
232 .flush = mlx5_flow_flush,
233 .isolate = mlx5_flow_isolate,
234 .query = mlx5_flow_query,
237 /* Convert FDIR request to Generic flow. */
239 struct rte_flow_attr attr;
240 struct rte_flow_item items[4];
241 struct rte_flow_item_eth l2;
242 struct rte_flow_item_eth l2_mask;
244 struct rte_flow_item_ipv4 ipv4;
245 struct rte_flow_item_ipv6 ipv6;
248 struct rte_flow_item_ipv4 ipv4;
249 struct rte_flow_item_ipv6 ipv6;
252 struct rte_flow_item_udp udp;
253 struct rte_flow_item_tcp tcp;
256 struct rte_flow_item_udp udp;
257 struct rte_flow_item_tcp tcp;
259 struct rte_flow_action actions[2];
260 struct rte_flow_action_queue queue;
263 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
264 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
265 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
268 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
269 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
270 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
271 { 9, 10, 11 }, { 12, 13, 14 },
274 /* Tunnel information. */
275 struct mlx5_flow_tunnel_info {
276 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
277 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
280 static struct mlx5_flow_tunnel_info tunnels_info[] = {
282 .tunnel = MLX5_FLOW_LAYER_VXLAN,
283 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
286 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
287 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
290 .tunnel = MLX5_FLOW_LAYER_GRE,
291 .ptype = RTE_PTYPE_TUNNEL_GRE,
294 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
295 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
298 .tunnel = MLX5_FLOW_LAYER_MPLS,
299 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
302 .tunnel = MLX5_FLOW_LAYER_NVGRE,
303 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
308 * Discover the maximum number of priority available.
311 * Pointer to the Ethernet device structure.
314 * number of supported flow priority on success, a negative errno
315 * value otherwise and rte_errno is set.
318 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
320 struct mlx5_priv *priv = dev->data->dev_private;
322 struct ibv_flow_attr attr;
323 struct ibv_flow_spec_eth eth;
324 struct ibv_flow_spec_action_drop drop;
328 .port = (uint8_t)priv->ibv_port,
331 .type = IBV_FLOW_SPEC_ETH,
332 .size = sizeof(struct ibv_flow_spec_eth),
335 .size = sizeof(struct ibv_flow_spec_action_drop),
336 .type = IBV_FLOW_SPEC_ACTION_DROP,
339 struct ibv_flow *flow;
340 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
341 uint16_t vprio[] = { 8, 16 };
349 for (i = 0; i != RTE_DIM(vprio); i++) {
350 flow_attr.attr.priority = vprio[i] - 1;
351 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
354 claim_zero(mlx5_glue->destroy_flow(flow));
357 mlx5_hrxq_drop_release(dev);
360 priority = RTE_DIM(priority_map_3);
363 priority = RTE_DIM(priority_map_5);
368 "port %u verbs maximum priority: %d expected 8/16",
369 dev->data->port_id, priority);
372 DRV_LOG(INFO, "port %u flow maximum priority: %d",
373 dev->data->port_id, priority);
378 * Adjust flow priority based on the highest layer and the request priority.
381 * Pointer to the Ethernet device structure.
382 * @param[in] priority
383 * The rule base priority.
384 * @param[in] subpriority
385 * The priority based on the items.
390 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
391 uint32_t subpriority)
394 struct mlx5_priv *priv = dev->data->dev_private;
396 switch (priv->config.flow_prio) {
397 case RTE_DIM(priority_map_3):
398 res = priority_map_3[priority][subpriority];
400 case RTE_DIM(priority_map_5):
401 res = priority_map_5[priority][subpriority];
408 * Verify the @p item specifications (spec, last, mask) are compatible with the
412 * Item specification.
414 * @p item->mask or flow default bit-masks.
415 * @param[in] nic_mask
416 * Bit-masks covering supported fields by the NIC to compare with user mask.
418 * Bit-masks size in bytes.
420 * Pointer to error structure.
423 * 0 on success, a negative errno value otherwise and rte_errno is set.
426 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
428 const uint8_t *nic_mask,
430 struct rte_flow_error *error)
435 for (i = 0; i < size; ++i)
436 if ((nic_mask[i] | mask[i]) != nic_mask[i])
437 return rte_flow_error_set(error, ENOTSUP,
438 RTE_FLOW_ERROR_TYPE_ITEM,
440 "mask enables non supported"
442 if (!item->spec && (item->mask || item->last))
443 return rte_flow_error_set(error, EINVAL,
444 RTE_FLOW_ERROR_TYPE_ITEM, item,
445 "mask/last without a spec is not"
447 if (item->spec && item->last) {
453 for (i = 0; i < size; ++i) {
454 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
455 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
457 ret = memcmp(spec, last, size);
459 return rte_flow_error_set(error, EINVAL,
460 RTE_FLOW_ERROR_TYPE_ITEM,
462 "range is not valid");
468 * Adjust the hash fields according to the @p flow information.
470 * @param[in] dev_flow.
471 * Pointer to the mlx5_flow.
473 * 1 when the hash field is for a tunnel item.
474 * @param[in] layer_types
476 * @param[in] hash_fields
480 * The hash fields that should be used.
483 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
484 int tunnel __rte_unused, uint64_t layer_types,
485 uint64_t hash_fields)
487 struct rte_flow *flow = dev_flow->flow;
488 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
489 int rss_request_inner = flow->rss.level >= 2;
491 /* Check RSS hash level for tunnel. */
492 if (tunnel && rss_request_inner)
493 hash_fields |= IBV_RX_HASH_INNER;
494 else if (tunnel || rss_request_inner)
497 /* Check if requested layer matches RSS hash fields. */
498 if (!(flow->rss.types & layer_types))
504 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
505 * if several tunnel rules are used on this queue, the tunnel ptype will be
509 * Rx queue to update.
512 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
515 uint32_t tunnel_ptype = 0;
517 /* Look up for the ptype to use. */
518 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
519 if (!rxq_ctrl->flow_tunnels_n[i])
522 tunnel_ptype = tunnels_info[i].ptype;
528 rxq_ctrl->rxq.tunnel = tunnel_ptype;
532 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
536 * Pointer to the Ethernet device structure.
537 * @param[in] dev_flow
538 * Pointer to device flow structure.
541 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
543 struct mlx5_priv *priv = dev->data->dev_private;
544 struct rte_flow *flow = dev_flow->flow;
545 const int mark = !!(flow->actions &
546 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
547 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
550 for (i = 0; i != flow->rss.queue_num; ++i) {
551 int idx = (*flow->queue)[i];
552 struct mlx5_rxq_ctrl *rxq_ctrl =
553 container_of((*priv->rxqs)[idx],
554 struct mlx5_rxq_ctrl, rxq);
557 rxq_ctrl->rxq.mark = 1;
558 rxq_ctrl->flow_mark_n++;
563 /* Increase the counter matching the flow. */
564 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
565 if ((tunnels_info[j].tunnel &
567 tunnels_info[j].tunnel) {
568 rxq_ctrl->flow_tunnels_n[j]++;
572 flow_rxq_tunnel_ptype_update(rxq_ctrl);
578 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
581 * Pointer to the Ethernet device structure.
583 * Pointer to flow structure.
586 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
588 struct mlx5_flow *dev_flow;
590 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
591 flow_drv_rxq_flags_set(dev, dev_flow);
595 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
596 * device flow if no other flow uses it with the same kind of request.
599 * Pointer to Ethernet device.
600 * @param[in] dev_flow
601 * Pointer to the device flow.
604 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
606 struct mlx5_priv *priv = dev->data->dev_private;
607 struct rte_flow *flow = dev_flow->flow;
608 const int mark = !!(flow->actions &
609 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
610 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
613 assert(dev->data->dev_started);
614 for (i = 0; i != flow->rss.queue_num; ++i) {
615 int idx = (*flow->queue)[i];
616 struct mlx5_rxq_ctrl *rxq_ctrl =
617 container_of((*priv->rxqs)[idx],
618 struct mlx5_rxq_ctrl, rxq);
621 rxq_ctrl->flow_mark_n--;
622 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
627 /* Decrease the counter matching the flow. */
628 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
629 if ((tunnels_info[j].tunnel &
631 tunnels_info[j].tunnel) {
632 rxq_ctrl->flow_tunnels_n[j]--;
636 flow_rxq_tunnel_ptype_update(rxq_ctrl);
642 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
643 * @p flow if no other flow uses it with the same kind of request.
646 * Pointer to Ethernet device.
648 * Pointer to the flow.
651 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
653 struct mlx5_flow *dev_flow;
655 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
656 flow_drv_rxq_flags_trim(dev, dev_flow);
660 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
663 * Pointer to Ethernet device.
666 flow_rxq_flags_clear(struct rte_eth_dev *dev)
668 struct mlx5_priv *priv = dev->data->dev_private;
671 for (i = 0; i != priv->rxqs_n; ++i) {
672 struct mlx5_rxq_ctrl *rxq_ctrl;
675 if (!(*priv->rxqs)[i])
677 rxq_ctrl = container_of((*priv->rxqs)[i],
678 struct mlx5_rxq_ctrl, rxq);
679 rxq_ctrl->flow_mark_n = 0;
680 rxq_ctrl->rxq.mark = 0;
681 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
682 rxq_ctrl->flow_tunnels_n[j] = 0;
683 rxq_ctrl->rxq.tunnel = 0;
688 * Validate the flag action.
690 * @param[in] action_flags
691 * Bit-fields that holds the actions detected until now.
693 * Attributes of flow that includes this action.
695 * Pointer to error structure.
698 * 0 on success, a negative errno value otherwise and rte_errno is set.
701 mlx5_flow_validate_action_flag(uint64_t action_flags,
702 const struct rte_flow_attr *attr,
703 struct rte_flow_error *error)
706 if (action_flags & MLX5_FLOW_ACTION_DROP)
707 return rte_flow_error_set(error, EINVAL,
708 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
709 "can't drop and flag in same flow");
710 if (action_flags & MLX5_FLOW_ACTION_MARK)
711 return rte_flow_error_set(error, EINVAL,
712 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
713 "can't mark and flag in same flow");
714 if (action_flags & MLX5_FLOW_ACTION_FLAG)
715 return rte_flow_error_set(error, EINVAL,
716 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
718 " actions in same flow");
720 return rte_flow_error_set(error, ENOTSUP,
721 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
722 "flag action not supported for "
728 * Validate the mark action.
731 * Pointer to the queue action.
732 * @param[in] action_flags
733 * Bit-fields that holds the actions detected until now.
735 * Attributes of flow that includes this action.
737 * Pointer to error structure.
740 * 0 on success, a negative errno value otherwise and rte_errno is set.
743 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
744 uint64_t action_flags,
745 const struct rte_flow_attr *attr,
746 struct rte_flow_error *error)
748 const struct rte_flow_action_mark *mark = action->conf;
751 return rte_flow_error_set(error, EINVAL,
752 RTE_FLOW_ERROR_TYPE_ACTION,
754 "configuration cannot be null");
755 if (mark->id >= MLX5_FLOW_MARK_MAX)
756 return rte_flow_error_set(error, EINVAL,
757 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
759 "mark id must in 0 <= id < "
760 RTE_STR(MLX5_FLOW_MARK_MAX));
761 if (action_flags & MLX5_FLOW_ACTION_DROP)
762 return rte_flow_error_set(error, EINVAL,
763 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
764 "can't drop and mark in same flow");
765 if (action_flags & MLX5_FLOW_ACTION_FLAG)
766 return rte_flow_error_set(error, EINVAL,
767 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
768 "can't flag and mark in same flow");
769 if (action_flags & MLX5_FLOW_ACTION_MARK)
770 return rte_flow_error_set(error, EINVAL,
771 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
772 "can't have 2 mark actions in same"
775 return rte_flow_error_set(error, ENOTSUP,
776 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
777 "mark action not supported for "
783 * Validate the drop action.
785 * @param[in] action_flags
786 * Bit-fields that holds the actions detected until now.
788 * Attributes of flow that includes this action.
790 * Pointer to error structure.
793 * 0 on success, a negative errno value otherwise and rte_errno is set.
796 mlx5_flow_validate_action_drop(uint64_t action_flags,
797 const struct rte_flow_attr *attr,
798 struct rte_flow_error *error)
800 if (action_flags & MLX5_FLOW_ACTION_FLAG)
801 return rte_flow_error_set(error, EINVAL,
802 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
803 "can't drop and flag in same flow");
804 if (action_flags & MLX5_FLOW_ACTION_MARK)
805 return rte_flow_error_set(error, EINVAL,
806 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
807 "can't drop and mark in same flow");
808 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
809 return rte_flow_error_set(error, EINVAL,
810 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
811 "can't have 2 fate actions in"
814 return rte_flow_error_set(error, ENOTSUP,
815 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
816 "drop action not supported for "
822 * Validate the queue action.
825 * Pointer to the queue action.
826 * @param[in] action_flags
827 * Bit-fields that holds the actions detected until now.
829 * Pointer to the Ethernet device structure.
831 * Attributes of flow that includes this action.
833 * Pointer to error structure.
836 * 0 on success, a negative errno value otherwise and rte_errno is set.
839 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
840 uint64_t action_flags,
841 struct rte_eth_dev *dev,
842 const struct rte_flow_attr *attr,
843 struct rte_flow_error *error)
845 struct mlx5_priv *priv = dev->data->dev_private;
846 const struct rte_flow_action_queue *queue = action->conf;
848 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
849 return rte_flow_error_set(error, EINVAL,
850 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
851 "can't have 2 fate actions in"
854 return rte_flow_error_set(error, EINVAL,
855 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
856 NULL, "No Rx queues configured");
857 if (queue->index >= priv->rxqs_n)
858 return rte_flow_error_set(error, EINVAL,
859 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
861 "queue index out of range");
862 if (!(*priv->rxqs)[queue->index])
863 return rte_flow_error_set(error, EINVAL,
864 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
866 "queue is not configured");
868 return rte_flow_error_set(error, ENOTSUP,
869 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
870 "queue action not supported for "
876 * Validate the rss action.
879 * Pointer to the queue action.
880 * @param[in] action_flags
881 * Bit-fields that holds the actions detected until now.
883 * Pointer to the Ethernet device structure.
885 * Attributes of flow that includes this action.
886 * @param[in] item_flags
887 * Items that were detected.
889 * Pointer to error structure.
892 * 0 on success, a negative errno value otherwise and rte_errno is set.
895 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
896 uint64_t action_flags,
897 struct rte_eth_dev *dev,
898 const struct rte_flow_attr *attr,
900 struct rte_flow_error *error)
902 struct mlx5_priv *priv = dev->data->dev_private;
903 const struct rte_flow_action_rss *rss = action->conf;
904 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
907 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
908 return rte_flow_error_set(error, EINVAL,
909 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
910 "can't have 2 fate actions"
912 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
913 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
914 return rte_flow_error_set(error, ENOTSUP,
915 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
917 "RSS hash function not supported");
918 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
923 return rte_flow_error_set(error, ENOTSUP,
924 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
926 "tunnel RSS is not supported");
927 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
928 if (rss->key_len == 0 && rss->key != NULL)
929 return rte_flow_error_set(error, ENOTSUP,
930 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
932 "RSS hash key length 0");
933 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
934 return rte_flow_error_set(error, ENOTSUP,
935 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
937 "RSS hash key too small");
938 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
939 return rte_flow_error_set(error, ENOTSUP,
940 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
942 "RSS hash key too large");
943 if (rss->queue_num > priv->config.ind_table_max_size)
944 return rte_flow_error_set(error, ENOTSUP,
945 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
947 "number of queues too large");
948 if (rss->types & MLX5_RSS_HF_MASK)
949 return rte_flow_error_set(error, ENOTSUP,
950 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
952 "some RSS protocols are not"
955 return rte_flow_error_set(error, EINVAL,
956 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
957 NULL, "No Rx queues configured");
959 return rte_flow_error_set(error, EINVAL,
960 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
961 NULL, "No queues configured");
962 for (i = 0; i != rss->queue_num; ++i) {
963 if (!(*priv->rxqs)[rss->queue[i]])
964 return rte_flow_error_set
965 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
966 &rss->queue[i], "queue is not configured");
969 return rte_flow_error_set(error, ENOTSUP,
970 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
971 "rss action not supported for "
973 if (rss->level > 1 && !tunnel)
974 return rte_flow_error_set(error, EINVAL,
975 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
976 "inner RSS is not supported for "
982 * Validate the count action.
985 * Pointer to the Ethernet device structure.
987 * Attributes of flow that includes this action.
989 * Pointer to error structure.
992 * 0 on success, a negative errno value otherwise and rte_errno is set.
995 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
996 const struct rte_flow_attr *attr,
997 struct rte_flow_error *error)
1000 return rte_flow_error_set(error, ENOTSUP,
1001 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1002 "count action not supported for "
1008 * Verify the @p attributes will be correctly understood by the NIC and store
1009 * them in the @p flow if everything is correct.
1012 * Pointer to the Ethernet device structure.
1013 * @param[in] attributes
1014 * Pointer to flow attributes
1016 * Pointer to error structure.
1019 * 0 on success, a negative errno value otherwise and rte_errno is set.
1022 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1023 const struct rte_flow_attr *attributes,
1024 struct rte_flow_error *error)
1026 struct mlx5_priv *priv = dev->data->dev_private;
1027 uint32_t priority_max = priv->config.flow_prio - 1;
1029 if (attributes->group)
1030 return rte_flow_error_set(error, ENOTSUP,
1031 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1032 NULL, "groups is not supported");
1033 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1034 attributes->priority >= priority_max)
1035 return rte_flow_error_set(error, ENOTSUP,
1036 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1037 NULL, "priority out of range");
1038 if (attributes->egress)
1039 return rte_flow_error_set(error, ENOTSUP,
1040 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1041 "egress is not supported");
1042 if (attributes->transfer && !priv->config.dv_esw_en)
1043 return rte_flow_error_set(error, ENOTSUP,
1044 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1045 NULL, "transfer is not supported");
1046 if (!attributes->ingress)
1047 return rte_flow_error_set(error, EINVAL,
1048 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1050 "ingress attribute is mandatory");
1055 * Validate ICMP6 item.
1058 * Item specification.
1059 * @param[in] item_flags
1060 * Bit-fields that holds the items detected until now.
1062 * Pointer to error structure.
1065 * 0 on success, a negative errno value otherwise and rte_errno is set.
1068 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1069 uint64_t item_flags,
1070 uint8_t target_protocol,
1071 struct rte_flow_error *error)
1073 const struct rte_flow_item_icmp6 *mask = item->mask;
1074 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1075 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1076 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1077 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1078 MLX5_FLOW_LAYER_OUTER_L4;
1081 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1082 return rte_flow_error_set(error, EINVAL,
1083 RTE_FLOW_ERROR_TYPE_ITEM, item,
1084 "protocol filtering not compatible"
1085 " with ICMP6 layer");
1086 if (!(item_flags & l3m))
1087 return rte_flow_error_set(error, EINVAL,
1088 RTE_FLOW_ERROR_TYPE_ITEM, item,
1089 "IPv6 is mandatory to filter on"
1091 if (item_flags & l4m)
1092 return rte_flow_error_set(error, EINVAL,
1093 RTE_FLOW_ERROR_TYPE_ITEM, item,
1094 "multiple L4 layers not supported");
1096 mask = &rte_flow_item_icmp6_mask;
1097 ret = mlx5_flow_item_acceptable
1098 (item, (const uint8_t *)mask,
1099 (const uint8_t *)&rte_flow_item_icmp6_mask,
1100 sizeof(struct rte_flow_item_icmp6), error);
1107 * Validate ICMP item.
1110 * Item specification.
1111 * @param[in] item_flags
1112 * Bit-fields that holds the items detected until now.
1114 * Pointer to error structure.
1117 * 0 on success, a negative errno value otherwise and rte_errno is set.
1120 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1121 uint64_t item_flags,
1122 uint8_t target_protocol,
1123 struct rte_flow_error *error)
1125 const struct rte_flow_item_icmp *mask = item->mask;
1126 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1127 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1128 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1129 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1130 MLX5_FLOW_LAYER_OUTER_L4;
1133 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1134 return rte_flow_error_set(error, EINVAL,
1135 RTE_FLOW_ERROR_TYPE_ITEM, item,
1136 "protocol filtering not compatible"
1137 " with ICMP layer");
1138 if (!(item_flags & l3m))
1139 return rte_flow_error_set(error, EINVAL,
1140 RTE_FLOW_ERROR_TYPE_ITEM, item,
1141 "IPv4 is mandatory to filter"
1143 if (item_flags & l4m)
1144 return rte_flow_error_set(error, EINVAL,
1145 RTE_FLOW_ERROR_TYPE_ITEM, item,
1146 "multiple L4 layers not supported");
1148 mask = &rte_flow_item_icmp_mask;
1149 ret = mlx5_flow_item_acceptable
1150 (item, (const uint8_t *)mask,
1151 (const uint8_t *)&rte_flow_item_icmp_mask,
1152 sizeof(struct rte_flow_item_icmp), error);
1159 * Validate Ethernet item.
1162 * Item specification.
1163 * @param[in] item_flags
1164 * Bit-fields that holds the items detected until now.
1166 * Pointer to error structure.
1169 * 0 on success, a negative errno value otherwise and rte_errno is set.
1172 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1173 uint64_t item_flags,
1174 struct rte_flow_error *error)
1176 const struct rte_flow_item_eth *mask = item->mask;
1177 const struct rte_flow_item_eth nic_mask = {
1178 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1179 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1180 .type = RTE_BE16(0xffff),
1183 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1184 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1185 MLX5_FLOW_LAYER_OUTER_L2;
1187 if (item_flags & ethm)
1188 return rte_flow_error_set(error, ENOTSUP,
1189 RTE_FLOW_ERROR_TYPE_ITEM, item,
1190 "multiple L2 layers not supported");
1192 mask = &rte_flow_item_eth_mask;
1193 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1194 (const uint8_t *)&nic_mask,
1195 sizeof(struct rte_flow_item_eth),
1201 * Validate VLAN item.
1204 * Item specification.
1205 * @param[in] item_flags
1206 * Bit-fields that holds the items detected until now.
1208 * Pointer to error structure.
1211 * 0 on success, a negative errno value otherwise and rte_errno is set.
1214 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1215 uint64_t item_flags,
1216 struct rte_flow_error *error)
1218 const struct rte_flow_item_vlan *spec = item->spec;
1219 const struct rte_flow_item_vlan *mask = item->mask;
1220 const struct rte_flow_item_vlan nic_mask = {
1221 .tci = RTE_BE16(0x0fff),
1222 .inner_type = RTE_BE16(0xffff),
1224 uint16_t vlan_tag = 0;
1225 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1227 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1228 MLX5_FLOW_LAYER_INNER_L4) :
1229 (MLX5_FLOW_LAYER_OUTER_L3 |
1230 MLX5_FLOW_LAYER_OUTER_L4);
1231 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1232 MLX5_FLOW_LAYER_OUTER_VLAN;
1234 if (item_flags & vlanm)
1235 return rte_flow_error_set(error, EINVAL,
1236 RTE_FLOW_ERROR_TYPE_ITEM, item,
1237 "multiple VLAN layers not supported");
1238 else if ((item_flags & l34m) != 0)
1239 return rte_flow_error_set(error, EINVAL,
1240 RTE_FLOW_ERROR_TYPE_ITEM, item,
1241 "L2 layer cannot follow L3/L4 layer");
1243 mask = &rte_flow_item_vlan_mask;
1244 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245 (const uint8_t *)&nic_mask,
1246 sizeof(struct rte_flow_item_vlan),
1251 vlan_tag = spec->tci;
1252 vlan_tag &= mask->tci;
1255 * From verbs perspective an empty VLAN is equivalent
1256 * to a packet without VLAN layer.
1259 return rte_flow_error_set(error, EINVAL,
1260 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1262 "VLAN cannot be empty");
1267 * Validate IPV4 item.
1270 * Item specification.
1271 * @param[in] item_flags
1272 * Bit-fields that holds the items detected until now.
1273 * @param[in] acc_mask
1274 * Acceptable mask, if NULL default internal default mask
1275 * will be used to check whether item fields are supported.
1277 * Pointer to error structure.
1280 * 0 on success, a negative errno value otherwise and rte_errno is set.
1283 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1284 uint64_t item_flags,
1285 const struct rte_flow_item_ipv4 *acc_mask,
1286 struct rte_flow_error *error)
1288 const struct rte_flow_item_ipv4 *mask = item->mask;
1289 const struct rte_flow_item_ipv4 *spec = item->spec;
1290 const struct rte_flow_item_ipv4 nic_mask = {
1292 .src_addr = RTE_BE32(0xffffffff),
1293 .dst_addr = RTE_BE32(0xffffffff),
1294 .type_of_service = 0xff,
1295 .next_proto_id = 0xff,
1298 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1299 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1300 MLX5_FLOW_LAYER_OUTER_L3;
1301 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1302 MLX5_FLOW_LAYER_OUTER_L4;
1304 uint8_t next_proto = 0xFF;
1306 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1308 next_proto = mask->hdr.next_proto_id &
1309 spec->hdr.next_proto_id;
1310 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1311 return rte_flow_error_set(error, EINVAL,
1312 RTE_FLOW_ERROR_TYPE_ITEM,
1317 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1318 return rte_flow_error_set(error, EINVAL,
1319 RTE_FLOW_ERROR_TYPE_ITEM, item,
1320 "wrong tunnel type - IPv6 specified "
1321 "but IPv4 item provided");
1322 if (item_flags & l3m)
1323 return rte_flow_error_set(error, ENOTSUP,
1324 RTE_FLOW_ERROR_TYPE_ITEM, item,
1325 "multiple L3 layers not supported");
1326 else if (item_flags & l4m)
1327 return rte_flow_error_set(error, EINVAL,
1328 RTE_FLOW_ERROR_TYPE_ITEM, item,
1329 "L3 cannot follow an L4 layer.");
1330 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1331 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1332 return rte_flow_error_set(error, EINVAL,
1333 RTE_FLOW_ERROR_TYPE_ITEM, item,
1334 "L3 cannot follow an NVGRE layer.");
1336 mask = &rte_flow_item_ipv4_mask;
1337 else if (mask->hdr.next_proto_id != 0 &&
1338 mask->hdr.next_proto_id != 0xff)
1339 return rte_flow_error_set(error, EINVAL,
1340 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1341 "partial mask is not supported"
1343 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1344 acc_mask ? (const uint8_t *)acc_mask
1345 : (const uint8_t *)&nic_mask,
1346 sizeof(struct rte_flow_item_ipv4),
1354 * Validate IPV6 item.
1357 * Item specification.
1358 * @param[in] item_flags
1359 * Bit-fields that holds the items detected until now.
1360 * @param[in] acc_mask
1361 * Acceptable mask, if NULL default internal default mask
1362 * will be used to check whether item fields are supported.
1364 * Pointer to error structure.
1367 * 0 on success, a negative errno value otherwise and rte_errno is set.
1370 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1371 uint64_t item_flags,
1372 const struct rte_flow_item_ipv6 *acc_mask,
1373 struct rte_flow_error *error)
1375 const struct rte_flow_item_ipv6 *mask = item->mask;
1376 const struct rte_flow_item_ipv6 *spec = item->spec;
1377 const struct rte_flow_item_ipv6 nic_mask = {
1380 "\xff\xff\xff\xff\xff\xff\xff\xff"
1381 "\xff\xff\xff\xff\xff\xff\xff\xff",
1383 "\xff\xff\xff\xff\xff\xff\xff\xff"
1384 "\xff\xff\xff\xff\xff\xff\xff\xff",
1385 .vtc_flow = RTE_BE32(0xffffffff),
1390 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1391 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1392 MLX5_FLOW_LAYER_OUTER_L3;
1393 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1394 MLX5_FLOW_LAYER_OUTER_L4;
1396 uint8_t next_proto = 0xFF;
1398 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1400 next_proto = mask->hdr.proto & spec->hdr.proto;
1401 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1402 return rte_flow_error_set(error, EINVAL,
1403 RTE_FLOW_ERROR_TYPE_ITEM,
1408 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1409 return rte_flow_error_set(error, EINVAL,
1410 RTE_FLOW_ERROR_TYPE_ITEM, item,
1411 "wrong tunnel type - IPv4 specified "
1412 "but IPv6 item provided");
1413 if (item_flags & l3m)
1414 return rte_flow_error_set(error, ENOTSUP,
1415 RTE_FLOW_ERROR_TYPE_ITEM, item,
1416 "multiple L3 layers not supported");
1417 else if (item_flags & l4m)
1418 return rte_flow_error_set(error, EINVAL,
1419 RTE_FLOW_ERROR_TYPE_ITEM, item,
1420 "L3 cannot follow an L4 layer.");
1421 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1422 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1423 return rte_flow_error_set(error, EINVAL,
1424 RTE_FLOW_ERROR_TYPE_ITEM, item,
1425 "L3 cannot follow an NVGRE layer.");
1427 mask = &rte_flow_item_ipv6_mask;
1428 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1429 acc_mask ? (const uint8_t *)acc_mask
1430 : (const uint8_t *)&nic_mask,
1431 sizeof(struct rte_flow_item_ipv6),
1439 * Validate UDP item.
1442 * Item specification.
1443 * @param[in] item_flags
1444 * Bit-fields that holds the items detected until now.
1445 * @param[in] target_protocol
1446 * The next protocol in the previous item.
1447 * @param[in] flow_mask
1448 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1450 * Pointer to error structure.
1453 * 0 on success, a negative errno value otherwise and rte_errno is set.
1456 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1457 uint64_t item_flags,
1458 uint8_t target_protocol,
1459 struct rte_flow_error *error)
1461 const struct rte_flow_item_udp *mask = item->mask;
1462 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1463 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1464 MLX5_FLOW_LAYER_OUTER_L3;
1465 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1466 MLX5_FLOW_LAYER_OUTER_L4;
1469 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1470 return rte_flow_error_set(error, EINVAL,
1471 RTE_FLOW_ERROR_TYPE_ITEM, item,
1472 "protocol filtering not compatible"
1474 if (!(item_flags & l3m))
1475 return rte_flow_error_set(error, EINVAL,
1476 RTE_FLOW_ERROR_TYPE_ITEM, item,
1477 "L3 is mandatory to filter on L4");
1478 if (item_flags & l4m)
1479 return rte_flow_error_set(error, EINVAL,
1480 RTE_FLOW_ERROR_TYPE_ITEM, item,
1481 "multiple L4 layers not supported");
1483 mask = &rte_flow_item_udp_mask;
1484 ret = mlx5_flow_item_acceptable
1485 (item, (const uint8_t *)mask,
1486 (const uint8_t *)&rte_flow_item_udp_mask,
1487 sizeof(struct rte_flow_item_udp), error);
1494 * Validate TCP item.
1497 * Item specification.
1498 * @param[in] item_flags
1499 * Bit-fields that holds the items detected until now.
1500 * @param[in] target_protocol
1501 * The next protocol in the previous item.
1503 * Pointer to error structure.
1506 * 0 on success, a negative errno value otherwise and rte_errno is set.
1509 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1510 uint64_t item_flags,
1511 uint8_t target_protocol,
1512 const struct rte_flow_item_tcp *flow_mask,
1513 struct rte_flow_error *error)
1515 const struct rte_flow_item_tcp *mask = item->mask;
1516 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1517 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1518 MLX5_FLOW_LAYER_OUTER_L3;
1519 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1520 MLX5_FLOW_LAYER_OUTER_L4;
1524 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1525 return rte_flow_error_set(error, EINVAL,
1526 RTE_FLOW_ERROR_TYPE_ITEM, item,
1527 "protocol filtering not compatible"
1529 if (!(item_flags & l3m))
1530 return rte_flow_error_set(error, EINVAL,
1531 RTE_FLOW_ERROR_TYPE_ITEM, item,
1532 "L3 is mandatory to filter on L4");
1533 if (item_flags & l4m)
1534 return rte_flow_error_set(error, EINVAL,
1535 RTE_FLOW_ERROR_TYPE_ITEM, item,
1536 "multiple L4 layers not supported");
1538 mask = &rte_flow_item_tcp_mask;
1539 ret = mlx5_flow_item_acceptable
1540 (item, (const uint8_t *)mask,
1541 (const uint8_t *)flow_mask,
1542 sizeof(struct rte_flow_item_tcp), error);
1549 * Validate VXLAN item.
1552 * Item specification.
1553 * @param[in] item_flags
1554 * Bit-fields that holds the items detected until now.
1555 * @param[in] target_protocol
1556 * The next protocol in the previous item.
1558 * Pointer to error structure.
1561 * 0 on success, a negative errno value otherwise and rte_errno is set.
1564 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1565 uint64_t item_flags,
1566 struct rte_flow_error *error)
1568 const struct rte_flow_item_vxlan *spec = item->spec;
1569 const struct rte_flow_item_vxlan *mask = item->mask;
1574 } id = { .vlan_id = 0, };
1575 uint32_t vlan_id = 0;
1578 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1579 return rte_flow_error_set(error, ENOTSUP,
1580 RTE_FLOW_ERROR_TYPE_ITEM, item,
1581 "multiple tunnel layers not"
1584 * Verify only UDPv4 is present as defined in
1585 * https://tools.ietf.org/html/rfc7348
1587 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1588 return rte_flow_error_set(error, EINVAL,
1589 RTE_FLOW_ERROR_TYPE_ITEM, item,
1590 "no outer UDP layer found");
1592 mask = &rte_flow_item_vxlan_mask;
1593 ret = mlx5_flow_item_acceptable
1594 (item, (const uint8_t *)mask,
1595 (const uint8_t *)&rte_flow_item_vxlan_mask,
1596 sizeof(struct rte_flow_item_vxlan),
1601 memcpy(&id.vni[1], spec->vni, 3);
1602 vlan_id = id.vlan_id;
1603 memcpy(&id.vni[1], mask->vni, 3);
1604 vlan_id &= id.vlan_id;
1607 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1608 * only this layer is defined in the Verbs specification it is
1609 * interpreted as wildcard and all packets will match this
1610 * rule, if it follows a full stack layer (ex: eth / ipv4 /
1611 * udp), all packets matching the layers before will also
1612 * match this rule. To avoid such situation, VNI 0 is
1613 * currently refused.
1616 return rte_flow_error_set(error, ENOTSUP,
1617 RTE_FLOW_ERROR_TYPE_ITEM, item,
1618 "VXLAN vni cannot be 0");
1619 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1620 return rte_flow_error_set(error, ENOTSUP,
1621 RTE_FLOW_ERROR_TYPE_ITEM, item,
1622 "VXLAN tunnel must be fully defined");
1627 * Validate VXLAN_GPE item.
1630 * Item specification.
1631 * @param[in] item_flags
1632 * Bit-fields that holds the items detected until now.
1634 * Pointer to the private data structure.
1635 * @param[in] target_protocol
1636 * The next protocol in the previous item.
1638 * Pointer to error structure.
1641 * 0 on success, a negative errno value otherwise and rte_errno is set.
1644 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1645 uint64_t item_flags,
1646 struct rte_eth_dev *dev,
1647 struct rte_flow_error *error)
1649 struct mlx5_priv *priv = dev->data->dev_private;
1650 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1651 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1656 } id = { .vlan_id = 0, };
1657 uint32_t vlan_id = 0;
1659 if (!priv->config.l3_vxlan_en)
1660 return rte_flow_error_set(error, ENOTSUP,
1661 RTE_FLOW_ERROR_TYPE_ITEM, item,
1662 "L3 VXLAN is not enabled by device"
1663 " parameter and/or not configured in"
1665 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1666 return rte_flow_error_set(error, ENOTSUP,
1667 RTE_FLOW_ERROR_TYPE_ITEM, item,
1668 "multiple tunnel layers not"
1671 * Verify only UDPv4 is present as defined in
1672 * https://tools.ietf.org/html/rfc7348
1674 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1675 return rte_flow_error_set(error, EINVAL,
1676 RTE_FLOW_ERROR_TYPE_ITEM, item,
1677 "no outer UDP layer found");
1679 mask = &rte_flow_item_vxlan_gpe_mask;
1680 ret = mlx5_flow_item_acceptable
1681 (item, (const uint8_t *)mask,
1682 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1683 sizeof(struct rte_flow_item_vxlan_gpe),
1689 return rte_flow_error_set(error, ENOTSUP,
1690 RTE_FLOW_ERROR_TYPE_ITEM,
1692 "VxLAN-GPE protocol"
1694 memcpy(&id.vni[1], spec->vni, 3);
1695 vlan_id = id.vlan_id;
1696 memcpy(&id.vni[1], mask->vni, 3);
1697 vlan_id &= id.vlan_id;
1700 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1701 * layer is defined in the Verbs specification it is interpreted as
1702 * wildcard and all packets will match this rule, if it follows a full
1703 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1704 * before will also match this rule. To avoid such situation, VNI 0
1705 * is currently refused.
1708 return rte_flow_error_set(error, ENOTSUP,
1709 RTE_FLOW_ERROR_TYPE_ITEM, item,
1710 "VXLAN-GPE vni cannot be 0");
1711 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1712 return rte_flow_error_set(error, ENOTSUP,
1713 RTE_FLOW_ERROR_TYPE_ITEM, item,
1714 "VXLAN-GPE tunnel must be fully"
1719 * Validate GRE Key item.
1722 * Item specification.
1723 * @param[in] item_flags
1724 * Bit flags to mark detected items.
1725 * @param[in] gre_item
1726 * Pointer to gre_item
1728 * Pointer to error structure.
1731 * 0 on success, a negative errno value otherwise and rte_errno is set.
1734 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1735 uint64_t item_flags,
1736 const struct rte_flow_item *gre_item,
1737 struct rte_flow_error *error)
1739 const rte_be32_t *mask = item->mask;
1741 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1742 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1743 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1745 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1746 return rte_flow_error_set(error, ENOTSUP,
1747 RTE_FLOW_ERROR_TYPE_ITEM, item,
1748 "Multiple GRE key not support");
1749 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1750 return rte_flow_error_set(error, ENOTSUP,
1751 RTE_FLOW_ERROR_TYPE_ITEM, item,
1752 "No preceding GRE header");
1753 if (item_flags & MLX5_FLOW_LAYER_INNER)
1754 return rte_flow_error_set(error, ENOTSUP,
1755 RTE_FLOW_ERROR_TYPE_ITEM, item,
1756 "GRE key following a wrong item");
1758 gre_mask = &rte_flow_item_gre_mask;
1759 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1760 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1761 return rte_flow_error_set(error, EINVAL,
1762 RTE_FLOW_ERROR_TYPE_ITEM, item,
1763 "Key bit must be on");
1766 mask = &gre_key_default_mask;
1767 ret = mlx5_flow_item_acceptable
1768 (item, (const uint8_t *)mask,
1769 (const uint8_t *)&gre_key_default_mask,
1770 sizeof(rte_be32_t), error);
1775 * Validate GRE item.
1778 * Item specification.
1779 * @param[in] item_flags
1780 * Bit flags to mark detected items.
1781 * @param[in] target_protocol
1782 * The next protocol in the previous item.
1784 * Pointer to error structure.
1787 * 0 on success, a negative errno value otherwise and rte_errno is set.
1790 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1791 uint64_t item_flags,
1792 uint8_t target_protocol,
1793 struct rte_flow_error *error)
1795 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1796 const struct rte_flow_item_gre *mask = item->mask;
1798 const struct rte_flow_item_gre nic_mask = {
1799 .c_rsvd0_ver = RTE_BE16(0xB000),
1800 .protocol = RTE_BE16(UINT16_MAX),
1803 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1804 return rte_flow_error_set(error, EINVAL,
1805 RTE_FLOW_ERROR_TYPE_ITEM, item,
1806 "protocol filtering not compatible"
1807 " with this GRE layer");
1808 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1809 return rte_flow_error_set(error, ENOTSUP,
1810 RTE_FLOW_ERROR_TYPE_ITEM, item,
1811 "multiple tunnel layers not"
1813 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1814 return rte_flow_error_set(error, ENOTSUP,
1815 RTE_FLOW_ERROR_TYPE_ITEM, item,
1816 "L3 Layer is missing");
1818 mask = &rte_flow_item_gre_mask;
1819 ret = mlx5_flow_item_acceptable
1820 (item, (const uint8_t *)mask,
1821 (const uint8_t *)&nic_mask,
1822 sizeof(struct rte_flow_item_gre), error);
1825 #ifndef HAVE_MLX5DV_DR
1826 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1827 if (spec && (spec->protocol & mask->protocol))
1828 return rte_flow_error_set(error, ENOTSUP,
1829 RTE_FLOW_ERROR_TYPE_ITEM, item,
1830 "without MPLS support the"
1831 " specification cannot be used for"
1839 * Validate MPLS item.
1842 * Pointer to the rte_eth_dev structure.
1844 * Item specification.
1845 * @param[in] item_flags
1846 * Bit-fields that holds the items detected until now.
1847 * @param[in] prev_layer
1848 * The protocol layer indicated in previous item.
1850 * Pointer to error structure.
1853 * 0 on success, a negative errno value otherwise and rte_errno is set.
1856 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1857 const struct rte_flow_item *item __rte_unused,
1858 uint64_t item_flags __rte_unused,
1859 uint64_t prev_layer __rte_unused,
1860 struct rte_flow_error *error)
1862 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1863 const struct rte_flow_item_mpls *mask = item->mask;
1864 struct mlx5_priv *priv = dev->data->dev_private;
1867 if (!priv->config.mpls_en)
1868 return rte_flow_error_set(error, ENOTSUP,
1869 RTE_FLOW_ERROR_TYPE_ITEM, item,
1870 "MPLS not supported or"
1871 " disabled in firmware"
1873 /* MPLS over IP, UDP, GRE is allowed */
1874 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1875 MLX5_FLOW_LAYER_OUTER_L4_UDP |
1876 MLX5_FLOW_LAYER_GRE)))
1877 return rte_flow_error_set(error, EINVAL,
1878 RTE_FLOW_ERROR_TYPE_ITEM, item,
1879 "protocol filtering not compatible"
1880 " with MPLS layer");
1881 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1882 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1883 !(item_flags & MLX5_FLOW_LAYER_GRE))
1884 return rte_flow_error_set(error, ENOTSUP,
1885 RTE_FLOW_ERROR_TYPE_ITEM, item,
1886 "multiple tunnel layers not"
1889 mask = &rte_flow_item_mpls_mask;
1890 ret = mlx5_flow_item_acceptable
1891 (item, (const uint8_t *)mask,
1892 (const uint8_t *)&rte_flow_item_mpls_mask,
1893 sizeof(struct rte_flow_item_mpls), error);
1898 return rte_flow_error_set(error, ENOTSUP,
1899 RTE_FLOW_ERROR_TYPE_ITEM, item,
1900 "MPLS is not supported by Verbs, please"
1905 * Validate NVGRE item.
1908 * Item specification.
1909 * @param[in] item_flags
1910 * Bit flags to mark detected items.
1911 * @param[in] target_protocol
1912 * The next protocol in the previous item.
1914 * Pointer to error structure.
1917 * 0 on success, a negative errno value otherwise and rte_errno is set.
1920 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1921 uint64_t item_flags,
1922 uint8_t target_protocol,
1923 struct rte_flow_error *error)
1925 const struct rte_flow_item_nvgre *mask = item->mask;
1928 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1929 return rte_flow_error_set(error, EINVAL,
1930 RTE_FLOW_ERROR_TYPE_ITEM, item,
1931 "protocol filtering not compatible"
1932 " with this GRE layer");
1933 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1934 return rte_flow_error_set(error, ENOTSUP,
1935 RTE_FLOW_ERROR_TYPE_ITEM, item,
1936 "multiple tunnel layers not"
1938 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1939 return rte_flow_error_set(error, ENOTSUP,
1940 RTE_FLOW_ERROR_TYPE_ITEM, item,
1941 "L3 Layer is missing");
1943 mask = &rte_flow_item_nvgre_mask;
1944 ret = mlx5_flow_item_acceptable
1945 (item, (const uint8_t *)mask,
1946 (const uint8_t *)&rte_flow_item_nvgre_mask,
1947 sizeof(struct rte_flow_item_nvgre), error);
1954 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
1955 const struct rte_flow_attr *attr __rte_unused,
1956 const struct rte_flow_item items[] __rte_unused,
1957 const struct rte_flow_action actions[] __rte_unused,
1958 struct rte_flow_error *error)
1960 return rte_flow_error_set(error, ENOTSUP,
1961 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1964 static struct mlx5_flow *
1965 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
1966 const struct rte_flow_item items[] __rte_unused,
1967 const struct rte_flow_action actions[] __rte_unused,
1968 struct rte_flow_error *error)
1970 rte_flow_error_set(error, ENOTSUP,
1971 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1976 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
1977 struct mlx5_flow *dev_flow __rte_unused,
1978 const struct rte_flow_attr *attr __rte_unused,
1979 const struct rte_flow_item items[] __rte_unused,
1980 const struct rte_flow_action actions[] __rte_unused,
1981 struct rte_flow_error *error)
1983 return rte_flow_error_set(error, ENOTSUP,
1984 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1988 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
1989 struct rte_flow *flow __rte_unused,
1990 struct rte_flow_error *error)
1992 return rte_flow_error_set(error, ENOTSUP,
1993 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1997 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
1998 struct rte_flow *flow __rte_unused)
2003 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2004 struct rte_flow *flow __rte_unused)
2009 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2010 struct rte_flow *flow __rte_unused,
2011 const struct rte_flow_action *actions __rte_unused,
2012 void *data __rte_unused,
2013 struct rte_flow_error *error)
2015 return rte_flow_error_set(error, ENOTSUP,
2016 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2019 /* Void driver to protect from null pointer reference. */
2020 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2021 .validate = flow_null_validate,
2022 .prepare = flow_null_prepare,
2023 .translate = flow_null_translate,
2024 .apply = flow_null_apply,
2025 .remove = flow_null_remove,
2026 .destroy = flow_null_destroy,
2027 .query = flow_null_query,
2031 * Select flow driver type according to flow attributes and device
2035 * Pointer to the dev structure.
2037 * Pointer to the flow attributes.
2040 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2042 static enum mlx5_flow_drv_type
2043 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2045 struct mlx5_priv *priv = dev->data->dev_private;
2046 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2048 if (attr->transfer && priv->config.dv_esw_en)
2049 type = MLX5_FLOW_TYPE_DV;
2050 if (!attr->transfer)
2051 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2052 MLX5_FLOW_TYPE_VERBS;
2056 #define flow_get_drv_ops(type) flow_drv_ops[type]
2059 * Flow driver validation API. This abstracts calling driver specific functions.
2060 * The type of flow driver is determined according to flow attributes.
2063 * Pointer to the dev structure.
2065 * Pointer to the flow attributes.
2067 * Pointer to the list of items.
2068 * @param[in] actions
2069 * Pointer to the list of actions.
2071 * Pointer to the error structure.
2074 * 0 on success, a negative errno value otherwise and rte_errno is set.
2077 flow_drv_validate(struct rte_eth_dev *dev,
2078 const struct rte_flow_attr *attr,
2079 const struct rte_flow_item items[],
2080 const struct rte_flow_action actions[],
2081 struct rte_flow_error *error)
2083 const struct mlx5_flow_driver_ops *fops;
2084 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2086 fops = flow_get_drv_ops(type);
2087 return fops->validate(dev, attr, items, actions, error);
2091 * Flow driver preparation API. This abstracts calling driver specific
2092 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2093 * calculates the size of memory required for device flow, allocates the memory,
2094 * initializes the device flow and returns the pointer.
2097 * This function initializes device flow structure such as dv or verbs in
2098 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2099 * rest. For example, adding returning device flow to flow->dev_flow list and
2100 * setting backward reference to the flow should be done out of this function.
2101 * layers field is not filled either.
2104 * Pointer to the flow attributes.
2106 * Pointer to the list of items.
2107 * @param[in] actions
2108 * Pointer to the list of actions.
2110 * Pointer to the error structure.
2113 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2115 static inline struct mlx5_flow *
2116 flow_drv_prepare(const struct rte_flow *flow,
2117 const struct rte_flow_attr *attr,
2118 const struct rte_flow_item items[],
2119 const struct rte_flow_action actions[],
2120 struct rte_flow_error *error)
2122 const struct mlx5_flow_driver_ops *fops;
2123 enum mlx5_flow_drv_type type = flow->drv_type;
2125 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2126 fops = flow_get_drv_ops(type);
2127 return fops->prepare(attr, items, actions, error);
2131 * Flow driver translation API. This abstracts calling driver specific
2132 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2133 * translates a generic flow into a driver flow. flow_drv_prepare() must
2137 * dev_flow->layers could be filled as a result of parsing during translation
2138 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2139 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2140 * flow->actions could be overwritten even though all the expanded dev_flows
2141 * have the same actions.
2144 * Pointer to the rte dev structure.
2145 * @param[in, out] dev_flow
2146 * Pointer to the mlx5 flow.
2148 * Pointer to the flow attributes.
2150 * Pointer to the list of items.
2151 * @param[in] actions
2152 * Pointer to the list of actions.
2154 * Pointer to the error structure.
2157 * 0 on success, a negative errno value otherwise and rte_errno is set.
2160 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2161 const struct rte_flow_attr *attr,
2162 const struct rte_flow_item items[],
2163 const struct rte_flow_action actions[],
2164 struct rte_flow_error *error)
2166 const struct mlx5_flow_driver_ops *fops;
2167 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2169 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2170 fops = flow_get_drv_ops(type);
2171 return fops->translate(dev, dev_flow, attr, items, actions, error);
2175 * Flow driver apply API. This abstracts calling driver specific functions.
2176 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2177 * translated driver flows on to device. flow_drv_translate() must precede.
2180 * Pointer to Ethernet device structure.
2181 * @param[in, out] flow
2182 * Pointer to flow structure.
2184 * Pointer to error structure.
2187 * 0 on success, a negative errno value otherwise and rte_errno is set.
2190 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2191 struct rte_flow_error *error)
2193 const struct mlx5_flow_driver_ops *fops;
2194 enum mlx5_flow_drv_type type = flow->drv_type;
2196 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2197 fops = flow_get_drv_ops(type);
2198 return fops->apply(dev, flow, error);
2202 * Flow driver remove API. This abstracts calling driver specific functions.
2203 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2204 * on device. All the resources of the flow should be freed by calling
2205 * flow_drv_destroy().
2208 * Pointer to Ethernet device.
2209 * @param[in, out] flow
2210 * Pointer to flow structure.
2213 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2215 const struct mlx5_flow_driver_ops *fops;
2216 enum mlx5_flow_drv_type type = flow->drv_type;
2218 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2219 fops = flow_get_drv_ops(type);
2220 fops->remove(dev, flow);
2224 * Flow driver destroy API. This abstracts calling driver specific functions.
2225 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2226 * on device and releases resources of the flow.
2229 * Pointer to Ethernet device.
2230 * @param[in, out] flow
2231 * Pointer to flow structure.
2234 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2236 const struct mlx5_flow_driver_ops *fops;
2237 enum mlx5_flow_drv_type type = flow->drv_type;
2239 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2240 fops = flow_get_drv_ops(type);
2241 fops->destroy(dev, flow);
2245 * Validate a flow supported by the NIC.
2247 * @see rte_flow_validate()
2251 mlx5_flow_validate(struct rte_eth_dev *dev,
2252 const struct rte_flow_attr *attr,
2253 const struct rte_flow_item items[],
2254 const struct rte_flow_action actions[],
2255 struct rte_flow_error *error)
2259 ret = flow_drv_validate(dev, attr, items, actions, error);
2266 * Get RSS action from the action list.
2268 * @param[in] actions
2269 * Pointer to the list of actions.
2272 * Pointer to the RSS action if exist, else return NULL.
2274 static const struct rte_flow_action_rss*
2275 flow_get_rss_action(const struct rte_flow_action actions[])
2277 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2278 switch (actions->type) {
2279 case RTE_FLOW_ACTION_TYPE_RSS:
2280 return (const struct rte_flow_action_rss *)
2290 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2292 const struct rte_flow_item *item;
2293 unsigned int has_vlan = 0;
2295 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2296 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2302 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2303 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2304 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2305 MLX5_EXPANSION_ROOT_OUTER;
2309 * Create a flow and add it to @p list.
2312 * Pointer to Ethernet device.
2314 * Pointer to a TAILQ flow list.
2316 * Flow rule attributes.
2318 * Pattern specification (list terminated by the END pattern item).
2319 * @param[in] actions
2320 * Associated actions (list terminated by the END action).
2322 * Perform verbose error reporting if not NULL.
2325 * A flow on success, NULL otherwise and rte_errno is set.
2327 static struct rte_flow *
2328 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2329 const struct rte_flow_attr *attr,
2330 const struct rte_flow_item items[],
2331 const struct rte_flow_action actions[],
2332 struct rte_flow_error *error)
2334 struct rte_flow *flow = NULL;
2335 struct mlx5_flow *dev_flow;
2336 const struct rte_flow_action_rss *rss;
2338 struct rte_flow_expand_rss buf;
2339 uint8_t buffer[2048];
2341 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2346 ret = flow_drv_validate(dev, attr, items, actions, error);
2349 flow_size = sizeof(struct rte_flow);
2350 rss = flow_get_rss_action(actions);
2352 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2355 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2356 flow = rte_calloc(__func__, 1, flow_size, 0);
2361 flow->drv_type = flow_get_drv_type(dev, attr);
2362 flow->ingress = attr->ingress;
2363 flow->transfer = attr->transfer;
2364 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2365 flow->drv_type < MLX5_FLOW_TYPE_MAX);
2366 flow->queue = (void *)(flow + 1);
2367 LIST_INIT(&flow->dev_flows);
2368 if (rss && rss->types) {
2369 unsigned int graph_root;
2371 graph_root = find_graph_root(items, rss->level);
2372 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2374 mlx5_support_expansion,
2377 (unsigned int)ret < sizeof(expand_buffer.buffer));
2380 buf->entry[0].pattern = (void *)(uintptr_t)items;
2382 for (i = 0; i < buf->entries; ++i) {
2383 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2387 dev_flow->flow = flow;
2388 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2389 ret = flow_drv_translate(dev, dev_flow, attr,
2390 buf->entry[i].pattern,
2395 if (dev->data->dev_started) {
2396 ret = flow_drv_apply(dev, flow, error);
2400 TAILQ_INSERT_TAIL(list, flow, next);
2401 flow_rxq_flags_set(dev, flow);
2404 ret = rte_errno; /* Save rte_errno before cleanup. */
2406 flow_drv_destroy(dev, flow);
2408 rte_errno = ret; /* Restore rte_errno. */
2415 * @see rte_flow_create()
2419 mlx5_flow_create(struct rte_eth_dev *dev,
2420 const struct rte_flow_attr *attr,
2421 const struct rte_flow_item items[],
2422 const struct rte_flow_action actions[],
2423 struct rte_flow_error *error)
2425 struct mlx5_priv *priv = dev->data->dev_private;
2427 return flow_list_create(dev, &priv->flows,
2428 attr, items, actions, error);
2432 * Destroy a flow in a list.
2435 * Pointer to Ethernet device.
2437 * Pointer to a TAILQ flow list.
2442 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2443 struct rte_flow *flow)
2446 * Update RX queue flags only if port is started, otherwise it is
2449 if (dev->data->dev_started)
2450 flow_rxq_flags_trim(dev, flow);
2451 flow_drv_destroy(dev, flow);
2452 TAILQ_REMOVE(list, flow, next);
2453 rte_free(flow->fdir);
2458 * Destroy all flows.
2461 * Pointer to Ethernet device.
2463 * Pointer to a TAILQ flow list.
2466 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2468 while (!TAILQ_EMPTY(list)) {
2469 struct rte_flow *flow;
2471 flow = TAILQ_FIRST(list);
2472 flow_list_destroy(dev, list, flow);
2480 * Pointer to Ethernet device.
2482 * Pointer to a TAILQ flow list.
2485 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2487 struct rte_flow *flow;
2489 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2490 flow_drv_remove(dev, flow);
2491 flow_rxq_flags_clear(dev);
2498 * Pointer to Ethernet device.
2500 * Pointer to a TAILQ flow list.
2503 * 0 on success, a negative errno value otherwise and rte_errno is set.
2506 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2508 struct rte_flow *flow;
2509 struct rte_flow_error error;
2512 TAILQ_FOREACH(flow, list, next) {
2513 ret = flow_drv_apply(dev, flow, &error);
2516 flow_rxq_flags_set(dev, flow);
2520 ret = rte_errno; /* Save rte_errno before cleanup. */
2521 mlx5_flow_stop(dev, list);
2522 rte_errno = ret; /* Restore rte_errno. */
2527 * Verify the flow list is empty
2530 * Pointer to Ethernet device.
2532 * @return the number of flows not released.
2535 mlx5_flow_verify(struct rte_eth_dev *dev)
2537 struct mlx5_priv *priv = dev->data->dev_private;
2538 struct rte_flow *flow;
2541 TAILQ_FOREACH(flow, &priv->flows, next) {
2542 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2543 dev->data->port_id, (void *)flow);
2550 * Enable a control flow configured from the control plane.
2553 * Pointer to Ethernet device.
2555 * An Ethernet flow spec to apply.
2557 * An Ethernet flow mask to apply.
2559 * A VLAN flow spec to apply.
2561 * A VLAN flow mask to apply.
2564 * 0 on success, a negative errno value otherwise and rte_errno is set.
2567 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2568 struct rte_flow_item_eth *eth_spec,
2569 struct rte_flow_item_eth *eth_mask,
2570 struct rte_flow_item_vlan *vlan_spec,
2571 struct rte_flow_item_vlan *vlan_mask)
2573 struct mlx5_priv *priv = dev->data->dev_private;
2574 const struct rte_flow_attr attr = {
2576 .priority = MLX5_FLOW_PRIO_RSVD,
2578 struct rte_flow_item items[] = {
2580 .type = RTE_FLOW_ITEM_TYPE_ETH,
2586 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2587 RTE_FLOW_ITEM_TYPE_END,
2593 .type = RTE_FLOW_ITEM_TYPE_END,
2596 uint16_t queue[priv->reta_idx_n];
2597 struct rte_flow_action_rss action_rss = {
2598 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2600 .types = priv->rss_conf.rss_hf,
2601 .key_len = priv->rss_conf.rss_key_len,
2602 .queue_num = priv->reta_idx_n,
2603 .key = priv->rss_conf.rss_key,
2606 struct rte_flow_action actions[] = {
2608 .type = RTE_FLOW_ACTION_TYPE_RSS,
2609 .conf = &action_rss,
2612 .type = RTE_FLOW_ACTION_TYPE_END,
2615 struct rte_flow *flow;
2616 struct rte_flow_error error;
2619 if (!priv->reta_idx_n || !priv->rxqs_n) {
2622 for (i = 0; i != priv->reta_idx_n; ++i)
2623 queue[i] = (*priv->reta_idx)[i];
2624 flow = flow_list_create(dev, &priv->ctrl_flows,
2625 &attr, items, actions, &error);
2632 * Enable a flow control configured from the control plane.
2635 * Pointer to Ethernet device.
2637 * An Ethernet flow spec to apply.
2639 * An Ethernet flow mask to apply.
2642 * 0 on success, a negative errno value otherwise and rte_errno is set.
2645 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2646 struct rte_flow_item_eth *eth_spec,
2647 struct rte_flow_item_eth *eth_mask)
2649 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2655 * @see rte_flow_destroy()
2659 mlx5_flow_destroy(struct rte_eth_dev *dev,
2660 struct rte_flow *flow,
2661 struct rte_flow_error *error __rte_unused)
2663 struct mlx5_priv *priv = dev->data->dev_private;
2665 flow_list_destroy(dev, &priv->flows, flow);
2670 * Destroy all flows.
2672 * @see rte_flow_flush()
2676 mlx5_flow_flush(struct rte_eth_dev *dev,
2677 struct rte_flow_error *error __rte_unused)
2679 struct mlx5_priv *priv = dev->data->dev_private;
2681 mlx5_flow_list_flush(dev, &priv->flows);
2688 * @see rte_flow_isolate()
2692 mlx5_flow_isolate(struct rte_eth_dev *dev,
2694 struct rte_flow_error *error)
2696 struct mlx5_priv *priv = dev->data->dev_private;
2698 if (dev->data->dev_started) {
2699 rte_flow_error_set(error, EBUSY,
2700 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2702 "port must be stopped first");
2705 priv->isolated = !!enable;
2707 dev->dev_ops = &mlx5_dev_ops_isolate;
2709 dev->dev_ops = &mlx5_dev_ops;
2716 * @see rte_flow_query()
2720 flow_drv_query(struct rte_eth_dev *dev,
2721 struct rte_flow *flow,
2722 const struct rte_flow_action *actions,
2724 struct rte_flow_error *error)
2726 const struct mlx5_flow_driver_ops *fops;
2727 enum mlx5_flow_drv_type ftype = flow->drv_type;
2729 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2730 fops = flow_get_drv_ops(ftype);
2732 return fops->query(dev, flow, actions, data, error);
2738 * @see rte_flow_query()
2742 mlx5_flow_query(struct rte_eth_dev *dev,
2743 struct rte_flow *flow,
2744 const struct rte_flow_action *actions,
2746 struct rte_flow_error *error)
2750 ret = flow_drv_query(dev, flow, actions, data, error);
2757 * Convert a flow director filter to a generic flow.
2760 * Pointer to Ethernet device.
2761 * @param fdir_filter
2762 * Flow director filter to add.
2764 * Generic flow parameters structure.
2767 * 0 on success, a negative errno value otherwise and rte_errno is set.
2770 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2771 const struct rte_eth_fdir_filter *fdir_filter,
2772 struct mlx5_fdir *attributes)
2774 struct mlx5_priv *priv = dev->data->dev_private;
2775 const struct rte_eth_fdir_input *input = &fdir_filter->input;
2776 const struct rte_eth_fdir_masks *mask =
2777 &dev->data->dev_conf.fdir_conf.mask;
2779 /* Validate queue number. */
2780 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2781 DRV_LOG(ERR, "port %u invalid queue number %d",
2782 dev->data->port_id, fdir_filter->action.rx_queue);
2786 attributes->attr.ingress = 1;
2787 attributes->items[0] = (struct rte_flow_item) {
2788 .type = RTE_FLOW_ITEM_TYPE_ETH,
2789 .spec = &attributes->l2,
2790 .mask = &attributes->l2_mask,
2792 switch (fdir_filter->action.behavior) {
2793 case RTE_ETH_FDIR_ACCEPT:
2794 attributes->actions[0] = (struct rte_flow_action){
2795 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2796 .conf = &attributes->queue,
2799 case RTE_ETH_FDIR_REJECT:
2800 attributes->actions[0] = (struct rte_flow_action){
2801 .type = RTE_FLOW_ACTION_TYPE_DROP,
2805 DRV_LOG(ERR, "port %u invalid behavior %d",
2807 fdir_filter->action.behavior);
2808 rte_errno = ENOTSUP;
2811 attributes->queue.index = fdir_filter->action.rx_queue;
2813 switch (fdir_filter->input.flow_type) {
2814 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2815 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2816 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2817 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2818 .src_addr = input->flow.ip4_flow.src_ip,
2819 .dst_addr = input->flow.ip4_flow.dst_ip,
2820 .time_to_live = input->flow.ip4_flow.ttl,
2821 .type_of_service = input->flow.ip4_flow.tos,
2823 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2824 .src_addr = mask->ipv4_mask.src_ip,
2825 .dst_addr = mask->ipv4_mask.dst_ip,
2826 .time_to_live = mask->ipv4_mask.ttl,
2827 .type_of_service = mask->ipv4_mask.tos,
2828 .next_proto_id = mask->ipv4_mask.proto,
2830 attributes->items[1] = (struct rte_flow_item){
2831 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2832 .spec = &attributes->l3,
2833 .mask = &attributes->l3_mask,
2836 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2837 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2838 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2839 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2840 .hop_limits = input->flow.ipv6_flow.hop_limits,
2841 .proto = input->flow.ipv6_flow.proto,
2844 memcpy(attributes->l3.ipv6.hdr.src_addr,
2845 input->flow.ipv6_flow.src_ip,
2846 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2847 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2848 input->flow.ipv6_flow.dst_ip,
2849 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2850 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2851 mask->ipv6_mask.src_ip,
2852 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2853 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2854 mask->ipv6_mask.dst_ip,
2855 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2856 attributes->items[1] = (struct rte_flow_item){
2857 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2858 .spec = &attributes->l3,
2859 .mask = &attributes->l3_mask,
2863 DRV_LOG(ERR, "port %u invalid flow type%d",
2864 dev->data->port_id, fdir_filter->input.flow_type);
2865 rte_errno = ENOTSUP;
2869 switch (fdir_filter->input.flow_type) {
2870 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2871 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2872 .src_port = input->flow.udp4_flow.src_port,
2873 .dst_port = input->flow.udp4_flow.dst_port,
2875 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2876 .src_port = mask->src_port_mask,
2877 .dst_port = mask->dst_port_mask,
2879 attributes->items[2] = (struct rte_flow_item){
2880 .type = RTE_FLOW_ITEM_TYPE_UDP,
2881 .spec = &attributes->l4,
2882 .mask = &attributes->l4_mask,
2885 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2886 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2887 .src_port = input->flow.tcp4_flow.src_port,
2888 .dst_port = input->flow.tcp4_flow.dst_port,
2890 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2891 .src_port = mask->src_port_mask,
2892 .dst_port = mask->dst_port_mask,
2894 attributes->items[2] = (struct rte_flow_item){
2895 .type = RTE_FLOW_ITEM_TYPE_TCP,
2896 .spec = &attributes->l4,
2897 .mask = &attributes->l4_mask,
2900 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2901 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2902 .src_port = input->flow.udp6_flow.src_port,
2903 .dst_port = input->flow.udp6_flow.dst_port,
2905 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2906 .src_port = mask->src_port_mask,
2907 .dst_port = mask->dst_port_mask,
2909 attributes->items[2] = (struct rte_flow_item){
2910 .type = RTE_FLOW_ITEM_TYPE_UDP,
2911 .spec = &attributes->l4,
2912 .mask = &attributes->l4_mask,
2915 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2916 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2917 .src_port = input->flow.tcp6_flow.src_port,
2918 .dst_port = input->flow.tcp6_flow.dst_port,
2920 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2921 .src_port = mask->src_port_mask,
2922 .dst_port = mask->dst_port_mask,
2924 attributes->items[2] = (struct rte_flow_item){
2925 .type = RTE_FLOW_ITEM_TYPE_TCP,
2926 .spec = &attributes->l4,
2927 .mask = &attributes->l4_mask,
2930 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2931 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2934 DRV_LOG(ERR, "port %u invalid flow type%d",
2935 dev->data->port_id, fdir_filter->input.flow_type);
2936 rte_errno = ENOTSUP;
2942 #define FLOW_FDIR_CMP(f1, f2, fld) \
2943 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
2946 * Compare two FDIR flows. If items and actions are identical, the two flows are
2950 * Pointer to Ethernet device.
2952 * FDIR flow to compare.
2954 * FDIR flow to compare.
2957 * Zero on match, 1 otherwise.
2960 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
2962 if (FLOW_FDIR_CMP(f1, f2, attr) ||
2963 FLOW_FDIR_CMP(f1, f2, l2) ||
2964 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
2965 FLOW_FDIR_CMP(f1, f2, l3) ||
2966 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
2967 FLOW_FDIR_CMP(f1, f2, l4) ||
2968 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
2969 FLOW_FDIR_CMP(f1, f2, actions[0].type))
2971 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
2972 FLOW_FDIR_CMP(f1, f2, queue))
2978 * Search device flow list to find out a matched FDIR flow.
2981 * Pointer to Ethernet device.
2983 * FDIR flow to lookup.
2986 * Pointer of flow if found, NULL otherwise.
2988 static struct rte_flow *
2989 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
2991 struct mlx5_priv *priv = dev->data->dev_private;
2992 struct rte_flow *flow = NULL;
2995 TAILQ_FOREACH(flow, &priv->flows, next) {
2996 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
2997 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
2998 dev->data->port_id, (void *)flow);
3006 * Add new flow director filter and store it in list.
3009 * Pointer to Ethernet device.
3010 * @param fdir_filter
3011 * Flow director filter to add.
3014 * 0 on success, a negative errno value otherwise and rte_errno is set.
3017 flow_fdir_filter_add(struct rte_eth_dev *dev,
3018 const struct rte_eth_fdir_filter *fdir_filter)
3020 struct mlx5_priv *priv = dev->data->dev_private;
3021 struct mlx5_fdir *fdir_flow;
3022 struct rte_flow *flow;
3025 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3030 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3033 flow = flow_fdir_filter_lookup(dev, fdir_flow);
3038 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3039 fdir_flow->items, fdir_flow->actions, NULL);
3042 assert(!flow->fdir);
3043 flow->fdir = fdir_flow;
3044 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3045 dev->data->port_id, (void *)flow);
3048 rte_free(fdir_flow);
3053 * Delete specific filter.
3056 * Pointer to Ethernet device.
3057 * @param fdir_filter
3058 * Filter to be deleted.
3061 * 0 on success, a negative errno value otherwise and rte_errno is set.
3064 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3065 const struct rte_eth_fdir_filter *fdir_filter)
3067 struct mlx5_priv *priv = dev->data->dev_private;
3068 struct rte_flow *flow;
3069 struct mlx5_fdir fdir_flow = {
3074 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3077 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3082 flow_list_destroy(dev, &priv->flows, flow);
3083 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3084 dev->data->port_id, (void *)flow);
3089 * Update queue for specific filter.
3092 * Pointer to Ethernet device.
3093 * @param fdir_filter
3094 * Filter to be updated.
3097 * 0 on success, a negative errno value otherwise and rte_errno is set.
3100 flow_fdir_filter_update(struct rte_eth_dev *dev,
3101 const struct rte_eth_fdir_filter *fdir_filter)
3105 ret = flow_fdir_filter_delete(dev, fdir_filter);
3108 return flow_fdir_filter_add(dev, fdir_filter);
3112 * Flush all filters.
3115 * Pointer to Ethernet device.
3118 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3120 struct mlx5_priv *priv = dev->data->dev_private;
3122 mlx5_flow_list_flush(dev, &priv->flows);
3126 * Get flow director information.
3129 * Pointer to Ethernet device.
3130 * @param[out] fdir_info
3131 * Resulting flow director information.
3134 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3136 struct rte_eth_fdir_masks *mask =
3137 &dev->data->dev_conf.fdir_conf.mask;
3139 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3140 fdir_info->guarant_spc = 0;
3141 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3142 fdir_info->max_flexpayload = 0;
3143 fdir_info->flow_types_mask[0] = 0;
3144 fdir_info->flex_payload_unit = 0;
3145 fdir_info->max_flex_payload_segment_num = 0;
3146 fdir_info->flex_payload_limit = 0;
3147 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3151 * Deal with flow director operations.
3154 * Pointer to Ethernet device.
3156 * Operation to perform.
3158 * Pointer to operation-specific structure.
3161 * 0 on success, a negative errno value otherwise and rte_errno is set.
3164 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3167 enum rte_fdir_mode fdir_mode =
3168 dev->data->dev_conf.fdir_conf.mode;
3170 if (filter_op == RTE_ETH_FILTER_NOP)
3172 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3173 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3174 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3175 dev->data->port_id, fdir_mode);
3179 switch (filter_op) {
3180 case RTE_ETH_FILTER_ADD:
3181 return flow_fdir_filter_add(dev, arg);
3182 case RTE_ETH_FILTER_UPDATE:
3183 return flow_fdir_filter_update(dev, arg);
3184 case RTE_ETH_FILTER_DELETE:
3185 return flow_fdir_filter_delete(dev, arg);
3186 case RTE_ETH_FILTER_FLUSH:
3187 flow_fdir_filter_flush(dev);
3189 case RTE_ETH_FILTER_INFO:
3190 flow_fdir_info_get(dev, arg);
3193 DRV_LOG(DEBUG, "port %u unknown operation %u",
3194 dev->data->port_id, filter_op);
3202 * Manage filter operations.
3205 * Pointer to Ethernet device structure.
3206 * @param filter_type
3209 * Operation to perform.
3211 * Pointer to operation-specific structure.
3214 * 0 on success, a negative errno value otherwise and rte_errno is set.
3217 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3218 enum rte_filter_type filter_type,
3219 enum rte_filter_op filter_op,
3222 switch (filter_type) {
3223 case RTE_ETH_FILTER_GENERIC:
3224 if (filter_op != RTE_ETH_FILTER_GET) {
3228 *(const void **)arg = &mlx5_flow_ops;
3230 case RTE_ETH_FILTER_FDIR:
3231 return flow_fdir_ctrl_func(dev, filter_op, arg);
3233 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3234 dev->data->port_id, filter_type);
3235 rte_errno = ENOTSUP;
3241 #define MLX5_POOL_QUERY_FREQ_US 1000000
3244 * Set the periodic procedure for triggering asynchronous batch queries for all
3245 * the counter pools.
3248 * Pointer to mlx5_ibv_shared object.
3251 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3253 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3254 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3257 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3258 pools_n += rte_atomic16_read(&cont->n_valid);
3259 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3260 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3261 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3262 sh->cmng.query_thread_on = 0;
3263 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3265 sh->cmng.query_thread_on = 1;
3270 * The periodic procedure for triggering asynchronous batch queries for all the
3271 * counter pools. This function is probably called by the host thread.
3274 * The parameter for the alarm process.
3277 mlx5_flow_query_alarm(void *arg)
3279 struct mlx5_ibv_shared *sh = arg;
3280 struct mlx5_devx_obj *dcs;
3283 uint8_t batch = sh->cmng.batch;
3284 uint16_t pool_index = sh->cmng.pool_index;
3285 struct mlx5_pools_container *cont;
3286 struct mlx5_pools_container *mcont;
3287 struct mlx5_flow_counter_pool *pool;
3289 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3292 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3293 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3294 /* Check if resize was done and need to flip a container. */
3295 if (cont != mcont) {
3297 /* Clean the old container. */
3298 rte_free(cont->pools);
3299 memset(cont, 0, sizeof(*cont));
3302 /* Flip the host container. */
3303 sh->cmng.mhi[batch] ^= (uint8_t)2;
3307 /* 2 empty containers case is unexpected. */
3308 if (unlikely(batch != sh->cmng.batch))
3312 goto next_container;
3314 pool = cont->pools[pool_index];
3316 /* There is a pool query in progress. */
3319 LIST_FIRST(&sh->cmng.free_stat_raws);
3321 /* No free counter statistics raw memory. */
3323 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3325 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3326 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3328 pool->raw_hw->mem_mng->dm->id,
3330 (pool->raw_hw->data + offset),
3332 (uint64_t)(uintptr_t)pool);
3334 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3335 " %d\n", pool->min_dcs->id);
3336 pool->raw_hw = NULL;
3339 pool->raw_hw->min_dcs_id = dcs->id;
3340 LIST_REMOVE(pool->raw_hw, next);
3341 sh->cmng.pending_queries++;
3343 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3348 sh->cmng.batch = batch;
3349 sh->cmng.pool_index = pool_index;
3350 mlx5_set_query_alarm(sh);
3354 * Handler for the HW respond about ready values from an asynchronous batch
3355 * query. This function is probably called by the host thread.
3358 * The pointer to the shared IB device context.
3359 * @param[in] async_id
3360 * The Devx async ID.
3362 * The status of the completion.
3365 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3366 uint64_t async_id, int status)
3368 struct mlx5_flow_counter_pool *pool =
3369 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3370 struct mlx5_counter_stats_raw *raw_to_free;
3372 if (unlikely(status)) {
3373 raw_to_free = pool->raw_hw;
3375 raw_to_free = pool->raw;
3376 rte_spinlock_lock(&pool->sl);
3377 pool->raw = pool->raw_hw;
3378 rte_spinlock_unlock(&pool->sl);
3379 rte_atomic64_add(&pool->query_gen, 1);
3380 /* Be sure the new raw counters data is updated in memory. */
3383 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3384 pool->raw_hw = NULL;
3385 sh->cmng.pending_queries--;