1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_common.h>
23 #include <rte_ether.h>
24 #include <rte_ethdev_driver.h>
26 #include <rte_flow_driver.h>
27 #include <rte_malloc.h>
31 #include "mlx5_defs.h"
32 #include "mlx5_flow.h"
33 #include "mlx5_glue.h"
35 #include "mlx5_rxtx.h"
37 /* Dev ops structure defined in mlx5.c */
38 extern const struct eth_dev_ops mlx5_dev_ops;
39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
41 /** Device flow drivers. */
42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
60 MLX5_EXPANSION_ROOT_OUTER,
61 MLX5_EXPANSION_ROOT_ETH_VLAN,
62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
63 MLX5_EXPANSION_OUTER_ETH,
64 MLX5_EXPANSION_OUTER_ETH_VLAN,
65 MLX5_EXPANSION_OUTER_VLAN,
66 MLX5_EXPANSION_OUTER_IPV4,
67 MLX5_EXPANSION_OUTER_IPV4_UDP,
68 MLX5_EXPANSION_OUTER_IPV4_TCP,
69 MLX5_EXPANSION_OUTER_IPV6,
70 MLX5_EXPANSION_OUTER_IPV6_UDP,
71 MLX5_EXPANSION_OUTER_IPV6_TCP,
73 MLX5_EXPANSION_VXLAN_GPE,
77 MLX5_EXPANSION_ETH_VLAN,
80 MLX5_EXPANSION_IPV4_UDP,
81 MLX5_EXPANSION_IPV4_TCP,
83 MLX5_EXPANSION_IPV6_UDP,
84 MLX5_EXPANSION_IPV6_TCP,
87 /** Supported expansion of items. */
88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
89 [MLX5_EXPANSION_ROOT] = {
90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
93 .type = RTE_FLOW_ITEM_TYPE_END,
95 [MLX5_EXPANSION_ROOT_OUTER] = {
96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
97 MLX5_EXPANSION_OUTER_IPV4,
98 MLX5_EXPANSION_OUTER_IPV6),
99 .type = RTE_FLOW_ITEM_TYPE_END,
101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_OUTER_ETH] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
111 MLX5_EXPANSION_OUTER_IPV6,
112 MLX5_EXPANSION_MPLS),
113 .type = RTE_FLOW_ITEM_TYPE_ETH,
116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
118 .type = RTE_FLOW_ITEM_TYPE_ETH,
121 [MLX5_EXPANSION_OUTER_VLAN] = {
122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
123 MLX5_EXPANSION_OUTER_IPV6),
124 .type = RTE_FLOW_ITEM_TYPE_VLAN,
126 [MLX5_EXPANSION_OUTER_IPV4] = {
127 .next = RTE_FLOW_EXPAND_RSS_NEXT
128 (MLX5_EXPANSION_OUTER_IPV4_UDP,
129 MLX5_EXPANSION_OUTER_IPV4_TCP,
132 MLX5_EXPANSION_IPV6),
133 .type = RTE_FLOW_ITEM_TYPE_IPV4,
134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
135 ETH_RSS_NONFRAG_IPV4_OTHER,
137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
139 MLX5_EXPANSION_VXLAN_GPE),
140 .type = RTE_FLOW_ITEM_TYPE_UDP,
141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
144 .type = RTE_FLOW_ITEM_TYPE_TCP,
145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
147 [MLX5_EXPANSION_OUTER_IPV6] = {
148 .next = RTE_FLOW_EXPAND_RSS_NEXT
149 (MLX5_EXPANSION_OUTER_IPV6_UDP,
150 MLX5_EXPANSION_OUTER_IPV6_TCP,
152 MLX5_EXPANSION_IPV6),
153 .type = RTE_FLOW_ITEM_TYPE_IPV6,
154 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
155 ETH_RSS_NONFRAG_IPV6_OTHER,
157 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
158 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
159 MLX5_EXPANSION_VXLAN_GPE),
160 .type = RTE_FLOW_ITEM_TYPE_UDP,
161 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
163 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
164 .type = RTE_FLOW_ITEM_TYPE_TCP,
165 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
167 [MLX5_EXPANSION_VXLAN] = {
168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
169 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
171 [MLX5_EXPANSION_VXLAN_GPE] = {
172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
174 MLX5_EXPANSION_IPV6),
175 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
177 [MLX5_EXPANSION_GRE] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
179 .type = RTE_FLOW_ITEM_TYPE_GRE,
181 [MLX5_EXPANSION_MPLS] = {
182 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
183 MLX5_EXPANSION_IPV6),
184 .type = RTE_FLOW_ITEM_TYPE_MPLS,
186 [MLX5_EXPANSION_ETH] = {
187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
188 MLX5_EXPANSION_IPV6),
189 .type = RTE_FLOW_ITEM_TYPE_ETH,
191 [MLX5_EXPANSION_ETH_VLAN] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
193 .type = RTE_FLOW_ITEM_TYPE_ETH,
195 [MLX5_EXPANSION_VLAN] = {
196 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
197 MLX5_EXPANSION_IPV6),
198 .type = RTE_FLOW_ITEM_TYPE_VLAN,
200 [MLX5_EXPANSION_IPV4] = {
201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
202 MLX5_EXPANSION_IPV4_TCP),
203 .type = RTE_FLOW_ITEM_TYPE_IPV4,
204 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
205 ETH_RSS_NONFRAG_IPV4_OTHER,
207 [MLX5_EXPANSION_IPV4_UDP] = {
208 .type = RTE_FLOW_ITEM_TYPE_UDP,
209 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
211 [MLX5_EXPANSION_IPV4_TCP] = {
212 .type = RTE_FLOW_ITEM_TYPE_TCP,
213 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
215 [MLX5_EXPANSION_IPV6] = {
216 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
217 MLX5_EXPANSION_IPV6_TCP),
218 .type = RTE_FLOW_ITEM_TYPE_IPV6,
219 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
220 ETH_RSS_NONFRAG_IPV6_OTHER,
222 [MLX5_EXPANSION_IPV6_UDP] = {
223 .type = RTE_FLOW_ITEM_TYPE_UDP,
224 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
226 [MLX5_EXPANSION_IPV6_TCP] = {
227 .type = RTE_FLOW_ITEM_TYPE_TCP,
228 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
232 static const struct rte_flow_ops mlx5_flow_ops = {
233 .validate = mlx5_flow_validate,
234 .create = mlx5_flow_create,
235 .destroy = mlx5_flow_destroy,
236 .flush = mlx5_flow_flush,
237 .isolate = mlx5_flow_isolate,
238 .query = mlx5_flow_query,
241 /* Convert FDIR request to Generic flow. */
243 struct rte_flow_attr attr;
244 struct rte_flow_item items[4];
245 struct rte_flow_item_eth l2;
246 struct rte_flow_item_eth l2_mask;
248 struct rte_flow_item_ipv4 ipv4;
249 struct rte_flow_item_ipv6 ipv6;
252 struct rte_flow_item_ipv4 ipv4;
253 struct rte_flow_item_ipv6 ipv6;
256 struct rte_flow_item_udp udp;
257 struct rte_flow_item_tcp tcp;
260 struct rte_flow_item_udp udp;
261 struct rte_flow_item_tcp tcp;
263 struct rte_flow_action actions[2];
264 struct rte_flow_action_queue queue;
267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
269 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
274 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
275 { 9, 10, 11 }, { 12, 13, 14 },
278 /* Tunnel information. */
279 struct mlx5_flow_tunnel_info {
280 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
281 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
286 .tunnel = MLX5_FLOW_LAYER_VXLAN,
287 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
290 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
291 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
294 .tunnel = MLX5_FLOW_LAYER_GRE,
295 .ptype = RTE_PTYPE_TUNNEL_GRE,
298 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
299 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
302 .tunnel = MLX5_FLOW_LAYER_MPLS,
303 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
306 .tunnel = MLX5_FLOW_LAYER_NVGRE,
307 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
310 .tunnel = MLX5_FLOW_LAYER_IPIP,
311 .ptype = RTE_PTYPE_TUNNEL_IP,
314 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
315 .ptype = RTE_PTYPE_TUNNEL_IP,
320 * Discover the maximum number of priority available.
323 * Pointer to the Ethernet device structure.
326 * number of supported flow priority on success, a negative errno
327 * value otherwise and rte_errno is set.
330 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
332 struct mlx5_priv *priv = dev->data->dev_private;
334 struct ibv_flow_attr attr;
335 struct ibv_flow_spec_eth eth;
336 struct ibv_flow_spec_action_drop drop;
340 .port = (uint8_t)priv->ibv_port,
343 .type = IBV_FLOW_SPEC_ETH,
344 .size = sizeof(struct ibv_flow_spec_eth),
347 .size = sizeof(struct ibv_flow_spec_action_drop),
348 .type = IBV_FLOW_SPEC_ACTION_DROP,
351 struct ibv_flow *flow;
352 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
353 uint16_t vprio[] = { 8, 16 };
361 for (i = 0; i != RTE_DIM(vprio); i++) {
362 flow_attr.attr.priority = vprio[i] - 1;
363 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
366 claim_zero(mlx5_glue->destroy_flow(flow));
369 mlx5_hrxq_drop_release(dev);
372 priority = RTE_DIM(priority_map_3);
375 priority = RTE_DIM(priority_map_5);
380 "port %u verbs maximum priority: %d expected 8/16",
381 dev->data->port_id, priority);
384 DRV_LOG(INFO, "port %u flow maximum priority: %d",
385 dev->data->port_id, priority);
390 * Adjust flow priority based on the highest layer and the request priority.
393 * Pointer to the Ethernet device structure.
394 * @param[in] priority
395 * The rule base priority.
396 * @param[in] subpriority
397 * The priority based on the items.
402 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
403 uint32_t subpriority)
406 struct mlx5_priv *priv = dev->data->dev_private;
408 switch (priv->config.flow_prio) {
409 case RTE_DIM(priority_map_3):
410 res = priority_map_3[priority][subpriority];
412 case RTE_DIM(priority_map_5):
413 res = priority_map_5[priority][subpriority];
420 * Verify the @p item specifications (spec, last, mask) are compatible with the
424 * Item specification.
426 * @p item->mask or flow default bit-masks.
427 * @param[in] nic_mask
428 * Bit-masks covering supported fields by the NIC to compare with user mask.
430 * Bit-masks size in bytes.
432 * Pointer to error structure.
435 * 0 on success, a negative errno value otherwise and rte_errno is set.
438 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
440 const uint8_t *nic_mask,
442 struct rte_flow_error *error)
447 for (i = 0; i < size; ++i)
448 if ((nic_mask[i] | mask[i]) != nic_mask[i])
449 return rte_flow_error_set(error, ENOTSUP,
450 RTE_FLOW_ERROR_TYPE_ITEM,
452 "mask enables non supported"
454 if (!item->spec && (item->mask || item->last))
455 return rte_flow_error_set(error, EINVAL,
456 RTE_FLOW_ERROR_TYPE_ITEM, item,
457 "mask/last without a spec is not"
459 if (item->spec && item->last) {
465 for (i = 0; i < size; ++i) {
466 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
467 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
469 ret = memcmp(spec, last, size);
471 return rte_flow_error_set(error, EINVAL,
472 RTE_FLOW_ERROR_TYPE_ITEM,
474 "range is not valid");
480 * Adjust the hash fields according to the @p flow information.
482 * @param[in] dev_flow.
483 * Pointer to the mlx5_flow.
485 * 1 when the hash field is for a tunnel item.
486 * @param[in] layer_types
488 * @param[in] hash_fields
492 * The hash fields that should be used.
495 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
496 int tunnel __rte_unused, uint64_t layer_types,
497 uint64_t hash_fields)
499 struct rte_flow *flow = dev_flow->flow;
500 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
501 int rss_request_inner = flow->rss.level >= 2;
503 /* Check RSS hash level for tunnel. */
504 if (tunnel && rss_request_inner)
505 hash_fields |= IBV_RX_HASH_INNER;
506 else if (tunnel || rss_request_inner)
509 /* Check if requested layer matches RSS hash fields. */
510 if (!(flow->rss.types & layer_types))
516 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
517 * if several tunnel rules are used on this queue, the tunnel ptype will be
521 * Rx queue to update.
524 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
527 uint32_t tunnel_ptype = 0;
529 /* Look up for the ptype to use. */
530 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
531 if (!rxq_ctrl->flow_tunnels_n[i])
534 tunnel_ptype = tunnels_info[i].ptype;
540 rxq_ctrl->rxq.tunnel = tunnel_ptype;
544 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
548 * Pointer to the Ethernet device structure.
549 * @param[in] dev_flow
550 * Pointer to device flow structure.
553 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
555 struct mlx5_priv *priv = dev->data->dev_private;
556 struct rte_flow *flow = dev_flow->flow;
557 const int mark = !!(flow->actions &
558 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
559 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
562 for (i = 0; i != flow->rss.queue_num; ++i) {
563 int idx = (*flow->queue)[i];
564 struct mlx5_rxq_ctrl *rxq_ctrl =
565 container_of((*priv->rxqs)[idx],
566 struct mlx5_rxq_ctrl, rxq);
569 rxq_ctrl->rxq.mark = 1;
570 rxq_ctrl->flow_mark_n++;
575 /* Increase the counter matching the flow. */
576 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
577 if ((tunnels_info[j].tunnel &
579 tunnels_info[j].tunnel) {
580 rxq_ctrl->flow_tunnels_n[j]++;
584 flow_rxq_tunnel_ptype_update(rxq_ctrl);
590 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
593 * Pointer to the Ethernet device structure.
595 * Pointer to flow structure.
598 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
600 struct mlx5_flow *dev_flow;
602 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
603 flow_drv_rxq_flags_set(dev, dev_flow);
607 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
608 * device flow if no other flow uses it with the same kind of request.
611 * Pointer to Ethernet device.
612 * @param[in] dev_flow
613 * Pointer to the device flow.
616 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
618 struct mlx5_priv *priv = dev->data->dev_private;
619 struct rte_flow *flow = dev_flow->flow;
620 const int mark = !!(flow->actions &
621 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
622 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
625 assert(dev->data->dev_started);
626 for (i = 0; i != flow->rss.queue_num; ++i) {
627 int idx = (*flow->queue)[i];
628 struct mlx5_rxq_ctrl *rxq_ctrl =
629 container_of((*priv->rxqs)[idx],
630 struct mlx5_rxq_ctrl, rxq);
633 rxq_ctrl->flow_mark_n--;
634 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
639 /* Decrease the counter matching the flow. */
640 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
641 if ((tunnels_info[j].tunnel &
643 tunnels_info[j].tunnel) {
644 rxq_ctrl->flow_tunnels_n[j]--;
648 flow_rxq_tunnel_ptype_update(rxq_ctrl);
654 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
655 * @p flow if no other flow uses it with the same kind of request.
658 * Pointer to Ethernet device.
660 * Pointer to the flow.
663 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
665 struct mlx5_flow *dev_flow;
667 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
668 flow_drv_rxq_flags_trim(dev, dev_flow);
672 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
675 * Pointer to Ethernet device.
678 flow_rxq_flags_clear(struct rte_eth_dev *dev)
680 struct mlx5_priv *priv = dev->data->dev_private;
683 for (i = 0; i != priv->rxqs_n; ++i) {
684 struct mlx5_rxq_ctrl *rxq_ctrl;
687 if (!(*priv->rxqs)[i])
689 rxq_ctrl = container_of((*priv->rxqs)[i],
690 struct mlx5_rxq_ctrl, rxq);
691 rxq_ctrl->flow_mark_n = 0;
692 rxq_ctrl->rxq.mark = 0;
693 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
694 rxq_ctrl->flow_tunnels_n[j] = 0;
695 rxq_ctrl->rxq.tunnel = 0;
700 * return a pointer to the desired action in the list of actions.
703 * The list of actions to search the action in.
705 * The action to find.
708 * Pointer to the action in the list, if found. NULL otherwise.
710 const struct rte_flow_action *
711 mlx5_flow_find_action(const struct rte_flow_action *actions,
712 enum rte_flow_action_type action)
716 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
717 if (actions->type == action)
723 * Validate the flag action.
725 * @param[in] action_flags
726 * Bit-fields that holds the actions detected until now.
728 * Attributes of flow that includes this action.
730 * Pointer to error structure.
733 * 0 on success, a negative errno value otherwise and rte_errno is set.
736 mlx5_flow_validate_action_flag(uint64_t action_flags,
737 const struct rte_flow_attr *attr,
738 struct rte_flow_error *error)
741 if (action_flags & MLX5_FLOW_ACTION_DROP)
742 return rte_flow_error_set(error, EINVAL,
743 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
744 "can't drop and flag in same flow");
745 if (action_flags & MLX5_FLOW_ACTION_MARK)
746 return rte_flow_error_set(error, EINVAL,
747 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
748 "can't mark and flag in same flow");
749 if (action_flags & MLX5_FLOW_ACTION_FLAG)
750 return rte_flow_error_set(error, EINVAL,
751 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
753 " actions in same flow");
755 return rte_flow_error_set(error, ENOTSUP,
756 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
757 "flag action not supported for "
763 * Validate the mark action.
766 * Pointer to the queue action.
767 * @param[in] action_flags
768 * Bit-fields that holds the actions detected until now.
770 * Attributes of flow that includes this action.
772 * Pointer to error structure.
775 * 0 on success, a negative errno value otherwise and rte_errno is set.
778 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
779 uint64_t action_flags,
780 const struct rte_flow_attr *attr,
781 struct rte_flow_error *error)
783 const struct rte_flow_action_mark *mark = action->conf;
786 return rte_flow_error_set(error, EINVAL,
787 RTE_FLOW_ERROR_TYPE_ACTION,
789 "configuration cannot be null");
790 if (mark->id >= MLX5_FLOW_MARK_MAX)
791 return rte_flow_error_set(error, EINVAL,
792 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
794 "mark id must in 0 <= id < "
795 RTE_STR(MLX5_FLOW_MARK_MAX));
796 if (action_flags & MLX5_FLOW_ACTION_DROP)
797 return rte_flow_error_set(error, EINVAL,
798 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
799 "can't drop and mark in same flow");
800 if (action_flags & MLX5_FLOW_ACTION_FLAG)
801 return rte_flow_error_set(error, EINVAL,
802 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
803 "can't flag and mark in same flow");
804 if (action_flags & MLX5_FLOW_ACTION_MARK)
805 return rte_flow_error_set(error, EINVAL,
806 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
807 "can't have 2 mark actions in same"
810 return rte_flow_error_set(error, ENOTSUP,
811 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
812 "mark action not supported for "
818 * Validate the drop action.
820 * @param[in] action_flags
821 * Bit-fields that holds the actions detected until now.
823 * Attributes of flow that includes this action.
825 * Pointer to error structure.
828 * 0 on success, a negative errno value otherwise and rte_errno is set.
831 mlx5_flow_validate_action_drop(uint64_t action_flags,
832 const struct rte_flow_attr *attr,
833 struct rte_flow_error *error)
835 if (action_flags & MLX5_FLOW_ACTION_FLAG)
836 return rte_flow_error_set(error, EINVAL,
837 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
838 "can't drop and flag in same flow");
839 if (action_flags & MLX5_FLOW_ACTION_MARK)
840 return rte_flow_error_set(error, EINVAL,
841 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
842 "can't drop and mark in same flow");
843 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
844 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
845 return rte_flow_error_set(error, EINVAL,
846 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
847 "can't have 2 fate actions in"
850 return rte_flow_error_set(error, ENOTSUP,
851 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
852 "drop action not supported for "
858 * Validate the queue action.
861 * Pointer to the queue action.
862 * @param[in] action_flags
863 * Bit-fields that holds the actions detected until now.
865 * Pointer to the Ethernet device structure.
867 * Attributes of flow that includes this action.
869 * Pointer to error structure.
872 * 0 on success, a negative errno value otherwise and rte_errno is set.
875 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
876 uint64_t action_flags,
877 struct rte_eth_dev *dev,
878 const struct rte_flow_attr *attr,
879 struct rte_flow_error *error)
881 struct mlx5_priv *priv = dev->data->dev_private;
882 const struct rte_flow_action_queue *queue = action->conf;
884 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
885 return rte_flow_error_set(error, EINVAL,
886 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
887 "can't have 2 fate actions in"
890 return rte_flow_error_set(error, EINVAL,
891 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
892 NULL, "No Rx queues configured");
893 if (queue->index >= priv->rxqs_n)
894 return rte_flow_error_set(error, EINVAL,
895 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
897 "queue index out of range");
898 if (!(*priv->rxqs)[queue->index])
899 return rte_flow_error_set(error, EINVAL,
900 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
902 "queue is not configured");
904 return rte_flow_error_set(error, ENOTSUP,
905 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
906 "queue action not supported for "
912 * Validate the rss action.
915 * Pointer to the queue action.
916 * @param[in] action_flags
917 * Bit-fields that holds the actions detected until now.
919 * Pointer to the Ethernet device structure.
921 * Attributes of flow that includes this action.
922 * @param[in] item_flags
923 * Items that were detected.
925 * Pointer to error structure.
928 * 0 on success, a negative errno value otherwise and rte_errno is set.
931 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
932 uint64_t action_flags,
933 struct rte_eth_dev *dev,
934 const struct rte_flow_attr *attr,
936 struct rte_flow_error *error)
938 struct mlx5_priv *priv = dev->data->dev_private;
939 const struct rte_flow_action_rss *rss = action->conf;
940 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
943 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
944 return rte_flow_error_set(error, EINVAL,
945 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
946 "can't have 2 fate actions"
948 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
949 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
950 return rte_flow_error_set(error, ENOTSUP,
951 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
953 "RSS hash function not supported");
954 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
959 return rte_flow_error_set(error, ENOTSUP,
960 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
962 "tunnel RSS is not supported");
963 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
964 if (rss->key_len == 0 && rss->key != NULL)
965 return rte_flow_error_set(error, ENOTSUP,
966 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
968 "RSS hash key length 0");
969 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
970 return rte_flow_error_set(error, ENOTSUP,
971 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
973 "RSS hash key too small");
974 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
975 return rte_flow_error_set(error, ENOTSUP,
976 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
978 "RSS hash key too large");
979 if (rss->queue_num > priv->config.ind_table_max_size)
980 return rte_flow_error_set(error, ENOTSUP,
981 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
983 "number of queues too large");
984 if (rss->types & MLX5_RSS_HF_MASK)
985 return rte_flow_error_set(error, ENOTSUP,
986 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
988 "some RSS protocols are not"
991 return rte_flow_error_set(error, EINVAL,
992 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
993 NULL, "No Rx queues configured");
995 return rte_flow_error_set(error, EINVAL,
996 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
997 NULL, "No queues configured");
998 for (i = 0; i != rss->queue_num; ++i) {
999 if (!(*priv->rxqs)[rss->queue[i]])
1000 return rte_flow_error_set
1001 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1002 &rss->queue[i], "queue is not configured");
1005 return rte_flow_error_set(error, ENOTSUP,
1006 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1007 "rss action not supported for "
1009 if (rss->level > 1 && !tunnel)
1010 return rte_flow_error_set(error, EINVAL,
1011 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1012 "inner RSS is not supported for "
1013 "non-tunnel flows");
1018 * Validate the count action.
1021 * Pointer to the Ethernet device structure.
1023 * Attributes of flow that includes this action.
1025 * Pointer to error structure.
1028 * 0 on success, a negative errno value otherwise and rte_errno is set.
1031 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1032 const struct rte_flow_attr *attr,
1033 struct rte_flow_error *error)
1036 return rte_flow_error_set(error, ENOTSUP,
1037 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1038 "count action not supported for "
1044 * Verify the @p attributes will be correctly understood by the NIC and store
1045 * them in the @p flow if everything is correct.
1048 * Pointer to the Ethernet device structure.
1049 * @param[in] attributes
1050 * Pointer to flow attributes
1052 * Pointer to error structure.
1055 * 0 on success, a negative errno value otherwise and rte_errno is set.
1058 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1059 const struct rte_flow_attr *attributes,
1060 struct rte_flow_error *error)
1062 struct mlx5_priv *priv = dev->data->dev_private;
1063 uint32_t priority_max = priv->config.flow_prio - 1;
1065 if (attributes->group)
1066 return rte_flow_error_set(error, ENOTSUP,
1067 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1068 NULL, "groups is not supported");
1069 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1070 attributes->priority >= priority_max)
1071 return rte_flow_error_set(error, ENOTSUP,
1072 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1073 NULL, "priority out of range");
1074 if (attributes->egress)
1075 return rte_flow_error_set(error, ENOTSUP,
1076 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1077 "egress is not supported");
1078 if (attributes->transfer && !priv->config.dv_esw_en)
1079 return rte_flow_error_set(error, ENOTSUP,
1080 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1081 NULL, "transfer is not supported");
1082 if (!attributes->ingress)
1083 return rte_flow_error_set(error, EINVAL,
1084 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1086 "ingress attribute is mandatory");
1091 * Validate ICMP6 item.
1094 * Item specification.
1095 * @param[in] item_flags
1096 * Bit-fields that holds the items detected until now.
1098 * Pointer to error structure.
1101 * 0 on success, a negative errno value otherwise and rte_errno is set.
1104 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1105 uint64_t item_flags,
1106 uint8_t target_protocol,
1107 struct rte_flow_error *error)
1109 const struct rte_flow_item_icmp6 *mask = item->mask;
1110 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1111 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1112 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1113 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1114 MLX5_FLOW_LAYER_OUTER_L4;
1117 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1118 return rte_flow_error_set(error, EINVAL,
1119 RTE_FLOW_ERROR_TYPE_ITEM, item,
1120 "protocol filtering not compatible"
1121 " with ICMP6 layer");
1122 if (!(item_flags & l3m))
1123 return rte_flow_error_set(error, EINVAL,
1124 RTE_FLOW_ERROR_TYPE_ITEM, item,
1125 "IPv6 is mandatory to filter on"
1127 if (item_flags & l4m)
1128 return rte_flow_error_set(error, EINVAL,
1129 RTE_FLOW_ERROR_TYPE_ITEM, item,
1130 "multiple L4 layers not supported");
1132 mask = &rte_flow_item_icmp6_mask;
1133 ret = mlx5_flow_item_acceptable
1134 (item, (const uint8_t *)mask,
1135 (const uint8_t *)&rte_flow_item_icmp6_mask,
1136 sizeof(struct rte_flow_item_icmp6), error);
1143 * Validate ICMP item.
1146 * Item specification.
1147 * @param[in] item_flags
1148 * Bit-fields that holds the items detected until now.
1150 * Pointer to error structure.
1153 * 0 on success, a negative errno value otherwise and rte_errno is set.
1156 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1157 uint64_t item_flags,
1158 uint8_t target_protocol,
1159 struct rte_flow_error *error)
1161 const struct rte_flow_item_icmp *mask = item->mask;
1162 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1163 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1164 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1165 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1166 MLX5_FLOW_LAYER_OUTER_L4;
1169 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1170 return rte_flow_error_set(error, EINVAL,
1171 RTE_FLOW_ERROR_TYPE_ITEM, item,
1172 "protocol filtering not compatible"
1173 " with ICMP layer");
1174 if (!(item_flags & l3m))
1175 return rte_flow_error_set(error, EINVAL,
1176 RTE_FLOW_ERROR_TYPE_ITEM, item,
1177 "IPv4 is mandatory to filter"
1179 if (item_flags & l4m)
1180 return rte_flow_error_set(error, EINVAL,
1181 RTE_FLOW_ERROR_TYPE_ITEM, item,
1182 "multiple L4 layers not supported");
1184 mask = &rte_flow_item_icmp_mask;
1185 ret = mlx5_flow_item_acceptable
1186 (item, (const uint8_t *)mask,
1187 (const uint8_t *)&rte_flow_item_icmp_mask,
1188 sizeof(struct rte_flow_item_icmp), error);
1195 * Validate Ethernet item.
1198 * Item specification.
1199 * @param[in] item_flags
1200 * Bit-fields that holds the items detected until now.
1202 * Pointer to error structure.
1205 * 0 on success, a negative errno value otherwise and rte_errno is set.
1208 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1209 uint64_t item_flags,
1210 struct rte_flow_error *error)
1212 const struct rte_flow_item_eth *mask = item->mask;
1213 const struct rte_flow_item_eth nic_mask = {
1214 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1215 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1216 .type = RTE_BE16(0xffff),
1219 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1220 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1221 MLX5_FLOW_LAYER_OUTER_L2;
1223 if (item_flags & ethm)
1224 return rte_flow_error_set(error, ENOTSUP,
1225 RTE_FLOW_ERROR_TYPE_ITEM, item,
1226 "multiple L2 layers not supported");
1227 if (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3))
1228 return rte_flow_error_set(error, EINVAL,
1229 RTE_FLOW_ERROR_TYPE_ITEM, item,
1230 "inner L2 layer should not "
1231 "follow inner L3 layers");
1233 mask = &rte_flow_item_eth_mask;
1234 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1235 (const uint8_t *)&nic_mask,
1236 sizeof(struct rte_flow_item_eth),
1242 * Validate VLAN item.
1245 * Item specification.
1246 * @param[in] item_flags
1247 * Bit-fields that holds the items detected until now.
1249 * Ethernet device flow is being created on.
1251 * Pointer to error structure.
1254 * 0 on success, a negative errno value otherwise and rte_errno is set.
1257 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1258 uint64_t item_flags,
1259 struct rte_eth_dev *dev,
1260 struct rte_flow_error *error)
1262 const struct rte_flow_item_vlan *spec = item->spec;
1263 const struct rte_flow_item_vlan *mask = item->mask;
1264 const struct rte_flow_item_vlan nic_mask = {
1265 .tci = RTE_BE16(UINT16_MAX),
1266 .inner_type = RTE_BE16(UINT16_MAX),
1268 uint16_t vlan_tag = 0;
1269 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1271 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1272 MLX5_FLOW_LAYER_INNER_L4) :
1273 (MLX5_FLOW_LAYER_OUTER_L3 |
1274 MLX5_FLOW_LAYER_OUTER_L4);
1275 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1276 MLX5_FLOW_LAYER_OUTER_VLAN;
1278 const uint64_t l2m = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1279 MLX5_FLOW_LAYER_OUTER_L2;
1280 if (item_flags & vlanm)
1281 return rte_flow_error_set(error, EINVAL,
1282 RTE_FLOW_ERROR_TYPE_ITEM, item,
1283 "multiple VLAN layers not supported");
1284 else if ((item_flags & l34m) != 0)
1285 return rte_flow_error_set(error, EINVAL,
1286 RTE_FLOW_ERROR_TYPE_ITEM, item,
1287 "L2 layer cannot follow L3/L4 layer");
1288 else if ((item_flags & l2m) == 0)
1289 return rte_flow_error_set(error, EINVAL,
1290 RTE_FLOW_ERROR_TYPE_ITEM, item,
1291 "no L2 layer before VLAN");
1293 mask = &rte_flow_item_vlan_mask;
1294 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1295 (const uint8_t *)&nic_mask,
1296 sizeof(struct rte_flow_item_vlan),
1300 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1301 struct mlx5_priv *priv = dev->data->dev_private;
1303 if (priv->vmwa_context) {
1305 * Non-NULL context means we have a virtual machine
1306 * and SR-IOV enabled, we have to create VLAN interface
1307 * to make hypervisor to setup E-Switch vport
1308 * context correctly. We avoid creating the multiple
1309 * VLAN interfaces, so we cannot support VLAN tag mask.
1311 return rte_flow_error_set(error, EINVAL,
1312 RTE_FLOW_ERROR_TYPE_ITEM,
1314 "VLAN tag mask is not"
1315 " supported in virtual"
1320 vlan_tag = spec->tci;
1321 vlan_tag &= mask->tci;
1324 * From verbs perspective an empty VLAN is equivalent
1325 * to a packet without VLAN layer.
1328 return rte_flow_error_set(error, EINVAL,
1329 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1331 "VLAN cannot be empty");
1336 * Validate IPV4 item.
1339 * Item specification.
1340 * @param[in] item_flags
1341 * Bit-fields that holds the items detected until now.
1342 * @param[in] acc_mask
1343 * Acceptable mask, if NULL default internal default mask
1344 * will be used to check whether item fields are supported.
1346 * Pointer to error structure.
1349 * 0 on success, a negative errno value otherwise and rte_errno is set.
1352 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1353 uint64_t item_flags,
1354 const struct rte_flow_item_ipv4 *acc_mask,
1355 struct rte_flow_error *error)
1357 const struct rte_flow_item_ipv4 *mask = item->mask;
1358 const struct rte_flow_item_ipv4 *spec = item->spec;
1359 const struct rte_flow_item_ipv4 nic_mask = {
1361 .src_addr = RTE_BE32(0xffffffff),
1362 .dst_addr = RTE_BE32(0xffffffff),
1363 .type_of_service = 0xff,
1364 .next_proto_id = 0xff,
1367 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1368 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1369 MLX5_FLOW_LAYER_OUTER_L3;
1370 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1371 MLX5_FLOW_LAYER_OUTER_L4;
1373 uint8_t next_proto = 0xFF;
1375 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1377 next_proto = mask->hdr.next_proto_id &
1378 spec->hdr.next_proto_id;
1379 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1380 return rte_flow_error_set(error, EINVAL,
1381 RTE_FLOW_ERROR_TYPE_ITEM,
1386 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1387 return rte_flow_error_set(error, EINVAL,
1388 RTE_FLOW_ERROR_TYPE_ITEM, item,
1389 "wrong tunnel type - IPv6 specified "
1390 "but IPv4 item provided");
1391 if (item_flags & l3m)
1392 return rte_flow_error_set(error, ENOTSUP,
1393 RTE_FLOW_ERROR_TYPE_ITEM, item,
1394 "multiple L3 layers not supported");
1395 else if (item_flags & l4m)
1396 return rte_flow_error_set(error, EINVAL,
1397 RTE_FLOW_ERROR_TYPE_ITEM, item,
1398 "L3 cannot follow an L4 layer.");
1399 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1400 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1401 return rte_flow_error_set(error, EINVAL,
1402 RTE_FLOW_ERROR_TYPE_ITEM, item,
1403 "L3 cannot follow an NVGRE layer.");
1404 else if (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L2))
1405 return rte_flow_error_set(error, EINVAL,
1406 RTE_FLOW_ERROR_TYPE_ITEM, item,
1407 "no L2 layer before IPV4");
1409 mask = &rte_flow_item_ipv4_mask;
1410 else if (mask->hdr.next_proto_id != 0 &&
1411 mask->hdr.next_proto_id != 0xff)
1412 return rte_flow_error_set(error, EINVAL,
1413 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1414 "partial mask is not supported"
1416 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1417 acc_mask ? (const uint8_t *)acc_mask
1418 : (const uint8_t *)&nic_mask,
1419 sizeof(struct rte_flow_item_ipv4),
1427 * Validate IPV6 item.
1430 * Item specification.
1431 * @param[in] item_flags
1432 * Bit-fields that holds the items detected until now.
1433 * @param[in] acc_mask
1434 * Acceptable mask, if NULL default internal default mask
1435 * will be used to check whether item fields are supported.
1437 * Pointer to error structure.
1440 * 0 on success, a negative errno value otherwise and rte_errno is set.
1443 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1444 uint64_t item_flags,
1445 const struct rte_flow_item_ipv6 *acc_mask,
1446 struct rte_flow_error *error)
1448 const struct rte_flow_item_ipv6 *mask = item->mask;
1449 const struct rte_flow_item_ipv6 *spec = item->spec;
1450 const struct rte_flow_item_ipv6 nic_mask = {
1453 "\xff\xff\xff\xff\xff\xff\xff\xff"
1454 "\xff\xff\xff\xff\xff\xff\xff\xff",
1456 "\xff\xff\xff\xff\xff\xff\xff\xff"
1457 "\xff\xff\xff\xff\xff\xff\xff\xff",
1458 .vtc_flow = RTE_BE32(0xffffffff),
1463 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1464 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1465 MLX5_FLOW_LAYER_OUTER_L3;
1466 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1467 MLX5_FLOW_LAYER_OUTER_L4;
1469 uint8_t next_proto = 0xFF;
1471 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1473 next_proto = mask->hdr.proto & spec->hdr.proto;
1474 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1475 return rte_flow_error_set(error, EINVAL,
1476 RTE_FLOW_ERROR_TYPE_ITEM,
1481 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1482 return rte_flow_error_set(error, EINVAL,
1483 RTE_FLOW_ERROR_TYPE_ITEM, item,
1484 "wrong tunnel type - IPv4 specified "
1485 "but IPv6 item provided");
1486 if (item_flags & l3m)
1487 return rte_flow_error_set(error, ENOTSUP,
1488 RTE_FLOW_ERROR_TYPE_ITEM, item,
1489 "multiple L3 layers not supported");
1490 else if (item_flags & l4m)
1491 return rte_flow_error_set(error, EINVAL,
1492 RTE_FLOW_ERROR_TYPE_ITEM, item,
1493 "L3 cannot follow an L4 layer.");
1494 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1495 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1496 return rte_flow_error_set(error, EINVAL,
1497 RTE_FLOW_ERROR_TYPE_ITEM, item,
1498 "L3 cannot follow an NVGRE layer.");
1499 else if (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L2))
1500 return rte_flow_error_set(error, EINVAL,
1501 RTE_FLOW_ERROR_TYPE_ITEM, item,
1502 "no L2 layer before IPV6");
1504 mask = &rte_flow_item_ipv6_mask;
1505 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1506 acc_mask ? (const uint8_t *)acc_mask
1507 : (const uint8_t *)&nic_mask,
1508 sizeof(struct rte_flow_item_ipv6),
1516 * Validate UDP item.
1519 * Item specification.
1520 * @param[in] item_flags
1521 * Bit-fields that holds the items detected until now.
1522 * @param[in] target_protocol
1523 * The next protocol in the previous item.
1524 * @param[in] flow_mask
1525 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1527 * Pointer to error structure.
1530 * 0 on success, a negative errno value otherwise and rte_errno is set.
1533 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1534 uint64_t item_flags,
1535 uint8_t target_protocol,
1536 struct rte_flow_error *error)
1538 const struct rte_flow_item_udp *mask = item->mask;
1539 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1540 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1541 MLX5_FLOW_LAYER_OUTER_L3;
1542 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1543 MLX5_FLOW_LAYER_OUTER_L4;
1546 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1547 return rte_flow_error_set(error, EINVAL,
1548 RTE_FLOW_ERROR_TYPE_ITEM, item,
1549 "protocol filtering not compatible"
1551 if (!(item_flags & l3m))
1552 return rte_flow_error_set(error, EINVAL,
1553 RTE_FLOW_ERROR_TYPE_ITEM, item,
1554 "L3 is mandatory to filter on L4");
1555 if (item_flags & l4m)
1556 return rte_flow_error_set(error, EINVAL,
1557 RTE_FLOW_ERROR_TYPE_ITEM, item,
1558 "multiple L4 layers not supported");
1560 mask = &rte_flow_item_udp_mask;
1561 ret = mlx5_flow_item_acceptable
1562 (item, (const uint8_t *)mask,
1563 (const uint8_t *)&rte_flow_item_udp_mask,
1564 sizeof(struct rte_flow_item_udp), error);
1571 * Validate TCP item.
1574 * Item specification.
1575 * @param[in] item_flags
1576 * Bit-fields that holds the items detected until now.
1577 * @param[in] target_protocol
1578 * The next protocol in the previous item.
1580 * Pointer to error structure.
1583 * 0 on success, a negative errno value otherwise and rte_errno is set.
1586 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1587 uint64_t item_flags,
1588 uint8_t target_protocol,
1589 const struct rte_flow_item_tcp *flow_mask,
1590 struct rte_flow_error *error)
1592 const struct rte_flow_item_tcp *mask = item->mask;
1593 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1594 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1595 MLX5_FLOW_LAYER_OUTER_L3;
1596 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1597 MLX5_FLOW_LAYER_OUTER_L4;
1601 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1602 return rte_flow_error_set(error, EINVAL,
1603 RTE_FLOW_ERROR_TYPE_ITEM, item,
1604 "protocol filtering not compatible"
1606 if (!(item_flags & l3m))
1607 return rte_flow_error_set(error, EINVAL,
1608 RTE_FLOW_ERROR_TYPE_ITEM, item,
1609 "L3 is mandatory to filter on L4");
1610 if (item_flags & l4m)
1611 return rte_flow_error_set(error, EINVAL,
1612 RTE_FLOW_ERROR_TYPE_ITEM, item,
1613 "multiple L4 layers not supported");
1615 mask = &rte_flow_item_tcp_mask;
1616 ret = mlx5_flow_item_acceptable
1617 (item, (const uint8_t *)mask,
1618 (const uint8_t *)flow_mask,
1619 sizeof(struct rte_flow_item_tcp), error);
1626 * Validate VXLAN item.
1629 * Item specification.
1630 * @param[in] item_flags
1631 * Bit-fields that holds the items detected until now.
1632 * @param[in] target_protocol
1633 * The next protocol in the previous item.
1635 * Pointer to error structure.
1638 * 0 on success, a negative errno value otherwise and rte_errno is set.
1641 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1642 uint64_t item_flags,
1643 struct rte_flow_error *error)
1645 const struct rte_flow_item_vxlan *spec = item->spec;
1646 const struct rte_flow_item_vxlan *mask = item->mask;
1651 } id = { .vlan_id = 0, };
1652 uint32_t vlan_id = 0;
1655 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1656 return rte_flow_error_set(error, ENOTSUP,
1657 RTE_FLOW_ERROR_TYPE_ITEM, item,
1658 "multiple tunnel layers not"
1661 * Verify only UDPv4 is present as defined in
1662 * https://tools.ietf.org/html/rfc7348
1664 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1665 return rte_flow_error_set(error, EINVAL,
1666 RTE_FLOW_ERROR_TYPE_ITEM, item,
1667 "no outer UDP layer found");
1669 mask = &rte_flow_item_vxlan_mask;
1670 ret = mlx5_flow_item_acceptable
1671 (item, (const uint8_t *)mask,
1672 (const uint8_t *)&rte_flow_item_vxlan_mask,
1673 sizeof(struct rte_flow_item_vxlan),
1678 memcpy(&id.vni[1], spec->vni, 3);
1679 vlan_id = id.vlan_id;
1680 memcpy(&id.vni[1], mask->vni, 3);
1681 vlan_id &= id.vlan_id;
1684 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1685 * only this layer is defined in the Verbs specification it is
1686 * interpreted as wildcard and all packets will match this
1687 * rule, if it follows a full stack layer (ex: eth / ipv4 /
1688 * udp), all packets matching the layers before will also
1689 * match this rule. To avoid such situation, VNI 0 is
1690 * currently refused.
1693 return rte_flow_error_set(error, ENOTSUP,
1694 RTE_FLOW_ERROR_TYPE_ITEM, item,
1695 "VXLAN vni cannot be 0");
1696 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1697 return rte_flow_error_set(error, ENOTSUP,
1698 RTE_FLOW_ERROR_TYPE_ITEM, item,
1699 "VXLAN tunnel must be fully defined");
1704 * Validate VXLAN_GPE item.
1707 * Item specification.
1708 * @param[in] item_flags
1709 * Bit-fields that holds the items detected until now.
1711 * Pointer to the private data structure.
1712 * @param[in] target_protocol
1713 * The next protocol in the previous item.
1715 * Pointer to error structure.
1718 * 0 on success, a negative errno value otherwise and rte_errno is set.
1721 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1722 uint64_t item_flags,
1723 struct rte_eth_dev *dev,
1724 struct rte_flow_error *error)
1726 struct mlx5_priv *priv = dev->data->dev_private;
1727 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1728 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1733 } id = { .vlan_id = 0, };
1734 uint32_t vlan_id = 0;
1736 if (!priv->config.l3_vxlan_en)
1737 return rte_flow_error_set(error, ENOTSUP,
1738 RTE_FLOW_ERROR_TYPE_ITEM, item,
1739 "L3 VXLAN is not enabled by device"
1740 " parameter and/or not configured in"
1742 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1743 return rte_flow_error_set(error, ENOTSUP,
1744 RTE_FLOW_ERROR_TYPE_ITEM, item,
1745 "multiple tunnel layers not"
1748 * Verify only UDPv4 is present as defined in
1749 * https://tools.ietf.org/html/rfc7348
1751 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1752 return rte_flow_error_set(error, EINVAL,
1753 RTE_FLOW_ERROR_TYPE_ITEM, item,
1754 "no outer UDP layer found");
1756 mask = &rte_flow_item_vxlan_gpe_mask;
1757 ret = mlx5_flow_item_acceptable
1758 (item, (const uint8_t *)mask,
1759 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1760 sizeof(struct rte_flow_item_vxlan_gpe),
1766 return rte_flow_error_set(error, ENOTSUP,
1767 RTE_FLOW_ERROR_TYPE_ITEM,
1769 "VxLAN-GPE protocol"
1771 memcpy(&id.vni[1], spec->vni, 3);
1772 vlan_id = id.vlan_id;
1773 memcpy(&id.vni[1], mask->vni, 3);
1774 vlan_id &= id.vlan_id;
1777 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1778 * layer is defined in the Verbs specification it is interpreted as
1779 * wildcard and all packets will match this rule, if it follows a full
1780 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1781 * before will also match this rule. To avoid such situation, VNI 0
1782 * is currently refused.
1785 return rte_flow_error_set(error, ENOTSUP,
1786 RTE_FLOW_ERROR_TYPE_ITEM, item,
1787 "VXLAN-GPE vni cannot be 0");
1788 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1789 return rte_flow_error_set(error, ENOTSUP,
1790 RTE_FLOW_ERROR_TYPE_ITEM, item,
1791 "VXLAN-GPE tunnel must be fully"
1796 * Validate GRE Key item.
1799 * Item specification.
1800 * @param[in] item_flags
1801 * Bit flags to mark detected items.
1802 * @param[in] gre_item
1803 * Pointer to gre_item
1805 * Pointer to error structure.
1808 * 0 on success, a negative errno value otherwise and rte_errno is set.
1811 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1812 uint64_t item_flags,
1813 const struct rte_flow_item *gre_item,
1814 struct rte_flow_error *error)
1816 const rte_be32_t *mask = item->mask;
1818 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1819 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1820 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1822 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1823 return rte_flow_error_set(error, ENOTSUP,
1824 RTE_FLOW_ERROR_TYPE_ITEM, item,
1825 "Multiple GRE key not support");
1826 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1827 return rte_flow_error_set(error, ENOTSUP,
1828 RTE_FLOW_ERROR_TYPE_ITEM, item,
1829 "No preceding GRE header");
1830 if (item_flags & MLX5_FLOW_LAYER_INNER)
1831 return rte_flow_error_set(error, ENOTSUP,
1832 RTE_FLOW_ERROR_TYPE_ITEM, item,
1833 "GRE key following a wrong item");
1835 gre_mask = &rte_flow_item_gre_mask;
1836 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1837 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1838 return rte_flow_error_set(error, EINVAL,
1839 RTE_FLOW_ERROR_TYPE_ITEM, item,
1840 "Key bit must be on");
1843 mask = &gre_key_default_mask;
1844 ret = mlx5_flow_item_acceptable
1845 (item, (const uint8_t *)mask,
1846 (const uint8_t *)&gre_key_default_mask,
1847 sizeof(rte_be32_t), error);
1852 * Validate GRE item.
1855 * Item specification.
1856 * @param[in] item_flags
1857 * Bit flags to mark detected items.
1858 * @param[in] target_protocol
1859 * The next protocol in the previous item.
1861 * Pointer to error structure.
1864 * 0 on success, a negative errno value otherwise and rte_errno is set.
1867 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1868 uint64_t item_flags,
1869 uint8_t target_protocol,
1870 struct rte_flow_error *error)
1872 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1873 const struct rte_flow_item_gre *mask = item->mask;
1875 const struct rte_flow_item_gre nic_mask = {
1876 .c_rsvd0_ver = RTE_BE16(0xB000),
1877 .protocol = RTE_BE16(UINT16_MAX),
1880 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1881 return rte_flow_error_set(error, EINVAL,
1882 RTE_FLOW_ERROR_TYPE_ITEM, item,
1883 "protocol filtering not compatible"
1884 " with this GRE layer");
1885 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1886 return rte_flow_error_set(error, ENOTSUP,
1887 RTE_FLOW_ERROR_TYPE_ITEM, item,
1888 "multiple tunnel layers not"
1890 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1891 return rte_flow_error_set(error, ENOTSUP,
1892 RTE_FLOW_ERROR_TYPE_ITEM, item,
1893 "L3 Layer is missing");
1895 mask = &rte_flow_item_gre_mask;
1896 ret = mlx5_flow_item_acceptable
1897 (item, (const uint8_t *)mask,
1898 (const uint8_t *)&nic_mask,
1899 sizeof(struct rte_flow_item_gre), error);
1902 #ifndef HAVE_MLX5DV_DR
1903 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1904 if (spec && (spec->protocol & mask->protocol))
1905 return rte_flow_error_set(error, ENOTSUP,
1906 RTE_FLOW_ERROR_TYPE_ITEM, item,
1907 "without MPLS support the"
1908 " specification cannot be used for"
1916 * Validate MPLS item.
1919 * Pointer to the rte_eth_dev structure.
1921 * Item specification.
1922 * @param[in] item_flags
1923 * Bit-fields that holds the items detected until now.
1924 * @param[in] prev_layer
1925 * The protocol layer indicated in previous item.
1927 * Pointer to error structure.
1930 * 0 on success, a negative errno value otherwise and rte_errno is set.
1933 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1934 const struct rte_flow_item *item __rte_unused,
1935 uint64_t item_flags __rte_unused,
1936 uint64_t prev_layer __rte_unused,
1937 struct rte_flow_error *error)
1939 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1940 const struct rte_flow_item_mpls *mask = item->mask;
1941 struct mlx5_priv *priv = dev->data->dev_private;
1944 if (!priv->config.mpls_en)
1945 return rte_flow_error_set(error, ENOTSUP,
1946 RTE_FLOW_ERROR_TYPE_ITEM, item,
1947 "MPLS not supported or"
1948 " disabled in firmware"
1950 /* MPLS over IP, UDP, GRE is allowed */
1951 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1952 MLX5_FLOW_LAYER_OUTER_L4_UDP |
1953 MLX5_FLOW_LAYER_GRE)))
1954 return rte_flow_error_set(error, EINVAL,
1955 RTE_FLOW_ERROR_TYPE_ITEM, item,
1956 "protocol filtering not compatible"
1957 " with MPLS layer");
1958 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1959 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1960 !(item_flags & MLX5_FLOW_LAYER_GRE))
1961 return rte_flow_error_set(error, ENOTSUP,
1962 RTE_FLOW_ERROR_TYPE_ITEM, item,
1963 "multiple tunnel layers not"
1966 mask = &rte_flow_item_mpls_mask;
1967 ret = mlx5_flow_item_acceptable
1968 (item, (const uint8_t *)mask,
1969 (const uint8_t *)&rte_flow_item_mpls_mask,
1970 sizeof(struct rte_flow_item_mpls), error);
1975 return rte_flow_error_set(error, ENOTSUP,
1976 RTE_FLOW_ERROR_TYPE_ITEM, item,
1977 "MPLS is not supported by Verbs, please"
1982 * Validate NVGRE item.
1985 * Item specification.
1986 * @param[in] item_flags
1987 * Bit flags to mark detected items.
1988 * @param[in] target_protocol
1989 * The next protocol in the previous item.
1991 * Pointer to error structure.
1994 * 0 on success, a negative errno value otherwise and rte_errno is set.
1997 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1998 uint64_t item_flags,
1999 uint8_t target_protocol,
2000 struct rte_flow_error *error)
2002 const struct rte_flow_item_nvgre *mask = item->mask;
2005 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2006 return rte_flow_error_set(error, EINVAL,
2007 RTE_FLOW_ERROR_TYPE_ITEM, item,
2008 "protocol filtering not compatible"
2009 " with this GRE layer");
2010 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2011 return rte_flow_error_set(error, ENOTSUP,
2012 RTE_FLOW_ERROR_TYPE_ITEM, item,
2013 "multiple tunnel layers not"
2015 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2016 return rte_flow_error_set(error, ENOTSUP,
2017 RTE_FLOW_ERROR_TYPE_ITEM, item,
2018 "L3 Layer is missing");
2020 mask = &rte_flow_item_nvgre_mask;
2021 ret = mlx5_flow_item_acceptable
2022 (item, (const uint8_t *)mask,
2023 (const uint8_t *)&rte_flow_item_nvgre_mask,
2024 sizeof(struct rte_flow_item_nvgre), error);
2031 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2032 const struct rte_flow_attr *attr __rte_unused,
2033 const struct rte_flow_item items[] __rte_unused,
2034 const struct rte_flow_action actions[] __rte_unused,
2035 bool external __rte_unused,
2036 struct rte_flow_error *error)
2038 return rte_flow_error_set(error, ENOTSUP,
2039 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2042 static struct mlx5_flow *
2043 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2044 const struct rte_flow_item items[] __rte_unused,
2045 const struct rte_flow_action actions[] __rte_unused,
2046 struct rte_flow_error *error)
2048 rte_flow_error_set(error, ENOTSUP,
2049 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2054 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2055 struct mlx5_flow *dev_flow __rte_unused,
2056 const struct rte_flow_attr *attr __rte_unused,
2057 const struct rte_flow_item items[] __rte_unused,
2058 const struct rte_flow_action actions[] __rte_unused,
2059 struct rte_flow_error *error)
2061 return rte_flow_error_set(error, ENOTSUP,
2062 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2066 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2067 struct rte_flow *flow __rte_unused,
2068 struct rte_flow_error *error)
2070 return rte_flow_error_set(error, ENOTSUP,
2071 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2075 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2076 struct rte_flow *flow __rte_unused)
2081 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2082 struct rte_flow *flow __rte_unused)
2087 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2088 struct rte_flow *flow __rte_unused,
2089 const struct rte_flow_action *actions __rte_unused,
2090 void *data __rte_unused,
2091 struct rte_flow_error *error)
2093 return rte_flow_error_set(error, ENOTSUP,
2094 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2097 /* Void driver to protect from null pointer reference. */
2098 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2099 .validate = flow_null_validate,
2100 .prepare = flow_null_prepare,
2101 .translate = flow_null_translate,
2102 .apply = flow_null_apply,
2103 .remove = flow_null_remove,
2104 .destroy = flow_null_destroy,
2105 .query = flow_null_query,
2109 * Select flow driver type according to flow attributes and device
2113 * Pointer to the dev structure.
2115 * Pointer to the flow attributes.
2118 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2120 static enum mlx5_flow_drv_type
2121 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2123 struct mlx5_priv *priv = dev->data->dev_private;
2124 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2126 if (attr->transfer && priv->config.dv_esw_en)
2127 type = MLX5_FLOW_TYPE_DV;
2128 if (!attr->transfer)
2129 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2130 MLX5_FLOW_TYPE_VERBS;
2134 #define flow_get_drv_ops(type) flow_drv_ops[type]
2137 * Flow driver validation API. This abstracts calling driver specific functions.
2138 * The type of flow driver is determined according to flow attributes.
2141 * Pointer to the dev structure.
2143 * Pointer to the flow attributes.
2145 * Pointer to the list of items.
2146 * @param[in] actions
2147 * Pointer to the list of actions.
2148 * @param[in] external
2149 * This flow rule is created by request external to PMD.
2151 * Pointer to the error structure.
2154 * 0 on success, a negative errno value otherwise and rte_errno is set.
2157 flow_drv_validate(struct rte_eth_dev *dev,
2158 const struct rte_flow_attr *attr,
2159 const struct rte_flow_item items[],
2160 const struct rte_flow_action actions[],
2161 bool external, struct rte_flow_error *error)
2163 const struct mlx5_flow_driver_ops *fops;
2164 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2166 fops = flow_get_drv_ops(type);
2167 return fops->validate(dev, attr, items, actions, external, error);
2171 * Flow driver preparation API. This abstracts calling driver specific
2172 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2173 * calculates the size of memory required for device flow, allocates the memory,
2174 * initializes the device flow and returns the pointer.
2177 * This function initializes device flow structure such as dv or verbs in
2178 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2179 * rest. For example, adding returning device flow to flow->dev_flow list and
2180 * setting backward reference to the flow should be done out of this function.
2181 * layers field is not filled either.
2184 * Pointer to the flow attributes.
2186 * Pointer to the list of items.
2187 * @param[in] actions
2188 * Pointer to the list of actions.
2190 * Pointer to the error structure.
2193 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2195 static inline struct mlx5_flow *
2196 flow_drv_prepare(const struct rte_flow *flow,
2197 const struct rte_flow_attr *attr,
2198 const struct rte_flow_item items[],
2199 const struct rte_flow_action actions[],
2200 struct rte_flow_error *error)
2202 const struct mlx5_flow_driver_ops *fops;
2203 enum mlx5_flow_drv_type type = flow->drv_type;
2205 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2206 fops = flow_get_drv_ops(type);
2207 return fops->prepare(attr, items, actions, error);
2211 * Flow driver translation API. This abstracts calling driver specific
2212 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2213 * translates a generic flow into a driver flow. flow_drv_prepare() must
2217 * dev_flow->layers could be filled as a result of parsing during translation
2218 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2219 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2220 * flow->actions could be overwritten even though all the expanded dev_flows
2221 * have the same actions.
2224 * Pointer to the rte dev structure.
2225 * @param[in, out] dev_flow
2226 * Pointer to the mlx5 flow.
2228 * Pointer to the flow attributes.
2230 * Pointer to the list of items.
2231 * @param[in] actions
2232 * Pointer to the list of actions.
2234 * Pointer to the error structure.
2237 * 0 on success, a negative errno value otherwise and rte_errno is set.
2240 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2241 const struct rte_flow_attr *attr,
2242 const struct rte_flow_item items[],
2243 const struct rte_flow_action actions[],
2244 struct rte_flow_error *error)
2246 const struct mlx5_flow_driver_ops *fops;
2247 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2249 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2250 fops = flow_get_drv_ops(type);
2251 return fops->translate(dev, dev_flow, attr, items, actions, error);
2255 * Flow driver apply API. This abstracts calling driver specific functions.
2256 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2257 * translated driver flows on to device. flow_drv_translate() must precede.
2260 * Pointer to Ethernet device structure.
2261 * @param[in, out] flow
2262 * Pointer to flow structure.
2264 * Pointer to error structure.
2267 * 0 on success, a negative errno value otherwise and rte_errno is set.
2270 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2271 struct rte_flow_error *error)
2273 const struct mlx5_flow_driver_ops *fops;
2274 enum mlx5_flow_drv_type type = flow->drv_type;
2276 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2277 fops = flow_get_drv_ops(type);
2278 return fops->apply(dev, flow, error);
2282 * Flow driver remove API. This abstracts calling driver specific functions.
2283 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2284 * on device. All the resources of the flow should be freed by calling
2285 * flow_drv_destroy().
2288 * Pointer to Ethernet device.
2289 * @param[in, out] flow
2290 * Pointer to flow structure.
2293 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2295 const struct mlx5_flow_driver_ops *fops;
2296 enum mlx5_flow_drv_type type = flow->drv_type;
2298 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2299 fops = flow_get_drv_ops(type);
2300 fops->remove(dev, flow);
2304 * Flow driver destroy API. This abstracts calling driver specific functions.
2305 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2306 * on device and releases resources of the flow.
2309 * Pointer to Ethernet device.
2310 * @param[in, out] flow
2311 * Pointer to flow structure.
2314 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2316 const struct mlx5_flow_driver_ops *fops;
2317 enum mlx5_flow_drv_type type = flow->drv_type;
2319 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2320 fops = flow_get_drv_ops(type);
2321 fops->destroy(dev, flow);
2325 * Validate a flow supported by the NIC.
2327 * @see rte_flow_validate()
2331 mlx5_flow_validate(struct rte_eth_dev *dev,
2332 const struct rte_flow_attr *attr,
2333 const struct rte_flow_item items[],
2334 const struct rte_flow_action actions[],
2335 struct rte_flow_error *error)
2339 ret = flow_drv_validate(dev, attr, items, actions, true, error);
2346 * Get RSS action from the action list.
2348 * @param[in] actions
2349 * Pointer to the list of actions.
2352 * Pointer to the RSS action if exist, else return NULL.
2354 static const struct rte_flow_action_rss*
2355 flow_get_rss_action(const struct rte_flow_action actions[])
2357 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2358 switch (actions->type) {
2359 case RTE_FLOW_ACTION_TYPE_RSS:
2360 return (const struct rte_flow_action_rss *)
2370 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2372 const struct rte_flow_item *item;
2373 unsigned int has_vlan = 0;
2375 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2376 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2382 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2383 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2384 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2385 MLX5_EXPANSION_ROOT_OUTER;
2389 * Create a flow and add it to @p list.
2392 * Pointer to Ethernet device.
2394 * Pointer to a TAILQ flow list.
2396 * Flow rule attributes.
2398 * Pattern specification (list terminated by the END pattern item).
2399 * @param[in] actions
2400 * Associated actions (list terminated by the END action).
2401 * @param[in] external
2402 * This flow rule is created by request external to PMD.
2404 * Perform verbose error reporting if not NULL.
2407 * A flow on success, NULL otherwise and rte_errno is set.
2409 static struct rte_flow *
2410 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2411 const struct rte_flow_attr *attr,
2412 const struct rte_flow_item items[],
2413 const struct rte_flow_action actions[],
2414 bool external, struct rte_flow_error *error)
2416 struct rte_flow *flow = NULL;
2417 struct mlx5_flow *dev_flow;
2418 const struct rte_flow_action_rss *rss;
2420 struct rte_flow_expand_rss buf;
2421 uint8_t buffer[2048];
2423 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2428 ret = flow_drv_validate(dev, attr, items, actions, external, error);
2431 flow_size = sizeof(struct rte_flow);
2432 rss = flow_get_rss_action(actions);
2434 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2437 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2438 flow = rte_calloc(__func__, 1, flow_size, 0);
2443 flow->drv_type = flow_get_drv_type(dev, attr);
2444 flow->ingress = attr->ingress;
2445 flow->transfer = attr->transfer;
2446 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2447 flow->drv_type < MLX5_FLOW_TYPE_MAX);
2448 flow->queue = (void *)(flow + 1);
2449 LIST_INIT(&flow->dev_flows);
2450 if (rss && rss->types) {
2451 unsigned int graph_root;
2453 graph_root = find_graph_root(items, rss->level);
2454 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2456 mlx5_support_expansion,
2459 (unsigned int)ret < sizeof(expand_buffer.buffer));
2462 buf->entry[0].pattern = (void *)(uintptr_t)items;
2464 for (i = 0; i < buf->entries; ++i) {
2465 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2469 dev_flow->flow = flow;
2470 dev_flow->external = external;
2471 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2472 ret = flow_drv_translate(dev, dev_flow, attr,
2473 buf->entry[i].pattern,
2478 if (dev->data->dev_started) {
2479 ret = flow_drv_apply(dev, flow, error);
2483 TAILQ_INSERT_TAIL(list, flow, next);
2484 flow_rxq_flags_set(dev, flow);
2487 ret = rte_errno; /* Save rte_errno before cleanup. */
2489 flow_drv_destroy(dev, flow);
2491 rte_errno = ret; /* Restore rte_errno. */
2496 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
2497 * incoming packets to table 1.
2499 * Other flow rules, requested for group n, will be created in
2500 * e-switch table n+1.
2501 * Jump action to e-switch group n will be created to group n+1.
2503 * Used when working in switchdev mode, to utilise advantages of table 1
2507 * Pointer to Ethernet device.
2510 * Pointer to flow on success, NULL otherwise and rte_errno is set.
2513 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
2515 const struct rte_flow_attr attr = {
2522 const struct rte_flow_item pattern = {
2523 .type = RTE_FLOW_ITEM_TYPE_END,
2525 struct rte_flow_action_jump jump = {
2528 const struct rte_flow_action actions[] = {
2530 .type = RTE_FLOW_ACTION_TYPE_JUMP,
2534 .type = RTE_FLOW_ACTION_TYPE_END,
2537 struct mlx5_priv *priv = dev->data->dev_private;
2538 struct rte_flow_error error;
2540 return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
2541 actions, false, &error);
2547 * @see rte_flow_create()
2551 mlx5_flow_create(struct rte_eth_dev *dev,
2552 const struct rte_flow_attr *attr,
2553 const struct rte_flow_item items[],
2554 const struct rte_flow_action actions[],
2555 struct rte_flow_error *error)
2557 struct mlx5_priv *priv = dev->data->dev_private;
2559 return flow_list_create(dev, &priv->flows,
2560 attr, items, actions, true, error);
2564 * Destroy a flow in a list.
2567 * Pointer to Ethernet device.
2569 * Pointer to a TAILQ flow list.
2574 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2575 struct rte_flow *flow)
2578 * Update RX queue flags only if port is started, otherwise it is
2581 if (dev->data->dev_started)
2582 flow_rxq_flags_trim(dev, flow);
2583 flow_drv_destroy(dev, flow);
2584 TAILQ_REMOVE(list, flow, next);
2585 rte_free(flow->fdir);
2590 * Destroy all flows.
2593 * Pointer to Ethernet device.
2595 * Pointer to a TAILQ flow list.
2598 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2600 while (!TAILQ_EMPTY(list)) {
2601 struct rte_flow *flow;
2603 flow = TAILQ_FIRST(list);
2604 flow_list_destroy(dev, list, flow);
2612 * Pointer to Ethernet device.
2614 * Pointer to a TAILQ flow list.
2617 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2619 struct rte_flow *flow;
2621 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2622 flow_drv_remove(dev, flow);
2623 flow_rxq_flags_clear(dev);
2630 * Pointer to Ethernet device.
2632 * Pointer to a TAILQ flow list.
2635 * 0 on success, a negative errno value otherwise and rte_errno is set.
2638 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2640 struct rte_flow *flow;
2641 struct rte_flow_error error;
2644 TAILQ_FOREACH(flow, list, next) {
2645 ret = flow_drv_apply(dev, flow, &error);
2648 flow_rxq_flags_set(dev, flow);
2652 ret = rte_errno; /* Save rte_errno before cleanup. */
2653 mlx5_flow_stop(dev, list);
2654 rte_errno = ret; /* Restore rte_errno. */
2659 * Verify the flow list is empty
2662 * Pointer to Ethernet device.
2664 * @return the number of flows not released.
2667 mlx5_flow_verify(struct rte_eth_dev *dev)
2669 struct mlx5_priv *priv = dev->data->dev_private;
2670 struct rte_flow *flow;
2673 TAILQ_FOREACH(flow, &priv->flows, next) {
2674 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2675 dev->data->port_id, (void *)flow);
2682 * Enable a control flow configured from the control plane.
2685 * Pointer to Ethernet device.
2687 * An Ethernet flow spec to apply.
2689 * An Ethernet flow mask to apply.
2691 * A VLAN flow spec to apply.
2693 * A VLAN flow mask to apply.
2696 * 0 on success, a negative errno value otherwise and rte_errno is set.
2699 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2700 struct rte_flow_item_eth *eth_spec,
2701 struct rte_flow_item_eth *eth_mask,
2702 struct rte_flow_item_vlan *vlan_spec,
2703 struct rte_flow_item_vlan *vlan_mask)
2705 struct mlx5_priv *priv = dev->data->dev_private;
2706 const struct rte_flow_attr attr = {
2708 .priority = MLX5_FLOW_PRIO_RSVD,
2710 struct rte_flow_item items[] = {
2712 .type = RTE_FLOW_ITEM_TYPE_ETH,
2718 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2719 RTE_FLOW_ITEM_TYPE_END,
2725 .type = RTE_FLOW_ITEM_TYPE_END,
2728 uint16_t queue[priv->reta_idx_n];
2729 struct rte_flow_action_rss action_rss = {
2730 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2732 .types = priv->rss_conf.rss_hf,
2733 .key_len = priv->rss_conf.rss_key_len,
2734 .queue_num = priv->reta_idx_n,
2735 .key = priv->rss_conf.rss_key,
2738 struct rte_flow_action actions[] = {
2740 .type = RTE_FLOW_ACTION_TYPE_RSS,
2741 .conf = &action_rss,
2744 .type = RTE_FLOW_ACTION_TYPE_END,
2747 struct rte_flow *flow;
2748 struct rte_flow_error error;
2751 if (!priv->reta_idx_n || !priv->rxqs_n) {
2754 for (i = 0; i != priv->reta_idx_n; ++i)
2755 queue[i] = (*priv->reta_idx)[i];
2756 flow = flow_list_create(dev, &priv->ctrl_flows,
2757 &attr, items, actions, false, &error);
2764 * Enable a flow control configured from the control plane.
2767 * Pointer to Ethernet device.
2769 * An Ethernet flow spec to apply.
2771 * An Ethernet flow mask to apply.
2774 * 0 on success, a negative errno value otherwise and rte_errno is set.
2777 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2778 struct rte_flow_item_eth *eth_spec,
2779 struct rte_flow_item_eth *eth_mask)
2781 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2787 * @see rte_flow_destroy()
2791 mlx5_flow_destroy(struct rte_eth_dev *dev,
2792 struct rte_flow *flow,
2793 struct rte_flow_error *error __rte_unused)
2795 struct mlx5_priv *priv = dev->data->dev_private;
2797 flow_list_destroy(dev, &priv->flows, flow);
2802 * Destroy all flows.
2804 * @see rte_flow_flush()
2808 mlx5_flow_flush(struct rte_eth_dev *dev,
2809 struct rte_flow_error *error __rte_unused)
2811 struct mlx5_priv *priv = dev->data->dev_private;
2813 mlx5_flow_list_flush(dev, &priv->flows);
2820 * @see rte_flow_isolate()
2824 mlx5_flow_isolate(struct rte_eth_dev *dev,
2826 struct rte_flow_error *error)
2828 struct mlx5_priv *priv = dev->data->dev_private;
2830 if (dev->data->dev_started) {
2831 rte_flow_error_set(error, EBUSY,
2832 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2834 "port must be stopped first");
2837 priv->isolated = !!enable;
2839 dev->dev_ops = &mlx5_dev_ops_isolate;
2841 dev->dev_ops = &mlx5_dev_ops;
2848 * @see rte_flow_query()
2852 flow_drv_query(struct rte_eth_dev *dev,
2853 struct rte_flow *flow,
2854 const struct rte_flow_action *actions,
2856 struct rte_flow_error *error)
2858 const struct mlx5_flow_driver_ops *fops;
2859 enum mlx5_flow_drv_type ftype = flow->drv_type;
2861 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2862 fops = flow_get_drv_ops(ftype);
2864 return fops->query(dev, flow, actions, data, error);
2870 * @see rte_flow_query()
2874 mlx5_flow_query(struct rte_eth_dev *dev,
2875 struct rte_flow *flow,
2876 const struct rte_flow_action *actions,
2878 struct rte_flow_error *error)
2882 ret = flow_drv_query(dev, flow, actions, data, error);
2889 * Convert a flow director filter to a generic flow.
2892 * Pointer to Ethernet device.
2893 * @param fdir_filter
2894 * Flow director filter to add.
2896 * Generic flow parameters structure.
2899 * 0 on success, a negative errno value otherwise and rte_errno is set.
2902 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2903 const struct rte_eth_fdir_filter *fdir_filter,
2904 struct mlx5_fdir *attributes)
2906 struct mlx5_priv *priv = dev->data->dev_private;
2907 const struct rte_eth_fdir_input *input = &fdir_filter->input;
2908 const struct rte_eth_fdir_masks *mask =
2909 &dev->data->dev_conf.fdir_conf.mask;
2911 /* Validate queue number. */
2912 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2913 DRV_LOG(ERR, "port %u invalid queue number %d",
2914 dev->data->port_id, fdir_filter->action.rx_queue);
2918 attributes->attr.ingress = 1;
2919 attributes->items[0] = (struct rte_flow_item) {
2920 .type = RTE_FLOW_ITEM_TYPE_ETH,
2921 .spec = &attributes->l2,
2922 .mask = &attributes->l2_mask,
2924 switch (fdir_filter->action.behavior) {
2925 case RTE_ETH_FDIR_ACCEPT:
2926 attributes->actions[0] = (struct rte_flow_action){
2927 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2928 .conf = &attributes->queue,
2931 case RTE_ETH_FDIR_REJECT:
2932 attributes->actions[0] = (struct rte_flow_action){
2933 .type = RTE_FLOW_ACTION_TYPE_DROP,
2937 DRV_LOG(ERR, "port %u invalid behavior %d",
2939 fdir_filter->action.behavior);
2940 rte_errno = ENOTSUP;
2943 attributes->queue.index = fdir_filter->action.rx_queue;
2945 switch (fdir_filter->input.flow_type) {
2946 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2947 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2948 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2949 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2950 .src_addr = input->flow.ip4_flow.src_ip,
2951 .dst_addr = input->flow.ip4_flow.dst_ip,
2952 .time_to_live = input->flow.ip4_flow.ttl,
2953 .type_of_service = input->flow.ip4_flow.tos,
2955 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2956 .src_addr = mask->ipv4_mask.src_ip,
2957 .dst_addr = mask->ipv4_mask.dst_ip,
2958 .time_to_live = mask->ipv4_mask.ttl,
2959 .type_of_service = mask->ipv4_mask.tos,
2960 .next_proto_id = mask->ipv4_mask.proto,
2962 attributes->items[1] = (struct rte_flow_item){
2963 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2964 .spec = &attributes->l3,
2965 .mask = &attributes->l3_mask,
2968 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2969 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2970 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2971 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2972 .hop_limits = input->flow.ipv6_flow.hop_limits,
2973 .proto = input->flow.ipv6_flow.proto,
2976 memcpy(attributes->l3.ipv6.hdr.src_addr,
2977 input->flow.ipv6_flow.src_ip,
2978 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2979 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2980 input->flow.ipv6_flow.dst_ip,
2981 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2982 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2983 mask->ipv6_mask.src_ip,
2984 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2985 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2986 mask->ipv6_mask.dst_ip,
2987 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2988 attributes->items[1] = (struct rte_flow_item){
2989 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2990 .spec = &attributes->l3,
2991 .mask = &attributes->l3_mask,
2995 DRV_LOG(ERR, "port %u invalid flow type%d",
2996 dev->data->port_id, fdir_filter->input.flow_type);
2997 rte_errno = ENOTSUP;
3001 switch (fdir_filter->input.flow_type) {
3002 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
3003 attributes->l4.udp.hdr = (struct rte_udp_hdr){
3004 .src_port = input->flow.udp4_flow.src_port,
3005 .dst_port = input->flow.udp4_flow.dst_port,
3007 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
3008 .src_port = mask->src_port_mask,
3009 .dst_port = mask->dst_port_mask,
3011 attributes->items[2] = (struct rte_flow_item){
3012 .type = RTE_FLOW_ITEM_TYPE_UDP,
3013 .spec = &attributes->l4,
3014 .mask = &attributes->l4_mask,
3017 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
3018 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
3019 .src_port = input->flow.tcp4_flow.src_port,
3020 .dst_port = input->flow.tcp4_flow.dst_port,
3022 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
3023 .src_port = mask->src_port_mask,
3024 .dst_port = mask->dst_port_mask,
3026 attributes->items[2] = (struct rte_flow_item){
3027 .type = RTE_FLOW_ITEM_TYPE_TCP,
3028 .spec = &attributes->l4,
3029 .mask = &attributes->l4_mask,
3032 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
3033 attributes->l4.udp.hdr = (struct rte_udp_hdr){
3034 .src_port = input->flow.udp6_flow.src_port,
3035 .dst_port = input->flow.udp6_flow.dst_port,
3037 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
3038 .src_port = mask->src_port_mask,
3039 .dst_port = mask->dst_port_mask,
3041 attributes->items[2] = (struct rte_flow_item){
3042 .type = RTE_FLOW_ITEM_TYPE_UDP,
3043 .spec = &attributes->l4,
3044 .mask = &attributes->l4_mask,
3047 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
3048 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
3049 .src_port = input->flow.tcp6_flow.src_port,
3050 .dst_port = input->flow.tcp6_flow.dst_port,
3052 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
3053 .src_port = mask->src_port_mask,
3054 .dst_port = mask->dst_port_mask,
3056 attributes->items[2] = (struct rte_flow_item){
3057 .type = RTE_FLOW_ITEM_TYPE_TCP,
3058 .spec = &attributes->l4,
3059 .mask = &attributes->l4_mask,
3062 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
3063 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
3066 DRV_LOG(ERR, "port %u invalid flow type%d",
3067 dev->data->port_id, fdir_filter->input.flow_type);
3068 rte_errno = ENOTSUP;
3074 #define FLOW_FDIR_CMP(f1, f2, fld) \
3075 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
3078 * Compare two FDIR flows. If items and actions are identical, the two flows are
3082 * Pointer to Ethernet device.
3084 * FDIR flow to compare.
3086 * FDIR flow to compare.
3089 * Zero on match, 1 otherwise.
3092 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
3094 if (FLOW_FDIR_CMP(f1, f2, attr) ||
3095 FLOW_FDIR_CMP(f1, f2, l2) ||
3096 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
3097 FLOW_FDIR_CMP(f1, f2, l3) ||
3098 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
3099 FLOW_FDIR_CMP(f1, f2, l4) ||
3100 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
3101 FLOW_FDIR_CMP(f1, f2, actions[0].type))
3103 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
3104 FLOW_FDIR_CMP(f1, f2, queue))
3110 * Search device flow list to find out a matched FDIR flow.
3113 * Pointer to Ethernet device.
3115 * FDIR flow to lookup.
3118 * Pointer of flow if found, NULL otherwise.
3120 static struct rte_flow *
3121 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
3123 struct mlx5_priv *priv = dev->data->dev_private;
3124 struct rte_flow *flow = NULL;
3127 TAILQ_FOREACH(flow, &priv->flows, next) {
3128 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
3129 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
3130 dev->data->port_id, (void *)flow);
3138 * Add new flow director filter and store it in list.
3141 * Pointer to Ethernet device.
3142 * @param fdir_filter
3143 * Flow director filter to add.
3146 * 0 on success, a negative errno value otherwise and rte_errno is set.
3149 flow_fdir_filter_add(struct rte_eth_dev *dev,
3150 const struct rte_eth_fdir_filter *fdir_filter)
3152 struct mlx5_priv *priv = dev->data->dev_private;
3153 struct mlx5_fdir *fdir_flow;
3154 struct rte_flow *flow;
3157 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3162 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3165 flow = flow_fdir_filter_lookup(dev, fdir_flow);
3170 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3171 fdir_flow->items, fdir_flow->actions, true,
3175 assert(!flow->fdir);
3176 flow->fdir = fdir_flow;
3177 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3178 dev->data->port_id, (void *)flow);
3181 rte_free(fdir_flow);
3186 * Delete specific filter.
3189 * Pointer to Ethernet device.
3190 * @param fdir_filter
3191 * Filter to be deleted.
3194 * 0 on success, a negative errno value otherwise and rte_errno is set.
3197 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3198 const struct rte_eth_fdir_filter *fdir_filter)
3200 struct mlx5_priv *priv = dev->data->dev_private;
3201 struct rte_flow *flow;
3202 struct mlx5_fdir fdir_flow = {
3207 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3210 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3215 flow_list_destroy(dev, &priv->flows, flow);
3216 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3217 dev->data->port_id, (void *)flow);
3222 * Update queue for specific filter.
3225 * Pointer to Ethernet device.
3226 * @param fdir_filter
3227 * Filter to be updated.
3230 * 0 on success, a negative errno value otherwise and rte_errno is set.
3233 flow_fdir_filter_update(struct rte_eth_dev *dev,
3234 const struct rte_eth_fdir_filter *fdir_filter)
3238 ret = flow_fdir_filter_delete(dev, fdir_filter);
3241 return flow_fdir_filter_add(dev, fdir_filter);
3245 * Flush all filters.
3248 * Pointer to Ethernet device.
3251 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3253 struct mlx5_priv *priv = dev->data->dev_private;
3255 mlx5_flow_list_flush(dev, &priv->flows);
3259 * Get flow director information.
3262 * Pointer to Ethernet device.
3263 * @param[out] fdir_info
3264 * Resulting flow director information.
3267 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3269 struct rte_eth_fdir_masks *mask =
3270 &dev->data->dev_conf.fdir_conf.mask;
3272 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3273 fdir_info->guarant_spc = 0;
3274 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3275 fdir_info->max_flexpayload = 0;
3276 fdir_info->flow_types_mask[0] = 0;
3277 fdir_info->flex_payload_unit = 0;
3278 fdir_info->max_flex_payload_segment_num = 0;
3279 fdir_info->flex_payload_limit = 0;
3280 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3284 * Deal with flow director operations.
3287 * Pointer to Ethernet device.
3289 * Operation to perform.
3291 * Pointer to operation-specific structure.
3294 * 0 on success, a negative errno value otherwise and rte_errno is set.
3297 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3300 enum rte_fdir_mode fdir_mode =
3301 dev->data->dev_conf.fdir_conf.mode;
3303 if (filter_op == RTE_ETH_FILTER_NOP)
3305 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3306 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3307 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3308 dev->data->port_id, fdir_mode);
3312 switch (filter_op) {
3313 case RTE_ETH_FILTER_ADD:
3314 return flow_fdir_filter_add(dev, arg);
3315 case RTE_ETH_FILTER_UPDATE:
3316 return flow_fdir_filter_update(dev, arg);
3317 case RTE_ETH_FILTER_DELETE:
3318 return flow_fdir_filter_delete(dev, arg);
3319 case RTE_ETH_FILTER_FLUSH:
3320 flow_fdir_filter_flush(dev);
3322 case RTE_ETH_FILTER_INFO:
3323 flow_fdir_info_get(dev, arg);
3326 DRV_LOG(DEBUG, "port %u unknown operation %u",
3327 dev->data->port_id, filter_op);
3335 * Manage filter operations.
3338 * Pointer to Ethernet device structure.
3339 * @param filter_type
3342 * Operation to perform.
3344 * Pointer to operation-specific structure.
3347 * 0 on success, a negative errno value otherwise and rte_errno is set.
3350 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3351 enum rte_filter_type filter_type,
3352 enum rte_filter_op filter_op,
3355 switch (filter_type) {
3356 case RTE_ETH_FILTER_GENERIC:
3357 if (filter_op != RTE_ETH_FILTER_GET) {
3361 *(const void **)arg = &mlx5_flow_ops;
3363 case RTE_ETH_FILTER_FDIR:
3364 return flow_fdir_ctrl_func(dev, filter_op, arg);
3366 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3367 dev->data->port_id, filter_type);
3368 rte_errno = ENOTSUP;
3374 #define MLX5_POOL_QUERY_FREQ_US 1000000
3377 * Set the periodic procedure for triggering asynchronous batch queries for all
3378 * the counter pools.
3381 * Pointer to mlx5_ibv_shared object.
3384 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3386 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3387 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3390 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3391 pools_n += rte_atomic16_read(&cont->n_valid);
3392 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3393 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3394 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3395 sh->cmng.query_thread_on = 0;
3396 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3398 sh->cmng.query_thread_on = 1;
3403 * The periodic procedure for triggering asynchronous batch queries for all the
3404 * counter pools. This function is probably called by the host thread.
3407 * The parameter for the alarm process.
3410 mlx5_flow_query_alarm(void *arg)
3412 struct mlx5_ibv_shared *sh = arg;
3413 struct mlx5_devx_obj *dcs;
3416 uint8_t batch = sh->cmng.batch;
3417 uint16_t pool_index = sh->cmng.pool_index;
3418 struct mlx5_pools_container *cont;
3419 struct mlx5_pools_container *mcont;
3420 struct mlx5_flow_counter_pool *pool;
3422 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3425 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3426 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3427 /* Check if resize was done and need to flip a container. */
3428 if (cont != mcont) {
3430 /* Clean the old container. */
3431 rte_free(cont->pools);
3432 memset(cont, 0, sizeof(*cont));
3435 /* Flip the host container. */
3436 sh->cmng.mhi[batch] ^= (uint8_t)2;
3440 /* 2 empty containers case is unexpected. */
3441 if (unlikely(batch != sh->cmng.batch))
3445 goto next_container;
3447 pool = cont->pools[pool_index];
3449 /* There is a pool query in progress. */
3452 LIST_FIRST(&sh->cmng.free_stat_raws);
3454 /* No free counter statistics raw memory. */
3456 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3458 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3459 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3461 pool->raw_hw->mem_mng->dm->id,
3463 (pool->raw_hw->data + offset),
3465 (uint64_t)(uintptr_t)pool);
3467 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3468 " %d\n", pool->min_dcs->id);
3469 pool->raw_hw = NULL;
3472 pool->raw_hw->min_dcs_id = dcs->id;
3473 LIST_REMOVE(pool->raw_hw, next);
3474 sh->cmng.pending_queries++;
3476 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3481 sh->cmng.batch = batch;
3482 sh->cmng.pool_index = pool_index;
3483 mlx5_set_query_alarm(sh);
3487 * Handler for the HW respond about ready values from an asynchronous batch
3488 * query. This function is probably called by the host thread.
3491 * The pointer to the shared IB device context.
3492 * @param[in] async_id
3493 * The Devx async ID.
3495 * The status of the completion.
3498 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3499 uint64_t async_id, int status)
3501 struct mlx5_flow_counter_pool *pool =
3502 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3503 struct mlx5_counter_stats_raw *raw_to_free;
3505 if (unlikely(status)) {
3506 raw_to_free = pool->raw_hw;
3508 raw_to_free = pool->raw;
3509 rte_spinlock_lock(&pool->sl);
3510 pool->raw = pool->raw_hw;
3511 rte_spinlock_unlock(&pool->sl);
3512 rte_atomic64_add(&pool->query_gen, 1);
3513 /* Be sure the new raw counters data is updated in memory. */
3516 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3517 pool->raw_hw = NULL;
3518 sh->cmng.pending_queries--;
3522 * Translate the rte_flow group index to HW table value.
3524 * @param[in] attributes
3525 * Pointer to flow attributes
3526 * @param[in] external
3527 * Value is part of flow rule created by request external to PMD.
3529 * rte_flow group index value.
3533 * Pointer to error structure.
3536 * 0 on success, a negative errno value otherwise and rte_errno is set.
3539 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
3540 uint32_t group, uint32_t *table,
3541 struct rte_flow_error *error)
3543 if (attributes->transfer && external) {
3544 if (group == UINT32_MAX)
3545 return rte_flow_error_set
3547 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
3549 "group index not supported");