1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
5 #include "otx2_ethdev.h"
9 flow_mcam_alloc_counter(struct otx2_mbox *mbox, uint16_t *ctr)
11 struct npc_mcam_alloc_counter_req *req;
12 struct npc_mcam_alloc_counter_rsp *rsp;
15 req = otx2_mbox_alloc_msg_npc_mcam_alloc_counter(mbox);
17 otx2_mbox_msg_send(mbox, 0);
18 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
20 *ctr = rsp->cntr_list[0];
25 otx2_flow_mcam_free_counter(struct otx2_mbox *mbox, uint16_t ctr_id)
27 struct npc_mcam_oper_counter_req *req;
30 req = otx2_mbox_alloc_msg_npc_mcam_free_counter(mbox);
32 otx2_mbox_msg_send(mbox, 0);
33 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
39 otx2_flow_mcam_read_counter(struct otx2_mbox *mbox, uint32_t ctr_id,
42 struct npc_mcam_oper_counter_req *req;
43 struct npc_mcam_oper_counter_rsp *rsp;
46 req = otx2_mbox_alloc_msg_npc_mcam_counter_stats(mbox);
48 otx2_mbox_msg_send(mbox, 0);
49 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
56 otx2_flow_mcam_clear_counter(struct otx2_mbox *mbox, uint32_t ctr_id)
58 struct npc_mcam_oper_counter_req *req;
61 req = otx2_mbox_alloc_msg_npc_mcam_clear_counter(mbox);
63 otx2_mbox_msg_send(mbox, 0);
64 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
70 otx2_flow_mcam_free_entry(struct otx2_mbox *mbox, uint32_t entry)
72 struct npc_mcam_free_entry_req *req;
75 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
77 otx2_mbox_msg_send(mbox, 0);
78 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
84 otx2_flow_mcam_free_all_entries(struct otx2_mbox *mbox)
86 struct npc_mcam_free_entry_req *req;
89 req = otx2_mbox_alloc_msg_npc_mcam_free_entry(mbox);
91 otx2_mbox_msg_send(mbox, 0);
92 rc = otx2_mbox_get_rsp(mbox, 0, NULL);
98 flow_prep_mcam_ldata(uint8_t *ptr, const uint8_t *data, int len)
102 for (idx = 0; idx < len; idx++)
103 ptr[idx] = data[len - 1 - idx];
107 flow_check_copysz(size_t size, size_t len)
115 flow_mem_is_zero(const void *mem, int len)
120 for (i = 0; i < len; i++) {
128 otx2_flow_get_hw_supp_mask(struct otx2_parse_state *pst,
129 struct otx2_flow_item_info *info, int lid, int lt)
131 struct npc_xtract_info *xinfo;
132 char *hw_mask = info->hw_mask;
137 intf = pst->flow->nix_intf;
138 xinfo = pst->npc->prx_dxcfg[intf][lid][lt].xtract;
139 memset(hw_mask, 0, info->len);
141 for (i = 0; i < NPC_MAX_LD; i++) {
142 if (xinfo[i].hdr_off < info->hw_hdr_len)
145 max_off = xinfo[i].hdr_off + xinfo[i].len - info->hw_hdr_len;
147 if (xinfo[i].enable == 0)
150 if (max_off > info->len)
153 offset = xinfo[i].hdr_off - info->hw_hdr_len;
154 for (j = offset; j < max_off; j++)
160 otx2_flow_update_parse_state(struct otx2_parse_state *pst,
161 struct otx2_flow_item_info *info, int lid, int lt,
164 uint8_t int_info_mask[NPC_MAX_EXTRACT_DATA_LEN];
165 uint8_t int_info[NPC_MAX_EXTRACT_DATA_LEN];
166 struct npc_lid_lt_xtract_info *xinfo;
171 otx2_npc_dbg("Parse state function info mask total %s",
172 (const uint8_t *)info->mask);
174 pst->layer_mask |= lid;
176 pst->flags[lid] = flags;
178 intf = pst->flow->nix_intf;
179 xinfo = &pst->npc->prx_dxcfg[intf][lid][lt];
180 otx2_npc_dbg("Is_terminating = %d", xinfo->is_terminating);
181 if (xinfo->is_terminating)
184 /* Need to check if flags are supported but in latest
185 * KPU profile, flags are used as enumeration! No way,
186 * it can be validated unless MBOX is changed to return
187 * set of valid values out of 2**8 possible values.
189 if (info->spec == NULL) { /* Nothing to match */
190 otx2_npc_dbg("Info spec NULL");
194 /* Copy spec and mask into mcam match string, mask.
195 * Since both RTE FLOW and OTX2 MCAM use network-endianness
196 * for data, we are saved from nasty conversions.
198 for (i = 0; i < NPC_MAX_LD; i++) {
199 struct npc_xtract_info *x;
202 x = &xinfo->xtract[i];
204 hdr_off = x->hdr_off;
206 if (hdr_off < info->hw_hdr_len)
212 otx2_npc_dbg("x->hdr_off = %d, len = %d, info->len = %d,"
213 "x->key_off = %d", x->hdr_off, len, info->len,
216 hdr_off -= info->hw_hdr_len;
218 if (hdr_off + len > info->len)
219 len = info->len - hdr_off;
221 /* Check for over-write of previous layer */
222 if (!flow_mem_is_zero(pst->mcam_mask + x->key_off,
224 /* Cannot support this data match */
225 rte_flow_error_set(pst->error, ENOTSUP,
226 RTE_FLOW_ERROR_TYPE_ITEM,
228 "Extraction unsupported");
232 len = flow_check_copysz((OTX2_MAX_MCAM_WIDTH_DWORDS * 8)
236 rte_flow_error_set(pst->error, ENOTSUP,
237 RTE_FLOW_ERROR_TYPE_ITEM,
243 /* Need to reverse complete structure so that dest addr is at
244 * MSB so as to program the MCAM using mcam_data & mcam_mask
247 flow_prep_mcam_ldata(int_info,
248 (const uint8_t *)info->spec + hdr_off,
250 flow_prep_mcam_ldata(int_info_mask,
251 (const uint8_t *)info->mask + hdr_off,
254 otx2_npc_dbg("Spec: ");
255 for (k = 0; k < info->len; k++)
256 otx2_npc_dbg("0x%.2x ",
257 ((const uint8_t *)info->spec)[k]);
259 otx2_npc_dbg("Int_info: ");
260 for (k = 0; k < info->len; k++)
261 otx2_npc_dbg("0x%.2x ", int_info[k]);
263 memcpy(pst->mcam_mask + x->key_off, int_info_mask, len);
264 memcpy(pst->mcam_data + x->key_off, int_info, len);
266 otx2_npc_dbg("Parse state mcam data & mask");
267 for (idx = 0; idx < len ; idx++)
268 otx2_npc_dbg("data[%d]: 0x%x, mask[%d]: 0x%x", idx,
269 *(pst->mcam_data + idx + x->key_off), idx,
270 *(pst->mcam_mask + idx + x->key_off));
274 /* Next pattern to parse by subsequent layers */
280 flow_range_is_valid(const char *spec, const char *last, const char *mask,
283 /* Mask must be zero or equal to spec as we do not support
284 * non-contiguous ranges.
288 (spec[len] & mask[len]) != (last[len] & mask[len]))
289 return 0; /* False */
296 flow_mask_is_supported(const char *mask, const char *hw_mask, int len)
299 * If no hw_mask, assume nothing is supported.
303 return flow_mem_is_zero(mask, len);
306 if ((mask[len] | hw_mask[len]) != hw_mask[len])
307 return 0; /* False */
313 otx2_flow_parse_item_basic(const struct rte_flow_item *item,
314 struct otx2_flow_item_info *info,
315 struct rte_flow_error *error)
317 /* Item must not be NULL */
319 rte_flow_error_set(error, EINVAL,
320 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
324 /* If spec is NULL, both mask and last must be NULL, this
325 * makes it to match ANY value (eq to mask = 0).
326 * Setting either mask or last without spec is an error
328 if (item->spec == NULL) {
329 if (item->last == NULL && item->mask == NULL) {
333 rte_flow_error_set(error, EINVAL,
334 RTE_FLOW_ERROR_TYPE_ITEM, item,
335 "mask or last set without spec");
339 /* We have valid spec */
340 info->spec = item->spec;
342 /* If mask is not set, use default mask, err if default mask is
345 if (item->mask == NULL) {
346 otx2_npc_dbg("Item mask null, using default mask");
347 if (info->def_mask == NULL) {
348 rte_flow_error_set(error, EINVAL,
349 RTE_FLOW_ERROR_TYPE_ITEM, item,
350 "No mask or default mask given");
353 info->mask = info->def_mask;
355 info->mask = item->mask;
358 /* mask specified must be subset of hw supported mask
359 * mask | hw_mask == hw_mask
361 if (!flow_mask_is_supported(info->mask, info->hw_mask, info->len)) {
362 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
363 item, "Unsupported field in the mask");
367 /* Now we have spec and mask. OTX2 does not support non-contiguous
368 * range. We should have either:
369 * - spec & mask == last & mask or,
373 if (item->last != NULL && !flow_mem_is_zero(item->last, info->len)) {
374 if (!flow_range_is_valid(item->spec, item->last, info->mask,
376 rte_flow_error_set(error, EINVAL,
377 RTE_FLOW_ERROR_TYPE_ITEM, item,
378 "Unsupported range for match");
387 otx2_flow_keyx_compress(uint64_t *data, uint32_t nibble_mask)
389 uint64_t cdata[2] = {0ULL, 0ULL}, nibble;
392 for (i = 0; i < NPC_MAX_KEY_NIBBLES; i++) {
393 if (nibble_mask & (1 << i)) {
394 nibble = (data[i / 16] >> ((i & 0xf) * 4)) & 0xf;
395 cdata[j / 16] |= (nibble << ((j & 0xf) * 4));
405 flow_first_set_bit(uint64_t slab)
409 if ((slab & 0xffffffff) == 0) {
413 if ((slab & 0xffff) == 0) {
417 if ((slab & 0xff) == 0) {
421 if ((slab & 0xf) == 0) {
425 if ((slab & 0x3) == 0) {
429 if ((slab & 0x1) == 0)
436 flow_shift_lv_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
437 struct otx2_npc_flow_info *flow_info,
438 uint32_t old_ent, uint32_t new_ent)
440 struct npc_mcam_shift_entry_req *req;
441 struct npc_mcam_shift_entry_rsp *rsp;
442 struct otx2_flow_list *list;
443 struct rte_flow *flow_iter;
446 otx2_npc_dbg("Old ent:%u new ent:%u priority:%u", old_ent, new_ent,
449 list = &flow_info->flow_list[flow->priority];
451 /* Old entry is disabled & it's contents are moved to new_entry,
452 * new entry is enabled finally.
454 req = otx2_mbox_alloc_msg_npc_mcam_shift_entry(mbox);
455 req->curr_entry[0] = old_ent;
456 req->new_entry[0] = new_ent;
457 req->shift_count = 1;
459 otx2_mbox_msg_send(mbox, 0);
460 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
464 /* Remove old node from list */
465 TAILQ_FOREACH(flow_iter, list, next) {
466 if (flow_iter->mcam_id == old_ent)
467 TAILQ_REMOVE(list, flow_iter, next);
470 /* Insert node with new mcam id at right place */
471 TAILQ_FOREACH(flow_iter, list, next) {
472 if (flow_iter->mcam_id > new_ent)
473 TAILQ_INSERT_BEFORE(flow_iter, flow, next);
478 /* Exchange all required entries with a given priority level */
480 flow_shift_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
481 struct otx2_npc_flow_info *flow_info,
482 struct npc_mcam_alloc_entry_rsp *rsp, int dir, int prio_lvl)
484 struct rte_bitmap *fr_bmp, *fr_bmp_rev, *lv_bmp, *lv_bmp_rev, *bmp;
485 uint32_t e_fr = 0, e_lv = 0, e, e_id = 0, mcam_entries;
486 uint64_t fr_bit_pos = 0, lv_bit_pos = 0, bit_pos = 0;
487 /* Bit position within the slab */
488 uint32_t sl_fr_bit_off = 0, sl_lv_bit_off = 0;
489 /* Overall bit position of the start of slab */
490 /* free & live entry index */
491 int rc_fr = 0, rc_lv = 0, rc = 0, idx = 0;
492 struct otx2_mcam_ents_info *ent_info;
493 /* free & live bitmap slab */
494 uint64_t sl_fr = 0, sl_lv = 0, *sl;
496 fr_bmp = flow_info->free_entries[prio_lvl];
497 fr_bmp_rev = flow_info->free_entries_rev[prio_lvl];
498 lv_bmp = flow_info->live_entries[prio_lvl];
499 lv_bmp_rev = flow_info->live_entries_rev[prio_lvl];
500 ent_info = &flow_info->flow_entry_info[prio_lvl];
501 mcam_entries = flow_info->mcam_entries;
504 /* New entries allocated are always contiguous, but older entries
505 * already in free/live bitmap can be non-contiguous: so return
506 * shifted entries should be in non-contiguous format.
508 while (idx <= rsp->count) {
509 if (!sl_fr && !sl_lv) {
510 /* Lower index elements to be exchanged */
512 rc_fr = rte_bitmap_scan(fr_bmp, &e_fr, &sl_fr);
513 rc_lv = rte_bitmap_scan(lv_bmp, &e_lv, &sl_lv);
514 otx2_npc_dbg("Fwd slab rc fr %u rc lv %u "
515 "e_fr %u e_lv %u", rc_fr, rc_lv,
518 rc_fr = rte_bitmap_scan(fr_bmp_rev,
521 rc_lv = rte_bitmap_scan(lv_bmp_rev,
525 otx2_npc_dbg("Rev slab rc fr %u rc lv %u "
526 "e_fr %u e_lv %u", rc_fr, rc_lv,
532 fr_bit_pos = flow_first_set_bit(sl_fr);
533 e_fr = sl_fr_bit_off + fr_bit_pos;
534 otx2_npc_dbg("Fr_bit_pos 0x%" PRIx64, fr_bit_pos);
540 lv_bit_pos = flow_first_set_bit(sl_lv);
541 e_lv = sl_lv_bit_off + lv_bit_pos;
542 otx2_npc_dbg("Lv_bit_pos 0x%" PRIx64, lv_bit_pos);
547 /* First entry is from free_bmap */
552 bit_pos = fr_bit_pos;
554 e_id = mcam_entries - e - 1;
557 otx2_npc_dbg("Fr e %u e_id %u", e, e_id);
562 bit_pos = lv_bit_pos;
564 e_id = mcam_entries - e - 1;
568 otx2_npc_dbg("Lv e %u e_id %u", e, e_id);
569 if (idx < rsp->count)
571 flow_shift_lv_ent(mbox, flow,
576 rte_bitmap_clear(bmp, e);
577 rte_bitmap_set(bmp, rsp->entry + idx);
578 /* Update entry list, use non-contiguous
581 rsp->entry_list[idx] = e_id;
582 *sl &= ~(1 << bit_pos);
584 /* Update min & max entry identifiers in current
588 ent_info->max_id = rsp->entry + idx;
589 ent_info->min_id = e_id;
591 ent_info->max_id = e_id;
592 ent_info->min_id = rsp->entry;
600 /* Validate if newly allocated entries lie in the correct priority zone
601 * since NPC_MCAM_LOWER_PRIO & NPC_MCAM_HIGHER_PRIO don't ensure zone accuracy.
602 * If not properly aligned, shift entries to do so
605 flow_validate_and_shift_prio_ent(struct otx2_mbox *mbox, struct rte_flow *flow,
606 struct otx2_npc_flow_info *flow_info,
607 struct npc_mcam_alloc_entry_rsp *rsp,
610 int prio_idx = 0, rc = 0, needs_shift = 0, idx, prio = flow->priority;
611 struct otx2_mcam_ents_info *info = flow_info->flow_entry_info;
612 int dir = (req_prio == NPC_MCAM_HIGHER_PRIO) ? 1 : -1;
613 uint32_t tot_ent = 0;
615 otx2_npc_dbg("Dir %d, priority = %d", dir, prio);
618 prio_idx = flow_info->flow_max_priority - 1;
620 /* Only live entries needs to be shifted, free entries can just be
621 * moved by bits manipulation.
624 /* For dir = -1(NPC_MCAM_LOWER_PRIO), when shifting,
625 * NPC_MAX_PREALLOC_ENT are exchanged with adjoining higher priority
626 * level entries(lower indexes).
628 * For dir = +1(NPC_MCAM_HIGHER_PRIO), during shift,
629 * NPC_MAX_PREALLOC_ENT are exchanged with adjoining lower priority
630 * level entries(higher indexes) with highest indexes.
633 tot_ent = info[prio_idx].free_ent + info[prio_idx].live_ent;
635 if (dir < 0 && prio_idx != prio &&
636 rsp->entry > info[prio_idx].max_id && tot_ent) {
637 otx2_npc_dbg("Rsp entry %u prio idx %u "
638 "max id %u", rsp->entry, prio_idx,
639 info[prio_idx].max_id);
642 } else if ((dir > 0) && (prio_idx != prio) &&
643 (rsp->entry < info[prio_idx].min_id) && tot_ent) {
644 otx2_npc_dbg("Rsp entry %u prio idx %u "
645 "min id %u", rsp->entry, prio_idx,
646 info[prio_idx].min_id);
650 otx2_npc_dbg("Needs_shift = %d", needs_shift);
653 rc = flow_shift_ent(mbox, flow, flow_info, rsp, dir,
656 for (idx = 0; idx < rsp->count; idx++)
657 rsp->entry_list[idx] = rsp->entry + idx;
659 } while ((prio_idx != prio) && (prio_idx += dir));
665 flow_find_ref_entry(struct otx2_npc_flow_info *flow_info, int *prio,
668 struct otx2_mcam_ents_info *info = flow_info->flow_entry_info;
671 while (step < flow_info->flow_max_priority) {
672 if (((prio_lvl + step) < flow_info->flow_max_priority) &&
673 info[prio_lvl + step].live_ent) {
674 *prio = NPC_MCAM_HIGHER_PRIO;
675 return info[prio_lvl + step].min_id;
678 if (((prio_lvl - step) >= 0) &&
679 info[prio_lvl - step].live_ent) {
680 otx2_npc_dbg("Prio_lvl %u live %u", prio_lvl - step,
681 info[prio_lvl - step].live_ent);
682 *prio = NPC_MCAM_LOWER_PRIO;
683 return info[prio_lvl - step].max_id;
687 *prio = NPC_MCAM_ANY_PRIO;
692 flow_fill_entry_cache(struct otx2_mbox *mbox, struct rte_flow *flow,
693 struct otx2_npc_flow_info *flow_info, uint32_t *free_ent)
695 struct rte_bitmap *free_bmp, *free_bmp_rev, *live_bmp, *live_bmp_rev;
696 struct npc_mcam_alloc_entry_rsp rsp_local;
697 struct npc_mcam_alloc_entry_rsp *rsp_cmd;
698 struct npc_mcam_alloc_entry_req *req;
699 struct npc_mcam_alloc_entry_rsp *rsp;
700 struct otx2_mcam_ents_info *info;
701 uint16_t ref_ent, idx;
704 info = &flow_info->flow_entry_info[flow->priority];
705 free_bmp = flow_info->free_entries[flow->priority];
706 free_bmp_rev = flow_info->free_entries_rev[flow->priority];
707 live_bmp = flow_info->live_entries[flow->priority];
708 live_bmp_rev = flow_info->live_entries_rev[flow->priority];
710 ref_ent = flow_find_ref_entry(flow_info, &prio, flow->priority);
712 req = otx2_mbox_alloc_msg_npc_mcam_alloc_entry(mbox);
714 req->count = flow_info->flow_prealloc_size;
715 req->priority = prio;
716 req->ref_entry = ref_ent;
718 otx2_npc_dbg("Fill cache ref entry %u prio %u", ref_ent, prio);
720 otx2_mbox_msg_send(mbox, 0);
721 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp_cmd);
726 memcpy(rsp, rsp_cmd, sizeof(*rsp));
728 otx2_npc_dbg("Alloc entry %u count %u , prio = %d", rsp->entry,
731 /* Non-first ent cache fill */
732 if (prio != NPC_MCAM_ANY_PRIO) {
733 flow_validate_and_shift_prio_ent(mbox, flow, flow_info, rsp,
736 /* Copy into response entry list */
737 for (idx = 0; idx < rsp->count; idx++)
738 rsp->entry_list[idx] = rsp->entry + idx;
741 otx2_npc_dbg("Fill entry cache rsp count %u", rsp->count);
742 /* Update free entries, reverse free entries list,
743 * min & max entry ids.
745 for (idx = 0; idx < rsp->count; idx++) {
746 if (unlikely(rsp->entry_list[idx] < info->min_id))
747 info->min_id = rsp->entry_list[idx];
749 if (unlikely(rsp->entry_list[idx] > info->max_id))
750 info->max_id = rsp->entry_list[idx];
752 /* Skip entry to be returned, not to be part of free
755 if (prio == NPC_MCAM_HIGHER_PRIO) {
756 if (unlikely(idx == (rsp->count - 1))) {
757 *free_ent = rsp->entry_list[idx];
761 if (unlikely(!idx)) {
762 *free_ent = rsp->entry_list[idx];
767 rte_bitmap_set(free_bmp, rsp->entry_list[idx]);
768 rte_bitmap_set(free_bmp_rev, flow_info->mcam_entries -
769 rsp->entry_list[idx] - 1);
771 otx2_npc_dbg("Final rsp entry %u rsp entry rev %u",
772 rsp->entry_list[idx],
773 flow_info->mcam_entries - rsp->entry_list[idx] - 1);
776 otx2_npc_dbg("Cache free entry %u, rev = %u", *free_ent,
777 flow_info->mcam_entries - *free_ent - 1);
779 rte_bitmap_set(live_bmp, *free_ent);
780 rte_bitmap_set(live_bmp_rev, flow_info->mcam_entries - *free_ent - 1);
786 flow_check_preallocated_entry_cache(struct otx2_mbox *mbox,
787 struct rte_flow *flow,
788 struct otx2_npc_flow_info *flow_info)
790 struct rte_bitmap *free, *free_rev, *live, *live_rev;
791 uint32_t pos = 0, free_ent = 0, mcam_entries;
792 struct otx2_mcam_ents_info *info;
796 otx2_npc_dbg("Flow priority %u", flow->priority);
798 info = &flow_info->flow_entry_info[flow->priority];
800 free_rev = flow_info->free_entries_rev[flow->priority];
801 free = flow_info->free_entries[flow->priority];
802 live_rev = flow_info->live_entries_rev[flow->priority];
803 live = flow_info->live_entries[flow->priority];
804 mcam_entries = flow_info->mcam_entries;
806 if (info->free_ent) {
807 rc = rte_bitmap_scan(free, &pos, &slab);
809 /* Get free_ent from free entry bitmap */
810 free_ent = pos + __builtin_ctzll(slab);
811 otx2_npc_dbg("Allocated from cache entry %u", free_ent);
812 /* Remove from free bitmaps and add to live ones */
813 rte_bitmap_clear(free, free_ent);
814 rte_bitmap_set(live, free_ent);
815 rte_bitmap_clear(free_rev,
816 mcam_entries - free_ent - 1);
817 rte_bitmap_set(live_rev,
818 mcam_entries - free_ent - 1);
825 otx2_npc_dbg("No free entry:its a mess");
829 rc = flow_fill_entry_cache(mbox, flow, flow_info, &free_ent);
837 otx2_flow_mcam_alloc_and_write(struct rte_flow *flow, struct otx2_mbox *mbox,
838 __rte_unused struct otx2_parse_state *pst,
839 struct otx2_npc_flow_info *flow_info)
841 int use_ctr = (flow->ctr_id == NPC_COUNTER_NONE ? 0 : 1);
842 struct npc_mcam_write_entry_req *req;
843 struct mbox_msghdr *rsp;
849 rc = flow_mcam_alloc_counter(mbox, &ctr);
854 entry = flow_check_preallocated_entry_cache(mbox, flow, flow_info);
856 otx2_err("Prealloc failed");
857 otx2_flow_mcam_free_counter(mbox, ctr);
858 return NPC_MCAM_ALLOC_FAILED;
860 req = otx2_mbox_alloc_msg_npc_mcam_write_entry(mbox);
861 req->set_cntr = use_ctr;
864 otx2_npc_dbg("Alloc & write entry %u", entry);
867 (flow->nix_intf == OTX2_INTF_RX) ? NPC_MCAM_RX : NPC_MCAM_TX;
868 req->enable_entry = 1;
869 req->entry_data.action = flow->npc_action;
872 * DPDK sets vtag action on per interface basis, not
873 * per flow basis. It is a matter of how we decide to support
874 * this pmd specific behavior. There are two ways:
875 * 1. Inherit the vtag action from the one configured
876 * for this interface. This can be read from the
877 * vtag_action configured for default mcam entry of
879 * 2. Do not support vtag action with rte_flow.
881 * Second approach is used now.
883 req->entry_data.vtag_action = 0ULL;
885 for (idx = 0; idx < OTX2_MAX_MCAM_WIDTH_DWORDS; idx++) {
886 req->entry_data.kw[idx] = flow->mcam_data[idx];
887 req->entry_data.kw_mask[idx] = flow->mcam_mask[idx];
890 if (flow->nix_intf == OTX2_INTF_RX) {
891 req->entry_data.kw[0] |= flow_info->channel;
892 req->entry_data.kw_mask[0] |= (BIT_ULL(12) - 1);
894 uint16_t pf_func = (flow->npc_action >> 4) & 0xffff;
896 pf_func = htons(pf_func);
897 req->entry_data.kw[0] |= ((uint64_t)pf_func << 32);
898 req->entry_data.kw_mask[0] |= ((uint64_t)0xffff << 32);
901 otx2_mbox_msg_send(mbox, 0);
902 rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
906 flow->mcam_id = entry;