2 * Copyright (c) 2016 QLogic Corporation.
6 * See LICENSE.qede_pmd for copyright and licensing details.
9 #ifndef __ECORE_HSI_INIT_TOOL__
10 #define __ECORE_HSI_INIT_TOOL__
11 /**************************************/
12 /* Init Tool HSI constants and macros */
13 /**************************************/
15 /* Width of GRC address in bits (addresses are specified in dwords) */
16 #define GRC_ADDR_BITS 23
17 #define MAX_GRC_ADDR ((1 << GRC_ADDR_BITS) - 1)
19 /* indicates an init that should be applied to any phase ID */
20 #define ANY_PHASE_ID 0xffff
22 /* Max size in dwords of a zipped array */
23 #define MAX_ZIPPED_SIZE 8192
26 MODE_BB_A0_DEPRECATED,
54 enum init_split_types {
63 struct fw_asserts_ram_section {
64 /* The offset of the section in the RAM in RAM lines (64-bit units) */
65 __le16 section_ram_line_offset;
66 /* The size of the section in RAM lines (64-bit units) */
67 __le16 section_ram_line_size;
68 /* The offset of the asserts list within the section in dwords */
70 /* The size of an assert list element in dwords */
71 u8 list_element_dword_size;
72 u8 list_num_elements /* The number of elements in the asserts list */;
73 /* The offset of the next list index field within the section in dwords */
74 u8 list_next_index_dword_offset;
79 u8 major /* Firmware major version number */;
80 u8 minor /* Firmware minor version number */;
81 u8 rev /* Firmware revision version number */;
82 /* Firmware engineering version number (for bootleg versions) */
87 __le16 tools_ver /* Tools version number */;
88 u8 image_id /* FW image ID (e.g. main, l2b, kuku) */;
90 struct fw_ver_num num /* FW version number */;
91 __le32 timestamp /* FW Timestamp in unix time (sec. since 1970) */;
96 struct fw_ver_info ver /* FW version information */;
97 /* Info regarding the FW asserts section in the Storm RAM */
98 struct fw_asserts_ram_section fw_asserts_section;
102 struct fw_info_location {
103 /* GRC address where the fw_info struct is located. */
105 /* Size of the fw_info structure (thats located at the grc_addr). */
110 * Binary buffer header
112 struct bin_buffer_hdr {
113 /* buffer offset in bytes from the beginning of the binary file */
115 __le32 length /* buffer length in bytes */;
120 * binary init buffer types
122 enum bin_init_buffer_type {
123 BIN_BUF_INIT_FW_VER_INFO /* fw_ver_info struct */,
124 BIN_BUF_INIT_CMD /* init commands */,
125 BIN_BUF_INIT_VAL /* init data */,
126 BIN_BUF_INIT_MODE_TREE /* init modes tree */,
127 BIN_BUF_INIT_IRO /* internal RAM offsets */,
128 MAX_BIN_INIT_BUFFER_TYPE
133 * init array header: raw
135 struct init_array_raw_hdr {
137 /* Init array type, from init_array_types enum */
138 #define INIT_ARRAY_RAW_HDR_TYPE_MASK 0xF
139 #define INIT_ARRAY_RAW_HDR_TYPE_SHIFT 0
140 /* init array params */
141 #define INIT_ARRAY_RAW_HDR_PARAMS_MASK 0xFFFFFFF
142 #define INIT_ARRAY_RAW_HDR_PARAMS_SHIFT 4
146 * init array header: standard
148 struct init_array_standard_hdr {
150 /* Init array type, from init_array_types enum */
151 #define INIT_ARRAY_STANDARD_HDR_TYPE_MASK 0xF
152 #define INIT_ARRAY_STANDARD_HDR_TYPE_SHIFT 0
153 /* Init array size (in dwords) */
154 #define INIT_ARRAY_STANDARD_HDR_SIZE_MASK 0xFFFFFFF
155 #define INIT_ARRAY_STANDARD_HDR_SIZE_SHIFT 4
159 * init array header: zipped
161 struct init_array_zipped_hdr {
163 /* Init array type, from init_array_types enum */
164 #define INIT_ARRAY_ZIPPED_HDR_TYPE_MASK 0xF
165 #define INIT_ARRAY_ZIPPED_HDR_TYPE_SHIFT 0
166 /* Init array zipped size (in bytes) */
167 #define INIT_ARRAY_ZIPPED_HDR_ZIPPED_SIZE_MASK 0xFFFFFFF
168 #define INIT_ARRAY_ZIPPED_HDR_ZIPPED_SIZE_SHIFT 4
172 * init array header: pattern
174 struct init_array_pattern_hdr {
176 /* Init array type, from init_array_types enum */
177 #define INIT_ARRAY_PATTERN_HDR_TYPE_MASK 0xF
178 #define INIT_ARRAY_PATTERN_HDR_TYPE_SHIFT 0
179 /* pattern size in dword */
180 #define INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE_MASK 0xF
181 #define INIT_ARRAY_PATTERN_HDR_PATTERN_SIZE_SHIFT 4
182 /* pattern repetitions */
183 #define INIT_ARRAY_PATTERN_HDR_REPETITIONS_MASK 0xFFFFFF
184 #define INIT_ARRAY_PATTERN_HDR_REPETITIONS_SHIFT 8
188 * init array header union
190 union init_array_hdr {
191 struct init_array_raw_hdr raw /* raw init array header */;
192 /* standard init array header */
193 struct init_array_standard_hdr standard;
194 struct init_array_zipped_hdr zipped /* zipped init array header */;
195 struct init_array_pattern_hdr pattern /* pattern init array header */;
205 enum init_array_types {
206 INIT_ARR_STANDARD /* standard init array */,
207 INIT_ARR_ZIPPED /* zipped init array */,
208 INIT_ARR_PATTERN /* a repeated pattern */,
215 * init operation: callback
217 struct init_callback_op {
219 /* Init operation, from init_op_types enum */
220 #define INIT_CALLBACK_OP_OP_MASK 0xF
221 #define INIT_CALLBACK_OP_OP_SHIFT 0
222 #define INIT_CALLBACK_OP_RESERVED_MASK 0xFFFFFFF
223 #define INIT_CALLBACK_OP_RESERVED_SHIFT 4
224 __le16 callback_id /* Callback ID */;
225 __le16 block_id /* Blocks ID */;
230 * init operation: delay
232 struct init_delay_op {
234 /* Init operation, from init_op_types enum */
235 #define INIT_DELAY_OP_OP_MASK 0xF
236 #define INIT_DELAY_OP_OP_SHIFT 0
237 #define INIT_DELAY_OP_RESERVED_MASK 0xFFFFFFF
238 #define INIT_DELAY_OP_RESERVED_SHIFT 4
239 __le32 delay /* delay in us */;
244 * init operation: if_mode
246 struct init_if_mode_op {
248 /* Init operation, from init_op_types enum */
249 #define INIT_IF_MODE_OP_OP_MASK 0xF
250 #define INIT_IF_MODE_OP_OP_SHIFT 0
251 #define INIT_IF_MODE_OP_RESERVED1_MASK 0xFFF
252 #define INIT_IF_MODE_OP_RESERVED1_SHIFT 4
253 /* Commands to skip if the modes dont match */
254 #define INIT_IF_MODE_OP_CMD_OFFSET_MASK 0xFFFF
255 #define INIT_IF_MODE_OP_CMD_OFFSET_SHIFT 16
257 /* offset (in bytes) in modes expression buffer */
258 __le16 modes_buf_offset;
263 * init operation: if_phase
265 struct init_if_phase_op {
267 /* Init operation, from init_op_types enum */
268 #define INIT_IF_PHASE_OP_OP_MASK 0xF
269 #define INIT_IF_PHASE_OP_OP_SHIFT 0
270 /* Indicates if DMAE is enabled in this phase */
271 #define INIT_IF_PHASE_OP_DMAE_ENABLE_MASK 0x1
272 #define INIT_IF_PHASE_OP_DMAE_ENABLE_SHIFT 4
273 #define INIT_IF_PHASE_OP_RESERVED1_MASK 0x7FF
274 #define INIT_IF_PHASE_OP_RESERVED1_SHIFT 5
275 /* Commands to skip if the phases dont match */
276 #define INIT_IF_PHASE_OP_CMD_OFFSET_MASK 0xFFFF
277 #define INIT_IF_PHASE_OP_CMD_OFFSET_SHIFT 16
279 #define INIT_IF_PHASE_OP_PHASE_MASK 0xFF /* Init phase */
280 #define INIT_IF_PHASE_OP_PHASE_SHIFT 0
281 #define INIT_IF_PHASE_OP_RESERVED2_MASK 0xFF
282 #define INIT_IF_PHASE_OP_RESERVED2_SHIFT 8
283 #define INIT_IF_PHASE_OP_PHASE_ID_MASK 0xFFFF /* Init phase ID */
284 #define INIT_IF_PHASE_OP_PHASE_ID_SHIFT 16
289 * init mode operators
292 INIT_MODE_OP_NOT /* init mode not operator */,
293 INIT_MODE_OP_OR /* init mode or operator */,
294 INIT_MODE_OP_AND /* init mode and operator */,
300 * init operation: raw
304 /* Init operation, from init_op_types enum */
305 #define INIT_RAW_OP_OP_MASK 0xF
306 #define INIT_RAW_OP_OP_SHIFT 0
307 #define INIT_RAW_OP_PARAM1_MASK 0xFFFFFFF /* init param 1 */
308 #define INIT_RAW_OP_PARAM1_SHIFT 4
309 __le32 param2 /* Init param 2 */;
315 struct init_op_array_params {
316 __le16 size /* array size in dwords */;
317 __le16 offset /* array start offset in dwords */;
321 * Write init operation arguments
323 union init_write_args {
324 /* value to write, used when init source is INIT_SRC_INLINE */
326 /* number of zeros to write, used when init source is INIT_SRC_ZEROS */
328 /* array offset to write, used when init source is INIT_SRC_ARRAY */
330 /* runtime array params to write, used when init source is INIT_SRC_RUNTIME */
331 struct init_op_array_params runtime;
335 * init operation: write
337 struct init_write_op {
339 /* init operation, from init_op_types enum */
340 #define INIT_WRITE_OP_OP_MASK 0xF
341 #define INIT_WRITE_OP_OP_SHIFT 0
342 /* init source type, taken from init_source_types enum */
343 #define INIT_WRITE_OP_SOURCE_MASK 0x7
344 #define INIT_WRITE_OP_SOURCE_SHIFT 4
345 #define INIT_WRITE_OP_RESERVED_MASK 0x1
346 #define INIT_WRITE_OP_RESERVED_SHIFT 7
347 /* indicates if the register is wide-bus */
348 #define INIT_WRITE_OP_WIDE_BUS_MASK 0x1
349 #define INIT_WRITE_OP_WIDE_BUS_SHIFT 8
350 /* internal (absolute) GRC address, in dwords */
351 #define INIT_WRITE_OP_ADDRESS_MASK 0x7FFFFF
352 #define INIT_WRITE_OP_ADDRESS_SHIFT 9
353 union init_write_args args /* Write init operation arguments */;
357 * init operation: read
359 struct init_read_op {
361 /* init operation, from init_op_types enum */
362 #define INIT_READ_OP_OP_MASK 0xF
363 #define INIT_READ_OP_OP_SHIFT 0
364 /* polling type, from init_poll_types enum */
365 #define INIT_READ_OP_POLL_TYPE_MASK 0xF
366 #define INIT_READ_OP_POLL_TYPE_SHIFT 4
367 #define INIT_READ_OP_RESERVED_MASK 0x1
368 #define INIT_READ_OP_RESERVED_SHIFT 8
369 /* internal (absolute) GRC address, in dwords */
370 #define INIT_READ_OP_ADDRESS_MASK 0x7FFFFF
371 #define INIT_READ_OP_ADDRESS_SHIFT 9
372 /* expected polling value, used only when polling is done */
377 * Init operations union
380 struct init_raw_op raw /* raw init operation */;
381 struct init_write_op write /* write init operation */;
382 struct init_read_op read /* read init operation */;
383 struct init_if_mode_op if_mode /* if_mode init operation */;
384 struct init_if_phase_op if_phase /* if_phase init operation */;
385 struct init_callback_op callback /* callback init operation */;
386 struct init_delay_op delay /* delay init operation */;
392 * Init command operation types
395 INIT_OP_READ /* GRC read init command */,
396 INIT_OP_WRITE /* GRC write init command */,
397 /* Skip init commands if the init modes expression doesn't match */
399 /* Skip init commands if the init phase doesn't match */
401 INIT_OP_DELAY /* delay init command */,
402 INIT_OP_CALLBACK /* callback init command */,
410 enum init_poll_types {
411 INIT_POLL_NONE /* No polling */,
412 INIT_POLL_EQ /* init value is included in the init command */,
413 INIT_POLL_OR /* init value is all zeros */,
414 INIT_POLL_AND /* init value is an array of values */,
424 enum init_source_types {
425 INIT_SRC_INLINE /* init value is included in the init command */,
426 INIT_SRC_ZEROS /* init value is all zeros */,
427 INIT_SRC_ARRAY /* init value is an array of values */,
428 INIT_SRC_RUNTIME /* init value is provided during runtime */,
429 MAX_INIT_SOURCE_TYPES
436 * Internal RAM Offsets macro data
439 __le32 base /* RAM field offset */;
440 __le16 m1 /* multiplier 1 */;
441 __le16 m2 /* multiplier 2 */;
442 __le16 m3 /* multiplier 3 */;
443 __le16 size /* RAM field size */;
446 #endif /* __ECORE_HSI_INIT_TOOL__ */