1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2012-2018 Solarflare Communications Inc.
11 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
13 __checkReturn efx_rc_t
16 __out efx_link_mode_t *link_modep)
18 efx_port_t *epp = &(enp->en_port);
19 ef10_link_state_t els;
22 if ((rc = ef10_phy_get_link(enp, &els)) != 0)
25 epp->ep_adv_cap_mask = els.els_adv_cap_mask;
26 epp->ep_fcntl = els.els_fcntl;
28 *link_modep = els.els_link_mode;
33 EFSYS_PROBE1(fail1, efx_rc_t, rc);
35 *link_modep = EFX_LINK_UNKNOWN;
40 __checkReturn efx_rc_t
43 __out boolean_t *mac_upp)
45 ef10_link_state_t els;
49 * Because EF10 doesn't *require* polling, we can't rely on
50 * ef10_mac_poll() being executed to populate epp->ep_mac_up.
52 if ((rc = ef10_phy_get_link(enp, &els)) != 0)
55 *mac_upp = els.els_mac_up;
60 EFSYS_PROBE1(fail1, efx_rc_t, rc);
66 * EF10 adapters use MC_CMD_VADAPTOR_SET_MAC to set the
67 * MAC address; the address field in MC_CMD_SET_MAC has no
69 * MC_CMD_VADAPTOR_SET_MAC requires mac-spoofing privilege and
70 * the port to have no filters or queues active.
72 static __checkReturn efx_rc_t
73 efx_mcdi_vadapter_set_mac(
76 efx_port_t *epp = &(enp->en_port);
78 uint8_t payload[MAX(MC_CMD_VADAPTOR_SET_MAC_IN_LEN,
79 MC_CMD_VADAPTOR_SET_MAC_OUT_LEN)];
82 (void) memset(payload, 0, sizeof (payload));
83 req.emr_cmd = MC_CMD_VADAPTOR_SET_MAC;
84 req.emr_in_buf = payload;
85 req.emr_in_length = MC_CMD_VADAPTOR_SET_MAC_IN_LEN;
86 req.emr_out_buf = payload;
87 req.emr_out_length = MC_CMD_VADAPTOR_SET_MAC_OUT_LEN;
89 MCDI_IN_SET_DWORD(req, VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID,
91 EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, VADAPTOR_SET_MAC_IN_MACADDR),
94 efx_mcdi_execute(enp, &req);
96 if (req.emr_rc != 0) {
104 EFSYS_PROBE1(fail1, efx_rc_t, rc);
109 __checkReturn efx_rc_t
115 if ((rc = efx_mcdi_vadapter_set_mac(enp)) != 0) {
120 * Fallback for older Huntington firmware without Vadapter
123 if ((rc = ef10_mac_reconfigure(enp)) != 0)
133 EFSYS_PROBE1(fail1, efx_rc_t, rc);
138 static __checkReturn efx_rc_t
144 uint8_t payload[MAX(MC_CMD_SET_MAC_EXT_IN_LEN,
145 MC_CMD_SET_MAC_OUT_LEN)];
148 (void) memset(payload, 0, sizeof (payload));
149 req.emr_cmd = MC_CMD_SET_MAC;
150 req.emr_in_buf = payload;
151 req.emr_in_length = MC_CMD_SET_MAC_EXT_IN_LEN;
152 req.emr_out_buf = payload;
153 req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN;
155 /* Only configure the MTU in this call to MC_CMD_SET_MAC */
156 MCDI_IN_SET_DWORD(req, SET_MAC_EXT_IN_MTU, mtu);
157 MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_EXT_IN_CONTROL,
158 SET_MAC_EXT_IN_CFG_MTU, 1);
160 efx_mcdi_execute(enp, &req);
162 if (req.emr_rc != 0) {
170 EFSYS_PROBE1(fail1, efx_rc_t, rc);
175 static __checkReturn efx_rc_t
181 uint8_t payload[MAX(MC_CMD_SET_MAC_EXT_IN_LEN,
182 MC_CMD_SET_MAC_V2_OUT_LEN)];
185 (void) memset(payload, 0, sizeof (payload));
186 req.emr_cmd = MC_CMD_SET_MAC;
187 req.emr_in_buf = payload;
188 req.emr_in_length = MC_CMD_SET_MAC_EXT_IN_LEN;
189 req.emr_out_buf = payload;
190 req.emr_out_length = MC_CMD_SET_MAC_V2_OUT_LEN;
193 * With MC_CMD_SET_MAC_EXT_IN_CONTROL set to 0, this just queries the
194 * MTU. This should always be supported on Medford, but it is not
195 * supported on older Huntington firmware.
197 MCDI_IN_SET_DWORD(req, SET_MAC_EXT_IN_CONTROL, 0);
199 efx_mcdi_execute(enp, &req);
201 if (req.emr_rc != 0) {
205 if (req.emr_out_length_used < MC_CMD_SET_MAC_V2_OUT_MTU_OFST + 4) {
210 *mtu = MCDI_OUT_DWORD(req, SET_MAC_V2_OUT_MTU);
217 EFSYS_PROBE1(fail1, efx_rc_t, rc);
222 __checkReturn efx_rc_t
226 efx_port_t *epp = &(enp->en_port);
227 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
230 if (encp->enc_enhanced_set_mac_supported) {
231 if ((rc = efx_mcdi_mtu_set(enp, epp->ep_mac_pdu)) != 0)
235 * Fallback for older Huntington firmware, which always
236 * configure all of the parameters to MC_CMD_SET_MAC. This isn't
237 * suitable for setting the MTU on unpriviliged functions.
239 if ((rc = ef10_mac_reconfigure(enp)) != 0)
248 EFSYS_PROBE1(fail1, efx_rc_t, rc);
253 __checkReturn efx_rc_t
260 if ((rc = efx_mcdi_mtu_get(enp, pdu)) != 0)
266 EFSYS_PROBE1(fail1, efx_rc_t, rc);
271 __checkReturn efx_rc_t
272 ef10_mac_reconfigure(
275 efx_port_t *epp = &(enp->en_port);
277 uint8_t payload[MAX(MC_CMD_SET_MAC_IN_LEN,
278 MC_CMD_SET_MAC_OUT_LEN)];
281 (void) memset(payload, 0, sizeof (payload));
282 req.emr_cmd = MC_CMD_SET_MAC;
283 req.emr_in_buf = payload;
284 req.emr_in_length = MC_CMD_SET_MAC_IN_LEN;
285 req.emr_out_buf = payload;
286 req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN;
288 MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu);
289 MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0);
290 EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR),
294 * Note: The Huntington MAC does not support REJECT_BRDCST.
295 * The REJECT_UNCST flag will also prevent multicast traffic
296 * from reaching the filters. As Huntington filters drop any
297 * traffic that does not match a filter it is ok to leave the
298 * MAC running in promiscuous mode. See bug41141.
300 * FIXME: Does REJECT_UNCST behave the same way on Medford?
302 MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT,
303 SET_MAC_IN_REJECT_UNCST, 0,
304 SET_MAC_IN_REJECT_BRDCST, 0);
307 * Flow control, whether it is auto-negotiated or not,
308 * is set via the PHY advertised capabilities. When set to
309 * automatic the MAC will use the PHY settings to determine
310 * the flow control settings.
312 MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, MC_CMD_FCNTL_AUTO);
314 /* Do not include the Ethernet frame checksum in RX packets */
315 MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_IN_FLAGS,
316 SET_MAC_IN_FLAG_INCLUDE_FCS, 0);
318 efx_mcdi_execute_quiet(enp, &req);
320 if (req.emr_rc != 0) {
322 * Unprivileged functions cannot control link state,
323 * but still need to configure filters.
325 if (req.emr_rc != EACCES) {
332 * Apply the filters for the MAC configuration.
333 * If the NIC isn't ready to accept filters this may
334 * return success without setting anything.
336 rc = efx_filter_reconfigure(enp, epp->ep_mac_addr,
337 epp->ep_all_unicst, epp->ep_mulcst,
338 epp->ep_all_mulcst, epp->ep_brdcst,
339 epp->ep_mulcst_addr_list,
340 epp->ep_mulcst_addr_count);
345 EFSYS_PROBE1(fail1, efx_rc_t, rc);
350 __checkReturn efx_rc_t
351 ef10_mac_multicast_list_set(
354 efx_port_t *epp = &(enp->en_port);
355 const efx_mac_ops_t *emop = epp->ep_emop;
358 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
359 enp->en_family == EFX_FAMILY_MEDFORD);
361 if ((rc = emop->emo_reconfigure(enp)) != 0)
367 EFSYS_PROBE1(fail1, efx_rc_t, rc);
372 __checkReturn efx_rc_t
373 ef10_mac_filter_default_rxq_set(
376 __in boolean_t using_rss)
378 efx_port_t *epp = &(enp->en_port);
380 boolean_t old_using_rss;
383 ef10_filter_get_default_rxq(enp, &old_rxq, &old_using_rss);
385 ef10_filter_default_rxq_set(enp, erp, using_rss);
387 rc = efx_filter_reconfigure(enp, epp->ep_mac_addr,
388 epp->ep_all_unicst, epp->ep_mulcst,
389 epp->ep_all_mulcst, epp->ep_brdcst,
390 epp->ep_mulcst_addr_list,
391 epp->ep_mulcst_addr_count);
399 EFSYS_PROBE1(fail1, efx_rc_t, rc);
401 ef10_filter_default_rxq_set(enp, old_rxq, old_using_rss);
407 ef10_mac_filter_default_rxq_clear(
410 efx_port_t *epp = &(enp->en_port);
412 ef10_filter_default_rxq_clear(enp);
414 efx_filter_reconfigure(enp, epp->ep_mac_addr,
415 epp->ep_all_unicst, epp->ep_mulcst,
416 epp->ep_all_mulcst, epp->ep_brdcst,
417 epp->ep_mulcst_addr_list,
418 epp->ep_mulcst_addr_count);
422 #if EFSYS_OPT_LOOPBACK
424 __checkReturn efx_rc_t
425 ef10_mac_loopback_set(
427 __in efx_link_mode_t link_mode,
428 __in efx_loopback_type_t loopback_type)
430 efx_port_t *epp = &(enp->en_port);
431 const efx_phy_ops_t *epop = epp->ep_epop;
432 efx_loopback_type_t old_loopback_type;
433 efx_link_mode_t old_loopback_link_mode;
436 /* The PHY object handles this on EF10 */
437 old_loopback_type = epp->ep_loopback_type;
438 old_loopback_link_mode = epp->ep_loopback_link_mode;
439 epp->ep_loopback_type = loopback_type;
440 epp->ep_loopback_link_mode = link_mode;
442 if ((rc = epop->epo_reconfigure(enp)) != 0)
448 EFSYS_PROBE1(fail1, efx_rc_t, rc);
450 epp->ep_loopback_type = old_loopback_type;
451 epp->ep_loopback_link_mode = old_loopback_link_mode;
456 #endif /* EFSYS_OPT_LOOPBACK */
458 #if EFSYS_OPT_MAC_STATS
460 __checkReturn efx_rc_t
461 ef10_mac_stats_get_mask(
463 __inout_bcount(mask_size) uint32_t *maskp,
464 __in size_t mask_size)
466 const struct efx_mac_stats_range ef10_common[] = {
467 { EFX_MAC_RX_OCTETS, EFX_MAC_RX_GE_15XX_PKTS },
468 { EFX_MAC_RX_FCS_ERRORS, EFX_MAC_RX_DROP_EVENTS },
469 { EFX_MAC_RX_JABBER_PKTS, EFX_MAC_RX_JABBER_PKTS },
470 { EFX_MAC_RX_NODESC_DROP_CNT, EFX_MAC_TX_PAUSE_PKTS },
472 const struct efx_mac_stats_range ef10_tx_size_bins[] = {
473 { EFX_MAC_TX_LE_64_PKTS, EFX_MAC_TX_GE_15XX_PKTS },
475 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
476 efx_port_t *epp = &(enp->en_port);
479 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
480 ef10_common, EFX_ARRAY_SIZE(ef10_common))) != 0)
483 if (epp->ep_phy_cap_mask & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) {
484 const struct efx_mac_stats_range ef10_40g_extra[] = {
485 { EFX_MAC_RX_ALIGN_ERRORS, EFX_MAC_RX_ALIGN_ERRORS },
488 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
489 ef10_40g_extra, EFX_ARRAY_SIZE(ef10_40g_extra))) != 0)
492 if (encp->enc_mac_stats_40g_tx_size_bins) {
493 if ((rc = efx_mac_stats_mask_add_ranges(maskp,
494 mask_size, ef10_tx_size_bins,
495 EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
499 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
500 ef10_tx_size_bins, EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
504 if (encp->enc_pm_and_rxdp_counters) {
505 const struct efx_mac_stats_range ef10_pm_and_rxdp[] = {
506 { EFX_MAC_PM_TRUNC_BB_OVERFLOW, EFX_MAC_RXDP_HLB_WAIT },
509 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
510 ef10_pm_and_rxdp, EFX_ARRAY_SIZE(ef10_pm_and_rxdp))) != 0)
514 if (encp->enc_datapath_cap_evb) {
515 const struct efx_mac_stats_range ef10_vadaptor[] = {
516 { EFX_MAC_VADAPTER_RX_UNICAST_PACKETS,
517 EFX_MAC_VADAPTER_TX_OVERFLOW },
520 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
521 ef10_vadaptor, EFX_ARRAY_SIZE(ef10_vadaptor))) != 0)
538 EFSYS_PROBE1(fail1, efx_rc_t, rc);
543 #define EF10_MAC_STAT_READ(_esmp, _field, _eqp) \
544 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
547 __checkReturn efx_rc_t
548 ef10_mac_stats_update(
550 __in efsys_mem_t *esmp,
551 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
552 __inout_opt uint32_t *generationp)
555 efx_qword_t generation_start;
556 efx_qword_t generation_end;
558 _NOTE(ARGUNUSED(enp))
560 /* Read END first so we don't race with the MC */
561 EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
562 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
564 EFSYS_MEM_READ_BARRIER();
567 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
568 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
570 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
571 EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
573 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
574 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
576 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
577 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
579 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
580 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
582 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
583 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
585 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
586 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
588 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
589 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
590 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
591 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
593 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
594 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
596 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
597 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
599 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
600 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
602 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
603 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
605 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
606 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
608 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
609 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
610 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
611 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
613 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
614 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
616 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
617 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
619 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
621 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
623 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
625 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
627 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
628 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
630 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
631 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
633 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
635 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
638 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value);
639 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value);
641 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
642 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
644 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
645 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
647 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
648 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
650 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
651 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
653 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
654 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
656 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
657 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
658 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
659 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
661 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
662 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
664 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
665 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
667 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
668 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
670 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
671 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
673 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
674 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
676 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
677 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
678 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
679 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
681 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
682 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
684 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
685 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
687 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
688 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
690 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
691 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
693 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
694 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
696 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
697 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
699 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
700 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
702 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
703 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
704 &(value.eq_dword[0]));
705 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
706 &(value.eq_dword[1]));
708 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
709 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
710 &(value.eq_dword[0]));
711 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
712 &(value.eq_dword[1]));
714 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
715 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
716 &(value.eq_dword[0]));
717 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
718 &(value.eq_dword[1]));
720 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
721 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
722 &(value.eq_dword[0]));
723 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
724 &(value.eq_dword[1]));
726 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
727 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
729 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
730 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
732 /* Packet memory (EF10 only) */
733 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW, &value);
734 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_BB_OVERFLOW]), &value);
736 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW, &value);
737 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_BB_OVERFLOW]), &value);
739 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_VFIFO_FULL, &value);
740 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_VFIFO_FULL]), &value);
742 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_VFIFO_FULL, &value);
743 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_VFIFO_FULL]), &value);
745 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_QBB, &value);
746 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_QBB]), &value);
748 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_QBB, &value);
749 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_QBB]), &value);
751 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_MAPPING, &value);
752 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_MAPPING]), &value);
755 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_Q_DISABLED_PKTS, &value);
756 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_Q_DISABLED_PKTS]), &value);
758 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_DI_DROPPED_PKTS, &value);
759 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_DI_DROPPED_PKTS]), &value);
761 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_STREAMING_PKTS, &value);
762 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_STREAMING_PKTS]), &value);
764 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS, &value);
765 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_FETCH]), &value);
767 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS, &value);
768 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_WAIT]), &value);
772 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS,
774 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS]),
777 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES,
779 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_BYTES]),
782 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS,
784 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS]),
787 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES,
789 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES]),
792 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS,
794 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]),
797 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES,
799 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]),
802 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS,
804 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_PACKETS]),
807 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_BYTES, &value);
808 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_BYTES]), &value);
810 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_OVERFLOW, &value);
811 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_OVERFLOW]), &value);
814 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS,
816 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS]),
819 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES,
821 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_BYTES]),
824 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS,
826 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS]),
829 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES,
831 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES]),
834 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS,
836 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]),
839 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES,
841 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]),
844 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS, &value);
845 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_PACKETS]), &value);
847 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_BYTES, &value);
848 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_BYTES]), &value);
850 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value);
851 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value);
854 EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
855 EFSYS_MEM_READ_BARRIER();
856 EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
859 /* Check that we didn't read the stats in the middle of a DMA */
860 /* Not a good enough check ? */
861 if (memcmp(&generation_start, &generation_end,
862 sizeof (generation_start)))
866 *generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
871 #endif /* EFSYS_OPT_MAC_STATS */
873 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */