1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2012-2018 Solarflare Communications Inc.
11 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
14 static __checkReturn efx_rc_t
18 __in uint32_t target_evq,
20 __in uint32_t instance,
21 __in efsys_mem_t *esmp,
22 __in boolean_t disable_scatter,
23 __in boolean_t want_inner_classes,
24 __in uint32_t ps_bufsize)
26 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
28 uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
29 MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
30 int npages = EFX_RXQ_NBUFS(ndescs);
32 efx_qword_t *dma_addr;
36 boolean_t want_outer_classes;
38 EFSYS_ASSERT3U(ndescs, <=, EFX_RXQ_MAXNDESCS);
40 if ((esmp == NULL) || (EFSYS_MEM_SIZE(esmp) < EFX_RXQ_SIZE(ndescs))) {
46 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
48 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
50 if (encp->enc_tunnel_encapsulations_supported != 0 &&
51 !want_inner_classes) {
53 * WANT_OUTER_CLASSES can only be specified on hardware which
54 * supports tunnel encapsulation offloads, even though it is
55 * effectively the behaviour the hardware gives.
57 * Also, on hardware which does support such offloads, older
58 * firmware rejects the flag if the offloads are not supported
59 * by the current firmware variant, which means this may fail if
60 * the capabilities are not updated when the firmware variant
61 * changes. This is not an issue on newer firmware, as it was
62 * changed in bug 69842 (v6.4.2.1007) to permit this flag to be
63 * specified on all firmware variants.
65 want_outer_classes = B_TRUE;
67 want_outer_classes = B_FALSE;
70 (void) memset(payload, 0, sizeof (payload));
71 req.emr_cmd = MC_CMD_INIT_RXQ;
72 req.emr_in_buf = payload;
73 req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
74 req.emr_out_buf = payload;
75 req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
77 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, ndescs);
78 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
79 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
80 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
81 MCDI_IN_POPULATE_DWORD_9(req, INIT_RXQ_EXT_IN_FLAGS,
82 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
83 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
84 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
85 INIT_RXQ_EXT_IN_CRC_MODE, 0,
86 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
87 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
88 INIT_RXQ_EXT_IN_DMA_MODE,
90 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize,
91 INIT_RXQ_EXT_IN_FLAG_WANT_OUTER_CLASSES, want_outer_classes);
92 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
93 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
95 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
96 addr = EFSYS_MEM_ADDR(esmp);
98 for (i = 0; i < npages; i++) {
99 EFX_POPULATE_QWORD_2(*dma_addr,
100 EFX_DWORD_1, (uint32_t)(addr >> 32),
101 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
104 addr += EFX_BUF_SIZE;
107 efx_mcdi_execute(enp, &req);
109 if (req.emr_rc != 0) {
119 EFSYS_PROBE1(fail1, efx_rc_t, rc);
124 static __checkReturn efx_rc_t
127 __in uint32_t instance)
130 uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
131 MC_CMD_FINI_RXQ_OUT_LEN)];
134 (void) memset(payload, 0, sizeof (payload));
135 req.emr_cmd = MC_CMD_FINI_RXQ;
136 req.emr_in_buf = payload;
137 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
138 req.emr_out_buf = payload;
139 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
141 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
143 efx_mcdi_execute_quiet(enp, &req);
145 if (req.emr_rc != 0) {
154 * EALREADY is not an error, but indicates that the MC has rebooted and
155 * that the RXQ has already been destroyed.
158 EFSYS_PROBE1(fail1, efx_rc_t, rc);
163 #if EFSYS_OPT_RX_SCALE
164 static __checkReturn efx_rc_t
165 efx_mcdi_rss_context_alloc(
167 __in efx_rx_scale_context_type_t type,
168 __in uint32_t num_queues,
169 __out uint32_t *rss_contextp)
172 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
173 MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
174 uint32_t rss_context;
175 uint32_t context_type;
178 if (num_queues > EFX_MAXRSS) {
184 case EFX_RX_SCALE_EXCLUSIVE:
185 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
187 case EFX_RX_SCALE_SHARED:
188 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
195 (void) memset(payload, 0, sizeof (payload));
196 req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
197 req.emr_in_buf = payload;
198 req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
199 req.emr_out_buf = payload;
200 req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
202 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
203 EVB_PORT_ID_ASSIGNED);
204 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
207 * For exclusive contexts, NUM_QUEUES is only used to validate
208 * indirection table offsets.
209 * For shared contexts, the provided context will spread traffic over
210 * NUM_QUEUES many queues.
212 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
214 efx_mcdi_execute(enp, &req);
216 if (req.emr_rc != 0) {
221 if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
226 rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
227 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
232 *rss_contextp = rss_context;
245 EFSYS_PROBE1(fail1, efx_rc_t, rc);
249 #endif /* EFSYS_OPT_RX_SCALE */
251 #if EFSYS_OPT_RX_SCALE
253 efx_mcdi_rss_context_free(
255 __in uint32_t rss_context)
258 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
259 MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
262 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
267 (void) memset(payload, 0, sizeof (payload));
268 req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
269 req.emr_in_buf = payload;
270 req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
271 req.emr_out_buf = payload;
272 req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
274 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
276 efx_mcdi_execute_quiet(enp, &req);
278 if (req.emr_rc != 0) {
288 EFSYS_PROBE1(fail1, efx_rc_t, rc);
292 #endif /* EFSYS_OPT_RX_SCALE */
294 #if EFSYS_OPT_RX_SCALE
296 efx_mcdi_rss_context_set_flags(
298 __in uint32_t rss_context,
299 __in efx_rx_hash_type_t type)
301 efx_rx_hash_type_t type_ipv4;
302 efx_rx_hash_type_t type_ipv4_tcp;
303 efx_rx_hash_type_t type_ipv6;
304 efx_rx_hash_type_t type_ipv6_tcp;
306 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
307 MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
310 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_LBN ==
311 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_LBN);
312 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_TCP_WIDTH ==
313 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV4_RSS_MODE_WIDTH);
314 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_LBN ==
315 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_LBN);
316 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV4_WIDTH ==
317 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV4_RSS_MODE_WIDTH);
318 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_LBN ==
319 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_LBN);
320 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_TCP_WIDTH ==
321 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_TCP_IPV6_RSS_MODE_WIDTH);
322 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_LBN ==
323 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_LBN);
324 EFX_STATIC_ASSERT(EFX_RX_CLASS_IPV6_WIDTH ==
325 MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_OTHER_IPV6_RSS_MODE_WIDTH);
327 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
332 (void) memset(payload, 0, sizeof (payload));
333 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
334 req.emr_in_buf = payload;
335 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
336 req.emr_out_buf = payload;
337 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
339 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
342 type_ipv4 = EFX_RX_HASH(IPV4, 2TUPLE) | EFX_RX_HASH(IPV4_TCP, 2TUPLE);
343 type_ipv4_tcp = EFX_RX_HASH(IPV4_TCP, 4TUPLE);
344 type_ipv6 = EFX_RX_HASH(IPV6, 2TUPLE) | EFX_RX_HASH(IPV6_TCP, 2TUPLE);
345 type_ipv6_tcp = EFX_RX_HASH(IPV6_TCP, 4TUPLE);
347 MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
348 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
349 ((type & type_ipv4) == type_ipv4) ? 1 : 0,
350 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
351 ((type & type_ipv4_tcp) == type_ipv4_tcp) ? 1 : 0,
352 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
353 ((type & type_ipv6) == type_ipv6) ? 1 : 0,
354 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
355 ((type & type_ipv6_tcp) == type_ipv6_tcp) ? 1 : 0);
357 efx_mcdi_execute(enp, &req);
359 if (req.emr_rc != 0) {
369 EFSYS_PROBE1(fail1, efx_rc_t, rc);
373 #endif /* EFSYS_OPT_RX_SCALE */
375 #if EFSYS_OPT_RX_SCALE
377 efx_mcdi_rss_context_set_key(
379 __in uint32_t rss_context,
380 __in_ecount(n) uint8_t *key,
384 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
385 MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
388 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
393 (void) memset(payload, 0, sizeof (payload));
394 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
395 req.emr_in_buf = payload;
396 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
397 req.emr_out_buf = payload;
398 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
400 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
403 EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
404 if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
409 memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
412 efx_mcdi_execute(enp, &req);
414 if (req.emr_rc != 0) {
426 EFSYS_PROBE1(fail1, efx_rc_t, rc);
430 #endif /* EFSYS_OPT_RX_SCALE */
432 #if EFSYS_OPT_RX_SCALE
434 efx_mcdi_rss_context_set_table(
436 __in uint32_t rss_context,
437 __in_ecount(n) unsigned int *table,
441 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
442 MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
446 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
451 (void) memset(payload, 0, sizeof (payload));
452 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
453 req.emr_in_buf = payload;
454 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
455 req.emr_out_buf = payload;
456 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
458 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
462 MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
465 i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
467 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
470 efx_mcdi_execute(enp, &req);
472 if (req.emr_rc != 0) {
482 EFSYS_PROBE1(fail1, efx_rc_t, rc);
486 #endif /* EFSYS_OPT_RX_SCALE */
489 __checkReturn efx_rc_t
493 #if EFSYS_OPT_RX_SCALE
495 if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
496 &enp->en_rss_context) == 0) {
498 * Allocated an exclusive RSS context, which allows both the
499 * indirection table and key to be modified.
501 enp->en_rss_context_type = EFX_RX_SCALE_EXCLUSIVE;
502 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
505 * Failed to allocate an exclusive RSS context. Continue
506 * operation without support for RSS. The pseudo-header in
507 * received packets will not contain a Toeplitz hash value.
509 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
510 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
513 #endif /* EFSYS_OPT_RX_SCALE */
518 #if EFSYS_OPT_RX_SCATTER
519 __checkReturn efx_rc_t
520 ef10_rx_scatter_enable(
522 __in unsigned int buf_size)
524 _NOTE(ARGUNUSED(enp, buf_size))
527 #endif /* EFSYS_OPT_RX_SCATTER */
529 #if EFSYS_OPT_RX_SCALE
530 __checkReturn efx_rc_t
531 ef10_rx_scale_context_alloc(
533 __in efx_rx_scale_context_type_t type,
534 __in uint32_t num_queues,
535 __out uint32_t *rss_contextp)
539 rc = efx_mcdi_rss_context_alloc(enp, type, num_queues, rss_contextp);
546 EFSYS_PROBE1(fail1, efx_rc_t, rc);
549 #endif /* EFSYS_OPT_RX_SCALE */
551 #if EFSYS_OPT_RX_SCALE
552 __checkReturn efx_rc_t
553 ef10_rx_scale_context_free(
555 __in uint32_t rss_context)
559 rc = efx_mcdi_rss_context_free(enp, rss_context);
566 EFSYS_PROBE1(fail1, efx_rc_t, rc);
569 #endif /* EFSYS_OPT_RX_SCALE */
571 #if EFSYS_OPT_RX_SCALE
572 __checkReturn efx_rc_t
573 ef10_rx_scale_mode_set(
575 __in uint32_t rss_context,
576 __in efx_rx_hash_alg_t alg,
577 __in efx_rx_hash_type_t type,
578 __in boolean_t insert)
582 EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
583 EFSYS_ASSERT3U(insert, ==, B_TRUE);
585 if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
590 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
591 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
595 rss_context = enp->en_rss_context;
598 if ((rc = efx_mcdi_rss_context_set_flags(enp,
599 rss_context, type)) != 0)
609 EFSYS_PROBE1(fail1, efx_rc_t, rc);
613 #endif /* EFSYS_OPT_RX_SCALE */
615 #if EFSYS_OPT_RX_SCALE
616 __checkReturn efx_rc_t
617 ef10_rx_scale_key_set(
619 __in uint32_t rss_context,
620 __in_ecount(n) uint8_t *key,
625 EFX_STATIC_ASSERT(EFX_RSS_KEY_SIZE ==
626 MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
628 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
629 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
633 rss_context = enp->en_rss_context;
636 if ((rc = efx_mcdi_rss_context_set_key(enp, rss_context, key, n)) != 0)
644 EFSYS_PROBE1(fail1, efx_rc_t, rc);
648 #endif /* EFSYS_OPT_RX_SCALE */
650 #if EFSYS_OPT_RX_SCALE
651 __checkReturn efx_rc_t
652 ef10_rx_scale_tbl_set(
654 __in uint32_t rss_context,
655 __in_ecount(n) unsigned int *table,
661 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
662 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
666 rss_context = enp->en_rss_context;
669 if ((rc = efx_mcdi_rss_context_set_table(enp,
670 rss_context, table, n)) != 0)
678 EFSYS_PROBE1(fail1, efx_rc_t, rc);
682 #endif /* EFSYS_OPT_RX_SCALE */
686 * EF10 RX pseudo-header
687 * ---------------------
689 * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
691 * +00: Toeplitz hash value.
692 * (32bit little-endian)
693 * +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
695 * +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
697 * +08: Packet Length. Zero if the RX datapath was in cut-through mode.
698 * (16bit little-endian)
699 * +10: MAC timestamp. Zero if timestamping is not enabled.
700 * (32bit little-endian)
702 * See "The RX Pseudo-header" in SF-109306-TC.
705 __checkReturn efx_rc_t
706 ef10_rx_prefix_pktlen(
708 __in uint8_t *buffer,
709 __out uint16_t *lengthp)
711 _NOTE(ARGUNUSED(enp))
714 * The RX pseudo-header contains the packet length, excluding the
715 * pseudo-header. If the hardware receive datapath was operating in
716 * cut-through mode then the length in the RX pseudo-header will be
717 * zero, and the packet length must be obtained from the DMA length
718 * reported in the RX event.
720 *lengthp = buffer[8] | (buffer[9] << 8);
724 #if EFSYS_OPT_RX_SCALE
725 __checkReturn uint32_t
728 __in efx_rx_hash_alg_t func,
729 __in uint8_t *buffer)
731 _NOTE(ARGUNUSED(enp))
734 case EFX_RX_HASHALG_TOEPLITZ:
745 #endif /* EFSYS_OPT_RX_SCALE */
747 #if EFSYS_OPT_RX_PACKED_STREAM
749 * Fake length for RXQ descriptors in packed stream mode
750 * to make hardware happy
752 #define EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE 32
758 __in_ecount(ndescs) efsys_dma_addr_t *addrp,
760 __in unsigned int ndescs,
761 __in unsigned int completed,
762 __in unsigned int added)
769 _NOTE(ARGUNUSED(completed))
771 #if EFSYS_OPT_RX_PACKED_STREAM
773 * Real size of the buffer does not fit into ESF_DZ_RX_KER_BYTE_CNT
774 * and equal to 0 after applying mask. Hardware does not like it.
776 if (erp->er_ev_qstate->eers_rx_packed_stream)
777 size = EFX_RXQ_PACKED_STREAM_FAKE_BUF_SIZE;
780 /* The client driver must not overfill the queue */
781 EFSYS_ASSERT3U(added - completed + ndescs, <=,
782 EFX_RXQ_LIMIT(erp->er_mask + 1));
784 id = added & (erp->er_mask);
785 for (i = 0; i < ndescs; i++) {
786 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
787 unsigned int, id, efsys_dma_addr_t, addrp[i],
790 EFX_POPULATE_QWORD_3(qword,
791 ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
792 ESF_DZ_RX_KER_BUF_ADDR_DW0,
793 (uint32_t)(addrp[i] & 0xffffffff),
794 ESF_DZ_RX_KER_BUF_ADDR_DW1,
795 (uint32_t)(addrp[i] >> 32));
797 offset = id * sizeof (efx_qword_t);
798 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
800 id = (id + 1) & (erp->er_mask);
807 __in unsigned int added,
808 __inout unsigned int *pushedp)
810 efx_nic_t *enp = erp->er_enp;
811 unsigned int pushed = *pushedp;
815 /* Hardware has alignment restriction for WPTR */
816 wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
822 /* Push the populated descriptors out */
823 wptr &= erp->er_mask;
825 EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
827 /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
828 EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
829 wptr, pushed & erp->er_mask);
830 EFSYS_PIO_WRITE_BARRIER();
831 EFX_BAR_VI_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
832 erp->er_index, &dword, B_FALSE);
835 #if EFSYS_OPT_RX_PACKED_STREAM
838 ef10_rx_qpush_ps_credits(
841 efx_nic_t *enp = erp->er_enp;
843 efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
846 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
848 if (rxq_state->eers_rx_packed_stream_credits == 0)
852 * It is a bug if we think that FW has utilized more
853 * credits than it is allowed to have (maximum). However,
854 * make sure that we do not credit more than maximum anyway.
856 credits = MIN(rxq_state->eers_rx_packed_stream_credits,
857 EFX_RX_PACKED_STREAM_MAX_CREDITS);
858 EFX_POPULATE_DWORD_3(dword,
859 ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
860 ERF_DZ_RX_DESC_MAGIC_CMD,
861 ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
862 ERF_DZ_RX_DESC_MAGIC_DATA, credits);
863 EFX_BAR_VI_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
864 erp->er_index, &dword, B_FALSE);
866 rxq_state->eers_rx_packed_stream_credits = 0;
870 * In accordance with SF-112241-TC the received data has the following layout:
871 * - 8 byte pseudo-header which consist of:
872 * - 4 byte little-endian timestamp
873 * - 2 byte little-endian captured length in bytes
874 * - 2 byte little-endian original packet length in bytes
875 * - captured packet bytes
876 * - optional padding to align to 64 bytes boundary
877 * - 64 bytes scratch space for the host software
879 __checkReturn uint8_t *
880 ef10_rx_qps_packet_info(
882 __in uint8_t *buffer,
883 __in uint32_t buffer_length,
884 __in uint32_t current_offset,
885 __out uint16_t *lengthp,
886 __out uint32_t *next_offsetp,
887 __out uint32_t *timestamp)
892 efx_evq_rxq_state_t *rxq_state = erp->er_ev_qstate;
894 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
896 buffer += current_offset;
897 pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
899 qwordp = (efx_qword_t *)buffer;
900 *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
901 *lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
902 buf_len = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
904 buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
905 EFX_RX_PACKED_STREAM_ALIGNMENT);
907 current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
909 EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
910 EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
912 if ((*next_offsetp ^ current_offset) &
913 EFX_RX_PACKED_STREAM_MEM_PER_CREDIT)
914 rxq_state->eers_rx_packed_stream_credits++;
922 __checkReturn efx_rc_t
926 efx_nic_t *enp = erp->er_enp;
929 if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
936 * EALREADY is not an error, but indicates that the MC has rebooted and
937 * that the RXQ has already been destroyed. Callers need to know that
938 * the RXQ flush has completed to avoid waiting until timeout for a
939 * flush done event that will not be delivered.
942 EFSYS_PROBE1(fail1, efx_rc_t, rc);
952 _NOTE(ARGUNUSED(erp))
956 __checkReturn efx_rc_t
959 __in unsigned int index,
960 __in unsigned int label,
961 __in efx_rxq_type_t type,
962 __in uint32_t type_data,
963 __in efsys_mem_t *esmp,
966 __in unsigned int flags,
970 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
972 boolean_t disable_scatter;
973 boolean_t want_inner_classes;
974 unsigned int ps_buf_size;
976 _NOTE(ARGUNUSED(id, erp, type_data))
978 EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
979 EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
980 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
982 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
983 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
986 (ndescs < EFX_RXQ_MINNDESCS) || (ndescs > EFX_RXQ_MAXNDESCS)) {
990 if (index >= encp->enc_rxq_limit) {
996 case EFX_RXQ_TYPE_DEFAULT:
999 #if EFSYS_OPT_RX_PACKED_STREAM
1000 case EFX_RXQ_TYPE_PACKED_STREAM:
1001 switch (type_data) {
1002 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_1M:
1003 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
1005 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_512K:
1006 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
1008 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_256K:
1009 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
1011 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_128K:
1012 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
1014 case EFX_RXQ_PACKED_STREAM_BUF_SIZE_64K:
1015 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
1022 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1028 #if EFSYS_OPT_RX_PACKED_STREAM
1029 if (ps_buf_size != 0) {
1030 /* Check if datapath firmware supports packed stream mode */
1031 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
1035 /* Check if packed stream allows configurable buffer sizes */
1036 if ((ps_buf_size != MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M) &&
1037 (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
1042 #else /* EFSYS_OPT_RX_PACKED_STREAM */
1043 EFSYS_ASSERT(ps_buf_size == 0);
1044 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1046 /* Scatter can only be disabled if the firmware supports doing so */
1047 if (flags & EFX_RXQ_FLAG_SCATTER)
1048 disable_scatter = B_FALSE;
1050 disable_scatter = encp->enc_rx_disable_scatter_supported;
1052 if (flags & EFX_RXQ_FLAG_INNER_CLASSES)
1053 want_inner_classes = B_TRUE;
1055 want_inner_classes = B_FALSE;
1057 if ((rc = efx_mcdi_init_rxq(enp, ndescs, eep->ee_index, label, index,
1058 esmp, disable_scatter, want_inner_classes,
1063 erp->er_label = label;
1065 ef10_ev_rxlabel_init(eep, erp, label, type);
1067 erp->er_ev_qstate = &erp->er_eep->ee_rxq_state[label];
1073 #if EFSYS_OPT_RX_PACKED_STREAM
1078 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1081 #if EFSYS_OPT_RX_PACKED_STREAM
1084 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
1088 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1095 __in efx_rxq_t *erp)
1097 efx_nic_t *enp = erp->er_enp;
1098 efx_evq_t *eep = erp->er_eep;
1099 unsigned int label = erp->er_label;
1101 ef10_ev_rxlabel_fini(eep, label);
1103 EFSYS_ASSERT(enp->en_rx_qcount != 0);
1104 --enp->en_rx_qcount;
1106 EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
1111 __in efx_nic_t *enp)
1113 #if EFSYS_OPT_RX_SCALE
1114 if (enp->en_rss_context_type != EFX_RX_SCALE_UNAVAILABLE)
1115 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
1116 enp->en_rss_context = 0;
1117 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
1119 _NOTE(ARGUNUSED(enp))
1120 #endif /* EFSYS_OPT_RX_SCALE */
1123 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */