1 /* SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2016-2018 Solarflare Communications Inc.
6 * This software was jointly developed between OKTET Labs (under contract
7 * for Solarflare) and Solarflare Communications, Inc.
10 #ifndef _SFC_COMMON_EFSYS_H
11 #define _SFC_COMMON_EFSYS_H
15 #include <rte_spinlock.h>
16 #include <rte_byteorder.h>
17 #include <rte_debug.h>
18 #include <rte_memzone.h>
19 #include <rte_memory.h>
20 #include <rte_memcpy.h>
21 #include <rte_cycles.h>
22 #include <rte_prefetch.h>
23 #include <rte_common.h>
24 #include <rte_malloc.h>
28 #include "sfc_debug.h"
34 #define EFSYS_HAS_UINT64 1
35 #define EFSYS_USE_UINT64 1
36 #define EFSYS_HAS_SSE2_M128 1
38 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
39 #define EFSYS_IS_BIG_ENDIAN 1
40 #define EFSYS_IS_LITTLE_ENDIAN 0
41 #elif RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
42 #define EFSYS_IS_BIG_ENDIAN 0
43 #define EFSYS_IS_LITTLE_ENDIAN 1
45 #error "Cannot determine system endianness"
47 #include "efx_types.h"
54 typedef bool boolean_t;
64 * RTE_MAX() and RTE_MIN() cannot be used since braced-group within
65 * expression allowed only inside a function, but MAX() is used as
66 * a number of elements in array.
69 #define MAX(v1, v2) ((v1) > (v2) ? (v1) : (v2))
72 #define MIN(v1, v2) ((v1) < (v2) ? (v1) : (v2))
75 /* There are macros for alignment in DPDK, but we need to make a proper
76 * correspondence here, if we want to re-use them at all
79 #define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
83 #define P2ROUNDUP(x, align) (-(-(x) & -(align)))
87 #define P2ALIGN(_x, _a) ((_x) & -(_a))
91 #define ISP2(x) rte_is_power_of_2(x)
94 #define ENOTACTIVE ENOTCONN
97 prefetch_read_many(const volatile void *addr)
103 prefetch_read_once(const volatile void *addr)
105 rte_prefetch_non_temporal(addr);
108 /* Modifiers used for Windows builds */
111 #define __in_ecount(_n)
112 #define __in_ecount_opt(_n)
113 #define __in_bcount(_n)
114 #define __in_bcount_opt(_n)
118 #define __out_ecount(_n)
119 #define __out_ecount_opt(_n)
120 #define __out_bcount(_n)
121 #define __out_bcount_opt(_n)
122 #define __out_bcount_part(_n, _l)
123 #define __out_bcount_part_opt(_n, _l)
129 #define __inout_ecount(_n)
130 #define __inout_ecount_opt(_n)
131 #define __inout_bcount(_n)
132 #define __inout_bcount_opt(_n)
133 #define __inout_bcount_full_opt(_n)
135 #define __deref_out_bcount_opt(n)
137 #define __checkReturn
138 #define __success(_x)
140 #define __drv_when(_p, _c)
142 /* Code inclusion options */
145 #define EFSYS_OPT_NAMES 1
147 /* Disable SFN5xxx/SFN6xxx since it requires specific support in the PMD */
148 #define EFSYS_OPT_SIENA 0
149 /* Enable SFN7xxx support */
150 #define EFSYS_OPT_HUNTINGTON 1
151 /* Enable SFN8xxx support */
152 #define EFSYS_OPT_MEDFORD 1
153 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
154 #define EFSYS_OPT_CHECK_REG 1
156 #define EFSYS_OPT_CHECK_REG 0
159 /* MCDI is required for SFN7xxx and SFN8xx */
160 #define EFSYS_OPT_MCDI 1
161 #define EFSYS_OPT_MCDI_LOGGING 1
162 #define EFSYS_OPT_MCDI_PROXY_AUTH 1
164 #define EFSYS_OPT_MAC_STATS 1
166 #define EFSYS_OPT_LOOPBACK 0
168 #define EFSYS_OPT_MON_MCDI 0
169 #define EFSYS_OPT_MON_STATS 0
171 #define EFSYS_OPT_PHY_STATS 0
172 #define EFSYS_OPT_BIST 0
173 #define EFSYS_OPT_PHY_LED_CONTROL 0
174 #define EFSYS_OPT_PHY_FLAGS 0
176 #define EFSYS_OPT_VPD 0
177 #define EFSYS_OPT_NVRAM 0
178 #define EFSYS_OPT_BOOTCFG 0
180 #define EFSYS_OPT_DIAG 0
181 #define EFSYS_OPT_RX_SCALE 1
182 #define EFSYS_OPT_QSTATS 0
183 /* Filters support is required for SFN7xxx and SFN8xx */
184 #define EFSYS_OPT_FILTER 1
185 #define EFSYS_OPT_RX_SCATTER 0
187 #define EFSYS_OPT_EV_PREFETCH 0
189 #define EFSYS_OPT_DECODE_INTR_FATAL 0
191 #define EFSYS_OPT_LICENSING 0
193 #define EFSYS_OPT_ALLOW_UNCONFIGURED_NIC 0
195 #define EFSYS_OPT_RX_PACKED_STREAM 0
197 #define EFSYS_OPT_TUNNEL 1
201 typedef struct __efsys_identifier_s efsys_identifier_t;
204 #define EFSYS_PROBE(_name) \
207 #define EFSYS_PROBE1(_name, _type1, _arg1) \
210 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2) \
213 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
217 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
218 _type3, _arg3, _type4, _arg4) \
221 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
222 _type3, _arg3, _type4, _arg4, _type5, _arg5) \
225 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
226 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
230 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
231 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
232 _type6, _arg6, _type7, _arg7) \
238 typedef rte_iova_t efsys_dma_addr_t;
240 typedef struct efsys_mem_s {
241 const struct rte_memzone *esm_mz;
243 * Ideally it should have volatile qualifier to denote that
244 * the memory may be updated by someone else. However, it adds
245 * qualifier discard warnings when the pointer or its derivative
246 * is passed to memset() or rte_mov16().
247 * So, skip the qualifier here, but make sure that it is added
248 * below in access macros.
251 efsys_dma_addr_t esm_addr;
255 #define EFSYS_MEM_ZERO(_esmp, _size) \
257 (void)memset((void *)(_esmp)->esm_base, 0, (_size)); \
259 _NOTE(CONSTANTCONDITION); \
262 #define EFSYS_MEM_READD(_esmp, _offset, _edp) \
264 volatile uint8_t *_base = (_esmp)->esm_base; \
265 volatile uint32_t *_addr; \
267 _NOTE(CONSTANTCONDITION); \
268 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
270 _addr = (volatile uint32_t *)(_base + (_offset)); \
271 (_edp)->ed_u32[0] = _addr[0]; \
273 EFSYS_PROBE2(mem_readl, unsigned int, (_offset), \
274 uint32_t, (_edp)->ed_u32[0]); \
276 _NOTE(CONSTANTCONDITION); \
279 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp) \
281 volatile uint8_t *_base = (_esmp)->esm_base; \
282 volatile uint64_t *_addr; \
284 _NOTE(CONSTANTCONDITION); \
285 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
287 _addr = (volatile uint64_t *)(_base + (_offset)); \
288 (_eqp)->eq_u64[0] = _addr[0]; \
290 EFSYS_PROBE3(mem_readq, unsigned int, (_offset), \
291 uint32_t, (_eqp)->eq_u32[1], \
292 uint32_t, (_eqp)->eq_u32[0]); \
294 _NOTE(CONSTANTCONDITION); \
297 #define EFSYS_MEM_READO(_esmp, _offset, _eop) \
299 volatile uint8_t *_base = (_esmp)->esm_base; \
300 volatile __m128i *_addr; \
302 _NOTE(CONSTANTCONDITION); \
303 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
305 _addr = (volatile __m128i *)(_base + (_offset)); \
306 (_eop)->eo_u128[0] = _addr[0]; \
308 EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
309 uint32_t, (_eop)->eo_u32[3], \
310 uint32_t, (_eop)->eo_u32[2], \
311 uint32_t, (_eop)->eo_u32[1], \
312 uint32_t, (_eop)->eo_u32[0]); \
314 _NOTE(CONSTANTCONDITION); \
318 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp) \
320 volatile uint8_t *_base = (_esmp)->esm_base; \
321 volatile uint32_t *_addr; \
323 _NOTE(CONSTANTCONDITION); \
324 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
326 EFSYS_PROBE2(mem_writed, unsigned int, (_offset), \
327 uint32_t, (_edp)->ed_u32[0]); \
329 _addr = (volatile uint32_t *)(_base + (_offset)); \
330 _addr[0] = (_edp)->ed_u32[0]; \
332 _NOTE(CONSTANTCONDITION); \
335 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp) \
337 volatile uint8_t *_base = (_esmp)->esm_base; \
338 volatile uint64_t *_addr; \
340 _NOTE(CONSTANTCONDITION); \
341 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
343 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \
344 uint32_t, (_eqp)->eq_u32[1], \
345 uint32_t, (_eqp)->eq_u32[0]); \
347 _addr = (volatile uint64_t *)(_base + (_offset)); \
348 _addr[0] = (_eqp)->eq_u64[0]; \
350 _NOTE(CONSTANTCONDITION); \
353 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
355 volatile uint8_t *_base = (_esmp)->esm_base; \
356 volatile __m128i *_addr; \
358 _NOTE(CONSTANTCONDITION); \
359 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
362 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \
363 uint32_t, (_eop)->eo_u32[3], \
364 uint32_t, (_eop)->eo_u32[2], \
365 uint32_t, (_eop)->eo_u32[1], \
366 uint32_t, (_eop)->eo_u32[0]); \
368 _addr = (volatile __m128i *)(_base + (_offset)); \
369 _addr[0] = (_eop)->eo_u128[0]; \
371 _NOTE(CONSTANTCONDITION); \
375 #define EFSYS_MEM_ADDR(_esmp) \
378 #define EFSYS_MEM_IS_NULL(_esmp) \
379 ((_esmp)->esm_base == NULL)
381 #define EFSYS_MEM_PREFETCH(_esmp, _offset) \
383 volatile uint8_t *_base = (_esmp)->esm_base; \
385 rte_prefetch0(_base + (_offset)); \
391 typedef struct efsys_bar_s {
392 rte_spinlock_t esb_lock;
394 struct rte_pci_device *esb_dev;
396 * Ideally it should have volatile qualifier to denote that
397 * the memory may be updated by someone else. However, it adds
398 * qualifier discard warnings when the pointer or its derivative
399 * is passed to memset() or rte_mov16().
400 * So, skip the qualifier here, but make sure that it is added
401 * below in access macros.
406 #define SFC_BAR_LOCK_INIT(_esbp, _ifname) \
408 rte_spinlock_init(&(_esbp)->esb_lock); \
409 _NOTE(CONSTANTCONDITION); \
411 #define SFC_BAR_LOCK_DESTROY(_esbp) ((void)0)
412 #define SFC_BAR_LOCK(_esbp) rte_spinlock_lock(&(_esbp)->esb_lock)
413 #define SFC_BAR_UNLOCK(_esbp) rte_spinlock_unlock(&(_esbp)->esb_lock)
415 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock) \
417 volatile uint8_t *_base = (_esbp)->esb_base; \
418 volatile uint32_t *_addr; \
420 _NOTE(CONSTANTCONDITION); \
421 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
422 _NOTE(CONSTANTCONDITION); \
424 SFC_BAR_LOCK(_esbp); \
426 _addr = (volatile uint32_t *)(_base + (_offset)); \
428 (_edp)->ed_u32[0] = rte_read32_relaxed(_addr); \
430 EFSYS_PROBE2(bar_readd, unsigned int, (_offset), \
431 uint32_t, (_edp)->ed_u32[0]); \
433 _NOTE(CONSTANTCONDITION); \
435 SFC_BAR_UNLOCK(_esbp); \
436 _NOTE(CONSTANTCONDITION); \
439 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp) \
441 volatile uint8_t *_base = (_esbp)->esb_base; \
442 volatile uint64_t *_addr; \
444 _NOTE(CONSTANTCONDITION); \
445 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
447 SFC_BAR_LOCK(_esbp); \
449 _addr = (volatile uint64_t *)(_base + (_offset)); \
451 (_eqp)->eq_u64[0] = rte_read64_relaxed(_addr); \
453 EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \
454 uint32_t, (_eqp)->eq_u32[1], \
455 uint32_t, (_eqp)->eq_u32[0]); \
457 SFC_BAR_UNLOCK(_esbp); \
458 _NOTE(CONSTANTCONDITION); \
461 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
463 volatile uint8_t *_base = (_esbp)->esb_base; \
464 volatile __m128i *_addr; \
466 _NOTE(CONSTANTCONDITION); \
467 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
469 _NOTE(CONSTANTCONDITION); \
471 SFC_BAR_LOCK(_esbp); \
473 _addr = (volatile __m128i *)(_base + (_offset)); \
475 /* There is no rte_read128_relaxed() yet */ \
476 (_eop)->eo_u128[0] = _addr[0]; \
478 EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \
479 uint32_t, (_eop)->eo_u32[3], \
480 uint32_t, (_eop)->eo_u32[2], \
481 uint32_t, (_eop)->eo_u32[1], \
482 uint32_t, (_eop)->eo_u32[0]); \
484 _NOTE(CONSTANTCONDITION); \
486 SFC_BAR_UNLOCK(_esbp); \
487 _NOTE(CONSTANTCONDITION); \
491 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock) \
493 volatile uint8_t *_base = (_esbp)->esb_base; \
494 volatile uint32_t *_addr; \
496 _NOTE(CONSTANTCONDITION); \
497 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_dword_t))); \
499 _NOTE(CONSTANTCONDITION); \
501 SFC_BAR_LOCK(_esbp); \
503 EFSYS_PROBE2(bar_writed, unsigned int, (_offset), \
504 uint32_t, (_edp)->ed_u32[0]); \
506 _addr = (volatile uint32_t *)(_base + (_offset)); \
507 rte_write32_relaxed((_edp)->ed_u32[0], _addr); \
510 _NOTE(CONSTANTCONDITION); \
512 SFC_BAR_UNLOCK(_esbp); \
513 _NOTE(CONSTANTCONDITION); \
516 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp) \
518 volatile uint8_t *_base = (_esbp)->esb_base; \
519 volatile uint64_t *_addr; \
521 _NOTE(CONSTANTCONDITION); \
522 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_qword_t))); \
524 SFC_BAR_LOCK(_esbp); \
526 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset), \
527 uint32_t, (_eqp)->eq_u32[1], \
528 uint32_t, (_eqp)->eq_u32[0]); \
530 _addr = (volatile uint64_t *)(_base + (_offset)); \
531 rte_write64_relaxed((_eqp)->eq_u64[0], _addr); \
534 SFC_BAR_UNLOCK(_esbp); \
535 _NOTE(CONSTANTCONDITION); \
539 * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
540 * (required by PIO hardware).
542 * Neither VFIO, nor UIO, nor NIC UIO (on FreeBSD) support
543 * write-combined memory mapped to user-land, so just abort if used.
545 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp) \
547 rte_panic("Write-combined BAR access not supported"); \
550 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
552 volatile uint8_t *_base = (_esbp)->esb_base; \
553 volatile __m128i *_addr; \
555 _NOTE(CONSTANTCONDITION); \
556 SFC_ASSERT(IS_P2ALIGNED(_offset, sizeof(efx_oword_t))); \
558 _NOTE(CONSTANTCONDITION); \
560 SFC_BAR_LOCK(_esbp); \
562 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset), \
563 uint32_t, (_eop)->eo_u32[3], \
564 uint32_t, (_eop)->eo_u32[2], \
565 uint32_t, (_eop)->eo_u32[1], \
566 uint32_t, (_eop)->eo_u32[0]); \
568 _addr = (volatile __m128i *)(_base + (_offset)); \
569 /* There is no rte_write128_relaxed() yet */ \
570 _addr[0] = (_eop)->eo_u128[0]; \
573 _NOTE(CONSTANTCONDITION); \
575 SFC_BAR_UNLOCK(_esbp); \
576 _NOTE(CONSTANTCONDITION); \
579 /* Use the standard octo-word write for doorbell writes */
580 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop) \
582 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE); \
583 _NOTE(CONSTANTCONDITION); \
588 #define EFSYS_SPIN(_us) \
591 _NOTE(CONSTANTCONDITION); \
594 #define EFSYS_SLEEP EFSYS_SPIN
598 #define EFSYS_MEM_READ_BARRIER() rte_rmb()
599 #define EFSYS_PIO_WRITE_BARRIER() rte_io_wmb()
604 * DPDK does not provide any DMA syncing API, and no PMD drivers
605 * have any traces of explicit DMA syncing.
606 * DMA mapping is assumed to be coherent.
609 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size) ((void)0)
611 /* Just avoid store and compiler (impliciltly) reordering */
612 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size) rte_wmb()
616 typedef uint64_t efsys_timestamp_t;
618 #define EFSYS_TIMESTAMP(_usp) \
620 *(_usp) = rte_get_timer_cycles() * 1000000 / \
621 rte_get_timer_hz(); \
622 _NOTE(CONSTANTCONDITION); \
627 #define EFSYS_KMEM_ALLOC(_esip, _size, _p) \
630 (_p) = rte_zmalloc("sfc", (_size), 0); \
631 _NOTE(CONSTANTCONDITION); \
634 #define EFSYS_KMEM_FREE(_esip, _size, _p) \
639 _NOTE(CONSTANTCONDITION); \
644 typedef rte_spinlock_t efsys_lock_t;
646 #define SFC_EFSYS_LOCK_INIT(_eslp, _ifname, _label) \
647 rte_spinlock_init((_eslp))
648 #define SFC_EFSYS_LOCK_DESTROY(_eslp) ((void)0)
649 #define SFC_EFSYS_LOCK(_eslp) \
650 rte_spinlock_lock((_eslp))
651 #define SFC_EFSYS_UNLOCK(_eslp) \
652 rte_spinlock_unlock((_eslp))
653 #define SFC_EFSYS_LOCK_ASSERT_OWNED(_eslp) \
654 SFC_ASSERT(rte_spinlock_is_locked((_eslp)))
656 typedef int efsys_lock_state_t;
658 #define EFSYS_LOCK_MAGIC 0x000010c4
660 #define EFSYS_LOCK(_lockp, _state) \
662 SFC_EFSYS_LOCK(_lockp); \
663 (_state) = EFSYS_LOCK_MAGIC; \
664 _NOTE(CONSTANTCONDITION); \
667 #define EFSYS_UNLOCK(_lockp, _state) \
669 SFC_ASSERT((_state) == EFSYS_LOCK_MAGIC); \
670 SFC_EFSYS_UNLOCK(_lockp); \
671 _NOTE(CONSTANTCONDITION); \
676 typedef uint64_t efsys_stat_t;
678 #define EFSYS_STAT_INCR(_knp, _delta) \
680 *(_knp) += (_delta); \
681 _NOTE(CONSTANTCONDITION); \
684 #define EFSYS_STAT_DECR(_knp, _delta) \
686 *(_knp) -= (_delta); \
687 _NOTE(CONSTANTCONDITION); \
690 #define EFSYS_STAT_SET(_knp, _val) \
693 _NOTE(CONSTANTCONDITION); \
696 #define EFSYS_STAT_SET_QWORD(_knp, _valp) \
698 *(_knp) = rte_le_to_cpu_64((_valp)->eq_u64[0]); \
699 _NOTE(CONSTANTCONDITION); \
702 #define EFSYS_STAT_SET_DWORD(_knp, _valp) \
704 *(_knp) = rte_le_to_cpu_32((_valp)->ed_u32[0]); \
705 _NOTE(CONSTANTCONDITION); \
708 #define EFSYS_STAT_INCR_QWORD(_knp, _valp) \
710 *(_knp) += rte_le_to_cpu_64((_valp)->eq_u64[0]); \
711 _NOTE(CONSTANTCONDITION); \
714 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp) \
716 *(_knp) -= rte_le_to_cpu_64((_valp)->eq_u64[0]); \
717 _NOTE(CONSTANTCONDITION); \
722 #if EFSYS_OPT_DECODE_INTR_FATAL
723 #define EFSYS_ERR(_esip, _code, _dword0, _dword1) \
726 RTE_LOG(ERR, PMD, "FATAL ERROR #%u (0x%08x%08x)\n", \
727 (_code), (_dword0), (_dword1)); \
728 _NOTE(CONSTANTCONDITION); \
734 /* RTE_VERIFY from DPDK treats expressions with % operator incorrectly,
735 * so we re-implement it here
737 #ifdef RTE_LIBRTE_SFC_EFX_DEBUG
738 #define EFSYS_ASSERT(_exp) \
740 if (unlikely(!(_exp))) \
741 rte_panic("line %d\tassert \"%s\" failed\n", \
742 __LINE__, (#_exp)); \
745 #define EFSYS_ASSERT(_exp) (void)(_exp)
748 #define EFSYS_ASSERT3(_x, _op, _y, _t) EFSYS_ASSERT((_t)(_x) _op (_t)(_y))
750 #define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t)
751 #define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t)
752 #define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
756 #define EFSYS_HAS_ROTL_DWORD 0
762 #endif /* _SFC_COMMON_EFSYS_H */