2 * Copyright (c) 2016 Solarflare Communications Inc.
5 * This software was jointly developed between OKTET Labs (under contract
6 * for Solarflare) and Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 * Update MAC statistics in the buffer.
42 * @retval EAGAIN Try again
43 * @retval ENOMEM Memory allocation failure
46 sfc_port_update_mac_stats(struct sfc_adapter *sa)
48 struct sfc_port *port = &sa->port;
51 SFC_ASSERT(rte_spinlock_is_locked(&port->mac_stats_lock));
53 if (sa->state != SFC_ADAPTER_STARTED)
56 rc = efx_mac_stats_update(sa->nic, &port->mac_stats_dma_mem,
57 port->mac_stats_buf, NULL);
65 sfc_port_reset_mac_stats(struct sfc_adapter *sa)
67 struct sfc_port *port = &sa->port;
70 rte_spinlock_lock(&port->mac_stats_lock);
71 rc = efx_mac_stats_clear(sa->nic);
72 rte_spinlock_unlock(&port->mac_stats_lock);
78 sfc_port_init_dev_link(struct sfc_adapter *sa)
80 struct rte_eth_link *dev_link = &sa->eth_dev->data->dev_link;
82 efx_link_mode_t link_mode;
83 struct rte_eth_link current_link;
85 rc = efx_port_poll(sa->nic, &link_mode);
89 sfc_port_link_mode_to_info(link_mode, ¤t_link);
91 EFX_STATIC_ASSERT(sizeof(*dev_link) == sizeof(rte_atomic64_t));
92 rte_atomic64_set((rte_atomic64_t *)dev_link,
93 *(uint64_t *)¤t_link);
99 sfc_port_start(struct sfc_adapter *sa)
101 struct sfc_port *port = &sa->port;
103 uint32_t phy_adv_cap;
104 const uint32_t phy_pause_caps =
105 ((1u << EFX_PHY_CAP_PAUSE) | (1u << EFX_PHY_CAP_ASYM));
107 sfc_log_init(sa, "entry");
109 sfc_log_init(sa, "init filters");
110 rc = efx_filter_init(sa->nic);
112 goto fail_filter_init;
114 sfc_log_init(sa, "init port");
115 rc = efx_port_init(sa->nic);
119 sfc_log_init(sa, "set flow control to %#x autoneg=%u",
120 port->flow_ctrl, port->flow_ctrl_autoneg);
121 rc = efx_mac_fcntl_set(sa->nic, port->flow_ctrl,
122 port->flow_ctrl_autoneg);
124 goto fail_mac_fcntl_set;
126 /* Preserve pause capabilities set by above efx_mac_fcntl_set() */
127 efx_phy_adv_cap_get(sa->nic, EFX_PHY_CAP_CURRENT, &phy_adv_cap);
128 SFC_ASSERT((port->phy_adv_cap & phy_pause_caps) == 0);
129 phy_adv_cap = port->phy_adv_cap | (phy_adv_cap & phy_pause_caps);
131 sfc_log_init(sa, "set phy adv caps to %#x", phy_adv_cap);
132 rc = efx_phy_adv_cap_set(sa->nic, phy_adv_cap);
134 goto fail_phy_adv_cap_set;
136 sfc_log_init(sa, "set MAC PDU %u", (unsigned int)port->pdu);
137 rc = efx_mac_pdu_set(sa->nic, port->pdu);
139 goto fail_mac_pdu_set;
141 sfc_log_init(sa, "set MAC address");
142 rc = efx_mac_addr_set(sa->nic,
143 sa->eth_dev->data->mac_addrs[0].addr_bytes);
145 goto fail_mac_addr_set;
147 sfc_log_init(sa, "set MAC filters");
148 port->promisc = (sa->eth_dev->data->promiscuous != 0) ?
150 port->allmulti = (sa->eth_dev->data->all_multicast != 0) ?
152 rc = sfc_set_rx_mode(sa);
154 goto fail_mac_filter_set;
156 sfc_log_init(sa, "set multicast address list");
157 rc = efx_mac_multicast_list_set(sa->nic, port->mcast_addrs,
158 port->nb_mcast_addrs);
160 goto fail_mcast_address_list_set;
162 if (port->mac_stats_reset_pending) {
163 rc = sfc_port_reset_mac_stats(sa);
165 sfc_err(sa, "statistics reset failed (requested "
166 "before the port was started)");
168 port->mac_stats_reset_pending = B_FALSE;
171 efx_mac_stats_get_mask(sa->nic, port->mac_stats_mask,
172 sizeof(port->mac_stats_mask));
174 /* Update MAC stats using periodic DMA.
175 * Common code always uses 1000ms update period, so period_ms
176 * parameter only needs to be non-zero to start updates.
178 sfc_log_init(sa, "request MAC stats DMA'ing");
179 rc = efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
182 goto fail_mac_stats_periodic;
184 sfc_log_init(sa, "disable MAC drain");
185 rc = efx_mac_drain(sa->nic, B_FALSE);
189 /* Synchronize link status knowledge */
190 rc = sfc_port_init_dev_link(sa);
192 goto fail_port_init_dev_link;
194 sfc_log_init(sa, "done");
197 fail_port_init_dev_link:
198 (void)efx_mac_drain(sa->nic, B_TRUE);
201 (void)efx_mac_stats_periodic(sa->nic, &port->mac_stats_dma_mem,
204 fail_mac_stats_periodic:
205 fail_mcast_address_list_set:
209 fail_phy_adv_cap_set:
211 efx_port_fini(sa->nic);
214 efx_filter_fini(sa->nic);
217 sfc_log_init(sa, "failed %d", rc);
222 sfc_port_stop(struct sfc_adapter *sa)
224 sfc_log_init(sa, "entry");
226 efx_mac_drain(sa->nic, B_TRUE);
228 (void)efx_mac_stats_periodic(sa->nic, &sa->port.mac_stats_dma_mem,
231 efx_port_fini(sa->nic);
232 efx_filter_fini(sa->nic);
234 sfc_log_init(sa, "done");
238 sfc_port_init(struct sfc_adapter *sa)
240 const struct rte_eth_dev_data *dev_data = sa->eth_dev->data;
241 struct sfc_port *port = &sa->port;
244 sfc_log_init(sa, "entry");
246 /* Enable flow control by default */
247 port->flow_ctrl = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
248 port->flow_ctrl_autoneg = B_TRUE;
250 if (dev_data->dev_conf.rxmode.jumbo_frame)
251 port->pdu = dev_data->dev_conf.rxmode.max_rx_pkt_len;
253 port->pdu = EFX_MAC_PDU(dev_data->mtu);
255 port->max_mcast_addrs = EFX_MAC_MULTICAST_LIST_MAX;
256 port->nb_mcast_addrs = 0;
257 port->mcast_addrs = rte_calloc_socket("mcast_addr_list_buf",
258 port->max_mcast_addrs,
261 if (port->mcast_addrs == NULL) {
263 goto fail_mcast_addr_list_buf_alloc;
266 rte_spinlock_init(&port->mac_stats_lock);
269 port->mac_stats_buf = rte_calloc_socket("mac_stats_buf", EFX_MAC_NSTATS,
272 if (port->mac_stats_buf == NULL)
273 goto fail_mac_stats_buf_alloc;
275 rc = sfc_dma_alloc(sa, "mac_stats", 0, EFX_MAC_STATS_SIZE,
276 sa->socket_id, &port->mac_stats_dma_mem);
278 goto fail_mac_stats_dma_alloc;
280 port->mac_stats_reset_pending = B_FALSE;
282 sfc_log_init(sa, "done");
285 fail_mac_stats_dma_alloc:
286 rte_free(port->mac_stats_buf);
287 fail_mac_stats_buf_alloc:
288 fail_mcast_addr_list_buf_alloc:
289 sfc_log_init(sa, "failed %d", rc);
294 sfc_port_fini(struct sfc_adapter *sa)
296 struct sfc_port *port = &sa->port;
298 sfc_log_init(sa, "entry");
300 sfc_dma_free(sa, &port->mac_stats_dma_mem);
301 rte_free(port->mac_stats_buf);
303 sfc_log_init(sa, "done");
307 sfc_set_rx_mode(struct sfc_adapter *sa)
309 struct sfc_port *port = &sa->port;
312 rc = efx_mac_filter_set(sa->nic, port->promisc, B_TRUE,
313 port->promisc || port->allmulti, B_TRUE);
319 sfc_port_link_mode_to_info(efx_link_mode_t link_mode,
320 struct rte_eth_link *link_info)
322 SFC_ASSERT(link_mode < EFX_LINK_NMODES);
324 memset(link_info, 0, sizeof(*link_info));
325 if ((link_mode == EFX_LINK_DOWN) || (link_mode == EFX_LINK_UNKNOWN))
326 link_info->link_status = ETH_LINK_DOWN;
328 link_info->link_status = ETH_LINK_UP;
332 link_info->link_speed = ETH_SPEED_NUM_10M;
333 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
336 link_info->link_speed = ETH_SPEED_NUM_10M;
337 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
339 case EFX_LINK_100HDX:
340 link_info->link_speed = ETH_SPEED_NUM_100M;
341 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
343 case EFX_LINK_100FDX:
344 link_info->link_speed = ETH_SPEED_NUM_100M;
345 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
347 case EFX_LINK_1000HDX:
348 link_info->link_speed = ETH_SPEED_NUM_1G;
349 link_info->link_duplex = ETH_LINK_HALF_DUPLEX;
351 case EFX_LINK_1000FDX:
352 link_info->link_speed = ETH_SPEED_NUM_1G;
353 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
355 case EFX_LINK_10000FDX:
356 link_info->link_speed = ETH_SPEED_NUM_10G;
357 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
359 case EFX_LINK_40000FDX:
360 link_info->link_speed = ETH_SPEED_NUM_40G;
361 link_info->link_duplex = ETH_LINK_FULL_DUPLEX;
366 case EFX_LINK_UNKNOWN:
368 link_info->link_speed = ETH_SPEED_NUM_NONE;
369 link_info->link_duplex = 0;
373 link_info->link_autoneg = ETH_LINK_AUTONEG;