4 * Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 #include <tmmintrin.h>
42 #include <rte_cycles.h>
43 #include <rte_memory.h>
44 #include <rte_memzone.h>
45 #include <rte_branch_prediction.h>
46 #include <rte_mempool.h>
47 #include <rte_malloc.h>
49 #include <rte_ether.h>
50 #include <rte_ethdev.h>
51 #include <rte_prefetch.h>
52 #include <rte_string_fns.h>
53 #include <rte_errno.h>
54 #include <rte_byteorder.h>
56 #include "virtio_logs.h"
57 #include "virtio_ethdev.h"
58 #include "virtqueue.h"
59 #include "virtio_rxtx.h"
61 #define RTE_VIRTIO_VPMD_RX_BURST 32
62 #define RTE_VIRTIO_DESC_PER_LOOP 8
63 #define RTE_VIRTIO_VPMD_RX_REARM_THRESH RTE_VIRTIO_VPMD_RX_BURST
65 #ifndef __INTEL_COMPILER
66 #pragma GCC diagnostic ignored "-Wcast-qual"
69 int __attribute__((cold))
70 virtqueue_enqueue_recv_refill_simple(struct virtqueue *vq,
71 struct rte_mbuf *cookie)
73 struct vq_desc_extra *dxp;
74 struct vring_desc *start_dp;
77 desc_idx = vq->vq_avail_idx & (vq->vq_nentries - 1);
78 dxp = &vq->vq_descx[desc_idx];
79 dxp->cookie = (void *)cookie;
80 vq->sw_ring[desc_idx] = cookie;
82 start_dp = vq->vq_ring.desc;
83 start_dp[desc_idx].addr = MBUF_DATA_DMA_ADDR(cookie, vq->offset) -
84 vq->hw->vtnet_hdr_size;
85 start_dp[desc_idx].len = cookie->buf_len -
86 RTE_PKTMBUF_HEADROOM + vq->hw->vtnet_hdr_size;
95 virtio_rxq_rearm_vec(struct virtnet_rx *rxvq)
99 struct rte_mbuf **sw_ring;
100 struct vring_desc *start_dp;
102 struct virtqueue *vq = rxvq->vq;
104 desc_idx = vq->vq_avail_idx & (vq->vq_nentries - 1);
105 sw_ring = &vq->sw_ring[desc_idx];
106 start_dp = &vq->vq_ring.desc[desc_idx];
108 ret = rte_mempool_get_bulk(rxvq->mpool, (void **)sw_ring,
109 RTE_VIRTIO_VPMD_RX_REARM_THRESH);
111 rte_eth_devices[rxvq->port_id].data->rx_mbuf_alloc_failed +=
112 RTE_VIRTIO_VPMD_RX_REARM_THRESH;
116 for (i = 0; i < RTE_VIRTIO_VPMD_RX_REARM_THRESH; i++) {
119 p = (uintptr_t)&sw_ring[i]->rearm_data;
120 *(uint64_t *)p = rxvq->mbuf_initializer;
123 MBUF_DATA_DMA_ADDR(sw_ring[i], vq->offset) -
124 vq->hw->vtnet_hdr_size;
125 start_dp[i].len = sw_ring[i]->buf_len -
126 RTE_PKTMBUF_HEADROOM + vq->hw->vtnet_hdr_size;
129 vq->vq_avail_idx += RTE_VIRTIO_VPMD_RX_REARM_THRESH;
130 vq->vq_free_cnt -= RTE_VIRTIO_VPMD_RX_REARM_THRESH;
131 vq_update_avail_idx(vq);
134 /* virtio vPMD receive routine, only accept(nb_pkts >= RTE_VIRTIO_DESC_PER_LOOP)
136 * This routine is for non-mergeable RX, one desc for each guest buffer.
137 * This routine is based on the RX ring layout optimization. Each entry in the
138 * avail ring points to the desc with the same index in the desc ring and this
139 * will never be changed in the driver.
141 * - nb_pkts < RTE_VIRTIO_DESC_PER_LOOP, just return no packet
144 virtio_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,
147 struct virtnet_rx *rxvq = rx_queue;
148 struct virtqueue *vq = rxvq->vq;
151 struct vring_used_elem *rused;
152 struct rte_mbuf **sw_ring;
153 struct rte_mbuf **sw_ring_end;
154 uint16_t nb_pkts_received;
155 __m128i shuf_msk1, shuf_msk2, len_adjust;
157 shuf_msk1 = _mm_set_epi8(
158 0xFF, 0xFF, 0xFF, 0xFF,
159 0xFF, 0xFF, /* vlan tci */
161 0xFF, 0xFF, 5, 4, /* pkt len */
162 0xFF, 0xFF, 0xFF, 0xFF /* packet type */
166 shuf_msk2 = _mm_set_epi8(
167 0xFF, 0xFF, 0xFF, 0xFF,
168 0xFF, 0xFF, /* vlan tci */
169 13, 12, /* dat len */
170 0xFF, 0xFF, 13, 12, /* pkt len */
171 0xFF, 0xFF, 0xFF, 0xFF /* packet type */
174 /* Subtract the header length.
175 * In which case do we need the header length in used->len ?
177 len_adjust = _mm_set_epi16(
180 (uint16_t)-vq->hw->vtnet_hdr_size,
181 0, (uint16_t)-vq->hw->vtnet_hdr_size,
184 if (unlikely(nb_pkts < RTE_VIRTIO_DESC_PER_LOOP))
187 nb_used = VIRTQUEUE_NUSED(vq);
189 rte_compiler_barrier();
191 if (unlikely(nb_used == 0))
194 nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_VIRTIO_DESC_PER_LOOP);
195 nb_used = RTE_MIN(nb_used, nb_pkts);
197 desc_idx = (uint16_t)(vq->vq_used_cons_idx & (vq->vq_nentries - 1));
198 rused = &vq->vq_ring.used->ring[desc_idx];
199 sw_ring = &vq->sw_ring[desc_idx];
200 sw_ring_end = &vq->sw_ring[vq->vq_nentries];
202 _mm_prefetch((const void *)rused, _MM_HINT_T0);
204 if (vq->vq_free_cnt >= RTE_VIRTIO_VPMD_RX_REARM_THRESH) {
205 virtio_rxq_rearm_vec(rxvq);
206 if (unlikely(virtqueue_kick_prepare(vq)))
207 virtqueue_notify(vq);
210 for (nb_pkts_received = 0;
211 nb_pkts_received < nb_used;) {
212 __m128i desc[RTE_VIRTIO_DESC_PER_LOOP / 2];
213 __m128i mbp[RTE_VIRTIO_DESC_PER_LOOP / 2];
214 __m128i pkt_mb[RTE_VIRTIO_DESC_PER_LOOP];
216 mbp[0] = _mm_loadu_si128((__m128i *)(sw_ring + 0));
217 desc[0] = _mm_loadu_si128((__m128i *)(rused + 0));
218 _mm_storeu_si128((__m128i *)&rx_pkts[0], mbp[0]);
220 mbp[1] = _mm_loadu_si128((__m128i *)(sw_ring + 2));
221 desc[1] = _mm_loadu_si128((__m128i *)(rused + 2));
222 _mm_storeu_si128((__m128i *)&rx_pkts[2], mbp[1]);
224 mbp[2] = _mm_loadu_si128((__m128i *)(sw_ring + 4));
225 desc[2] = _mm_loadu_si128((__m128i *)(rused + 4));
226 _mm_storeu_si128((__m128i *)&rx_pkts[4], mbp[2]);
228 mbp[3] = _mm_loadu_si128((__m128i *)(sw_ring + 6));
229 desc[3] = _mm_loadu_si128((__m128i *)(rused + 6));
230 _mm_storeu_si128((__m128i *)&rx_pkts[6], mbp[3]);
232 pkt_mb[1] = _mm_shuffle_epi8(desc[0], shuf_msk2);
233 pkt_mb[0] = _mm_shuffle_epi8(desc[0], shuf_msk1);
234 pkt_mb[1] = _mm_add_epi16(pkt_mb[1], len_adjust);
235 pkt_mb[0] = _mm_add_epi16(pkt_mb[0], len_adjust);
236 _mm_storeu_si128((void *)&rx_pkts[1]->rx_descriptor_fields1,
238 _mm_storeu_si128((void *)&rx_pkts[0]->rx_descriptor_fields1,
241 pkt_mb[3] = _mm_shuffle_epi8(desc[1], shuf_msk2);
242 pkt_mb[2] = _mm_shuffle_epi8(desc[1], shuf_msk1);
243 pkt_mb[3] = _mm_add_epi16(pkt_mb[3], len_adjust);
244 pkt_mb[2] = _mm_add_epi16(pkt_mb[2], len_adjust);
245 _mm_storeu_si128((void *)&rx_pkts[3]->rx_descriptor_fields1,
247 _mm_storeu_si128((void *)&rx_pkts[2]->rx_descriptor_fields1,
250 pkt_mb[5] = _mm_shuffle_epi8(desc[2], shuf_msk2);
251 pkt_mb[4] = _mm_shuffle_epi8(desc[2], shuf_msk1);
252 pkt_mb[5] = _mm_add_epi16(pkt_mb[5], len_adjust);
253 pkt_mb[4] = _mm_add_epi16(pkt_mb[4], len_adjust);
254 _mm_storeu_si128((void *)&rx_pkts[5]->rx_descriptor_fields1,
256 _mm_storeu_si128((void *)&rx_pkts[4]->rx_descriptor_fields1,
259 pkt_mb[7] = _mm_shuffle_epi8(desc[3], shuf_msk2);
260 pkt_mb[6] = _mm_shuffle_epi8(desc[3], shuf_msk1);
261 pkt_mb[7] = _mm_add_epi16(pkt_mb[7], len_adjust);
262 pkt_mb[6] = _mm_add_epi16(pkt_mb[6], len_adjust);
263 _mm_storeu_si128((void *)&rx_pkts[7]->rx_descriptor_fields1,
265 _mm_storeu_si128((void *)&rx_pkts[6]->rx_descriptor_fields1,
268 if (unlikely(nb_used <= RTE_VIRTIO_DESC_PER_LOOP)) {
269 if (sw_ring + nb_used <= sw_ring_end)
270 nb_pkts_received += nb_used;
272 nb_pkts_received += sw_ring_end - sw_ring;
275 if (unlikely(sw_ring + RTE_VIRTIO_DESC_PER_LOOP >=
277 nb_pkts_received += sw_ring_end - sw_ring;
280 nb_pkts_received += RTE_VIRTIO_DESC_PER_LOOP;
282 rx_pkts += RTE_VIRTIO_DESC_PER_LOOP;
283 sw_ring += RTE_VIRTIO_DESC_PER_LOOP;
284 rused += RTE_VIRTIO_DESC_PER_LOOP;
285 nb_used -= RTE_VIRTIO_DESC_PER_LOOP;
290 vq->vq_used_cons_idx += nb_pkts_received;
291 vq->vq_free_cnt += nb_pkts_received;
292 rxvq->stats.packets += nb_pkts_received;
293 return nb_pkts_received;
296 #define VIRTIO_TX_FREE_THRESH 32
297 #define VIRTIO_TX_MAX_FREE_BUF_SZ 32
298 #define VIRTIO_TX_FREE_NR 32
299 /* TODO: vq->tx_free_cnt could mean num of free slots so we could avoid shift */
301 virtio_xmit_cleanup(struct virtqueue *vq)
303 uint16_t i, desc_idx;
305 struct rte_mbuf *m, *free[VIRTIO_TX_MAX_FREE_BUF_SZ];
307 desc_idx = (uint16_t)(vq->vq_used_cons_idx &
308 ((vq->vq_nentries >> 1) - 1));
309 m = (struct rte_mbuf *)vq->vq_descx[desc_idx++].cookie;
310 m = __rte_pktmbuf_prefree_seg(m);
311 if (likely(m != NULL)) {
314 for (i = 1; i < VIRTIO_TX_FREE_NR; i++) {
315 m = (struct rte_mbuf *)vq->vq_descx[desc_idx++].cookie;
316 m = __rte_pktmbuf_prefree_seg(m);
317 if (likely(m != NULL)) {
318 if (likely(m->pool == free[0]->pool))
321 rte_mempool_put_bulk(free[0]->pool,
322 (void **)free, nb_free);
328 rte_mempool_put_bulk(free[0]->pool, (void **)free, nb_free);
330 for (i = 1; i < VIRTIO_TX_FREE_NR; i++) {
331 m = (struct rte_mbuf *)vq->vq_descx[desc_idx++].cookie;
332 m = __rte_pktmbuf_prefree_seg(m);
334 rte_mempool_put(m->pool, m);
338 vq->vq_used_cons_idx += VIRTIO_TX_FREE_NR;
339 vq->vq_free_cnt += (VIRTIO_TX_FREE_NR << 1);
343 virtio_xmit_pkts_simple(void *tx_queue, struct rte_mbuf **tx_pkts,
346 struct virtnet_tx *txvq = tx_queue;
347 struct virtqueue *vq = txvq->vq;
350 struct vring_desc *start_dp;
351 uint16_t nb_tail, nb_commit;
353 uint16_t desc_idx_max = (vq->vq_nentries >> 1) - 1;
355 nb_used = VIRTQUEUE_NUSED(vq);
356 rte_compiler_barrier();
358 if (nb_used >= VIRTIO_TX_FREE_THRESH)
359 virtio_xmit_cleanup(vq);
361 nb_commit = nb_pkts = RTE_MIN((vq->vq_free_cnt >> 1), nb_pkts);
362 desc_idx = (uint16_t)(vq->vq_avail_idx & desc_idx_max);
363 start_dp = vq->vq_ring.desc;
364 nb_tail = (uint16_t) (desc_idx_max + 1 - desc_idx);
366 if (nb_commit >= nb_tail) {
367 for (i = 0; i < nb_tail; i++)
368 vq->vq_descx[desc_idx + i].cookie = tx_pkts[i];
369 for (i = 0; i < nb_tail; i++) {
370 start_dp[desc_idx].addr =
371 MBUF_DATA_DMA_ADDR(*tx_pkts, vq->offset);
372 start_dp[desc_idx].len = (*tx_pkts)->pkt_len;
376 nb_commit -= nb_tail;
379 for (i = 0; i < nb_commit; i++)
380 vq->vq_descx[desc_idx + i].cookie = tx_pkts[i];
381 for (i = 0; i < nb_commit; i++) {
382 start_dp[desc_idx].addr =
383 MBUF_DATA_DMA_ADDR(*tx_pkts, vq->offset);
384 start_dp[desc_idx].len = (*tx_pkts)->pkt_len;
389 rte_compiler_barrier();
391 vq->vq_free_cnt -= (uint16_t)(nb_pkts << 1);
392 vq->vq_avail_idx += nb_pkts;
393 vq->vq_ring.avail->idx = vq->vq_avail_idx;
394 txvq->stats.packets += nb_pkts;
396 if (likely(nb_pkts)) {
397 if (unlikely(virtqueue_kick_prepare(vq)))
398 virtqueue_notify(vq);
404 int __attribute__((cold))
405 virtio_rxq_vec_setup(struct virtnet_rx *rxq)
408 struct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */
411 mb_def.data_off = RTE_PKTMBUF_HEADROOM;
412 mb_def.port = rxq->port_id;
413 rte_mbuf_refcnt_set(&mb_def, 1);
415 /* prevent compiler reordering: rearm_data covers previous fields */
416 rte_compiler_barrier();
417 p = (uintptr_t)&mb_def.rearm_data;
418 rxq->mbuf_initializer = *(uint64_t *)p;