1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
8 #include <rte_regexdev.h>
10 #include <infiniband/verbs.h>
11 #include <infiniband/mlx5dv.h>
13 #include <mlx5_common.h>
17 struct mlx5_regex_sq {
18 uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
19 struct mlx5_devx_obj *obj; /* The SQ DevX object. */
20 int64_t dbr_offset; /* Door bell record offset. */
21 uint32_t dbr_umem; /* Door bell record umem id. */
22 uint8_t *wqe; /* The SQ ring buffer. */
23 struct mlx5dv_devx_umem *wqe_umem; /* SQ buffer umem. */
27 struct mlx5_regex_cq {
28 uint32_t log_nb_desc; /* Log 2 number of desc for this object. */
29 struct mlx5_devx_obj *obj; /* The CQ DevX object. */
30 int64_t dbr_offset; /* Door bell record offset. */
31 uint32_t dbr_umem; /* Door bell record umem id. */
32 volatile struct mlx5_cqe *cqe; /* The CQ ring buffer. */
33 struct mlx5dv_devx_umem *cqe_umem; /* CQ buffer umem. */
37 struct mlx5_regex_qp {
38 uint32_t flags; /* QP user flags. */
39 uint32_t nb_desc; /* Total number of desc for this qp. */
40 struct mlx5_regex_sq *sqs; /* Pointer to sq array. */
41 uint16_t nb_obj; /* Number of sq objects. */
42 struct mlx5_regex_cq cq; /* CQ struct. */
45 struct mlx5_regex_db {
46 void *ptr; /* Pointer to the db memory. */
47 uint32_t len; /* The memory len. */
48 bool active; /* Active flag. */
49 uint8_t db_assigned_to_eng_num;
50 /**< To which engine the db is connected. */
51 struct mlx5_regex_umem umem;
52 /**< The umem struct. */
55 struct mlx5_regex_priv {
56 TAILQ_ENTRY(mlx5_regex_priv) next;
57 struct ibv_context *ctx; /* Device context. */
58 struct rte_pci_device *pci_dev;
59 struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */
60 uint16_t nb_queues; /* Number of queues. */
61 struct mlx5_regex_qp *qps; /* Pointer to the qp array. */
62 uint16_t nb_max_matches; /* Max number of matches. */
63 enum mlx5_rxp_program_mode prog_mode;
64 struct mlx5_regex_db db[MLX5_RXP_MAX_ENGINES +
66 uint32_t nb_engines; /* Number of RegEx engines. */
67 uint32_t eqn; /* EQ number. */
68 struct mlx5dv_devx_uar *uar; /* UAR object. */
70 struct mlx5_dbr_page_list dbrpgs; /* Door-bell pages. */
74 int mlx5_regex_info_get(struct rte_regexdev *dev,
75 struct rte_regexdev_info *info);
76 int mlx5_regex_configure(struct rte_regexdev *dev,
77 const struct rte_regexdev_config *cfg);
78 int mlx5_regex_rules_db_import(struct rte_regexdev *dev,
79 const char *rule_db, uint32_t rule_db_len);
81 /* mlx5_regex_devx.c */
82 int mlx5_devx_regex_register_write(struct ibv_context *ctx, int engine_id,
83 uint32_t addr, uint32_t data);
84 int mlx5_devx_regex_register_read(struct ibv_context *ctx, int engine_id,
85 uint32_t addr, uint32_t *data);
86 int mlx5_devx_regex_database_stop(void *ctx, uint8_t engine);
87 int mlx5_devx_regex_database_resume(void *ctx, uint8_t engine);
88 int mlx5_devx_regex_database_program(void *ctx, uint8_t engine,
89 uint32_t umem_id, uint64_t umem_offset);
91 /* mlx5_regex_control.c */
92 int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
93 const struct rte_regexdev_qp_conf *cfg);
95 #endif /* MLX5_REGEX_H */