4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 #include <sys/types.h>
41 #include <sys/queue.h>
46 #include <rte_common.h>
47 #include <rte_byteorder.h>
49 #include <rte_memory.h>
50 #include <rte_memzone.h>
51 #include <rte_tailq.h>
53 #include <rte_per_lcore.h>
54 #include <rte_launch.h>
55 #include <rte_atomic.h>
56 #include <rte_cycles.h>
57 #include <rte_prefetch.h>
58 #include <rte_lcore.h>
59 #include <rte_per_lcore.h>
60 #include <rte_branch_prediction.h>
61 #include <rte_interrupts.h>
63 #include <rte_random.h>
64 #include <rte_debug.h>
65 #include <rte_ether.h>
66 #include <rte_ethdev.h>
68 #include <rte_mempool.h>
71 #include <rte_string_fns.h>
76 #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
77 #define NB_MBUF (32 * 1024)
80 * RX and TX Prefetch, Host, and Write-back threshold values should be
81 * carefully set for optimal performance. Consult the network
82 * controller's datasheet and supporting DPDK documentation for guidance
83 * on how these parameters should be set.
85 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
86 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
87 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
90 * These default values are optimized for use with the Intel(R) 82599 10 GbE
91 * Controller and the DPDK ixgbe PMD. Consider using other values for other
92 * network controllers and/or network drivers.
94 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
95 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
96 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
98 #define MAX_PKT_BURST 32
99 #define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
103 #define TX_QUEUE_FLUSH_MASK 0xFFFFFFFF
104 #define TSC_COUNT_LIMIT 1000
106 #define ACTION_ENCRYPT 1
107 #define ACTION_DECRYPT 2
110 * Configurable number of RX/TX ring descriptors
112 #define RTE_TEST_RX_DESC_DEFAULT 128
113 #define RTE_TEST_TX_DESC_DEFAULT 512
114 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
115 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
117 /* ethernet addresses of ports */
118 static struct ether_addr ports_eth_addr[RTE_MAX_ETHPORTS];
120 /* mask of enabled ports */
121 static unsigned enabled_port_mask = 0;
122 static int promiscuous_on = 1; /**< Ports set in promiscuous mode on by default. */
126 struct rte_mbuf *m_table[MAX_PKT_BURST];
129 struct lcore_rx_queue {
134 #define MAX_RX_QUEUE_PER_LCORE 16
136 #define MAX_LCORE_PARAMS 1024
137 struct lcore_params {
143 static struct lcore_params lcore_params_array[MAX_LCORE_PARAMS];
144 static struct lcore_params lcore_params_array_default[] = {
156 static struct lcore_params * lcore_params = lcore_params_array_default;
157 static uint16_t nb_lcore_params = sizeof(lcore_params_array_default) /
158 sizeof(lcore_params_array_default[0]);
160 static struct rte_eth_conf port_conf = {
163 .header_split = 0, /**< Header Split disabled */
164 .hw_ip_checksum = 1, /**< IP checksum offload enabled */
165 .hw_vlan_filter = 0, /**< VLAN filtering disabled */
166 .jumbo_frame = 0, /**< Jumbo Frame Support disabled */
167 .hw_strip_crc = 0, /**< CRC stripped by hardware */
172 .rss_hf = ETH_RSS_IPV4 | ETH_RSS_IPV6,
176 .mq_mode = ETH_MQ_TX_NONE,
180 static const struct rte_eth_rxconf rx_conf = {
182 .pthresh = RX_PTHRESH,
183 .hthresh = RX_HTHRESH,
184 .wthresh = RX_WTHRESH,
188 static const struct rte_eth_txconf tx_conf = {
190 .pthresh = TX_PTHRESH,
191 .hthresh = TX_HTHRESH,
192 .wthresh = TX_WTHRESH,
194 .tx_free_thresh = 0, /* Use PMD default values */
195 .tx_rs_thresh = 0, /* Use PMD default values */
198 static struct rte_mempool * pktmbuf_pool[RTE_MAX_NUMA_NODES];
205 uint16_t rx_queue_list_pos;
206 struct lcore_rx_queue rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
207 uint16_t tx_queue_id[RTE_MAX_ETHPORTS];
208 struct mbuf_table rx_mbuf;
209 uint32_t rx_mbuf_pos;
210 uint32_t rx_curr_queue;
211 struct mbuf_table tx_mbufs[RTE_MAX_ETHPORTS];
212 } __rte_cache_aligned;
214 static struct lcore_conf lcore_conf[RTE_MAX_LCORE];
216 static inline struct rte_mbuf *
217 nic_rx_get_packet(struct lcore_conf *qconf)
219 struct rte_mbuf *pkt;
221 if (unlikely(qconf->n_rx_queue == 0))
224 /* Look for the next queue with packets; return if none */
225 if (unlikely(qconf->rx_mbuf_pos == qconf->rx_mbuf.len)) {
228 qconf->rx_mbuf_pos = 0;
229 for (i = 0; i < qconf->n_rx_queue; i++) {
230 qconf->rx_mbuf.len = rte_eth_rx_burst(
231 qconf->rx_queue_list[qconf->rx_curr_queue].port_id,
232 qconf->rx_queue_list[qconf->rx_curr_queue].queue_id,
233 qconf->rx_mbuf.m_table, MAX_PKT_BURST);
235 qconf->rx_curr_queue++;
236 if (unlikely(qconf->rx_curr_queue == qconf->n_rx_queue))
237 qconf->rx_curr_queue = 0;
238 if (likely(qconf->rx_mbuf.len > 0))
241 if (unlikely(i == qconf->n_rx_queue))
245 /* Get the next packet from the current queue; if last packet, go to next queue */
246 pkt = qconf->rx_mbuf.m_table[qconf->rx_mbuf_pos];
247 qconf->rx_mbuf_pos++;
253 nic_tx_flush_queues(struct lcore_conf *qconf)
257 for (portid = 0; portid < RTE_MAX_ETHPORTS; portid++) {
258 struct rte_mbuf **m_table = NULL;
259 uint16_t queueid, len;
262 if (likely((qconf->tx_mask & (1 << portid)) == 0))
265 len = qconf->tx_mbufs[portid].len;
266 if (likely(len == 0))
269 queueid = qconf->tx_queue_id[portid];
270 m_table = qconf->tx_mbufs[portid].m_table;
272 n = rte_eth_tx_burst(portid, queueid, m_table, len);
273 for (i = n; i < len; i++){
274 rte_pktmbuf_free(m_table[i]);
277 qconf->tx_mbufs[portid].len = 0;
280 qconf->tx_mask = TX_QUEUE_FLUSH_MASK;
284 nic_tx_send_packet(struct rte_mbuf *pkt, uint8_t port)
286 struct lcore_conf *qconf;
290 if (unlikely(pkt == NULL)) {
294 lcoreid = rte_lcore_id();
295 qconf = &lcore_conf[lcoreid];
297 len = qconf->tx_mbufs[port].len;
298 qconf->tx_mbufs[port].m_table[len] = pkt;
301 /* enough pkts to be sent */
302 if (unlikely(len == MAX_PKT_BURST)) {
306 queueid = qconf->tx_queue_id[port];
307 n = rte_eth_tx_burst(port, queueid, qconf->tx_mbufs[port].m_table, MAX_PKT_BURST);
308 for (i = n; i < MAX_PKT_BURST; i++){
309 rte_pktmbuf_free(qconf->tx_mbufs[port].m_table[i]);
312 qconf->tx_mask &= ~(1 << port);
316 qconf->tx_mbufs[port].len = len;
319 static inline uint8_t
320 get_output_port(uint8_t input_port)
322 RTE_BUILD_BUG_ON((RTE_MAX_ETHPORTS & 1) != 0);
323 return (uint8_t)(input_port ^ 1);
326 /* main processing loop */
327 static __attribute__((noreturn)) int
328 main_loop(__attribute__((unused)) void *dummy)
331 struct lcore_conf *qconf;
333 lcoreid = rte_lcore_id();
334 qconf = &lcore_conf[lcoreid];
336 printf("Thread %u starting...\n", lcoreid);
339 struct rte_mbuf *pkt;
340 uint32_t pkt_from_nic_rx = 0;
343 /* Flush TX queues */
345 if (unlikely(qconf->tsc_count == TSC_COUNT_LIMIT)) {
346 uint64_t tsc, diff_tsc;
350 diff_tsc = tsc - qconf->tsc;
351 if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
352 nic_tx_flush_queues(qconf);
353 crypto_flush_tx_queue(lcoreid);
357 qconf->tsc_count = 0;
361 * Check the Intel QuickAssist queues first
364 pkt = (struct rte_mbuf *) crypto_get_next_response();
366 pkt = nic_rx_get_packet(qconf);
371 /* Send packet to either QAT encrypt, QAT decrypt or NIC TX */
372 if (pkt_from_nic_rx) {
373 struct ipv4_hdr *ip = (struct ipv4_hdr *) (rte_pktmbuf_mtod(pkt, unsigned char *) +
374 sizeof(struct ether_hdr));
375 if (ip->src_addr & rte_cpu_to_be_32(ACTION_ENCRYPT)) {
376 if (CRYPTO_RESULT_FAIL == crypto_encrypt(pkt,
377 (enum cipher_alg)((ip->src_addr >> 16) & 0xFF),
378 (enum hash_alg)((ip->src_addr >> 8) & 0xFF)))
379 rte_pktmbuf_free(pkt);
383 if (ip->src_addr & rte_cpu_to_be_32(ACTION_DECRYPT)) {
384 if(CRYPTO_RESULT_FAIL == crypto_decrypt(pkt,
385 (enum cipher_alg)((ip->src_addr >> 16) & 0xFF),
386 (enum hash_alg)((ip->src_addr >> 8) & 0xFF)))
387 rte_pktmbuf_free(pkt);
392 port = get_output_port(pkt->pkt.in_port);
394 /* Transmit the packet */
395 nic_tx_send_packet(pkt, port);
399 static inline unsigned
400 get_port_max_rx_queues(uint8_t port_id)
402 struct rte_eth_dev_info dev_info;
404 rte_eth_dev_info_get(port_id, &dev_info);
405 return dev_info.max_rx_queues;
408 static inline unsigned
409 get_port_max_tx_queues(uint8_t port_id)
411 struct rte_eth_dev_info dev_info;
413 rte_eth_dev_info_get(port_id, &dev_info);
414 return dev_info.max_tx_queues;
418 check_lcore_params(void)
422 for (i = 0; i < nb_lcore_params; ++i) {
423 if (lcore_params[i].queue_id >= get_port_max_rx_queues(lcore_params[i].port_id)) {
424 printf("invalid queue number: %hhu\n", lcore_params[i].queue_id);
427 if (!rte_lcore_is_enabled(lcore_params[i].lcore_id)) {
428 printf("error: lcore %hhu is not enabled in lcore mask\n",
429 lcore_params[i].lcore_id);
437 check_port_config(const unsigned nb_ports)
442 for (i = 0; i < nb_lcore_params; ++i) {
443 portid = lcore_params[i].port_id;
444 if ((enabled_port_mask & (1 << portid)) == 0) {
445 printf("port %u is not enabled in port mask\n", portid);
448 if (portid >= nb_ports) {
449 printf("port %u is not present on the board\n", portid);
457 get_port_n_rx_queues(const uint8_t port)
462 for (i = 0; i < nb_lcore_params; ++i) {
463 if (lcore_params[i].port_id == port && lcore_params[i].queue_id > queue)
464 queue = lcore_params[i].queue_id;
466 return (uint8_t)(++queue);
470 init_lcore_rx_queues(void)
472 uint16_t i, nb_rx_queue;
475 for (i = 0; i < nb_lcore_params; ++i) {
476 lcore = lcore_params[i].lcore_id;
477 nb_rx_queue = lcore_conf[lcore].n_rx_queue;
478 if (nb_rx_queue >= MAX_RX_QUEUE_PER_LCORE) {
479 printf("error: too many queues (%u) for lcore: %u\n",
480 (unsigned)nb_rx_queue + 1, (unsigned)lcore);
483 lcore_conf[lcore].rx_queue_list[nb_rx_queue].port_id =
484 lcore_params[i].port_id;
485 lcore_conf[lcore].rx_queue_list[nb_rx_queue].queue_id =
486 lcore_params[i].queue_id;
487 lcore_conf[lcore].n_rx_queue++;
494 print_usage(const char *prgname)
496 printf ("%s [EAL options] -- -p PORTMASK [--no-promisc]"
497 " [--config '(port,queue,lcore)[,(port,queue,lcore)]'\n"
498 " -p PORTMASK: hexadecimal bitmask of ports to configure\n"
499 " --no-promisc: disable promiscuous mode (default is ON)\n"
500 " --config '(port,queue,lcore)': rx queues configuration\n",
505 parse_portmask(const char *portmask)
510 /* parse hexadecimal string */
511 pm = strtoul(portmask, &end, 16);
512 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
519 parse_config(const char *q_arg)
522 const char *p, *p_end = q_arg;
530 unsigned long int_fld[_NUM_FLD];
531 char *str_fld[_NUM_FLD];
537 while ((p = strchr(p_end,'(')) != NULL) {
538 if (nb_lcore_params >= MAX_LCORE_PARAMS) {
539 printf("exceeded max number of lcore params: %hu\n",
544 if((p_end = strchr(p,')')) == NULL)
548 if(size >= sizeof(s))
551 rte_snprintf(s, sizeof(s), "%.*s", size, p);
552 if (rte_strsplit(s, sizeof(s), str_fld, _NUM_FLD, ',') != _NUM_FLD)
554 for (i = 0; i < _NUM_FLD; i++) {
556 int_fld[i] = strtoul(str_fld[i], &end, 0);
557 if (errno != 0 || end == str_fld[i] || int_fld[i] > 255)
560 lcore_params_array[nb_lcore_params].port_id = (uint8_t)int_fld[FLD_PORT];
561 lcore_params_array[nb_lcore_params].queue_id = (uint8_t)int_fld[FLD_QUEUE];
562 lcore_params_array[nb_lcore_params].lcore_id = (uint8_t)int_fld[FLD_LCORE];
565 lcore_params = lcore_params_array;
569 /* Parse the argument given in the command line of the application */
571 parse_args(int argc, char **argv)
576 char *prgname = argv[0];
577 static struct option lgopts[] = {
579 {"no-promisc", 0, 0, 0},
585 while ((opt = getopt_long(argc, argvopt, "p:",
586 lgopts, &option_index)) != EOF) {
591 enabled_port_mask = parse_portmask(optarg);
592 if (enabled_port_mask == 0) {
593 printf("invalid portmask\n");
594 print_usage(prgname);
601 if (strcmp(lgopts[option_index].name, "config") == 0) {
602 ret = parse_config(optarg);
604 printf("invalid config\n");
605 print_usage(prgname);
609 if (strcmp(lgopts[option_index].name, "no-promisc") == 0) {
610 printf("Promiscuous mode disabled\n");
615 print_usage(prgname);
620 if (enabled_port_mask == 0) {
621 printf("portmask not specified\n");
622 print_usage(prgname);
627 argv[optind-1] = prgname;
630 optind = 0; /* reset getopt lib */
635 print_ethaddr(const char *name, const struct ether_addr *eth_addr)
637 printf ("%s%02X:%02X:%02X:%02X:%02X:%02X", name,
638 eth_addr->addr_bytes[0],
639 eth_addr->addr_bytes[1],
640 eth_addr->addr_bytes[2],
641 eth_addr->addr_bytes[3],
642 eth_addr->addr_bytes[4],
643 eth_addr->addr_bytes[5]);
649 const unsigned flags = 0;
654 RTE_LCORE_FOREACH(lcoreid) {
655 socketid = rte_lcore_to_socket_id(lcoreid);
656 if (socketid >= RTE_MAX_NUMA_NODES) {
657 printf("Socket %d of lcore %u is out of range %d\n",
658 socketid, lcoreid, RTE_MAX_NUMA_NODES);
661 if (pktmbuf_pool[socketid] == NULL) {
662 rte_snprintf(s, sizeof(s), "mbuf_pool_%d", socketid);
663 pktmbuf_pool[socketid] =
664 rte_mempool_create(s, NB_MBUF, MBUF_SIZE, 32,
665 sizeof(struct rte_pktmbuf_pool_private),
666 rte_pktmbuf_pool_init, NULL,
667 rte_pktmbuf_init, NULL,
669 if (pktmbuf_pool[socketid] == NULL) {
670 printf("Cannot init mbuf pool on socket %d\n", socketid);
673 printf("Allocated mbuf pool on socket %d\n", socketid);
680 MAIN(int argc, char **argv)
682 struct lcore_conf *qconf;
683 struct rte_eth_link link;
688 uint32_t nb_tx_queue;
689 uint8_t portid, nb_rx_queue, queue, socketid;
692 ret = rte_eal_init(argc, argv);
698 /* parse application arguments (after the EAL ones) */
699 ret = parse_args(argc, argv);
704 #ifdef RTE_LIBRTE_IGB_PMD
705 if (rte_igb_pmd_init() < 0)
706 rte_panic("Cannot init igb pmd\n");
708 #ifdef RTE_LIBRTE_IXGBE_PMD
709 if (rte_ixgbe_pmd_init() < 0)
710 rte_panic("Cannot init ixgbe pmd\n");
713 if (rte_eal_pci_probe() < 0)
714 rte_panic("Cannot probe PCI\n");
716 if (check_lcore_params() < 0)
717 rte_panic("check_lcore_params failed\n");
719 ret = init_lcore_rx_queues();
727 nb_ports = rte_eth_dev_count();
728 if (nb_ports > RTE_MAX_ETHPORTS)
729 nb_ports = RTE_MAX_ETHPORTS;
731 if (check_port_config(nb_ports) < 0)
732 rte_panic("check_port_config failed\n");
734 /* initialize all ports */
735 for (portid = 0; portid < nb_ports; portid++) {
736 /* skip ports that are not enabled */
737 if ((enabled_port_mask & (1 << portid)) == 0) {
738 printf("\nSkipping disabled port %d\n", portid);
743 printf("Initializing port %d ... ", portid );
746 nb_rx_queue = get_port_n_rx_queues(portid);
747 if (nb_rx_queue > get_port_max_rx_queues(portid))
748 rte_panic("Number of rx queues %d exceeds max number of rx queues %u"
749 " for port %d\n", nb_rx_queue, get_port_max_rx_queues(portid),
751 nb_tx_queue = rte_lcore_count();
752 if (nb_tx_queue > get_port_max_tx_queues(portid))
753 rte_panic("Number of lcores %u exceeds max number of tx queues %u"
754 " for port %d\n", nb_tx_queue, get_port_max_tx_queues(portid),
756 printf("Creating queues: nb_rxq=%d nb_txq=%u... ",
757 nb_rx_queue, (unsigned)nb_tx_queue );
758 ret = rte_eth_dev_configure(portid, nb_rx_queue,
759 (uint16_t)nb_tx_queue, &port_conf);
761 rte_panic("Cannot configure device: err=%d, port=%d\n",
764 rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);
765 print_ethaddr(" Address:", &ports_eth_addr[portid]);
768 /* init one TX queue per couple (lcore,port) */
770 RTE_LCORE_FOREACH(lcoreid) {
771 socketid = (uint8_t)rte_lcore_to_socket_id(lcoreid);
772 printf("txq=%u,%d,%d ", lcoreid, queueid, socketid);
774 ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
777 rte_panic("rte_eth_tx_queue_setup: err=%d, "
778 "port=%d\n", ret, portid);
780 qconf = &lcore_conf[lcoreid];
781 qconf->tx_queue_id[portid] = queueid;
787 RTE_LCORE_FOREACH(lcoreid) {
788 qconf = &lcore_conf[lcoreid];
789 printf("\nInitializing rx queues on lcore %u ... ", lcoreid );
792 for(queue = 0; queue < qconf->n_rx_queue; ++queue) {
793 portid = qconf->rx_queue_list[queue].port_id;
794 queueid = qconf->rx_queue_list[queue].queue_id;
795 socketid = (uint8_t)rte_lcore_to_socket_id(lcoreid);
796 printf("rxq=%d,%d,%d ", portid, queueid, socketid);
799 ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd,
800 socketid, &rx_conf, pktmbuf_pool[socketid]);
802 rte_panic("rte_eth_rx_queue_setup: err=%d,"
803 "port=%d\n", ret, portid);
810 for (portid = 0; portid < nb_ports; portid++) {
811 if ((enabled_port_mask & (1 << portid)) == 0)
814 ret = rte_eth_dev_start(portid);
816 rte_panic("rte_eth_dev_start: err=%d, port=%d\n",
819 printf("done: Port %d ", portid);
821 /* get link status */
822 rte_eth_link_get(portid, &link);
823 if (link.link_status)
824 printf(" Link Up - speed %u Mbps - %s\n",
825 (unsigned) link.link_speed,
826 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
827 ("full-duplex") : ("half-duplex\n"));
829 printf(" Link Down\n");
831 * If enabled, put device in promiscuous mode.
832 * This allows IO forwarding mode to forward packets
833 * to itself through 2 cross-connected ports of the
837 rte_eth_promiscuous_enable(portid);
839 printf("Crypto: Initializing Crypto...\n");
840 if (crypto_init() != 0)
843 RTE_LCORE_FOREACH(lcoreid) {
844 if (per_core_crypto_init(lcoreid) != 0) {
845 printf("Crypto: Cannot init lcore crypto on lcore %u\n", (unsigned)lcoreid);
849 printf("Crypto: Initialization complete\n");
850 /* launch per-lcore init on every lcore */
851 rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
852 RTE_LCORE_FOREACH_SLAVE(lcoreid) {
853 if (rte_eal_wait_lcore(lcoreid) < 0)