4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2014 6WIND S.A.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 #include <sys/types.h>
49 #include <rte_lcore.h>
50 #include <rte_version.h>
51 #include <rte_devargs.h>
52 #include <rte_memcpy.h>
54 #include "eal_internal_cfg.h"
55 #include "eal_options.h"
56 #include "eal_filesystem.h"
58 #define BITS_PER_HEX 4
62 "b:" /* pci-blacklist */
67 "m:" /* memory size */
68 "n:" /* memory channels */
69 "r:" /* memory ranks */
71 "w:" /* pci-whitelist */
75 eal_long_options[] = {
76 {OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM },
77 {OPT_CREATE_UIO_DEV, 0, NULL, OPT_CREATE_UIO_DEV_NUM },
78 {OPT_FILE_PREFIX, 1, NULL, OPT_FILE_PREFIX_NUM },
79 {OPT_HELP, 0, NULL, OPT_HELP_NUM },
80 {OPT_HUGE_DIR, 1, NULL, OPT_HUGE_DIR_NUM },
81 {OPT_HUGE_UNLINK, 0, NULL, OPT_HUGE_UNLINK_NUM },
82 {OPT_LCORES, 1, NULL, OPT_LCORES_NUM },
83 {OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM },
84 {OPT_MASTER_LCORE, 1, NULL, OPT_MASTER_LCORE_NUM },
85 {OPT_NO_HPET, 0, NULL, OPT_NO_HPET_NUM },
86 {OPT_NO_HUGE, 0, NULL, OPT_NO_HUGE_NUM },
87 {OPT_NO_PCI, 0, NULL, OPT_NO_PCI_NUM },
88 {OPT_NO_SHCONF, 0, NULL, OPT_NO_SHCONF_NUM },
89 {OPT_PCI_BLACKLIST, 1, NULL, OPT_PCI_BLACKLIST_NUM },
90 {OPT_PCI_WHITELIST, 1, NULL, OPT_PCI_WHITELIST_NUM },
91 {OPT_PROC_TYPE, 1, NULL, OPT_PROC_TYPE_NUM },
92 {OPT_SOCKET_MEM, 1, NULL, OPT_SOCKET_MEM_NUM },
93 {OPT_SYSLOG, 1, NULL, OPT_SYSLOG_NUM },
94 {OPT_VDEV, 1, NULL, OPT_VDEV_NUM },
95 {OPT_VFIO_INTR, 1, NULL, OPT_VFIO_INTR_NUM },
96 {OPT_VMWARE_TSC_MAP, 0, NULL, OPT_VMWARE_TSC_MAP_NUM },
97 {OPT_XEN_DOM0, 0, NULL, OPT_XEN_DOM0_NUM },
101 TAILQ_HEAD(shared_driver_list, shared_driver);
103 /* Definition for shared object drivers. */
104 struct shared_driver {
105 TAILQ_ENTRY(shared_driver) next;
111 /* List of external loadable drivers */
112 static struct shared_driver_list solib_list =
113 TAILQ_HEAD_INITIALIZER(solib_list);
115 /* Default path of external loadable drivers */
116 static const char *default_solib_dir = RTE_EAL_PMD_PATH;
119 * Stringified version of solib path used by dpdk-pmdinfo.py
120 * Note: PLEASE DO NOT ALTER THIS without making a corresponding
121 * change to usertools/dpdk-pmdinfo.py
123 static const char dpdk_solib_path[] __attribute__((used)) =
124 "DPDK_PLUGIN_PATH=" RTE_EAL_PMD_PATH;
127 static int master_lcore_parsed;
128 static int mem_parsed;
129 static int core_parsed;
132 eal_reset_internal_config(struct internal_config *internal_cfg)
136 internal_cfg->memory = 0;
137 internal_cfg->force_nrank = 0;
138 internal_cfg->force_nchannel = 0;
139 internal_cfg->hugefile_prefix = HUGEFILE_PREFIX_DEFAULT;
140 internal_cfg->hugepage_dir = NULL;
141 internal_cfg->force_sockets = 0;
142 /* zero out the NUMA config */
143 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
144 internal_cfg->socket_mem[i] = 0;
145 /* zero out hugedir descriptors */
146 for (i = 0; i < MAX_HUGEPAGE_SIZES; i++)
147 internal_cfg->hugepage_info[i].lock_descriptor = -1;
148 internal_cfg->base_virtaddr = 0;
150 internal_cfg->syslog_facility = LOG_DAEMON;
151 /* default value from build option */
152 #if RTE_LOG_LEVEL >= RTE_LOG_DEBUG
153 internal_cfg->log_level = RTE_LOG_INFO;
155 internal_cfg->log_level = RTE_LOG_LEVEL;
158 internal_cfg->xen_dom0_support = 0;
160 /* if set to NONE, interrupt mode is determined automatically */
161 internal_cfg->vfio_intr_mode = RTE_INTR_MODE_NONE;
163 #ifdef RTE_LIBEAL_USE_HPET
164 internal_cfg->no_hpet = 0;
166 internal_cfg->no_hpet = 1;
168 internal_cfg->vmware_tsc_map = 0;
169 internal_cfg->create_uio_dev = 0;
173 eal_plugin_add(const char *path)
175 struct shared_driver *solib;
177 solib = malloc(sizeof(*solib));
179 RTE_LOG(ERR, EAL, "malloc(solib) failed\n");
182 memset(solib, 0, sizeof(*solib));
183 strncpy(solib->name, path, PATH_MAX-1);
184 solib->name[PATH_MAX-1] = 0;
185 TAILQ_INSERT_TAIL(&solib_list, solib, next);
191 eal_plugindir_init(const char *path)
194 struct dirent *dent = NULL;
195 char sopath[PATH_MAX];
197 if (path == NULL || *path == '\0')
202 RTE_LOG(ERR, EAL, "failed to open directory %s: %s\n",
203 path, strerror(errno));
207 while ((dent = readdir(d)) != NULL) {
210 snprintf(sopath, PATH_MAX-1, "%s/%s", path, dent->d_name);
211 sopath[PATH_MAX-1] = 0;
213 if (!(stat(sopath, &sb) == 0 && S_ISREG(sb.st_mode)))
216 if (eal_plugin_add(sopath) == -1)
221 /* XXX this ignores failures from readdir() itself */
222 return (dent == NULL) ? 0 : -1;
226 eal_plugins_init(void)
228 struct shared_driver *solib = NULL;
230 if (*default_solib_dir != '\0')
231 eal_plugin_add(default_solib_dir);
233 TAILQ_FOREACH(solib, &solib_list, next) {
236 if (stat(solib->name, &sb) == 0 && S_ISDIR(sb.st_mode)) {
237 if (eal_plugindir_init(solib->name) == -1) {
239 "Cannot init plugin directory %s\n",
244 RTE_LOG(DEBUG, EAL, "open shared lib %s\n",
246 solib->lib_handle = dlopen(solib->name, RTLD_NOW);
247 if (solib->lib_handle == NULL) {
248 RTE_LOG(ERR, EAL, "%s\n", dlerror());
258 * Parse the coremask given as argument (hexadecimal string) and fill
259 * the global configuration (core role and core count) with the parsed
262 static int xdigit2val(unsigned char c)
276 eal_parse_coremask(const char *coremask)
278 struct rte_config *cfg = rte_eal_get_configuration();
284 if (coremask == NULL)
286 /* Remove all blank characters ahead and after .
287 * Remove 0x/0X if exists.
289 while (isblank(*coremask))
291 if (coremask[0] == '0' && ((coremask[1] == 'x')
292 || (coremask[1] == 'X')))
294 i = strlen(coremask);
295 while ((i > 0) && isblank(coremask[i - 1]))
300 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
302 if (isxdigit(c) == 0) {
303 /* invalid characters */
307 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE; j++, idx++)
309 if ((1 << j) & val) {
310 if (!lcore_config[idx].detected) {
311 RTE_LOG(ERR, EAL, "lcore %u "
312 "unavailable\n", idx);
315 cfg->lcore_role[idx] = ROLE_RTE;
316 lcore_config[idx].core_index = count;
319 cfg->lcore_role[idx] = ROLE_OFF;
320 lcore_config[idx].core_index = -1;
325 if (coremask[i] != '0')
327 for (; idx < RTE_MAX_LCORE; idx++) {
328 cfg->lcore_role[idx] = ROLE_OFF;
329 lcore_config[idx].core_index = -1;
333 /* Update the count of enabled logical cores of the EAL configuration */
334 cfg->lcore_count = count;
339 eal_parse_corelist(const char *corelist)
341 struct rte_config *cfg = rte_eal_get_configuration();
347 if (corelist == NULL)
350 /* Remove all blank characters ahead and after */
351 while (isblank(*corelist))
353 i = strlen(corelist);
354 while ((i > 0) && isblank(corelist[i - 1]))
358 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
359 cfg->lcore_role[idx] = ROLE_OFF;
360 lcore_config[idx].core_index = -1;
363 /* Get list of cores */
366 while (isblank(*corelist))
368 if (*corelist == '\0')
371 idx = strtoul(corelist, &end, 10);
372 if (errno || end == NULL)
374 while (isblank(*end))
378 } else if ((*end == ',') || (*end == '\0')) {
380 if (min == RTE_MAX_LCORE)
382 for (idx = min; idx <= max; idx++) {
383 if (cfg->lcore_role[idx] != ROLE_RTE) {
384 cfg->lcore_role[idx] = ROLE_RTE;
385 lcore_config[idx].core_index = count;
393 } while (*end != '\0');
398 /* Update the count of enabled logical cores of the EAL configuration */
399 cfg->lcore_count = count;
404 /* Changes the lcore id of the master thread */
406 eal_parse_master_lcore(const char *arg)
409 struct rte_config *cfg = rte_eal_get_configuration();
412 cfg->master_lcore = (uint32_t) strtol(arg, &parsing_end, 0);
413 if (errno || parsing_end[0] != 0)
415 if (cfg->master_lcore >= RTE_MAX_LCORE)
417 master_lcore_parsed = 1;
422 * Parse elem, the elem could be single number/range or '(' ')' group
423 * 1) A single number elem, it's just a simple digit. e.g. 9
424 * 2) A single range elem, two digits with a '-' between. e.g. 2-6
425 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6)
426 * Within group elem, '-' used for a range separator;
427 * ',' used for a single number.
430 eal_parse_set(const char *input, uint16_t set[], unsigned num)
433 const char *str = input;
437 memset(set, 0, num * sizeof(uint16_t));
439 while (isblank(*str))
442 /* only digit or left bracket is qualify for start point */
443 if ((!isdigit(*str) && *str != '(') || *str == '\0')
446 /* process single number or single range of number */
449 idx = strtoul(str, &end, 10);
450 if (errno || end == NULL || idx >= num)
453 while (isblank(*end))
459 /* process single <number>-<number> */
461 while (isblank(*end))
467 idx = strtoul(end, &end, 10);
468 if (errno || end == NULL || idx >= num)
471 while (isblank(*end))
473 if (*end != ',' && *end != '\0')
477 if (*end != ',' && *end != '\0' &&
481 for (idx = RTE_MIN(min, max);
482 idx <= RTE_MAX(min, max); idx++)
489 /* process set within bracket */
491 while (isblank(*str))
499 /* go ahead to the first digit */
500 while (isblank(*str))
505 /* get the digit value */
507 idx = strtoul(str, &end, 10);
508 if (errno || end == NULL || idx >= num)
511 /* go ahead to separator '-',',' and ')' */
512 while (isblank(*end))
515 if (min == RTE_MAX_LCORE)
517 else /* avoid continuous '-' */
519 } else if ((*end == ',') || (*end == ')')) {
521 if (min == RTE_MAX_LCORE)
523 for (idx = RTE_MIN(min, max);
524 idx <= RTE_MAX(min, max); idx++)
532 } while (*end != '\0' && *end != ')');
535 * to avoid failure that tail blank makes end character check fail
536 * in eal_parse_lcores( )
538 while (isblank(*str))
544 /* convert from set array to cpuset bitmap */
546 convert_to_cpuset(rte_cpuset_t *cpusetp,
547 uint16_t *set, unsigned num)
553 for (idx = 0; idx < num; idx++) {
557 if (!lcore_config[idx].detected) {
558 RTE_LOG(ERR, EAL, "core %u "
559 "unavailable\n", idx);
563 CPU_SET(idx, cpusetp);
570 * The format pattern: --lcores='<lcores[@cpus]>[<,lcores[@cpus]>...]'
571 * lcores, cpus could be a single digit/range or a group.
572 * '(' and ')' are necessary if it's a group.
573 * If not supply '@cpus', the value of cpus uses the same as lcores.
574 * e.g. '1,2@(5-7),(3-5)@(0,2),(0,6),7-8' means start 9 EAL thread as below
575 * lcore 0 runs on cpuset 0x41 (cpu 0,6)
576 * lcore 1 runs on cpuset 0x2 (cpu 1)
577 * lcore 2 runs on cpuset 0xe0 (cpu 5,6,7)
578 * lcore 3,4,5 runs on cpuset 0x5 (cpu 0,2)
579 * lcore 6 runs on cpuset 0x41 (cpu 0,6)
580 * lcore 7 runs on cpuset 0x80 (cpu 7)
581 * lcore 8 runs on cpuset 0x100 (cpu 8)
584 eal_parse_lcores(const char *lcores)
586 struct rte_config *cfg = rte_eal_get_configuration();
587 static uint16_t set[RTE_MAX_LCORE];
590 const char *lcore_start = NULL;
591 const char *end = NULL;
600 /* Remove all blank characters ahead and after */
601 while (isblank(*lcores))
606 /* Reset lcore config */
607 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
608 cfg->lcore_role[idx] = ROLE_OFF;
609 lcore_config[idx].core_index = -1;
610 CPU_ZERO(&lcore_config[idx].cpuset);
613 /* Get list of cores */
615 while (isblank(*lcores))
622 /* record lcore_set start point */
623 lcore_start = lcores;
625 /* go across a complete bracket */
626 if (*lcore_start == '(') {
627 lcores += strcspn(lcores, ")");
628 if (*lcores++ == '\0')
632 /* scan the separator '@', ','(next) or '\0'(finish) */
633 lcores += strcspn(lcores, "@,");
635 if (*lcores == '@') {
636 /* explicit assign cpu_set */
637 offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
641 /* prepare cpu_set and update the end cursor */
642 if (0 > convert_to_cpuset(&cpuset,
645 end = lcores + 1 + offset;
646 } else { /* ',' or '\0' */
647 /* haven't given cpu_set, current loop done */
650 /* go back to check <number>-<number> */
651 offset = strcspn(lcore_start, "(-");
652 if (offset < (end - lcore_start) &&
653 *(lcore_start + offset) != '(')
657 if (*end != ',' && *end != '\0')
660 /* parse lcore_set from start point */
661 if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
664 /* without '@', by default using lcore_set as cpu_set */
665 if (*lcores != '@' &&
666 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
669 /* start to update lcore_set */
670 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
674 if (cfg->lcore_role[idx] != ROLE_RTE) {
675 lcore_config[idx].core_index = count;
676 cfg->lcore_role[idx] = ROLE_RTE;
682 CPU_SET(idx, &cpuset);
684 rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
685 sizeof(rte_cpuset_t));
689 } while (*end != '\0');
694 cfg->lcore_count = count;
703 eal_parse_syslog(const char *facility, struct internal_config *conf)
710 { "auth", LOG_AUTH },
711 { "cron", LOG_CRON },
712 { "daemon", LOG_DAEMON },
714 { "kern", LOG_KERN },
716 { "mail", LOG_MAIL },
717 { "news", LOG_NEWS },
718 { "syslog", LOG_SYSLOG },
719 { "user", LOG_USER },
720 { "uucp", LOG_UUCP },
721 { "local0", LOG_LOCAL0 },
722 { "local1", LOG_LOCAL1 },
723 { "local2", LOG_LOCAL2 },
724 { "local3", LOG_LOCAL3 },
725 { "local4", LOG_LOCAL4 },
726 { "local5", LOG_LOCAL5 },
727 { "local6", LOG_LOCAL6 },
728 { "local7", LOG_LOCAL7 },
732 for (i = 0; map[i].name; i++) {
733 if (!strcmp(facility, map[i].name)) {
734 conf->syslog_facility = map[i].value;
742 eal_parse_log_level(const char *level, uint32_t *log_level)
748 tmp = strtoul(level, &end, 0);
750 /* check for errors */
751 if ((errno != 0) || (level[0] == '\0') ||
752 end == NULL || (*end != '\0'))
755 /* log_level is a uint32_t */
756 if (tmp >= UINT32_MAX)
763 static enum rte_proc_type_t
764 eal_parse_proc_type(const char *arg)
766 if (strncasecmp(arg, "primary", sizeof("primary")) == 0)
767 return RTE_PROC_PRIMARY;
768 if (strncasecmp(arg, "secondary", sizeof("secondary")) == 0)
769 return RTE_PROC_SECONDARY;
770 if (strncasecmp(arg, "auto", sizeof("auto")) == 0)
771 return RTE_PROC_AUTO;
773 return RTE_PROC_INVALID;
777 eal_parse_common_option(int opt, const char *optarg,
778 struct internal_config *conf)
783 if (rte_eal_devargs_add(RTE_DEVTYPE_BLACKLISTED_PCI,
790 if (rte_eal_devargs_add(RTE_DEVTYPE_WHITELISTED_PCI,
797 if (eal_parse_coremask(optarg) < 0) {
798 RTE_LOG(ERR, EAL, "invalid coremask\n");
805 if (eal_parse_corelist(optarg) < 0) {
806 RTE_LOG(ERR, EAL, "invalid core list\n");
813 conf->memory = atoi(optarg);
814 conf->memory *= 1024ULL;
815 conf->memory *= 1024ULL;
818 /* force number of channels */
820 conf->force_nchannel = atoi(optarg);
821 if (conf->force_nchannel == 0) {
822 RTE_LOG(ERR, EAL, "invalid channel number\n");
826 /* force number of ranks */
828 conf->force_nrank = atoi(optarg);
829 if (conf->force_nrank == 0 ||
830 conf->force_nrank > 16) {
831 RTE_LOG(ERR, EAL, "invalid rank number\n");
835 /* force loading of external driver */
837 if (eal_plugin_add(optarg) == -1)
841 /* since message is explicitly requested by user, we
842 * write message at highest log level so it can always
844 * even if info or warning messages are disabled */
845 RTE_LOG(CRIT, EAL, "RTE Version: '%s'\n", rte_version());
849 case OPT_HUGE_UNLINK_NUM:
850 conf->hugepage_unlink = 1;
853 case OPT_NO_HUGE_NUM:
854 conf->no_hugetlbfs = 1;
861 case OPT_NO_HPET_NUM:
865 case OPT_VMWARE_TSC_MAP_NUM:
866 conf->vmware_tsc_map = 1;
869 case OPT_NO_SHCONF_NUM:
873 case OPT_PROC_TYPE_NUM:
874 conf->process_type = eal_parse_proc_type(optarg);
877 case OPT_MASTER_LCORE_NUM:
878 if (eal_parse_master_lcore(optarg) < 0) {
879 RTE_LOG(ERR, EAL, "invalid parameter for --"
880 OPT_MASTER_LCORE "\n");
886 if (rte_eal_devargs_add(RTE_DEVTYPE_VIRTUAL,
893 if (eal_parse_syslog(optarg, conf) < 0) {
894 RTE_LOG(ERR, EAL, "invalid parameters for --"
900 case OPT_LOG_LEVEL_NUM: {
903 if (eal_parse_log_level(optarg, &log) < 0) {
905 "invalid parameters for --"
909 conf->log_level = log;
913 if (eal_parse_lcores(optarg) < 0) {
914 RTE_LOG(ERR, EAL, "invalid parameter for --"
921 /* don't know what to do, leave this to caller */
931 eal_auto_detect_cores(struct rte_config *cfg)
933 unsigned int lcore_id;
934 unsigned int removed = 0;
935 rte_cpuset_t affinity_set;
936 pthread_t tid = pthread_self();
938 if (pthread_getaffinity_np(tid, sizeof(rte_cpuset_t),
940 CPU_ZERO(&affinity_set);
942 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
943 if (cfg->lcore_role[lcore_id] == ROLE_RTE &&
944 !CPU_ISSET(lcore_id, &affinity_set)) {
945 cfg->lcore_role[lcore_id] = ROLE_OFF;
950 cfg->lcore_count -= removed;
954 eal_adjust_config(struct internal_config *internal_cfg)
957 struct rte_config *cfg = rte_eal_get_configuration();
960 eal_auto_detect_cores(cfg);
962 if (internal_config.process_type == RTE_PROC_AUTO)
963 internal_config.process_type = eal_proc_type_detect();
965 /* default master lcore is the first one */
966 if (!master_lcore_parsed)
967 cfg->master_lcore = rte_get_next_lcore(-1, 0, 0);
969 /* if no memory amounts were requested, this will result in 0 and
970 * will be overridden later, right after eal_hugepage_info_init() */
971 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
972 internal_cfg->memory += internal_cfg->socket_mem[i];
978 eal_check_common_options(struct internal_config *internal_cfg)
980 struct rte_config *cfg = rte_eal_get_configuration();
982 if (cfg->lcore_role[cfg->master_lcore] != ROLE_RTE) {
983 RTE_LOG(ERR, EAL, "Master lcore is not enabled for DPDK\n");
987 if (internal_cfg->process_type == RTE_PROC_INVALID) {
988 RTE_LOG(ERR, EAL, "Invalid process type specified\n");
991 if (index(internal_cfg->hugefile_prefix, '%') != NULL) {
992 RTE_LOG(ERR, EAL, "Invalid char, '%%', in --"OPT_FILE_PREFIX" "
996 if (mem_parsed && internal_cfg->force_sockets == 1) {
997 RTE_LOG(ERR, EAL, "Options -m and --"OPT_SOCKET_MEM" cannot "
998 "be specified at the same time\n");
1001 if (internal_cfg->no_hugetlbfs && internal_cfg->force_sockets == 1) {
1002 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_MEM" cannot "
1003 "be specified together with --"OPT_NO_HUGE"\n");
1007 if (internal_cfg->no_hugetlbfs && internal_cfg->hugepage_unlink) {
1008 RTE_LOG(ERR, EAL, "Option --"OPT_HUGE_UNLINK" cannot "
1009 "be specified together with --"OPT_NO_HUGE"\n");
1013 if (rte_eal_devargs_type_count(RTE_DEVTYPE_WHITELISTED_PCI) != 0 &&
1014 rte_eal_devargs_type_count(RTE_DEVTYPE_BLACKLISTED_PCI) != 0) {
1015 RTE_LOG(ERR, EAL, "Options blacklist (-b) and whitelist (-w) "
1016 "cannot be used at the same time\n");
1024 eal_common_usage(void)
1026 printf("[options]\n\n"
1027 "EAL common options:\n"
1028 " -c COREMASK Hexadecimal bitmask of cores to run on\n"
1029 " -l CORELIST List of cores to run on\n"
1030 " The argument format is <c1>[-c2][,c3[-c4],...]\n"
1031 " where c1, c2, etc are core indexes between 0 and %d\n"
1032 " --"OPT_LCORES" COREMAP Map lcore set to physical cpu set\n"
1033 " The argument format is\n"
1034 " '<lcores[@cpus]>[<,lcores[@cpus]>...]'\n"
1035 " lcores and cpus list are grouped by '(' and ')'\n"
1036 " Within the group, '-' is used for range separator,\n"
1037 " ',' is used for single number separator.\n"
1038 " '( )' can be omitted for single element group,\n"
1039 " '@' can be omitted if cpus and lcores have the same value\n"
1040 " --"OPT_MASTER_LCORE" ID Core ID that is used as master\n"
1041 " -n CHANNELS Number of memory channels\n"
1042 " -m MB Memory to allocate (see also --"OPT_SOCKET_MEM")\n"
1043 " -r RANKS Force number of memory ranks (don't detect)\n"
1044 " -b, --"OPT_PCI_BLACKLIST" Add a PCI device in black list.\n"
1045 " Prevent EAL from using this PCI device. The argument\n"
1046 " format is <domain:bus:devid.func>.\n"
1047 " -w, --"OPT_PCI_WHITELIST" Add a PCI device in white list.\n"
1048 " Only use the specified PCI devices. The argument format\n"
1049 " is <[domain:]bus:devid.func>. This option can be present\n"
1050 " several times (once per device).\n"
1051 " [NOTE: PCI whitelist cannot be used with -b option]\n"
1052 " --"OPT_VDEV" Add a virtual device.\n"
1053 " The argument format is <driver><id>[,key=val,...]\n"
1054 " (ex: --vdev=net_pcap0,iface=eth2).\n"
1055 " -d LIB.so|DIR Add a driver or driver directory\n"
1056 " (can be used multiple times)\n"
1057 " --"OPT_VMWARE_TSC_MAP" Use VMware TSC map instead of native RDTSC\n"
1058 " --"OPT_PROC_TYPE" Type of this process (primary|secondary|auto)\n"
1059 " --"OPT_SYSLOG" Set syslog facility\n"
1060 " --"OPT_LOG_LEVEL" Set default log level\n"
1061 " -v Display version information on startup\n"
1062 " -h, --help This help\n"
1063 "\nEAL options for DEBUG use only:\n"
1064 " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n"
1065 " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n"
1066 " --"OPT_NO_PCI" Disable PCI\n"
1067 " --"OPT_NO_HPET" Disable HPET\n"
1068 " --"OPT_NO_SHCONF" No shared config (mmap'd files)\n"
1069 "\n", RTE_MAX_LCORE);